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tty: relock riscom8 using port locks
[deliverable/linux.git] / drivers / char / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
80ff8a80
JS		 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
1da177e4 6 *
1c45607a
JS		 7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
1da177e4
LT		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 14 * (at your option) any later version.
1da177e4 15 *
1da177e4 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
8eb04cf3
AC		 17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
18 * www.moxa.com.
1da177e4 19 * - Fixed x86_64 cleanness
1da177e4
LT		 20 */
21
1da177e4 22#include <linux/module.h>
1da177e4
LT		 23#include <linux/errno.h>
24#include <linux/signal.h>
25#include <linux/sched.h>
26#include <linux/timer.h>
27#include <linux/interrupt.h>
28#include <linux/tty.h>
29#include <linux/tty_flip.h>
30#include <linux/serial.h>
31#include <linux/serial_reg.h>
32#include <linux/major.h>
33#include <linux/string.h>
34#include <linux/fcntl.h>
35#include <linux/ptrace.h>
36#include <linux/gfp.h>
37#include <linux/ioport.h>
38#include <linux/mm.h>
1da177e4
LT		 39#include <linux/delay.h>
40#include <linux/pci.h>
1977f032 41#include <linux/bitops.h>
1da177e4
LT		 42
43#include <asm/system.h>
44#include <asm/io.h>
45#include <asm/irq.h>
1da177e4
LT		 46#include <asm/uaccess.h>
47
48#include "mxser.h"
49
e129deff 50#define MXSER_VERSION "2.0.4" /* 1.12 */
1da177e4 51#define MXSERMAJOR 174
1da177e4 52
1da177e4 53#define MXSER_BOARDS 4 /* Max. boards */
1da177e4 54#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
1c45607a
JS		 55#define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
56#define MXSER_ISR_PASS_LIMIT 100
1da177e4 57
1c45607a
JS		 58/*CheckIsMoxaMust return value*/
59#define MOXA_OTHER_UART 0x00
60#define MOXA_MUST_MU150_HWID 0x01
61#define MOXA_MUST_MU860_HWID 0x02
62
1da177e4
LT		 63#define WAKEUP_CHARS 256
64
65#define UART_MCR_AFE 0x20
66#define UART_LSR_SPECIAL 0x1E
67
e129deff 68#define PCI_DEVICE_ID_POS104UL 0x1044
1c45607a 69#define PCI_DEVICE_ID_CB108 0x1080
e129deff 70#define PCI_DEVICE_ID_CP102UF 0x1023
1c45607a 71#define PCI_DEVICE_ID_CB114 0x1142
80ff8a80 72#define PCI_DEVICE_ID_CP114UL 0x1143
1c45607a
JS		 73#define PCI_DEVICE_ID_CB134I 0x1341
74#define PCI_DEVICE_ID_CP138U 0x1380
1da177e4 75
1da177e4
LT		 76
77#define C168_ASIC_ID 1
78#define C104_ASIC_ID 2
79#define C102_ASIC_ID 0xB
80#define CI132_ASIC_ID 4
81#define CI134_ASIC_ID 3
82#define CI104J_ASIC_ID 5
83
1c45607a
JS		 84#define MXSER_HIGHBAUD 1
85#define MXSER_HAS2 2
1da177e4 86
8ea2c2ec 87/* This is only for PCI */
1c45607a 88static const struct {
1da177e4
LT		 89 int type;
90 int tx_fifo;
91 int rx_fifo;
92 int xmit_fifo_size;
93 int rx_high_water;
94 int rx_trigger;
95 int rx_low_water;
96 long max_baud;
1c45607a 97} Gpci_uart_info[] = {
1da177e4
LT		 98 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
99 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
100 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
101};
1c45607a 102#define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
1da177e4 103
1c45607a
JS		 104struct mxser_cardinfo {
105 char *name;
106 unsigned int nports;
107 unsigned int flags;
108};
1da177e4 109
1c45607a
JS		 110static const struct mxser_cardinfo mxser_cards[] = {
111/* 0*/ { "C168 series", 8, },
112 { "C104 series", 4, },
113 { "CI-104J series", 4, },
114 { "C168H/PCI series", 8, },
115 { "C104H/PCI series", 4, },
116/* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
117 { "CI-132 series", 4, MXSER_HAS2 },
118 { "CI-134 series", 4, },
119 { "CP-132 series", 2, },
120 { "CP-114 series", 4, },
121/*10*/ { "CT-114 series", 4, },
122 { "CP-102 series", 2, MXSER_HIGHBAUD },
123 { "CP-104U series", 4, },
124 { "CP-168U series", 8, },
125 { "CP-132U series", 2, },
126/*15*/ { "CP-134U series", 4, },
127 { "CP-104JU series", 4, },
128 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
129 { "CP-118U series", 8, },
130 { "CP-102UL series", 2, },
131/*20*/ { "CP-102U series", 2, },
132 { "CP-118EL series", 8, },
133 { "CP-168EL series", 8, },
134 { "CP-104EL series", 4, },
135 { "CB-108 series", 8, },
136/*25*/ { "CB-114 series", 4, },
137 { "CB-134I series", 4, },
138 { "CP-138U series", 8, },
80ff8a80 139 { "POS-104UL series", 4, },
e129deff
JS		 140 { "CP-114UL series", 4, },
141/*30*/ { "CP-102UF series", 2, }
1c45607a 142};
1da177e4 143
1c45607a
JS		 144/* driver_data correspond to the lines in the structure above
145 see also ISA probe function before you change something */
1da177e4 146static struct pci_device_id mxser_pcibrds[] = {
1c45607a
JS		 147 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
148 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
80ff8a80 170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
e129deff 171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
1c45607a 172 { }
1da177e4 173};
1da177e4
LT		 174MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
175
1df00924 176static unsigned long ioaddr[MXSER_BOARDS];
1da177e4 177static int ttymajor = MXSERMAJOR;
1da177e4
LT		 178
179/* Variables for insmod */
180
181MODULE_AUTHOR("Casper Yang");
182MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
1df00924
JS		 183module_param_array(ioaddr, ulong, NULL, 0);
184MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
8d3b33f6 185module_param(ttymajor, int, 0);
1da177e4
LT		 186MODULE_LICENSE("GPL");
187
188struct mxser_log {
189 int tick;
190 unsigned long rxcnt[MXSER_PORTS];
191 unsigned long txcnt[MXSER_PORTS];
192};
193
1da177e4
LT		 194struct mxser_mon {
195 unsigned long rxcnt;
196 unsigned long txcnt;
197 unsigned long up_rxcnt;
198 unsigned long up_txcnt;
199 int modem_status;
200 unsigned char hold_reason;
201};
202
203struct mxser_mon_ext {
204 unsigned long rx_cnt[32];
205 unsigned long tx_cnt[32];
206 unsigned long up_rxcnt[32];
207 unsigned long up_txcnt[32];
208 int modem_status[32];
209
210 long baudrate[32];
211 int databits[32];
212 int stopbits[32];
213 int parity[32];
214 int flowctrl[32];
215 int fifo[32];
216 int iftype[32];
217};
8ea2c2ec 218
1c45607a
JS		 219struct mxser_board;
220
221struct mxser_port {
0ad9e7d1 222 struct tty_port port;
1c45607a 223 struct mxser_board *board;
1c45607a
JS		 224
225 unsigned long ioaddr;
226 unsigned long opmode_ioaddr;
227 int max_baud;
1da177e4 228
1da177e4
LT		 229 int rx_high_water;
230 int rx_trigger; /* Rx fifo trigger level */
231 int rx_low_water;
232 int baud_base; /* max. speed */
1da177e4 233 int type; /* UART type */
1c45607a 234
1da177e4 235 int x_char; /* xon/xoff character */
1da177e4
LT		 236 int IER; /* Interrupt Enable Register */
237 int MCR; /* Modem control register */
1c45607a
JS		 238
239 unsigned char stop_rx;
240 unsigned char ldisc_stop_rx;
241
242 int custom_divisor;
1c45607a 243 unsigned char err_shadow;
1c45607a 244
1c45607a
JS		 245 struct async_icount icount; /* kernel counters for 4 input interrupts */
246 int timeout;
247
248 int read_status_mask;
249 int ignore_status_mask;
250 int xmit_fifo_size;
1da177e4
LT		 251 int xmit_head;
252 int xmit_tail;
253 int xmit_cnt;
1c45607a 254
606d099c 255 struct ktermios normal_termios;
1c45607a 256
1da177e4 257 struct mxser_mon mon_data;
1c45607a 258
1da177e4 259 spinlock_t slock;
1c45607a
JS		 260 wait_queue_head_t delta_msr_wait;
261};
262
263struct mxser_board {
264 unsigned int idx;
265 int irq;
266 const struct mxser_cardinfo *info;
267 unsigned long vector;
268 unsigned long vector_mask;
269
270 int chip_flag;
271 int uart_type;
272
273 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
1da177e4
LT		 274};
275
1da177e4
LT		 276struct mxser_mstatus {
277 tcflag_t cflag;
278 int cts;
279 int dsr;
280 int ri;
281 int dcd;
282};
283
1c45607a 284static struct mxser_board mxser_boards[MXSER_BOARDS];
1da177e4 285static struct tty_driver *mxvar_sdriver;
1da177e4 286static struct mxser_log mxvar_log;
1da177e4 287static int mxser_set_baud_method[MXSER_PORTS + 1];
1da177e4 288
148ff86b
CH		 289static void mxser_enable_must_enchance_mode(unsigned long baseio)
290{
291 u8 oldlcr;
292 u8 efr;
293
294 oldlcr = inb(baseio + UART_LCR);
295 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
296
297 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
298 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
299
300 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
301 outb(oldlcr, baseio + UART_LCR);
302}
303
304static void mxser_disable_must_enchance_mode(unsigned long baseio)
305{
306 u8 oldlcr;
307 u8 efr;
308
309 oldlcr = inb(baseio + UART_LCR);
310 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
311
312 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
313 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
314
315 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
316 outb(oldlcr, baseio + UART_LCR);
317}
318
319static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
320{
321 u8 oldlcr;
322 u8 efr;
323
324 oldlcr = inb(baseio + UART_LCR);
325 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
326
327 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
328 efr &= ~MOXA_MUST_EFR_BANK_MASK;
329 efr |= MOXA_MUST_EFR_BANK0;
330
331 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
332 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
333 outb(oldlcr, baseio + UART_LCR);
334}
335
336static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
337{
338 u8 oldlcr;
339 u8 efr;
340
341 oldlcr = inb(baseio + UART_LCR);
342 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
343
344 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
345 efr &= ~MOXA_MUST_EFR_BANK_MASK;
346 efr |= MOXA_MUST_EFR_BANK0;
347
348 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
349 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
350 outb(oldlcr, baseio + UART_LCR);
351}
352
353static void mxser_set_must_fifo_value(struct mxser_port *info)
354{
355 u8 oldlcr;
356 u8 efr;
357
358 oldlcr = inb(info->ioaddr + UART_LCR);
359 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
360
361 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
362 efr &= ~MOXA_MUST_EFR_BANK_MASK;
363 efr |= MOXA_MUST_EFR_BANK1;
364
365 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
366 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
367 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
368 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
369 outb(oldlcr, info->ioaddr + UART_LCR);
370}
371
372static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
373{
374 u8 oldlcr;
375 u8 efr;
376
377 oldlcr = inb(baseio + UART_LCR);
378 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
379
380 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
381 efr &= ~MOXA_MUST_EFR_BANK_MASK;
382 efr |= MOXA_MUST_EFR_BANK2;
383
384 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
385 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
386 outb(oldlcr, baseio + UART_LCR);
387}
388
389static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
390{
391 u8 oldlcr;
392 u8 efr;
393
394 oldlcr = inb(baseio + UART_LCR);
395 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
396
397 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
398 efr &= ~MOXA_MUST_EFR_BANK_MASK;
399 efr |= MOXA_MUST_EFR_BANK2;
400
401 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
402 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
403 outb(oldlcr, baseio + UART_LCR);
404}
405
406static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
407{
408 u8 oldlcr;
409 u8 efr;
410
411 oldlcr = inb(baseio + UART_LCR);
412 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
413
414 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
415 efr &= ~MOXA_MUST_EFR_SF_MASK;
416
417 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
418 outb(oldlcr, baseio + UART_LCR);
419}
420
421static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
422{
423 u8 oldlcr;
424 u8 efr;
425
426 oldlcr = inb(baseio + UART_LCR);
427 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
428
429 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
430 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
431 efr |= MOXA_MUST_EFR_SF_TX1;
432
433 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
434 outb(oldlcr, baseio + UART_LCR);
435}
436
437static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
438{
439 u8 oldlcr;
440 u8 efr;
441
442 oldlcr = inb(baseio + UART_LCR);
443 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
444
445 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
446 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
447
448 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
449 outb(oldlcr, baseio + UART_LCR);
450}
451
452static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
453{
454 u8 oldlcr;
455 u8 efr;
456
457 oldlcr = inb(baseio + UART_LCR);
458 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
459
460 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
461 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
462 efr |= MOXA_MUST_EFR_SF_RX1;
463
464 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
465 outb(oldlcr, baseio + UART_LCR);
466}
467
468static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
469{
470 u8 oldlcr;
471 u8 efr;
472
473 oldlcr = inb(baseio + UART_LCR);
474 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
475
476 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
477 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
478
479 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
480 outb(oldlcr, baseio + UART_LCR);
481}
482
b8cc5549 483#ifdef CONFIG_PCI
1c45607a 484static int __devinit CheckIsMoxaMust(unsigned long io)
1da177e4
LT		 485{
486 u8 oldmcr, hwid;
487 int i;
488
489 outb(0, io + UART_LCR);
148ff86b 490 mxser_disable_must_enchance_mode(io);
1da177e4
LT		 491 oldmcr = inb(io + UART_MCR);
492 outb(0, io + UART_MCR);
148ff86b 493 mxser_set_must_xon1_value(io, 0x11);
1da177e4
LT		 494 if ((hwid = inb(io + UART_MCR)) != 0) {
495 outb(oldmcr, io + UART_MCR);
8ea2c2ec 496 return MOXA_OTHER_UART;
1da177e4
LT		 497 }
498
148ff86b 499 mxser_get_must_hardware_id(io, &hwid);
1c45607a
JS		 500 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
501 if (hwid == Gpci_uart_info[i].type)
8ea2c2ec 502 return (int)hwid;
1da177e4
LT		 503 }
504 return MOXA_OTHER_UART;
505}
b8cc5549 506#endif
1da177e4 507
1c45607a 508static void process_txrx_fifo(struct mxser_port *info)
1da177e4
LT		 509{
510 int i;
511
512 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
513 info->rx_trigger = 1;
514 info->rx_high_water = 1;
515 info->rx_low_water = 1;
516 info->xmit_fifo_size = 1;
1c45607a
JS		 517 } else
518 for (i = 0; i < UART_INFO_NUM; i++)
519 if (info->board->chip_flag == Gpci_uart_info[i].type) {
1da177e4
LT		 520 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
521 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
522 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
523 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
524 break;
525 }
1da177e4
LT		 526}
527
1c45607a 528static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
1da177e4 529{
72800df9 530 static unsigned char mxser_msr[MXSER_PORTS + 1];
1c45607a 531 unsigned char status = 0;
1da177e4 532
1c45607a 533 status = inb(baseaddr + UART_MSR);
1da177e4 534
1c45607a
JS		 535 mxser_msr[port] &= 0x0F;
536 mxser_msr[port] |= status;
537 status = mxser_msr[port];
538 if (mode)
539 mxser_msr[port] = 0;
1da177e4 540
1c45607a
JS		 541 return status;
542}
1da177e4 543
31f35939
AC		 544static int mxser_carrier_raised(struct tty_port *port)
545{
546 struct mxser_port *mp = container_of(port, struct mxser_port, port);
547 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
548}
549
5d951fb4
AC		 550static void mxser_raise_dtr_rts(struct tty_port *port)
551{
552 struct mxser_port *mp = container_of(port, struct mxser_port, port);
553 unsigned long flags;
554
555 spin_lock_irqsave(&mp->slock, flags);
556 outb(inb(mp->ioaddr + UART_MCR) |
557 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
558 spin_unlock_irqrestore(&mp->slock, flags);
559}
560
1c45607a 561static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
31f35939 562 struct mxser_port *mp)
1c45607a
JS		 563{
564 DECLARE_WAITQUEUE(wait, current);
565 int retval;
566 int do_clocal = 0;
567 unsigned long flags;
31f35939
AC		 568 int cd;
569 struct tty_port *port = &mp->port;
1da177e4 570
1c45607a
JS		 571 /*
572 * If non-blocking mode is set, or the port is not enabled,
573 * then make the check up front and then exit.
574 */
575 if ((filp->f_flags & O_NONBLOCK) ||
576 test_bit(TTY_IO_ERROR, &tty->flags)) {
31f35939 577 port->flags |= ASYNC_NORMAL_ACTIVE;
1c45607a
JS		 578 return 0;
579 }
1da177e4 580
1c45607a
JS		 581 if (tty->termios->c_cflag & CLOCAL)
582 do_clocal = 1;
1da177e4 583
1da177e4 584 /*
1c45607a
JS		 585 * Block waiting for the carrier detect and the line to become
586 * free (i.e., not in use by the callout). While we are in
31f35939 587 * this loop, port->count is dropped by one, so that
1c45607a
JS		 588 * mxser_close() knows when to free things. We restore it upon
589 * exit, either normal or abnormal.
1da177e4 590 */
1c45607a 591 retval = 0;
31f35939 592 add_wait_queue(&port->open_wait, &wait);
1da177e4 593
31f35939 594 spin_lock_irqsave(&mp->slock, flags);
1c45607a 595 if (!tty_hung_up_p(filp))
31f35939
AC		 596 port->count--;
597 spin_unlock_irqrestore(&mp->slock, flags);
598 port->blocked_open++;
1c45607a 599 while (1) {
5d951fb4 600 tty_port_raise_dtr_rts(port);
1c45607a 601 set_current_state(TASK_INTERRUPTIBLE);
31f35939
AC		 602 if (tty_hung_up_p(filp) || !(port->flags & ASYNC_INITIALIZED)) {
603 if (port->flags & ASYNC_HUP_NOTIFY)
1c45607a
JS		 604 retval = -EAGAIN;
605 else
606 retval = -ERESTARTSYS;
607 break;
608 }
31f35939
AC		 609 cd = tty_port_carrier_raised(port);
610 if (!(port->flags & ASYNC_CLOSING) && (do_clocal || cd))
1c45607a
JS		 611 break;
612 if (signal_pending(current)) {
613 retval = -ERESTARTSYS;
614 break;
615 }
616 schedule();
1da177e4 617 }
1c45607a 618 set_current_state(TASK_RUNNING);
31f35939 619 remove_wait_queue(&port->open_wait, &wait);
1c45607a 620 if (!tty_hung_up_p(filp))
31f35939
AC		 621 port->count++;
622 port->blocked_open--;
1c45607a 623 if (retval)
1da177e4 624 return retval;
31f35939 625 port->flags |= ASYNC_NORMAL_ACTIVE;
1da177e4
LT		 626 return 0;
627}
628
216ba023 629static int mxser_set_baud(struct tty_struct *tty, long newspd)
1da177e4 630{
216ba023 631 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 632 int quot = 0, baud;
633 unsigned char cval;
1da177e4 634
216ba023 635 if (!info->ioaddr)
1c45607a 636 return -1;
1da177e4 637
1c45607a
JS		 638 if (newspd > info->max_baud)
639 return -1;
1da177e4 640
1c45607a
JS		 641 if (newspd == 134) {
642 quot = 2 * info->baud_base / 269;
216ba023 643 tty_encode_baud_rate(tty, 134, 134);
1c45607a
JS		 644 } else if (newspd) {
645 quot = info->baud_base / newspd;
646 if (quot == 0)
647 quot = 1;
648 baud = info->baud_base/quot;
216ba023 649 tty_encode_baud_rate(tty, baud, baud);
1c45607a
JS		 650 } else {
651 quot = 0;
652 }
1da177e4 653
1c45607a
JS		 654 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
655 info->timeout += HZ / 50; /* Add .02 seconds of slop */
1da177e4 656
1c45607a
JS		 657 if (quot) {
658 info->MCR |= UART_MCR_DTR;
659 outb(info->MCR, info->ioaddr + UART_MCR);
660 } else {
661 info->MCR &= ~UART_MCR_DTR;
662 outb(info->MCR, info->ioaddr + UART_MCR);
663 return 0;
664 }
1da177e4 665
1c45607a 666 cval = inb(info->ioaddr + UART_LCR);
1da177e4 667
1c45607a 668 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
1da177e4 669
1c45607a
JS		 670 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
671 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
672 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
1da177e4 673
1c45607a 674#ifdef BOTHER
216ba023 675 if (C_BAUD(tty) == BOTHER) {
1c45607a
JS		 676 quot = info->baud_base % newspd;
677 quot *= 8;
678 if (quot % newspd > newspd / 2) {
679 quot /= newspd;
680 quot++;
681 } else
682 quot /= newspd;
683
148ff86b 684 mxser_set_must_enum_value(info->ioaddr, quot);
1c45607a
JS		 685 } else
686#endif
148ff86b 687 mxser_set_must_enum_value(info->ioaddr, 0);
1da177e4 688
8ea2c2ec 689 return 0;
1da177e4 690}
1da177e4 691
1c45607a
JS		 692/*
693 * This routine is called to set the UART divisor registers to match
694 * the specified baud rate for a serial port.
695 */
216ba023
AC		 696static int mxser_change_speed(struct tty_struct *tty,
697 struct ktermios *old_termios)
1da177e4 698{
216ba023 699 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 700 unsigned cflag, cval, fcr;
701 int ret = 0;
702 unsigned char status;
1da177e4 703
216ba023
AC		 704 cflag = tty->termios->c_cflag;
705 if (!info->ioaddr)
1c45607a 706 return ret;
1da177e4 707
216ba023
AC		 708 if (mxser_set_baud_method[tty->index] == 0)
709 mxser_set_baud(tty, tty_get_baud_rate(tty));
1da177e4 710
1c45607a
JS		 711 /* byte size and parity */
712 switch (cflag & CSIZE) {
713 case CS5:
714 cval = 0x00;
715 break;
716 case CS6:
717 cval = 0x01;
718 break;
719 case CS7:
720 cval = 0x02;
721 break;
722 case CS8:
723 cval = 0x03;
724 break;
725 default:
726 cval = 0x00;
727 break; /* too keep GCC shut... */
728 }
729 if (cflag & CSTOPB)
730 cval |= 0x04;
731 if (cflag & PARENB)
732 cval |= UART_LCR_PARITY;
733 if (!(cflag & PARODD))
734 cval |= UART_LCR_EPAR;
735 if (cflag & CMSPAR)
736 cval |= UART_LCR_SPAR;
1da177e4 737
1c45607a
JS		 738 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
739 if (info->board->chip_flag) {
740 fcr = UART_FCR_ENABLE_FIFO;
741 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
148ff86b 742 mxser_set_must_fifo_value(info);
1c45607a
JS		 743 } else
744 fcr = 0;
745 } else {
746 fcr = UART_FCR_ENABLE_FIFO;
747 if (info->board->chip_flag) {
748 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
148ff86b 749 mxser_set_must_fifo_value(info);
1c45607a
JS		 750 } else {
751 switch (info->rx_trigger) {
752 case 1:
753 fcr |= UART_FCR_TRIGGER_1;
754 break;
755 case 4:
756 fcr |= UART_FCR_TRIGGER_4;
757 break;
758 case 8:
759 fcr |= UART_FCR_TRIGGER_8;
760 break;
761 default:
762 fcr |= UART_FCR_TRIGGER_14;
763 break;
764 }
1da177e4 765 }
1da177e4
LT		 766 }
767
1c45607a
JS		 768 /* CTS flow control flag and modem status interrupts */
769 info->IER &= ~UART_IER_MSI;
770 info->MCR &= ~UART_MCR_AFE;
771 if (cflag & CRTSCTS) {
0ad9e7d1 772 info->port.flags |= ASYNC_CTS_FLOW;
1c45607a
JS		 773 info->IER |= UART_IER_MSI;
774 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
775 info->MCR |= UART_MCR_AFE;
776 } else {
777 status = inb(info->ioaddr + UART_MSR);
216ba023 778 if (tty->hw_stopped) {
1c45607a 779 if (status & UART_MSR_CTS) {
216ba023 780 tty->hw_stopped = 0;
1c45607a
JS		 781 if (info->type != PORT_16550A &&
782 !info->board->chip_flag) {
783 outb(info->IER & ~UART_IER_THRI,
784 info->ioaddr +
785 UART_IER);
786 info->IER |= UART_IER_THRI;
787 outb(info->IER, info->ioaddr +
788 UART_IER);
789 }
216ba023 790 tty_wakeup(tty);
1c45607a
JS		 791 }
792 } else {
793 if (!(status & UART_MSR_CTS)) {
216ba023 794 tty->hw_stopped = 1;
1c45607a
JS		 795 if ((info->type != PORT_16550A) &&
796 (!info->board->chip_flag)) {
797 info->IER &= ~UART_IER_THRI;
798 outb(info->IER, info->ioaddr +
799 UART_IER);
800 }
801 }
802 }
1da177e4 803 }
1c45607a 804 } else {
0ad9e7d1 805 info->port.flags &= ~ASYNC_CTS_FLOW;
1c45607a
JS		 806 }
807 outb(info->MCR, info->ioaddr + UART_MCR);
808 if (cflag & CLOCAL) {
0ad9e7d1 809 info->port.flags &= ~ASYNC_CHECK_CD;
1c45607a 810 } else {
0ad9e7d1 811 info->port.flags |= ASYNC_CHECK_CD;
1c45607a
JS		 812 info->IER |= UART_IER_MSI;
813 }
814 outb(info->IER, info->ioaddr + UART_IER);
815
816 /*
817 * Set up parity check flag
818 */
819 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
216ba023 820 if (I_INPCK(tty))
1c45607a 821 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
216ba023 822 if (I_BRKINT(tty) || I_PARMRK(tty))
1c45607a 823 info->read_status_mask |= UART_LSR_BI;
1da177e4 824
1c45607a 825 info->ignore_status_mask = 0;
1da177e4 826
216ba023 827 if (I_IGNBRK(tty)) {
1c45607a
JS		 828 info->ignore_status_mask |= UART_LSR_BI;
829 info->read_status_mask |= UART_LSR_BI;
8ea2c2ec 830 /*
1c45607a
JS		 831 * If we're ignore parity and break indicators, ignore
832 * overruns too. (For real raw support).
8ea2c2ec 833 */
216ba023 834 if (I_IGNPAR(tty)) {
1c45607a
JS		 835 info->ignore_status_mask |=
836 UART_LSR_OE |
837 UART_LSR_PE |
838 UART_LSR_FE;
839 info->read_status_mask |=
840 UART_LSR_OE |
841 UART_LSR_PE |
842 UART_LSR_FE;
843 }
1da177e4 844 }
1c45607a 845 if (info->board->chip_flag) {
216ba023
AC		 846 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
847 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
848 if (I_IXON(tty)) {
148ff86b
CH		 849 mxser_enable_must_rx_software_flow_control(
850 info->ioaddr);
1c45607a 851 } else {
148ff86b
CH		 852 mxser_disable_must_rx_software_flow_control(
853 info->ioaddr);
1da177e4 854 }
216ba023 855 if (I_IXOFF(tty)) {
148ff86b
CH		 856 mxser_enable_must_tx_software_flow_control(
857 info->ioaddr);
1c45607a 858 } else {
148ff86b
CH		 859 mxser_disable_must_tx_software_flow_control(
860 info->ioaddr);
1da177e4
LT		 861 }
862 }
1da177e4 863
1da177e4 864
1c45607a
JS		 865 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
866 outb(cval, info->ioaddr + UART_LCR);
1da177e4 867
1c45607a 868 return ret;
1da177e4
LT		 869}
870
216ba023
AC		 871static void mxser_check_modem_status(struct tty_struct *tty,
872 struct mxser_port *port, int status)
1da177e4 873{
1c45607a
JS		 874 /* update input line counters */
875 if (status & UART_MSR_TERI)
876 port->icount.rng++;
877 if (status & UART_MSR_DDSR)
878 port->icount.dsr++;
879 if (status & UART_MSR_DDCD)
880 port->icount.dcd++;
881 if (status & UART_MSR_DCTS)
882 port->icount.cts++;
883 port->mon_data.modem_status = status;
884 wake_up_interruptible(&port->delta_msr_wait);
1da177e4 885
0ad9e7d1 886 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
1c45607a 887 if (status & UART_MSR_DCD)
0ad9e7d1 888 wake_up_interruptible(&port->port.open_wait);
1c45607a 889 }
1da177e4 890
216ba023 891 tty = tty_port_tty_get(&port->port);
0ad9e7d1 892 if (port->port.flags & ASYNC_CTS_FLOW) {
216ba023 893 if (tty->hw_stopped) {
1c45607a 894 if (status & UART_MSR_CTS) {
216ba023 895 tty->hw_stopped = 0;
1c45607a
JS		 896
897 if ((port->type != PORT_16550A) &&
898 (!port->board->chip_flag)) {
899 outb(port->IER & ~UART_IER_THRI,
900 port->ioaddr + UART_IER);
901 port->IER |= UART_IER_THRI;
902 outb(port->IER, port->ioaddr +
903 UART_IER);
904 }
216ba023 905 tty_wakeup(tty);
1c45607a
JS		 906 }
907 } else {
908 if (!(status & UART_MSR_CTS)) {
216ba023 909 tty->hw_stopped = 1;
1c45607a
JS		 910 if (port->type != PORT_16550A &&
911 !port->board->chip_flag) {
912 port->IER &= ~UART_IER_THRI;
913 outb(port->IER, port->ioaddr +
914 UART_IER);
915 }
916 }
917 }
1da177e4
LT		 918 }
919}
920
216ba023 921static int mxser_startup(struct tty_struct *tty)
1da177e4 922{
216ba023 923 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 924 unsigned long page;
925 unsigned long flags;
1da177e4 926
1c45607a
JS		 927 page = __get_free_page(GFP_KERNEL);
928 if (!page)
929 return -ENOMEM;
1da177e4 930
1c45607a 931 spin_lock_irqsave(&info->slock, flags);
1da177e4 932
0ad9e7d1 933 if (info->port.flags & ASYNC_INITIALIZED) {
1c45607a
JS		 934 free_page(page);
935 spin_unlock_irqrestore(&info->slock, flags);
936 return 0;
937 }
6f08b72c 938
1c45607a 939 if (!info->ioaddr || !info->type) {
216ba023 940 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 941 free_page(page);
942 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 943 return 0;
1c45607a 944 }
0ad9e7d1 945 if (info->port.xmit_buf)
1c45607a
JS		 946 free_page(page);
947 else
0ad9e7d1 948 info->port.xmit_buf = (unsigned char *) page;
1da177e4 949
1da177e4 950 /*
1c45607a
JS		 951 * Clear the FIFO buffers and disable them
952 * (they will be reenabled in mxser_change_speed())
1da177e4 953 */
1c45607a
JS		 954 if (info->board->chip_flag)
955 outb((UART_FCR_CLEAR_RCVR |
956 UART_FCR_CLEAR_XMIT |
957 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
958 else
959 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
960 info->ioaddr + UART_FCR);
1da177e4 961
1c45607a
JS		 962 /*
963 * At this point there's no way the LSR could still be 0xFF;
964 * if it is, then bail out, because there's likely no UART
965 * here.
966 */
967 if (inb(info->ioaddr + UART_LSR) == 0xff) {
968 spin_unlock_irqrestore(&info->slock, flags);
969 if (capable(CAP_SYS_ADMIN)) {
216ba023
AC		 970 if (tty)
971 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 972 return 0;
973 } else
974 return -ENODEV;
975 }
1da177e4 976
1c45607a
JS		 977 /*
978 * Clear the interrupt registers.
979 */
980 (void) inb(info->ioaddr + UART_LSR);
981 (void) inb(info->ioaddr + UART_RX);
982 (void) inb(info->ioaddr + UART_IIR);
983 (void) inb(info->ioaddr + UART_MSR);
984
985 /*
986 * Now, initialize the UART
987 */
988 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
989 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
990 outb(info->MCR, info->ioaddr + UART_MCR);
991
992 /*
993 * Finally, enable interrupts
994 */
995 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
996
997 if (info->board->chip_flag)
998 info->IER |= MOXA_MUST_IER_EGDAI;
999 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
1000
1001 /*
1002 * And clear the interrupt registers again for luck.
1003 */
1004 (void) inb(info->ioaddr + UART_LSR);
1005 (void) inb(info->ioaddr + UART_RX);
1006 (void) inb(info->ioaddr + UART_IIR);
1007 (void) inb(info->ioaddr + UART_MSR);
1008
216ba023 1009 clear_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 1010 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1011
1012 /*
1013 * and set the speed of the serial port
1014 */
216ba023 1015 mxser_change_speed(tty, NULL);
0ad9e7d1 1016 info->port.flags |= ASYNC_INITIALIZED;
1c45607a
JS		 1017 spin_unlock_irqrestore(&info->slock, flags);
1018
1019 return 0;
1020}
1021
1022/*
1023 * This routine will shutdown a serial port; interrupts maybe disabled, and
1024 * DTR is dropped if the hangup on close termio flag is on.
1025 */
216ba023 1026static void mxser_shutdown(struct tty_struct *tty)
1c45607a 1027{
216ba023 1028 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 1029 unsigned long flags;
1030
0ad9e7d1 1031 if (!(info->port.flags & ASYNC_INITIALIZED))
1c45607a
JS		 1032 return;
1033
1034 spin_lock_irqsave(&info->slock, flags);
1035
1036 /*
1037 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
1038 * here so the queue might never be waken up
1039 */
1040 wake_up_interruptible(&info->delta_msr_wait);
1041
1042 /*
1043 * Free the IRQ, if necessary
1044 */
0ad9e7d1
AC		 1045 if (info->port.xmit_buf) {
1046 free_page((unsigned long) info->port.xmit_buf);
1047 info->port.xmit_buf = NULL;
1da177e4
LT		 1048 }
1049
1c45607a
JS		 1050 info->IER = 0;
1051 outb(0x00, info->ioaddr + UART_IER);
1052
216ba023 1053 if (tty->termios->c_cflag & HUPCL)
1c45607a
JS		 1054 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
1055 outb(info->MCR, info->ioaddr + UART_MCR);
1056
1057 /* clear Rx/Tx FIFO's */
1058 if (info->board->chip_flag)
1059 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
1060 MOXA_MUST_FCR_GDA_MODE_ENABLE,
1061 info->ioaddr + UART_FCR);
1062 else
1063 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
1064 info->ioaddr + UART_FCR);
1065
1066 /* read data port to reset things */
1067 (void) inb(info->ioaddr + UART_RX);
1068
216ba023 1069 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a 1070
0ad9e7d1 1071 info->port.flags &= ~ASYNC_INITIALIZED;
1c45607a
JS		 1072
1073 if (info->board->chip_flag)
1074 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1075
1076 spin_unlock_irqrestore(&info->slock, flags);
1077}
1078
1079/*
1080 * This routine is called whenever a serial port is opened. It
1081 * enables interrupts for a serial port, linking in its async structure into
1082 * the IRQ chain. It also performs the serial-specific
1083 * initialization for the tty structure.
1084 */
1085static int mxser_open(struct tty_struct *tty, struct file *filp)
1086{
1087 struct mxser_port *info;
1088 unsigned long flags;
1089 int retval, line;
1090
1091 line = tty->index;
1092 if (line == MXSER_PORTS)
1093 return 0;
1094 if (line < 0 || line > MXSER_PORTS)
1095 return -ENODEV;
1096 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1097 if (!info->ioaddr)
1098 return -ENODEV;
1099
1100 tty->driver_data = info;
216ba023 1101 tty_port_tty_set(&info->port, tty);
8ea2c2ec 1102 /*
1c45607a
JS		 1103 * Start up serial port
1104 */
1105 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 1106 info->port.count++;
1c45607a 1107 spin_unlock_irqrestore(&info->slock, flags);
216ba023 1108 retval = mxser_startup(tty);
1c45607a
JS		 1109 if (retval)
1110 return retval;
1111
1112 retval = mxser_block_til_ready(tty, filp, info);
1113 if (retval)
1114 return retval;
1da177e4 1115
8cddd707 1116 /* unmark here for very high baud rate (ex. 921600 bps) used */
1da177e4
LT		 1117 tty->low_latency = 1;
1118 return 0;
1119}
1120
978e595f
AC		 1121static void mxser_flush_buffer(struct tty_struct *tty)
1122{
1123 struct mxser_port *info = tty->driver_data;
1124 char fcr;
1125 unsigned long flags;
1126
1127
1128 spin_lock_irqsave(&info->slock, flags);
1129 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1130
1131 fcr = inb(info->ioaddr + UART_FCR);
1132 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1133 info->ioaddr + UART_FCR);
1134 outb(fcr, info->ioaddr + UART_FCR);
1135
1136 spin_unlock_irqrestore(&info->slock, flags);
1137
1138 tty_wakeup(tty);
1139}
1140
1141
1da177e4
LT		 1142/*
1143 * This routine is called when the serial port gets closed. First, we
1144 * wait for the last remaining data to be sent. Then, we unlink its
1145 * async structure from the interrupt chain if necessary, and we free
1146 * that IRQ if nothing is left in the chain.
1147 */
1148static void mxser_close(struct tty_struct *tty, struct file *filp)
1149{
1c45607a 1150 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1151
1152 unsigned long timeout;
1153 unsigned long flags;
1da177e4
LT		 1154
1155 if (tty->index == MXSER_PORTS)
1156 return;
1157 if (!info)
6f08b72c 1158 return;
1da177e4
LT		 1159
1160 spin_lock_irqsave(&info->slock, flags);
1161
1162 if (tty_hung_up_p(filp)) {
1163 spin_unlock_irqrestore(&info->slock, flags);
1164 return;
1165 }
0ad9e7d1 1166 if ((tty->count == 1) && (info->port.count != 1)) {
1da177e4
LT		 1167 /*
1168 * Uh, oh. tty->count is 1, which means that the tty
0ad9e7d1 1169 * structure will be freed. Info->port.count should always
1da177e4
LT		 1170 * be one in these conditions. If it's greater than
1171 * one, we've got real problems, since it means the
1172 * serial port won't be shutdown.
1173 */
8ea2c2ec 1174 printk(KERN_ERR "mxser_close: bad serial port count; "
0ad9e7d1
AC		 1175 "tty->count is 1, info->port.count is %d\n", info->port.count);
1176 info->port.count = 1;
1da177e4 1177 }
0ad9e7d1 1178 if (--info->port.count < 0) {
8ea2c2ec 1179 printk(KERN_ERR "mxser_close: bad serial port count for "
0ad9e7d1
AC		 1180 "ttys%d: %d\n", tty->index, info->port.count);
1181 info->port.count = 0;
1da177e4 1182 }
0ad9e7d1 1183 if (info->port.count) {
1da177e4
LT		 1184 spin_unlock_irqrestore(&info->slock, flags);
1185 return;
1186 }
0ad9e7d1 1187 info->port.flags |= ASYNC_CLOSING;
1da177e4
LT		 1188 spin_unlock_irqrestore(&info->slock, flags);
1189 /*
1190 * Save the termios structure, since this port may have
1191 * separate termios for callout and dialin.
1192 */
0ad9e7d1 1193 if (info->port.flags & ASYNC_NORMAL_ACTIVE)
1da177e4
LT		 1194 info->normal_termios = *tty->termios;
1195 /*
1196 * Now we wait for the transmit buffer to clear; and we notify
1197 * the line discipline to only process XON/XOFF characters.
1198 */
1199 tty->closing = 1;
44b7d1b3
AC		 1200 if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
1201 tty_wait_until_sent(tty, info->port.closing_wait);
1da177e4
LT		 1202 /*
1203 * At this point we stop accepting input. To do this, we
1204 * disable the receive line status interrupts, and tell the
1205 * interrupt driver to stop checking the data ready bit in the
1206 * line status register.
1207 */
1208 info->IER &= ~UART_IER_RLSI;
1c45607a 1209 if (info->board->chip_flag)
1da177e4 1210 info->IER &= ~MOXA_MUST_RECV_ISR;
1c45607a 1211
0ad9e7d1 1212 if (info->port.flags & ASYNC_INITIALIZED) {
1c45607a 1213 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1214 /*
1215 * Before we drop DTR, make sure the UART transmitter
1216 * has completely drained; this is especially
1217 * important if there is a transmit FIFO!
1218 */
1219 timeout = jiffies + HZ;
1c45607a 1220 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
da4cd8df 1221 schedule_timeout_interruptible(5);
1da177e4
LT		 1222 if (time_after(jiffies, timeout))
1223 break;
1224 }
1225 }
216ba023 1226 mxser_shutdown(tty);
1da177e4 1227
978e595f 1228 mxser_flush_buffer(tty);
1c45607a
JS		 1229 tty_ldisc_flush(tty);
1230
1da177e4 1231 tty->closing = 0;
216ba023 1232 tty_port_tty_set(&info->port, NULL);
0ad9e7d1 1233 if (info->port.blocked_open) {
44b7d1b3
AC		 1234 if (info->port.close_delay)
1235 schedule_timeout_interruptible(info->port.close_delay);
0ad9e7d1 1236 wake_up_interruptible(&info->port.open_wait);
1da177e4
LT		 1237 }
1238
0ad9e7d1 1239 info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1da177e4
LT		 1240}
1241
1242static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1243{
1244 int c, total = 0;
1c45607a 1245 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1246 unsigned long flags;
1247
0ad9e7d1 1248 if (!info->port.xmit_buf)
8ea2c2ec 1249 return 0;
1da177e4
LT		 1250
1251 while (1) {
8ea2c2ec
JJ		 1252 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1253 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1254 if (c <= 0)
1255 break;
1256
0ad9e7d1 1257 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1da177e4 1258 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1259 info->xmit_head = (info->xmit_head + c) &
1260 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1261 info->xmit_cnt += c;
1262 spin_unlock_irqrestore(&info->slock, flags);
1263
1264 buf += c;
1265 count -= c;
1266 total += c;
1da177e4
LT		 1267 }
1268
1c45607a 1269 if (info->xmit_cnt && !tty->stopped) {
8ea2c2ec
JJ		 1270 if (!tty->hw_stopped ||
1271 (info->type == PORT_16550A) ||
1c45607a 1272 (info->board->chip_flag)) {
1da177e4 1273 spin_lock_irqsave(&info->slock, flags);
1c45607a
JS		 1274 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1275 UART_IER);
1da177e4 1276 info->IER |= UART_IER_THRI;
1c45607a 1277 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1278 spin_unlock_irqrestore(&info->slock, flags);
1279 }
1280 }
1281 return total;
1282}
1283
0be2eade 1284static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1da177e4 1285{
1c45607a 1286 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1287 unsigned long flags;
1288
0ad9e7d1 1289 if (!info->port.xmit_buf)
0be2eade 1290 return 0;
1da177e4
LT		 1291
1292 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
0be2eade 1293 return 0;
1da177e4
LT		 1294
1295 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 1296 info->port.xmit_buf[info->xmit_head++] = ch;
1da177e4
LT		 1297 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1298 info->xmit_cnt++;
1299 spin_unlock_irqrestore(&info->slock, flags);
1c45607a 1300 if (!tty->stopped) {
8ea2c2ec
JJ		 1301 if (!tty->hw_stopped ||
1302 (info->type == PORT_16550A) ||
1c45607a 1303 info->board->chip_flag) {
1da177e4 1304 spin_lock_irqsave(&info->slock, flags);
1c45607a 1305 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1306 info->IER |= UART_IER_THRI;
1c45607a 1307 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1308 spin_unlock_irqrestore(&info->slock, flags);
1309 }
1310 }
0be2eade 1311 return 1;
1da177e4
LT		 1312}
1313
1314
1315static void mxser_flush_chars(struct tty_struct *tty)
1316{
1c45607a 1317 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1318 unsigned long flags;
1319
ace7dd96
JS		 1320 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1321 (tty->hw_stopped && info->type != PORT_16550A &&
1322 !info->board->chip_flag))
1da177e4
LT		 1323 return;
1324
1325 spin_lock_irqsave(&info->slock, flags);
1326
1c45607a 1327 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1328 info->IER |= UART_IER_THRI;
1c45607a 1329 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1330
1331 spin_unlock_irqrestore(&info->slock, flags);
1332}
1333
1334static int mxser_write_room(struct tty_struct *tty)
1335{
1c45607a 1336 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1337 int ret;
1338
1339 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
ace7dd96 1340 return ret < 0 ? 0 : ret;
1da177e4
LT		 1341}
1342
1343static int mxser_chars_in_buffer(struct tty_struct *tty)
1344{
1c45607a 1345 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1346 return info->xmit_cnt;
1347}
1348
1c45607a
JS		 1349/*
1350 * ------------------------------------------------------------
1351 * friends of mxser_ioctl()
1352 * ------------------------------------------------------------
1353 */
216ba023 1354static int mxser_get_serial_info(struct tty_struct *tty,
1c45607a
JS		 1355 struct serial_struct __user *retinfo)
1356{
216ba023 1357 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 1358 struct serial_struct tmp = {
1359 .type = info->type,
216ba023 1360 .line = tty->index,
1c45607a
JS		 1361 .port = info->ioaddr,
1362 .irq = info->board->irq,
0ad9e7d1 1363 .flags = info->port.flags,
1c45607a 1364 .baud_base = info->baud_base,
44b7d1b3
AC		 1365 .close_delay = info->port.close_delay,
1366 .closing_wait = info->port.closing_wait,
1c45607a
JS		 1367 .custom_divisor = info->custom_divisor,
1368 .hub6 = 0
1369 };
1370 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1371 return -EFAULT;
1372 return 0;
1373}
1374
216ba023 1375static int mxser_set_serial_info(struct tty_struct *tty,
1c45607a 1376 struct serial_struct __user *new_info)
1da177e4 1377{
216ba023 1378 struct mxser_port *info = tty->driver_data;
1c45607a 1379 struct serial_struct new_serial;
80ff8a80 1380 speed_t baud;
1c45607a
JS		 1381 unsigned long sl_flags;
1382 unsigned int flags;
1383 int retval = 0;
1da177e4 1384
1c45607a 1385 if (!new_info || !info->ioaddr)
80ff8a80 1386 return -ENODEV;
1c45607a
JS		 1387 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1388 return -EFAULT;
1da177e4 1389
80ff8a80
JS		 1390 if (new_serial.irq != info->board->irq ||
1391 new_serial.port != info->ioaddr)
1392 return -EINVAL;
1da177e4 1393
0ad9e7d1 1394 flags = info->port.flags & ASYNC_SPD_MASK;
1da177e4 1395
1c45607a
JS		 1396 if (!capable(CAP_SYS_ADMIN)) {
1397 if ((new_serial.baud_base != info->baud_base) ||
44b7d1b3 1398 (new_serial.close_delay != info->port.close_delay) ||
0ad9e7d1 1399 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1c45607a 1400 return -EPERM;
0ad9e7d1 1401 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1c45607a
JS		 1402 (new_serial.flags & ASYNC_USR_MASK));
1403 } else {
1da177e4 1404 /*
1c45607a
JS		 1405 * OK, past this point, all the error checking has been done.
1406 * At this point, we start making changes.....
1da177e4 1407 */
0ad9e7d1 1408 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
1c45607a 1409 (new_serial.flags & ASYNC_FLAGS));
44b7d1b3
AC		 1410 info->port.close_delay = new_serial.close_delay * HZ / 100;
1411 info->port.closing_wait = new_serial.closing_wait * HZ / 100;
216ba023
AC		 1412 tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY)
1413 ? 1 : 0;
0ad9e7d1 1414 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
80ff8a80
JS		 1415 (new_serial.baud_base != info->baud_base ||
1416 new_serial.custom_divisor !=
1417 info->custom_divisor)) {
1418 baud = new_serial.baud_base / new_serial.custom_divisor;
216ba023 1419 tty_encode_baud_rate(tty, baud, baud);
80ff8a80 1420 }
1c45607a 1421 }
fc83815c 1422
1c45607a 1423 info->type = new_serial.type;
1da177e4 1424
1c45607a
JS		 1425 process_txrx_fifo(info);
1426
0ad9e7d1
AC		 1427 if (info->port.flags & ASYNC_INITIALIZED) {
1428 if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
1c45607a 1429 spin_lock_irqsave(&info->slock, sl_flags);
216ba023 1430 mxser_change_speed(tty, NULL);
1c45607a 1431 spin_unlock_irqrestore(&info->slock, sl_flags);
1da177e4 1432 }
1c45607a 1433 } else
216ba023 1434 retval = mxser_startup(tty);
1da177e4 1435
1c45607a
JS		 1436 return retval;
1437}
1da177e4 1438
1c45607a
JS		 1439/*
1440 * mxser_get_lsr_info - get line status register info
1441 *
1442 * Purpose: Let user call ioctl() to get info when the UART physically
1443 * is emptied. On bus types like RS485, the transmitter must
1444 * release the bus after transmitting. This must be done when
1445 * the transmit shift register is empty, not be done when the
1446 * transmit holding register is empty. This functionality
1447 * allows an RS485 driver to be written in user space.
1448 */
1449static int mxser_get_lsr_info(struct mxser_port *info,
1450 unsigned int __user *value)
1451{
1452 unsigned char status;
1453 unsigned int result;
1454 unsigned long flags;
1da177e4 1455
1c45607a
JS		 1456 spin_lock_irqsave(&info->slock, flags);
1457 status = inb(info->ioaddr + UART_LSR);
1458 spin_unlock_irqrestore(&info->slock, flags);
1459 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1460 return put_user(result, value);
1461}
1da177e4 1462
1c45607a
JS		 1463static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1464{
1465 struct mxser_port *info = tty->driver_data;
1466 unsigned char control, status;
1467 unsigned long flags;
1da177e4 1468
8ea2c2ec 1469
1c45607a
JS		 1470 if (tty->index == MXSER_PORTS)
1471 return -ENOIOCTLCMD;
1472 if (test_bit(TTY_IO_ERROR, &tty->flags))
1473 return -EIO;
1da177e4 1474
1c45607a 1475 control = info->MCR;
1da177e4 1476
1c45607a
JS		 1477 spin_lock_irqsave(&info->slock, flags);
1478 status = inb(info->ioaddr + UART_MSR);
1479 if (status & UART_MSR_ANY_DELTA)
216ba023 1480 mxser_check_modem_status(tty, info, status);
1c45607a
JS		 1481 spin_unlock_irqrestore(&info->slock, flags);
1482 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1483 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1484 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1485 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1486 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1487 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1488}
1da177e4 1489
1c45607a
JS		 1490static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1491 unsigned int set, unsigned int clear)
1492{
1493 struct mxser_port *info = tty->driver_data;
1494 unsigned long flags;
1da177e4 1495
1da177e4 1496
1c45607a
JS		 1497 if (tty->index == MXSER_PORTS)
1498 return -ENOIOCTLCMD;
1499 if (test_bit(TTY_IO_ERROR, &tty->flags))
1500 return -EIO;
1da177e4 1501
1c45607a 1502 spin_lock_irqsave(&info->slock, flags);
1da177e4 1503
1c45607a
JS		 1504 if (set & TIOCM_RTS)
1505 info->MCR |= UART_MCR_RTS;
1506 if (set & TIOCM_DTR)
1507 info->MCR |= UART_MCR_DTR;
1da177e4 1508
1c45607a
JS		 1509 if (clear & TIOCM_RTS)
1510 info->MCR &= ~UART_MCR_RTS;
1511 if (clear & TIOCM_DTR)
1512 info->MCR &= ~UART_MCR_DTR;
8ea2c2ec 1513
1c45607a
JS		 1514 outb(info->MCR, info->ioaddr + UART_MCR);
1515 spin_unlock_irqrestore(&info->slock, flags);
1516 return 0;
1517}
1da177e4 1518
1c45607a
JS		 1519static int __init mxser_program_mode(int port)
1520{
1521 int id, i, j, n;
1522
1523 outb(0, port);
1524 outb(0, port);
1525 outb(0, port);
1526 (void)inb(port);
1527 (void)inb(port);
1528 outb(0, port);
1529 (void)inb(port);
1530
1531 id = inb(port + 1) & 0x1F;
1532 if ((id != C168_ASIC_ID) &&
1533 (id != C104_ASIC_ID) &&
1534 (id != C102_ASIC_ID) &&
1535 (id != CI132_ASIC_ID) &&
1536 (id != CI134_ASIC_ID) &&
1537 (id != CI104J_ASIC_ID))
1538 return -1;
1539 for (i = 0, j = 0; i < 4; i++) {
1540 n = inb(port + 2);
1541 if (n == 'M') {
1542 j = 1;
1543 } else if ((j == 1) && (n == 1)) {
1544 j = 2;
1545 break;
1546 } else
1547 j = 0;
1da177e4 1548 }
1c45607a
JS		 1549 if (j != 2)
1550 id = -2;
1551 return id;
1da177e4
LT		 1552}
1553
1c45607a
JS		 1554static void __init mxser_normal_mode(int port)
1555{
1556 int i, n;
1557
1558 outb(0xA5, port + 1);
1559 outb(0x80, port + 3);
1560 outb(12, port + 0); /* 9600 bps */
1561 outb(0, port + 1);
1562 outb(0x03, port + 3); /* 8 data bits */
1563 outb(0x13, port + 4); /* loop back mode */
1564 for (i = 0; i < 16; i++) {
1565 n = inb(port + 5);
1566 if ((n & 0x61) == 0x60)
1567 break;
1568 if ((n & 1) == 1)
1569 (void)inb(port);
1570 }
1571 outb(0x00, port + 4);
1572}
1573
1574#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1575#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1576#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1577#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1578#define EN_CCMD 0x000 /* Chip's command register */
1579#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1580#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1581#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1582#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1583#define EN0_DCFG 0x00E /* Data configuration reg WR */
1584#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1585#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1586#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1587static int __init mxser_read_register(int port, unsigned short *regs)
1588{
1589 int i, k, value, id;
1590 unsigned int j;
1591
1592 id = mxser_program_mode(port);
1593 if (id < 0)
1594 return id;
1595 for (i = 0; i < 14; i++) {
1596 k = (i & 0x3F) | 0x180;
1597 for (j = 0x100; j > 0; j >>= 1) {
1598 outb(CHIP_CS, port);
1599 if (k & j) {
1600 outb(CHIP_CS | CHIP_DO, port);
1601 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1602 } else {
1603 outb(CHIP_CS, port);
1604 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1605 }
1606 }
1607 (void)inb(port);
1608 value = 0;
1609 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1610 outb(CHIP_CS, port);
1611 outb(CHIP_CS | CHIP_SK, port);
1612 if (inb(port) & CHIP_DI)
1613 value |= j;
1614 }
1615 regs[i] = value;
1616 outb(0, port);
1617 }
1618 mxser_normal_mode(port);
1619 return id;
1620}
1da177e4
LT		 1621
1622static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1623{
1c45607a 1624 struct mxser_port *port;
216ba023 1625 struct tty_struct *tty;
1c45607a
JS		 1626 int result, status;
1627 unsigned int i, j;
9d6d162d 1628 int ret = 0;
1da177e4
LT		 1629
1630 switch (cmd) {
1da177e4 1631 case MOXA_GET_MAJOR:
8f3d137e
JS		 1632 if (printk_ratelimit())
1633 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1634 "%x (GET_MAJOR), fix your userspace\n",
1635 current->comm, cmd);
1c45607a 1636 return put_user(ttymajor, (int __user *)argp);
1da177e4
LT		 1637
1638 case MOXA_CHKPORTENABLE:
1639 result = 0;
9d6d162d 1640 lock_kernel();
1c45607a
JS		 1641 for (i = 0; i < MXSER_BOARDS; i++)
1642 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1643 if (mxser_boards[i].ports[j].ioaddr)
1644 result |= (1 << i);
9d6d162d 1645 unlock_kernel();
8ea2c2ec 1646 return put_user(result, (unsigned long __user *)argp);
1da177e4 1647 case MOXA_GETDATACOUNT:
9d6d162d 1648 lock_kernel();
1da177e4 1649 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
9d6d162d
AC		 1650 ret = -EFAULT;
1651 unlock_kernel();
1652 return ret;
72800df9
JS		 1653 case MOXA_GETMSTATUS: {
1654 struct mxser_mstatus ms, __user *msu = argp;
9d6d162d 1655 lock_kernel();
1c45607a
JS		 1656 for (i = 0; i < MXSER_BOARDS; i++)
1657 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1658 port = &mxser_boards[i].ports[j];
72800df9 1659 memset(&ms, 0, sizeof(ms));
1c45607a 1660
72800df9
JS		 1661 if (!port->ioaddr)
1662 goto copy;
216ba023
AC		 1663
1664 tty = tty_port_tty_get(&port->port);
1da177e4 1665
216ba023 1666 if (!tty || !tty->termios)
72800df9 1667 ms.cflag = port->normal_termios.c_cflag;
1c45607a 1668 else
216ba023
AC		 1669 ms.cflag = tty->termios->c_cflag;
1670 tty_kref_put(tty);
1c45607a 1671 status = inb(port->ioaddr + UART_MSR);
72800df9
JS		 1672 if (status & UART_MSR_DCD)
1673 ms.dcd = 1;
1674 if (status & UART_MSR_DSR)
1675 ms.dsr = 1;
1676 if (status & UART_MSR_CTS)
1677 ms.cts = 1;
1678 copy:
1679 if (copy_to_user(msu, &ms, sizeof(ms))) {
1680 unlock_kernel();
1681 return -EFAULT;
1682 }
1683 msu++;
1c45607a 1684 }
9d6d162d 1685 unlock_kernel();
1da177e4 1686 return 0;
72800df9 1687 }
8ea2c2ec 1688 case MOXA_ASPP_MON_EXT: {
72800df9
JS		 1689 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1690 unsigned int cflag, iflag, p;
1691 u8 opmode;
1692
1693 me = kzalloc(sizeof(*me), GFP_KERNEL);
1694 if (!me)
1695 return -ENOMEM;
1c45607a 1696
9d6d162d 1697 lock_kernel();
72800df9
JS		 1698 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1699 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1700 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1701 i = MXSER_BOARDS;
1702 break;
1703 }
1c45607a
JS		 1704 port = &mxser_boards[i].ports[j];
1705 if (!port->ioaddr)
1da177e4
LT		 1706 continue;
1707
72800df9 1708 status = mxser_get_msr(port->ioaddr, 0, p);
1c45607a 1709
1da177e4 1710 if (status & UART_MSR_TERI)
1c45607a 1711 port->icount.rng++;
1da177e4 1712 if (status & UART_MSR_DDSR)
1c45607a 1713 port->icount.dsr++;
1da177e4 1714 if (status & UART_MSR_DDCD)
1c45607a 1715 port->icount.dcd++;
1da177e4 1716 if (status & UART_MSR_DCTS)
1c45607a
JS		 1717 port->icount.cts++;
1718
1719 port->mon_data.modem_status = status;
72800df9
JS		 1720 me->rx_cnt[p] = port->mon_data.rxcnt;
1721 me->tx_cnt[p] = port->mon_data.txcnt;
1722 me->up_rxcnt[p] = port->mon_data.up_rxcnt;
1723 me->up_txcnt[p] = port->mon_data.up_txcnt;
1724 me->modem_status[p] =
1c45607a 1725 port->mon_data.modem_status;
216ba023 1726 tty = tty_port_tty_get(&port->port);
1c45607a 1727
216ba023 1728 if (!tty || !tty->termios) {
1c45607a
JS		 1729 cflag = port->normal_termios.c_cflag;
1730 iflag = port->normal_termios.c_iflag;
216ba023 1731 me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios);
1da177e4 1732 } else {
216ba023
AC		 1733 cflag = tty->termios->c_cflag;
1734 iflag = tty->termios->c_iflag;
1735 me->baudrate[p] = tty_get_baud_rate(tty);
1da177e4 1736 }
216ba023 1737 tty_kref_put(tty);
1da177e4 1738
72800df9
JS		 1739 me->databits[p] = cflag & CSIZE;
1740 me->stopbits[p] = cflag & CSTOPB;
1741 me->parity[p] = cflag & (PARENB | PARODD |
1742 CMSPAR);
1da177e4
LT		 1743
1744 if (cflag & CRTSCTS)
72800df9 1745 me->flowctrl[p] |= 0x03;
1da177e4
LT		 1746
1747 if (iflag & (IXON | IXOFF))
72800df9 1748 me->flowctrl[p] |= 0x0C;
1da177e4 1749
1c45607a 1750 if (port->type == PORT_16550A)
72800df9 1751 me->fifo[p] = 1;
1da177e4 1752
72800df9
JS		 1753 opmode = inb(port->opmode_ioaddr) >>
1754 ((p % 4) * 2);
1da177e4 1755 opmode &= OP_MODE_MASK;
72800df9 1756 me->iftype[p] = opmode;
1da177e4 1757 }
9d6d162d
AC		 1758 }
1759 unlock_kernel();
72800df9
JS		 1760 if (copy_to_user(argp, me, sizeof(*me)))
1761 ret = -EFAULT;
1762 kfree(me);
1763 return ret;
9d6d162d
AC		 1764 }
1765 default:
1da177e4
LT		 1766 return -ENOIOCTLCMD;
1767 }
1768 return 0;
1769}
1770
1c45607a
JS		 1771static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1772 struct async_icount *cprev)
1da177e4 1773{
1c45607a
JS		 1774 struct async_icount cnow;
1775 unsigned long flags;
1776 int ret;
1da177e4 1777
1c45607a
JS		 1778 spin_lock_irqsave(&info->slock, flags);
1779 cnow = info->icount; /* atomic copy */
1780 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 1781
1c45607a
JS		 1782 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1783 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1784 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1785 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1da177e4 1786
1c45607a
JS		 1787 *cprev = cnow;
1788
1789 return ret;
1790}
1791
1792static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1793 unsigned int cmd, unsigned long arg)
1da177e4 1794{
1c45607a
JS		 1795 struct mxser_port *info = tty->driver_data;
1796 struct async_icount cnow;
1c45607a
JS		 1797 unsigned long flags;
1798 void __user *argp = (void __user *)arg;
1799 int retval;
1da177e4 1800
1c45607a
JS		 1801 if (tty->index == MXSER_PORTS)
1802 return mxser_ioctl_special(cmd, argp);
1da177e4 1803
1c45607a
JS		 1804 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1805 int p;
1806 unsigned long opmode;
1807 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1808 int shiftbit;
1809 unsigned char val, mask;
1da177e4 1810
1c45607a
JS		 1811 p = tty->index % 4;
1812 if (cmd == MOXA_SET_OP_MODE) {
1813 if (get_user(opmode, (int __user *) argp))
1814 return -EFAULT;
1815 if (opmode != RS232_MODE &&
1816 opmode != RS485_2WIRE_MODE &&
1817 opmode != RS422_MODE &&
1818 opmode != RS485_4WIRE_MODE)
1819 return -EFAULT;
9d6d162d 1820 lock_kernel();
1c45607a
JS		 1821 mask = ModeMask[p];
1822 shiftbit = p * 2;
1823 val = inb(info->opmode_ioaddr);
1824 val &= mask;
1825 val |= (opmode << shiftbit);
1826 outb(val, info->opmode_ioaddr);
9d6d162d 1827 unlock_kernel();
1c45607a 1828 } else {
9d6d162d 1829 lock_kernel();
1c45607a
JS		 1830 shiftbit = p * 2;
1831 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1832 opmode &= OP_MODE_MASK;
9d6d162d 1833 unlock_kernel();
1c45607a
JS		 1834 if (put_user(opmode, (int __user *)argp))
1835 return -EFAULT;
1836 }
1837 return 0;
1838 }
1839
1840 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1841 test_bit(TTY_IO_ERROR, &tty->flags))
1842 return -EIO;
1843
1844 switch (cmd) {
1c45607a 1845 case TIOCGSERIAL:
9d6d162d 1846 lock_kernel();
216ba023 1847 retval = mxser_get_serial_info(tty, argp);
9d6d162d
AC		 1848 unlock_kernel();
1849 return retval;
1c45607a 1850 case TIOCSSERIAL:
9d6d162d 1851 lock_kernel();
216ba023 1852 retval = mxser_set_serial_info(tty, argp);
9d6d162d
AC		 1853 unlock_kernel();
1854 return retval;
1c45607a 1855 case TIOCSERGETLSR: /* Get line status register */
9d6d162d 1856 return mxser_get_lsr_info(info, argp);
1c45607a
JS		 1857 /*
1858 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1859 * - mask passed in arg for lines of interest
1860 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1861 * Caller should use TIOCGICOUNT to see which one it was
1862 */
1863 case TIOCMIWAIT:
1864 spin_lock_irqsave(&info->slock, flags);
1865 cnow = info->icount; /* note the counters on entry */
1866 spin_unlock_irqrestore(&info->slock, flags);
1867
1868 return wait_event_interruptible(info->delta_msr_wait,
1869 mxser_cflags_changed(info, arg, &cnow));
1870 /*
1871 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1872 * Return: write counters to the user passed counter struct
1873 * NB: both 1->0 and 0->1 transitions are counted except for
1874 * RI where only 0->1 is counted.
1875 */
41aee9a1
JS		 1876 case TIOCGICOUNT: {
1877 struct serial_icounter_struct icnt = { 0 };
1c45607a
JS		 1878 spin_lock_irqsave(&info->slock, flags);
1879 cnow = info->icount;
1880 spin_unlock_irqrestore(&info->slock, flags);
41aee9a1
JS		 1881
1882 icnt.frame = cnow.frame;
1883 icnt.brk = cnow.brk;
1884 icnt.overrun = cnow.overrun;
1885 icnt.buf_overrun = cnow.buf_overrun;
1886 icnt.parity = cnow.parity;
1887 icnt.rx = cnow.rx;
1888 icnt.tx = cnow.tx;
1889 icnt.cts = cnow.cts;
1890 icnt.dsr = cnow.dsr;
1891 icnt.rng = cnow.rng;
1892 icnt.dcd = cnow.dcd;
1893
1894 return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
1895 }
1c45607a
JS		 1896 case MOXA_HighSpeedOn:
1897 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1898 case MOXA_SDS_RSTICOUNTER:
9d6d162d 1899 lock_kernel();
1c45607a
JS		 1900 info->mon_data.rxcnt = 0;
1901 info->mon_data.txcnt = 0;
9d6d162d 1902 unlock_kernel();
1c45607a
JS		 1903 return 0;
1904
1905 case MOXA_ASPP_OQUEUE:{
1906 int len, lsr;
1907
9d6d162d 1908 lock_kernel();
1c45607a 1909 len = mxser_chars_in_buffer(tty);
1c45607a 1910 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1c45607a 1911 len += (lsr ? 0 : 1);
9d6d162d 1912 unlock_kernel();
1c45607a
JS		 1913
1914 return put_user(len, (int __user *)argp);
1915 }
1916 case MOXA_ASPP_MON: {
1917 int mcr, status;
1918
9d6d162d 1919 lock_kernel();
1c45607a 1920 status = mxser_get_msr(info->ioaddr, 1, tty->index);
216ba023 1921 mxser_check_modem_status(tty, info, status);
1c45607a
JS		 1922
1923 mcr = inb(info->ioaddr + UART_MCR);
1924 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1925 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1926 else
1927 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1928
1929 if (mcr & MOXA_MUST_MCR_TX_XON)
1930 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1931 else
1932 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1933
216ba023 1934 if (tty->hw_stopped)
1c45607a
JS		 1935 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1936 else
1937 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
9d6d162d 1938 unlock_kernel();
1c45607a
JS		 1939 if (copy_to_user(argp, &info->mon_data,
1940 sizeof(struct mxser_mon)))
1941 return -EFAULT;
1942
1943 return 0;
1944 }
1945 case MOXA_ASPP_LSTATUS: {
1946 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1947 return -EFAULT;
1948
1949 info->err_shadow = 0;
1950 return 0;
1951 }
1952 case MOXA_SET_BAUD_METHOD: {
1953 int method;
1954
1955 if (get_user(method, (int __user *)argp))
1956 return -EFAULT;
1957 mxser_set_baud_method[tty->index] = method;
1958 return put_user(method, (int __user *)argp);
1959 }
1960 default:
1961 return -ENOIOCTLCMD;
1962 }
1963 return 0;
1964}
1965
1966static void mxser_stoprx(struct tty_struct *tty)
1967{
1968 struct mxser_port *info = tty->driver_data;
1969
1970 info->ldisc_stop_rx = 1;
1971 if (I_IXOFF(tty)) {
1972 if (info->board->chip_flag) {
1973 info->IER &= ~MOXA_MUST_RECV_ISR;
1974 outb(info->IER, info->ioaddr + UART_IER);
1975 } else {
1976 info->x_char = STOP_CHAR(tty);
1977 outb(0, info->ioaddr + UART_IER);
1978 info->IER |= UART_IER_THRI;
1979 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1980 }
1981 }
1982
216ba023 1983 if (tty->termios->c_cflag & CRTSCTS) {
1c45607a
JS		 1984 info->MCR &= ~UART_MCR_RTS;
1985 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 1986 }
1987}
1988
1989/*
1990 * This routine is called by the upper-layer tty layer to signal that
1991 * incoming characters should be throttled.
1992 */
1993static void mxser_throttle(struct tty_struct *tty)
1994{
1da177e4 1995 mxser_stoprx(tty);
1da177e4
LT		 1996}
1997
1998static void mxser_unthrottle(struct tty_struct *tty)
1999{
1c45607a 2000 struct mxser_port *info = tty->driver_data;
1da177e4 2001
1c45607a
JS		 2002 /* startrx */
2003 info->ldisc_stop_rx = 0;
2004 if (I_IXOFF(tty)) {
2005 if (info->x_char)
2006 info->x_char = 0;
2007 else {
2008 if (info->board->chip_flag) {
2009 info->IER |= MOXA_MUST_RECV_ISR;
2010 outb(info->IER, info->ioaddr + UART_IER);
2011 } else {
2012 info->x_char = START_CHAR(tty);
2013 outb(0, info->ioaddr + UART_IER);
2014 info->IER |= UART_IER_THRI;
2015 outb(info->IER, info->ioaddr + UART_IER);
2016 }
1da177e4 2017 }
1c45607a 2018 }
1da177e4 2019
216ba023 2020 if (tty->termios->c_cflag & CRTSCTS) {
1c45607a
JS		 2021 info->MCR |= UART_MCR_RTS;
2022 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 2023 }
2024}
2025
2026/*
2027 * mxser_stop() and mxser_start()
2028 *
2029 * This routines are called before setting or resetting tty->stopped.
2030 * They enable or disable transmitter interrupts, as necessary.
2031 */
2032static void mxser_stop(struct tty_struct *tty)
2033{
1c45607a 2034 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2035 unsigned long flags;
2036
2037 spin_lock_irqsave(&info->slock, flags);
2038 if (info->IER & UART_IER_THRI) {
2039 info->IER &= ~UART_IER_THRI;
1c45607a 2040 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 2041 }
2042 spin_unlock_irqrestore(&info->slock, flags);
2043}
2044
2045static void mxser_start(struct tty_struct *tty)
2046{
1c45607a 2047 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2048 unsigned long flags;
2049
2050 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 2051 if (info->xmit_cnt && info->port.xmit_buf) {
1c45607a 2052 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 2053 info->IER |= UART_IER_THRI;
1c45607a 2054 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 2055 }
2056 spin_unlock_irqrestore(&info->slock, flags);
2057}
2058
1c45607a
JS		 2059static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2060{
2061 struct mxser_port *info = tty->driver_data;
2062 unsigned long flags;
2063
2064 spin_lock_irqsave(&info->slock, flags);
216ba023 2065 mxser_change_speed(tty, old_termios);
1c45607a
JS		 2066 spin_unlock_irqrestore(&info->slock, flags);
2067
2068 if ((old_termios->c_cflag & CRTSCTS) &&
2069 !(tty->termios->c_cflag & CRTSCTS)) {
2070 tty->hw_stopped = 0;
2071 mxser_start(tty);
2072 }
2073
2074 /* Handle sw stopped */
2075 if ((old_termios->c_iflag & IXON) &&
2076 !(tty->termios->c_iflag & IXON)) {
2077 tty->stopped = 0;
2078
2079 if (info->board->chip_flag) {
2080 spin_lock_irqsave(&info->slock, flags);
148ff86b
CH		 2081 mxser_disable_must_rx_software_flow_control(
2082 info->ioaddr);
1c45607a
JS		 2083 spin_unlock_irqrestore(&info->slock, flags);
2084 }
2085
2086 mxser_start(tty);
2087 }
2088}
2089
1da177e4
LT		 2090/*
2091 * mxser_wait_until_sent() --- wait until the transmitter is empty
2092 */
2093static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
2094{
1c45607a 2095 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2096 unsigned long orig_jiffies, char_time;
2097 int lsr;
2098
2099 if (info->type == PORT_UNKNOWN)
2100 return;
2101
2102 if (info->xmit_fifo_size == 0)
2103 return; /* Just in case.... */
2104
2105 orig_jiffies = jiffies;
2106 /*
2107 * Set the check interval to be 1/5 of the estimated time to
2108 * send a single character, and make it at least 1. The check
2109 * interval should also be less than the timeout.
2110 *
2111 * Note: we have to use pretty tight timings here to satisfy
2112 * the NIST-PCTS.
2113 */
2114 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2115 char_time = char_time / 5;
2116 if (char_time == 0)
2117 char_time = 1;
2118 if (timeout && timeout < char_time)
2119 char_time = timeout;
2120 /*
2121 * If the transmitter hasn't cleared in twice the approximate
2122 * amount of time to send the entire FIFO, it probably won't
2123 * ever clear. This assumes the UART isn't doing flow
2124 * control, which is currently the case. Hence, if it ever
2125 * takes longer than info->timeout, this is probably due to a
2126 * UART bug of some kind. So, we clamp the timeout parameter at
2127 * 2*info->timeout.
2128 */
2129 if (!timeout || timeout > 2 * info->timeout)
2130 timeout = 2 * info->timeout;
2131#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
8ea2c2ec
JJ		 2132 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2133 timeout, char_time);
1da177e4
LT		 2134 printk("jiff=%lu...", jiffies);
2135#endif
978e595f 2136 lock_kernel();
1c45607a 2137 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
1da177e4
LT		 2138#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2139 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2140#endif
da4cd8df 2141 schedule_timeout_interruptible(char_time);
1da177e4 2142 if (signal_pending(current))
1c45607a
JS		 2143 break;
2144 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2145 break;
1da177e4 2146 }
1c45607a 2147 set_current_state(TASK_RUNNING);
978e595f 2148 unlock_kernel();
1da177e4 2149
1c45607a
JS		 2150#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2151 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2152#endif
2153}
1da177e4 2154
1c45607a
JS		 2155/*
2156 * This routine is called by tty_hangup() when a hangup is signaled.
2157 */
2158static void mxser_hangup(struct tty_struct *tty)
2159{
2160 struct mxser_port *info = tty->driver_data;
1da177e4 2161
1c45607a 2162 mxser_flush_buffer(tty);
216ba023 2163 mxser_shutdown(tty);
0ad9e7d1
AC		 2164 info->port.count = 0;
2165 info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
216ba023 2166 tty_port_tty_set(&info->port, NULL);
0ad9e7d1 2167 wake_up_interruptible(&info->port.open_wait);
1da177e4
LT		 2168}
2169
1c45607a
JS		 2170/*
2171 * mxser_rs_break() --- routine which turns the break handling on or off
2172 */
9e98966c 2173static int mxser_rs_break(struct tty_struct *tty, int break_state)
1da177e4 2174{
1c45607a 2175 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2176 unsigned long flags;
2177
1c45607a
JS		 2178 spin_lock_irqsave(&info->slock, flags);
2179 if (break_state == -1)
2180 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2181 info->ioaddr + UART_LCR);
2182 else
2183 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2184 info->ioaddr + UART_LCR);
2185 spin_unlock_irqrestore(&info->slock, flags);
9e98966c 2186 return 0;
1c45607a 2187}
1da177e4 2188
216ba023
AC		 2189static void mxser_receive_chars(struct tty_struct *tty,
2190 struct mxser_port *port, int *status)
1c45607a 2191{
1c45607a
JS		 2192 unsigned char ch, gdl;
2193 int ignored = 0;
2194 int cnt = 0;
2195 int recv_room;
2196 int max = 256;
1da177e4 2197
1c45607a 2198 recv_room = tty->receive_room;
216ba023 2199 if (recv_room == 0 && !port->ldisc_stop_rx)
1c45607a 2200 mxser_stoprx(tty);
1c45607a 2201 if (port->board->chip_flag != MOXA_OTHER_UART) {
1da177e4 2202
1c45607a
JS		 2203 if (*status & UART_LSR_SPECIAL)
2204 goto intr_old;
2205 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2206 (*status & MOXA_MUST_LSR_RERR))
2207 goto intr_old;
2208 if (*status & MOXA_MUST_LSR_RERR)
2209 goto intr_old;
1da177e4 2210
1c45607a
JS		 2211 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2212
2213 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2214 gdl &= MOXA_MUST_GDL_MASK;
2215 if (gdl >= recv_room) {
2216 if (!port->ldisc_stop_rx)
2217 mxser_stoprx(tty);
2218 }
2219 while (gdl--) {
2220 ch = inb(port->ioaddr + UART_RX);
2221 tty_insert_flip_char(tty, ch, 0);
2222 cnt++;
2223 }
2224 goto end_intr;
1da177e4 2225 }
1c45607a
JS		 2226intr_old:
2227
2228 do {
2229 if (max-- < 0)
2230 break;
1da177e4 2231
1c45607a
JS		 2232 ch = inb(port->ioaddr + UART_RX);
2233 if (port->board->chip_flag && (*status & UART_LSR_OE))
2234 outb(0x23, port->ioaddr + UART_FCR);
2235 *status &= port->read_status_mask;
2236 if (*status & port->ignore_status_mask) {
2237 if (++ignored > 100)
2238 break;
2239 } else {
2240 char flag = 0;
2241 if (*status & UART_LSR_SPECIAL) {
2242 if (*status & UART_LSR_BI) {
2243 flag = TTY_BREAK;
2244 port->icount.brk++;
1da177e4 2245
0ad9e7d1 2246 if (port->port.flags & ASYNC_SAK)
1c45607a
JS		 2247 do_SAK(tty);
2248 } else if (*status & UART_LSR_PE) {
2249 flag = TTY_PARITY;
2250 port->icount.parity++;
2251 } else if (*status & UART_LSR_FE) {
2252 flag = TTY_FRAME;
2253 port->icount.frame++;
2254 } else if (*status & UART_LSR_OE) {
2255 flag = TTY_OVERRUN;
2256 port->icount.overrun++;
2257 } else
2258 flag = TTY_BREAK;
2259 }
2260 tty_insert_flip_char(tty, ch, flag);
2261 cnt++;
2262 if (cnt >= recv_room) {
2263 if (!port->ldisc_stop_rx)
2264 mxser_stoprx(tty);
2265 break;
2266 }
1da177e4 2267
1c45607a 2268 }
1da177e4 2269
1c45607a
JS		 2270 if (port->board->chip_flag)
2271 break;
1da177e4 2272
1c45607a
JS		 2273 *status = inb(port->ioaddr + UART_LSR);
2274 } while (*status & UART_LSR_DR);
1da177e4 2275
1c45607a 2276end_intr:
216ba023 2277 mxvar_log.rxcnt[tty->index] += cnt;
1c45607a
JS		 2278 port->mon_data.rxcnt += cnt;
2279 port->mon_data.up_rxcnt += cnt;
1da177e4 2280
1c45607a
JS		 2281 /*
2282 * We are called from an interrupt context with &port->slock
2283 * being held. Drop it temporarily in order to prevent
2284 * recursive locking.
2285 */
2286 spin_unlock(&port->slock);
2287 tty_flip_buffer_push(tty);
2288 spin_lock(&port->slock);
1da177e4
LT		 2289}
2290
216ba023 2291static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
1da177e4 2292{
1c45607a 2293 int count, cnt;
1da177e4 2294
1c45607a
JS		 2295 if (port->x_char) {
2296 outb(port->x_char, port->ioaddr + UART_TX);
2297 port->x_char = 0;
216ba023 2298 mxvar_log.txcnt[tty->index]++;
1c45607a
JS		 2299 port->mon_data.txcnt++;
2300 port->mon_data.up_txcnt++;
2301 port->icount.tx++;
2302 return;
2303 }
1da177e4 2304
0ad9e7d1 2305 if (port->port.xmit_buf == NULL)
1c45607a 2306 return;
1da177e4 2307
216ba023
AC		 2308 if (port->xmit_cnt <= 0 || tty->stopped ||
2309 (tty->hw_stopped &&
1c45607a
JS		 2310 (port->type != PORT_16550A) &&
2311 (!port->board->chip_flag))) {
2312 port->IER &= ~UART_IER_THRI;
2313 outb(port->IER, port->ioaddr + UART_IER);
2314 return;
1da177e4
LT		 2315 }
2316
1c45607a
JS		 2317 cnt = port->xmit_cnt;
2318 count = port->xmit_fifo_size;
2319 do {
0ad9e7d1 2320 outb(port->port.xmit_buf[port->xmit_tail++],
1c45607a
JS		 2321 port->ioaddr + UART_TX);
2322 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2323 if (--port->xmit_cnt <= 0)
2324 break;
2325 } while (--count > 0);
216ba023 2326 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
1da177e4 2327
1c45607a
JS		 2328 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2329 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2330 port->icount.tx += (cnt - port->xmit_cnt);
1da177e4 2331
216ba023
AC		 2332 if (port->xmit_cnt < WAKEUP_CHARS && tty)
2333 tty_wakeup(tty);
1c45607a
JS		 2334
2335 if (port->xmit_cnt <= 0) {
2336 port->IER &= ~UART_IER_THRI;
2337 outb(port->IER, port->ioaddr + UART_IER);
1da177e4 2338 }
1da177e4
LT		 2339}
2340
2341/*
1c45607a 2342 * This is the serial driver's generic interrupt routine
1da177e4 2343 */
1c45607a 2344static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1da177e4 2345{
1c45607a
JS		 2346 int status, iir, i;
2347 struct mxser_board *brd = NULL;
2348 struct mxser_port *port;
2349 int max, irqbits, bits, msr;
2350 unsigned int int_cnt, pass_counter = 0;
2351 int handled = IRQ_NONE;
216ba023 2352 struct tty_struct *tty;
1da177e4 2353
1c45607a
JS		 2354 for (i = 0; i < MXSER_BOARDS; i++)
2355 if (dev_id == &mxser_boards[i]) {
2356 brd = dev_id;
2357 break;
2358 }
1da177e4 2359
1c45607a
JS		 2360 if (i == MXSER_BOARDS)
2361 goto irq_stop;
2362 if (brd == NULL)
2363 goto irq_stop;
2364 max = brd->info->nports;
2365 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2366 irqbits = inb(brd->vector) & brd->vector_mask;
2367 if (irqbits == brd->vector_mask)
2368 break;
1da177e4 2369
1c45607a
JS		 2370 handled = IRQ_HANDLED;
2371 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2372 if (irqbits == brd->vector_mask)
2373 break;
2374 if (bits & irqbits)
2375 continue;
2376 port = &brd->ports[i];
2377
2378 int_cnt = 0;
2379 spin_lock(&port->slock);
2380 do {
2381 iir = inb(port->ioaddr + UART_IIR);
2382 if (iir & UART_IIR_NO_INT)
2383 break;
2384 iir &= MOXA_MUST_IIR_MASK;
216ba023
AC		 2385 tty = tty_port_tty_get(&port->port);
2386 if (!tty ||
0ad9e7d1
AC		 2387 (port->port.flags & ASYNC_CLOSING) ||
2388 !(port->port.flags &
1c45607a
JS		 2389 ASYNC_INITIALIZED)) {
2390 status = inb(port->ioaddr + UART_LSR);
2391 outb(0x27, port->ioaddr + UART_FCR);
2392 inb(port->ioaddr + UART_MSR);
216ba023 2393 tty_kref_put(tty);
1c45607a
JS		 2394 break;
2395 }
1da177e4 2396
1c45607a
JS		 2397 status = inb(port->ioaddr + UART_LSR);
2398
2399 if (status & UART_LSR_PE)
2400 port->err_shadow |= NPPI_NOTIFY_PARITY;
2401 if (status & UART_LSR_FE)
2402 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2403 if (status & UART_LSR_OE)
2404 port->err_shadow |=
2405 NPPI_NOTIFY_HW_OVERRUN;
2406 if (status & UART_LSR_BI)
2407 port->err_shadow |= NPPI_NOTIFY_BREAK;
2408
2409 if (port->board->chip_flag) {
2410 if (iir == MOXA_MUST_IIR_GDA ||
2411 iir == MOXA_MUST_IIR_RDA ||
2412 iir == MOXA_MUST_IIR_RTO ||
2413 iir == MOXA_MUST_IIR_LSR)
216ba023 2414 mxser_receive_chars(tty, port,
1c45607a
JS		 2415 &status);
2416
2417 } else {
2418 status &= port->read_status_mask;
2419 if (status & UART_LSR_DR)
216ba023 2420 mxser_receive_chars(tty, port,
1c45607a
JS		 2421 &status);
2422 }
2423 msr = inb(port->ioaddr + UART_MSR);
2424 if (msr & UART_MSR_ANY_DELTA)
216ba023 2425 mxser_check_modem_status(tty, port, msr);
1c45607a
JS		 2426
2427 if (port->board->chip_flag) {
2428 if (iir == 0x02 && (status &
2429 UART_LSR_THRE))
216ba023 2430 mxser_transmit_chars(tty, port);
1c45607a
JS		 2431 } else {
2432 if (status & UART_LSR_THRE)
216ba023 2433 mxser_transmit_chars(tty, port);
1c45607a 2434 }
216ba023 2435 tty_kref_put(tty);
1c45607a
JS		 2436 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2437 spin_unlock(&port->slock);
2438 }
2439 }
1da177e4 2440
1c45607a
JS		 2441irq_stop:
2442 return handled;
2443}
1da177e4 2444
1c45607a
JS		 2445static const struct tty_operations mxser_ops = {
2446 .open = mxser_open,
2447 .close = mxser_close,
2448 .write = mxser_write,
2449 .put_char = mxser_put_char,
2450 .flush_chars = mxser_flush_chars,
2451 .write_room = mxser_write_room,
2452 .chars_in_buffer = mxser_chars_in_buffer,
2453 .flush_buffer = mxser_flush_buffer,
2454 .ioctl = mxser_ioctl,
2455 .throttle = mxser_throttle,
2456 .unthrottle = mxser_unthrottle,
2457 .set_termios = mxser_set_termios,
2458 .stop = mxser_stop,
2459 .start = mxser_start,
2460 .hangup = mxser_hangup,
2461 .break_ctl = mxser_rs_break,
2462 .wait_until_sent = mxser_wait_until_sent,
2463 .tiocmget = mxser_tiocmget,
2464 .tiocmset = mxser_tiocmset,
2465};
1da177e4 2466
31f35939
AC		 2467struct tty_port_operations mxser_port_ops = {
2468 .carrier_raised = mxser_carrier_raised,
5d951fb4 2469 .raise_dtr_rts = mxser_raise_dtr_rts,
31f35939
AC		 2470};
2471
1c45607a
JS		 2472/*
2473 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2474 */
1da177e4 2475
1c45607a
JS		 2476static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2477 unsigned int irq)
2478{
2479 if (irq)
2480 free_irq(brd->irq, brd);
2481 if (pdev != NULL) { /* PCI */
2482#ifdef CONFIG_PCI
2483 pci_release_region(pdev, 2);
2484 pci_release_region(pdev, 3);
2485#endif
2486 } else {
2487 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2488 release_region(brd->vector, 1);
2489 }
1da177e4
LT		 2490}
2491
1c45607a
JS		 2492static int __devinit mxser_initbrd(struct mxser_board *brd,
2493 struct pci_dev *pdev)
1da177e4 2494{
1c45607a
JS		 2495 struct mxser_port *info;
2496 unsigned int i;
2497 int retval;
1da177e4 2498
83766bc6
JS		 2499 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2500 brd->ports[0].max_baud);
1da177e4 2501
1c45607a
JS		 2502 for (i = 0; i < brd->info->nports; i++) {
2503 info = &brd->ports[i];
44b7d1b3 2504 tty_port_init(&info->port);
31f35939 2505 info->port.ops = &mxser_port_ops;
1c45607a
JS		 2506 info->board = brd;
2507 info->stop_rx = 0;
2508 info->ldisc_stop_rx = 0;
1da177e4 2509
1c45607a
JS		 2510 /* Enhance mode enabled here */
2511 if (brd->chip_flag != MOXA_OTHER_UART)
148ff86b 2512 mxser_enable_must_enchance_mode(info->ioaddr);
1da177e4 2513
0ad9e7d1 2514 info->port.flags = ASYNC_SHARE_IRQ;
1c45607a 2515 info->type = brd->uart_type;
1da177e4 2516
1c45607a 2517 process_txrx_fifo(info);
1da177e4 2518
1c45607a 2519 info->custom_divisor = info->baud_base * 16;
44b7d1b3
AC		 2520 info->port.close_delay = 5 * HZ / 10;
2521 info->port.closing_wait = 30 * HZ;
1c45607a 2522 info->normal_termios = mxvar_sdriver->init_termios;
1c45607a
JS		 2523 init_waitqueue_head(&info->delta_msr_wait);
2524 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2525 info->err_shadow = 0;
2526 spin_lock_init(&info->slock);
1da177e4 2527
1c45607a
JS		 2528 /* before set INT ISR, disable all int */
2529 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2530 info->ioaddr + UART_IER);
2531 }
1da177e4 2532
1c45607a
JS		 2533 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2534 brd);
2535 if (retval) {
2536 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2537 "conflict with another device.\n",
2538 brd->info->name, brd->irq);
2539 /* We hold resources, we need to release them. */
2540 mxser_release_res(brd, pdev, 0);
2541 }
2542 return retval;
2543}
1da177e4 2544
1c45607a 2545static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
1da177e4
LT		 2546{
2547 int id, i, bits;
2548 unsigned short regs[16], irq;
2549 unsigned char scratch, scratch2;
2550
1c45607a 2551 brd->chip_flag = MOXA_OTHER_UART;
1da177e4
LT		 2552
2553 id = mxser_read_register(cap, regs);
1c45607a
JS		 2554 switch (id) {
2555 case C168_ASIC_ID:
2556 brd->info = &mxser_cards[0];
2557 break;
2558 case C104_ASIC_ID:
2559 brd->info = &mxser_cards[1];
2560 break;
2561 case CI104J_ASIC_ID:
2562 brd->info = &mxser_cards[2];
2563 break;
2564 case C102_ASIC_ID:
2565 brd->info = &mxser_cards[5];
2566 break;
2567 case CI132_ASIC_ID:
2568 brd->info = &mxser_cards[6];
2569 break;
2570 case CI134_ASIC_ID:
2571 brd->info = &mxser_cards[7];
2572 break;
2573 default:
8ea2c2ec 2574 return 0;
1c45607a 2575 }
1da177e4
LT		 2576
2577 irq = 0;
1c45607a
JS		 2578 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2579 Flag-hack checks if configuration should be read as 2-port here. */
2580 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
1da177e4
LT		 2581 irq = regs[9] & 0xF000;
2582 irq = irq | (irq >> 4);
2583 if (irq != (regs[9] & 0xFF00))
83766bc6 2584 goto err_irqconflict;
1c45607a 2585 } else if (brd->info->nports == 4) {
1da177e4
LT		 2586 irq = regs[9] & 0xF000;
2587 irq = irq | (irq >> 4);
2588 irq = irq | (irq >> 8);
2589 if (irq != regs[9])
83766bc6 2590 goto err_irqconflict;
1c45607a 2591 } else if (brd->info->nports == 8) {
1da177e4
LT		 2592 irq = regs[9] & 0xF000;
2593 irq = irq | (irq >> 4);
2594 irq = irq | (irq >> 8);
2595 if ((irq != regs[9]) || (irq != regs[10]))
83766bc6 2596 goto err_irqconflict;
1da177e4
LT		 2597 }
2598
83766bc6
JS		 2599 if (!irq) {
2600 printk(KERN_ERR "mxser: interrupt number unset\n");
2601 return -EIO;
2602 }
1c45607a 2603 brd->irq = ((int)(irq & 0xF000) >> 12);
1da177e4 2604 for (i = 0; i < 8; i++)
1c45607a 2605 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
83766bc6
JS		 2606 if ((regs[12] & 0x80) == 0) {
2607 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2608 return -EIO;
2609 }
1c45607a 2610 brd->vector = (int)regs[11]; /* interrupt vector */
1da177e4 2611 if (id == 1)
1c45607a 2612 brd->vector_mask = 0x00FF;
1da177e4 2613 else
1c45607a 2614 brd->vector_mask = 0x000F;
1da177e4
LT		 2615 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2616 if (regs[12] & bits) {
1c45607a
JS		 2617 brd->ports[i].baud_base = 921600;
2618 brd->ports[i].max_baud = 921600;
1da177e4 2619 } else {
1c45607a
JS		 2620 brd->ports[i].baud_base = 115200;
2621 brd->ports[i].max_baud = 115200;
1da177e4
LT		 2622 }
2623 }
2624 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2625 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2626 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2627 outb(scratch2, cap + UART_LCR);
2628 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2629 scratch = inb(cap + UART_IIR);
2630
2631 if (scratch & 0xC0)
1c45607a 2632 brd->uart_type = PORT_16550A;
1da177e4 2633 else
1c45607a
JS		 2634 brd->uart_type = PORT_16450;
2635 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
83766bc6
JS		 2636 "mxser(IO)")) {
2637 printk(KERN_ERR "mxser: can't request ports I/O region: "
2638 "0x%.8lx-0x%.8lx\n",
2639 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2640 8 * brd->info->nports - 1);
2641 return -EIO;
2642 }
1c45607a
JS		 2643 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2644 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
83766bc6
JS		 2645 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2646 "0x%.8lx-0x%.8lx\n",
2647 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2648 8 * brd->info->nports - 1);
2649 return -EIO;
1c45607a
JS		 2650 }
2651 return brd->info->nports;
83766bc6
JS		 2652
2653err_irqconflict:
2654 printk(KERN_ERR "mxser: invalid interrupt number\n");
2655 return -EIO;
1da177e4
LT		 2656}
2657
1c45607a
JS		 2658static int __devinit mxser_probe(struct pci_dev *pdev,
2659 const struct pci_device_id *ent)
1da177e4 2660{
1c45607a
JS		 2661#ifdef CONFIG_PCI
2662 struct mxser_board *brd;
2663 unsigned int i, j;
2664 unsigned long ioaddress;
2665 int retval = -EINVAL;
1da177e4 2666
1c45607a
JS		 2667 for (i = 0; i < MXSER_BOARDS; i++)
2668 if (mxser_boards[i].info == NULL)
2669 break;
2670
2671 if (i >= MXSER_BOARDS) {
83766bc6
JS		 2672 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2673 "not configured\n", MXSER_BOARDS);
1c45607a
JS		 2674 goto err;
2675 }
2676
2677 brd = &mxser_boards[i];
2678 brd->idx = i * MXSER_PORTS_PER_BOARD;
83766bc6 2679 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
1c45607a
JS		 2680 mxser_cards[ent->driver_data].name,
2681 pdev->bus->number, PCI_SLOT(pdev->devfn));
2682
2683 retval = pci_enable_device(pdev);
2684 if (retval) {
83766bc6 2685 dev_err(&pdev->dev, "PCI enable failed\n");
1c45607a
JS		 2686 goto err;
2687 }
2688
2689 /* io address */
2690 ioaddress = pci_resource_start(pdev, 2);
2691 retval = pci_request_region(pdev, 2, "mxser(IO)");
2692 if (retval)
2693 goto err;
2694
2695 brd->info = &mxser_cards[ent->driver_data];
2696 for (i = 0; i < brd->info->nports; i++)
2697 brd->ports[i].ioaddr = ioaddress + 8 * i;
2698
2699 /* vector */
2700 ioaddress = pci_resource_start(pdev, 3);
2701 retval = pci_request_region(pdev, 3, "mxser(vector)");
2702 if (retval)
2703 goto err_relio;
2704 brd->vector = ioaddress;
2705
2706 /* irq */
2707 brd->irq = pdev->irq;
2708
2709 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2710 brd->uart_type = PORT_16550A;
2711 brd->vector_mask = 0;
2712
2713 for (i = 0; i < brd->info->nports; i++) {
2714 for (j = 0; j < UART_INFO_NUM; j++) {
2715 if (Gpci_uart_info[j].type == brd->chip_flag) {
2716 brd->ports[i].max_baud =
2717 Gpci_uart_info[j].max_baud;
2718
2719 /* exception....CP-102 */
2720 if (brd->info->flags & MXSER_HIGHBAUD)
2721 brd->ports[i].max_baud = 921600;
2722 break;
1da177e4
LT		 2723 }
2724 }
1c45607a
JS		 2725 }
2726
2727 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2728 for (i = 0; i < brd->info->nports; i++) {
2729 if (i < 4)
2730 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2731 else
2732 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
1da177e4 2733 }
1c45607a
JS		 2734 outb(0, ioaddress + 4); /* default set to RS232 mode */
2735 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4 2736 }
1c45607a
JS		 2737
2738 for (i = 0; i < brd->info->nports; i++) {
2739 brd->vector_mask |= (1 << i);
2740 brd->ports[i].baud_base = 921600;
2741 }
2742
2743 /* mxser_initbrd will hook ISR. */
2744 retval = mxser_initbrd(brd, pdev);
2745 if (retval)
2746 goto err_null;
2747
2748 for (i = 0; i < brd->info->nports; i++)
2749 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2750
2751 pci_set_drvdata(pdev, brd);
2752
2753 return 0;
2754err_relio:
2755 pci_release_region(pdev, 2);
2756err_null:
2757 brd->info = NULL;
2758err:
2759 return retval;
2760#else
2761 return -ENODEV;
2762#endif
1da177e4
LT		 2763}
2764
1c45607a 2765static void __devexit mxser_remove(struct pci_dev *pdev)
1da177e4 2766{
1c45607a
JS		 2767 struct mxser_board *brd = pci_get_drvdata(pdev);
2768 unsigned int i;
1da177e4 2769
1c45607a
JS		 2770 for (i = 0; i < brd->info->nports; i++)
2771 tty_unregister_device(mxvar_sdriver, brd->idx + i);
1da177e4 2772
1c45607a
JS		 2773 mxser_release_res(brd, pdev, 1);
2774 brd->info = NULL;
1da177e4
LT		 2775}
2776
1c45607a
JS		 2777static struct pci_driver mxser_driver = {
2778 .name = "mxser",
2779 .id_table = mxser_pcibrds,
2780 .probe = mxser_probe,
2781 .remove = __devexit_p(mxser_remove)
2782};
2783
2784static int __init mxser_module_init(void)
1da177e4 2785{
1c45607a 2786 struct mxser_board *brd;
1df00924
JS		 2787 unsigned int b, i, m;
2788 int retval;
1da177e4 2789
1c45607a
JS		 2790 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2791 if (!mxvar_sdriver)
2792 return -ENOMEM;
2793
2794 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2795 MXSER_VERSION);
2796
2797 /* Initialize the tty_driver structure */
2798 mxvar_sdriver->owner = THIS_MODULE;
2799 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2800 mxvar_sdriver->name = "ttyMI";
2801 mxvar_sdriver->major = ttymajor;
2802 mxvar_sdriver->minor_start = 0;
2803 mxvar_sdriver->num = MXSER_PORTS + 1;
2804 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2805 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2806 mxvar_sdriver->init_termios = tty_std_termios;
2807 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2808 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2809 tty_set_operations(mxvar_sdriver, &mxser_ops);
2810
2811 retval = tty_register_driver(mxvar_sdriver);
2812 if (retval) {
2813 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2814 "tty driver !\n");
2815 goto err_put;
1da177e4 2816 }
1c45607a 2817
1c45607a 2818 /* Start finding ISA boards here */
1df00924
JS		 2819 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2820 if (!ioaddr[b])
2821 continue;
2822
2823 brd = &mxser_boards[m];
2824 retval = mxser_get_ISA_conf(!ioaddr[b], brd);
2825 if (retval <= 0) {
2826 brd->info = NULL;
2827 continue;
2828 }
1c45607a 2829
1df00924
JS		 2830 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2831 brd->info->name, ioaddr[b]);
83766bc6 2832
1df00924
JS		 2833 /* mxser_initbrd will hook ISR. */
2834 if (mxser_initbrd(brd, NULL) < 0) {
2835 brd->info = NULL;
2836 continue;
2837 }
1c45607a 2838
1df00924
JS		 2839 brd->idx = m * MXSER_PORTS_PER_BOARD;
2840 for (i = 0; i < brd->info->nports; i++)
2841 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
1c45607a 2842
1df00924
JS		 2843 m++;
2844 }
1c45607a
JS		 2845
2846 retval = pci_register_driver(&mxser_driver);
2847 if (retval) {
83766bc6 2848 printk(KERN_ERR "mxser: can't register pci driver\n");
1c45607a
JS		 2849 if (!m) {
2850 retval = -ENODEV;
2851 goto err_unr;
2852 } /* else: we have some ISA cards under control */
2853 }
2854
1c45607a
JS		 2855 return 0;
2856err_unr:
2857 tty_unregister_driver(mxvar_sdriver);
2858err_put:
2859 put_tty_driver(mxvar_sdriver);
2860 return retval;
2861}
2862
2863static void __exit mxser_module_exit(void)
2864{
2865 unsigned int i, j;
2866
1c45607a
JS		 2867 pci_unregister_driver(&mxser_driver);
2868
2869 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2870 if (mxser_boards[i].info != NULL)
2871 for (j = 0; j < mxser_boards[i].info->nports; j++)
2872 tty_unregister_device(mxvar_sdriver,
2873 mxser_boards[i].idx + j);
2874 tty_unregister_driver(mxvar_sdriver);
2875 put_tty_driver(mxvar_sdriver);
2876
2877 for (i = 0; i < MXSER_BOARDS; i++)
2878 if (mxser_boards[i].info != NULL)
2879 mxser_release_res(&mxser_boards[i], NULL, 1);
1da177e4
LT		 2880}
2881
2882module_init(mxser_module_init);
2883module_exit(mxser_module_exit);
Linux kernel - Deliverables
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