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[PATCH] Char: mxser_new, register tty devices on the fly
[deliverable/linux.git] / drivers / char / mxser_new.c
CommitLineData
037ad48b
JS		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
3306ce3d 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com.tw).
c88cb8f9 5 * Copyright (C) 2006 Jiri Slaby <jirislaby@gmail.com>
037ad48b 6 *
c88cb8f9
JS		 7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
037ad48b
JS		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
037ad48b
JS		 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
18 * - Fixed x86_64 cleanness
19 * - Fixed sleep with spinlock held in mxser_send_break
20 */
21
037ad48b
JS		 22#include <linux/module.h>
23#include <linux/autoconf.h>
24#include <linux/errno.h>
25#include <linux/signal.h>
26#include <linux/sched.h>
27#include <linux/timer.h>
28#include <linux/interrupt.h>
29#include <linux/tty.h>
30#include <linux/tty_flip.h>
31#include <linux/serial.h>
32#include <linux/serial_reg.h>
33#include <linux/major.h>
34#include <linux/string.h>
35#include <linux/fcntl.h>
36#include <linux/ptrace.h>
37#include <linux/gfp.h>
38#include <linux/ioport.h>
39#include <linux/mm.h>
40#include <linux/smp_lock.h>
41#include <linux/delay.h>
42#include <linux/pci.h>
43
44#include <asm/system.h>
45#include <asm/io.h>
46#include <asm/irq.h>
47#include <asm/bitops.h>
48#include <asm/uaccess.h>
49
771f2d1a 50#include "mxser_new.h"
037ad48b 51
55b307da 52#define MXSER_VERSION "2.0"
037ad48b
JS		 53#define MXSERMAJOR 174
54#define MXSERCUMAJOR 175
55
56#define MXSER_EVENT_TXLOW 1
57#define MXSER_EVENT_HANGUP 2
58
59#define MXSER_BOARDS 4 /* Max. boards */
60#define MXSER_PORTS 32 /* Max. ports */
61#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
3306ce3d 62#define MXSER_ISR_PASS_LIMIT 99999L
037ad48b
JS		 63
64#define MXSER_ERR_IOADDR -1
65#define MXSER_ERR_IRQ -2
66#define MXSER_ERR_IRQ_CONFLIT -3
67#define MXSER_ERR_VECTOR -4
68
69#define SERIAL_TYPE_NORMAL 1
70#define SERIAL_TYPE_CALLOUT 2
71
72#define WAKEUP_CHARS 256
73
74#define UART_MCR_AFE 0x20
75#define UART_LSR_SPECIAL 0x1E
76
77#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK|\
78 IXON|IXOFF))
79
037ad48b
JS		 80#define C168_ASIC_ID 1
81#define C104_ASIC_ID 2
82#define C102_ASIC_ID 0xB
83#define CI132_ASIC_ID 4
84#define CI134_ASIC_ID 3
85#define CI104J_ASIC_ID 5
86
87enum {
88 MXSER_BOARD_C168_ISA = 1,
89 MXSER_BOARD_C104_ISA,
90 MXSER_BOARD_CI104J,
91 MXSER_BOARD_C168_PCI,
92 MXSER_BOARD_C104_PCI,
93 MXSER_BOARD_C102_ISA,
94 MXSER_BOARD_CI132,
95 MXSER_BOARD_CI134,
96 MXSER_BOARD_CP132,
97 MXSER_BOARD_CP114,
98 MXSER_BOARD_CT114,
99 MXSER_BOARD_CP102,
100 MXSER_BOARD_CP104U,
101 MXSER_BOARD_CP168U,
102 MXSER_BOARD_CP132U,
103 MXSER_BOARD_CP134U,
104 MXSER_BOARD_CP104JU,
105 MXSER_BOARD_RC7000,
106 MXSER_BOARD_CP118U,
107 MXSER_BOARD_CP102UL,
108 MXSER_BOARD_CP102U,
3306ce3d
JS		 109 MXSER_BOARD_CP118EL,
110 MXSER_BOARD_CP168EL,
111 MXSER_BOARD_CP104EL
037ad48b
JS		 112};
113
114static char *mxser_brdname[] = {
115 "C168 series",
116 "C104 series",
117 "CI-104J series",
118 "C168H/PCI series",
119 "C104H/PCI series",
120 "C102 series",
121 "CI-132 series",
122 "CI-134 series",
123 "CP-132 series",
124 "CP-114 series",
125 "CT-114 series",
126 "CP-102 series",
127 "CP-104U series",
128 "CP-168U series",
129 "CP-132U series",
130 "CP-134U series",
131 "CP-104JU series",
132 "Moxa UC7000 Serial",
133 "CP-118U series",
134 "CP-102UL series",
135 "CP-102U series",
3306ce3d
JS		 136 "CP-118EL series",
137 "CP-168EL series",
138 "CP-104EL series"
037ad48b
JS		 139};
140
141static int mxser_numports[] = {
142 8, /* C168-ISA */
143 4, /* C104-ISA */
144 4, /* CI104J */
145 8, /* C168-PCI */
146 4, /* C104-PCI */
147 2, /* C102-ISA */
148 2, /* CI132 */
149 4, /* CI134 */
150 2, /* CP132 */
151 4, /* CP114 */
152 4, /* CT114 */
153 2, /* CP102 */
154 4, /* CP104U */
155 8, /* CP168U */
156 2, /* CP132U */
157 4, /* CP134U */
158 4, /* CP104JU */
159 8, /* RC7000 */
160 8, /* CP118U */
161 2, /* CP102UL */
162 2, /* CP102U */
3306ce3d
JS		 163 8, /* CP118EL */
164 8, /* CP168EL */
165 4 /* CP104EL */
037ad48b
JS		 166};
167
168#define UART_TYPE_NUM 2
169
170static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
171 MOXA_MUST_MU150_HWID,
172 MOXA_MUST_MU860_HWID
173};
174
175/* This is only for PCI */
176#define UART_INFO_NUM 3
177struct mxpciuart_info {
178 int type;
179 int tx_fifo;
180 int rx_fifo;
181 int xmit_fifo_size;
182 int rx_high_water;
183 int rx_trigger;
184 int rx_low_water;
185 long max_baud;
186};
187
188static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
189 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
190 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
191 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
192};
193
037ad48b 194static struct pci_device_id mxser_pcibrds[] = {
3306ce3d
JS		 195 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168),
196 .driver_data = MXSER_BOARD_C168_PCI },
197 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104),
198 .driver_data = MXSER_BOARD_C104_PCI },
199 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132),
200 .driver_data = MXSER_BOARD_CP132 },
201 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114),
202 .driver_data = MXSER_BOARD_CP114 },
203 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114),
204 .driver_data = MXSER_BOARD_CT114 },
205 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102),
206 .driver_data = MXSER_BOARD_CP102 },
207 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U),
208 .driver_data = MXSER_BOARD_CP104U },
209 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U),
210 .driver_data = MXSER_BOARD_CP168U },
211 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U),
212 .driver_data = MXSER_BOARD_CP132U },
213 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U),
214 .driver_data = MXSER_BOARD_CP134U },
215 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU),
216 .driver_data = MXSER_BOARD_CP104JU },
217 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000),
218 .driver_data = MXSER_BOARD_RC7000 },
219 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U),
220 .driver_data = MXSER_BOARD_CP118U },
221 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL),
222 .driver_data = MXSER_BOARD_CP102UL },
223 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U),
224 .driver_data = MXSER_BOARD_CP102U },
225 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118EL),
226 .driver_data = MXSER_BOARD_CP118EL },
227 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168EL),
228 .driver_data = MXSER_BOARD_CP168EL },
229 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104EL),
230 .driver_data = MXSER_BOARD_CP104EL },
231 { }
037ad48b 232};
037ad48b
JS		 233MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
234
037ad48b
JS		 235static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
236static int ttymajor = MXSERMAJOR;
237static int calloutmajor = MXSERCUMAJOR;
037ad48b
JS		 238
239/* Variables for insmod */
240
241MODULE_AUTHOR("Casper Yang");
242MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
243module_param_array(ioaddr, int, NULL, 0);
244module_param(ttymajor, int, 0);
037ad48b
JS		 245MODULE_LICENSE("GPL");
246
247struct mxser_log {
248 int tick;
249 unsigned long rxcnt[MXSER_PORTS];
250 unsigned long txcnt[MXSER_PORTS];
251};
252
253
254struct mxser_mon {
255 unsigned long rxcnt;
256 unsigned long txcnt;
257 unsigned long up_rxcnt;
258 unsigned long up_txcnt;
259 int modem_status;
260 unsigned char hold_reason;
261};
262
263struct mxser_mon_ext {
264 unsigned long rx_cnt[32];
265 unsigned long tx_cnt[32];
266 unsigned long up_rxcnt[32];
267 unsigned long up_txcnt[32];
268 int modem_status[32];
269
270 long baudrate[32];
271 int databits[32];
272 int stopbits[32];
273 int parity[32];
274 int flowctrl[32];
275 int fifo[32];
276 int iftype[32];
277};
278
55b307da
JS		 279struct mxser_board;
280
281struct mxser_port {
282 struct mxser_board *board;
283 struct tty_struct *tty;
284
285 unsigned long ioaddr;
286 unsigned long opmode_ioaddr;
287 int max_baud;
037ad48b 288
037ad48b
JS		 289 int rx_high_water;
290 int rx_trigger; /* Rx fifo trigger level */
291 int rx_low_water;
292 int baud_base; /* max. speed */
55b307da 293 long realbaud;
037ad48b 294 int type; /* UART type */
55b307da
JS		 295 int flags; /* defined in tty.h */
296 long session; /* Session of opening process */
297 long pgrp; /* pgrp of opening process */
298
037ad48b 299 int x_char; /* xon/xoff character */
037ad48b
JS		 300 int IER; /* Interrupt Enable Register */
301 int MCR; /* Modem control register */
55b307da
JS		 302
303 unsigned char stop_rx;
304 unsigned char ldisc_stop_rx;
305
306 int custom_divisor;
307 int close_delay;
308 unsigned short closing_wait;
309 unsigned char err_shadow;
037ad48b 310 unsigned long event;
55b307da 311
037ad48b
JS		 312 int count; /* # of fd on device */
313 int blocked_open; /* # of blocked opens */
55b307da
JS		 314 struct async_icount icount; /* kernel counters for 4 input interrupts */
315 int timeout;
316
317 int read_status_mask;
318 int ignore_status_mask;
319 int xmit_fifo_size;
037ad48b
JS		 320 unsigned char *xmit_buf;
321 int xmit_head;
322 int xmit_tail;
323 int xmit_cnt;
55b307da 324
037ad48b
JS		 325 struct termios normal_termios;
326 struct termios callout_termios;
55b307da
JS		 327
328 struct mxser_mon mon_data;
329
330 spinlock_t slock;
331 struct work_struct tqueue;
037ad48b
JS		 332 wait_queue_head_t open_wait;
333 wait_queue_head_t close_wait;
334 wait_queue_head_t delta_msr_wait;
55b307da
JS		 335};
336
337struct mxser_board {
338 struct pci_dev *pdev; /* temporary (until pci probing) */
339
340 int irq;
341 int board_type;
342 unsigned int nports;
343 unsigned long vector;
344 unsigned long vector_mask;
345
346 int chip_flag;
347 int uart_type;
348
349 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
037ad48b
JS		 350};
351
352struct mxser_mstatus {
353 tcflag_t cflag;
354 int cts;
355 int dsr;
356 int ri;
357 int dcd;
358};
359
360static struct mxser_mstatus GMStatus[MXSER_PORTS];
361
362static int mxserBoardCAP[MXSER_BOARDS] = {
363 0, 0, 0, 0
364 /* 0x180, 0x280, 0x200, 0x320 */
365};
366
55b307da 367static struct mxser_board mxser_boards[MXSER_BOARDS];
037ad48b 368static struct tty_driver *mxvar_sdriver;
037ad48b
JS		 369static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
370static struct termios *mxvar_termios[MXSER_PORTS + 1];
371static struct termios *mxvar_termios_locked[MXSER_PORTS + 1];
372static struct mxser_log mxvar_log;
373static int mxvar_diagflag;
374static unsigned char mxser_msr[MXSER_PORTS + 1];
375static struct mxser_mon_ext mon_data_ext;
376static int mxser_set_baud_method[MXSER_PORTS + 1];
377static spinlock_t gm_lock;
378
037ad48b
JS		 379static int CheckIsMoxaMust(int io)
380{
381 u8 oldmcr, hwid;
382 int i;
383
384 outb(0, io + UART_LCR);
385 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
386 oldmcr = inb(io + UART_MCR);
387 outb(0, io + UART_MCR);
388 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
389 if ((hwid = inb(io + UART_MCR)) != 0) {
390 outb(oldmcr, io + UART_MCR);
391 return MOXA_OTHER_UART;
392 }
393
394 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
395 for (i = 0; i < UART_TYPE_NUM; i++) {
396 if (hwid == Gmoxa_uart_id[i])
397 return (int)hwid;
398 }
399 return MOXA_OTHER_UART;
400}
401
402/* above is modified by Victor Yu. 08-15-2002 */
403
55b307da 404static void process_txrx_fifo(struct mxser_port *info)
037ad48b
JS		 405{
406 int i;
407
408 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
409 info->rx_trigger = 1;
410 info->rx_high_water = 1;
411 info->rx_low_water = 1;
412 info->xmit_fifo_size = 1;
55b307da
JS		 413 } else
414 for (i = 0; i < UART_INFO_NUM; i++)
415 if (info->board->chip_flag == Gpci_uart_info[i].type) {
037ad48b
JS		 416 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
417 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
418 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
419 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
420 break;
421 }
037ad48b
JS		 422}
423
a8dea4ec 424static void mxser_do_softint(void *private_)
037ad48b 425{
a8dea4ec
JS		 426 struct mxser_port *info = private_;
427 struct tty_struct *tty;
037ad48b 428
a8dea4ec 429 tty = info->tty;
037ad48b 430
a8dea4ec
JS		 431 if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
432 tty_wakeup(tty);
433 if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
434 tty_hangup(tty);
435}
037ad48b 436
a8dea4ec
JS		 437static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
438{
439 unsigned char status = 0;
037ad48b 440
a8dea4ec 441 status = inb(baseaddr + UART_MSR);
037ad48b 442
a8dea4ec
JS		 443 mxser_msr[port] &= 0x0F;
444 mxser_msr[port] |= status;
445 status = mxser_msr[port];
446 if (mode)
447 mxser_msr[port] = 0;
037ad48b 448
a8dea4ec
JS		 449 return status;
450}
55b307da 451
a8dea4ec
JS		 452static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
453 struct mxser_port *port)
454{
455 DECLARE_WAITQUEUE(wait, current);
456 int retval;
457 int do_clocal = 0;
458 unsigned long flags;
459
460 /*
461 * If non-blocking mode is set, or the port is not enabled,
462 * then make the check up front and then exit.
463 */
214efebb
JS		 464 if ((filp->f_flags & O_NONBLOCK) ||
465 test_bit(TTY_IO_ERROR, &tty->flags)) {
a8dea4ec
JS		 466 port->flags |= ASYNC_NORMAL_ACTIVE;
467 return 0;
037ad48b 468 }
a8dea4ec
JS		 469
470 if (tty->termios->c_cflag & CLOCAL)
471 do_clocal = 1;
472
037ad48b 473 /*
a8dea4ec
JS		 474 * Block waiting for the carrier detect and the line to become
475 * free (i.e., not in use by the callout). While we are in
476 * this loop, port->count is dropped by one, so that
477 * mxser_close() knows when to free things. We restore it upon
478 * exit, either normal or abnormal.
037ad48b 479 */
a8dea4ec
JS		 480 retval = 0;
481 add_wait_queue(&port->open_wait, &wait);
037ad48b 482
a8dea4ec
JS		 483 spin_lock_irqsave(&port->slock, flags);
484 if (!tty_hung_up_p(filp))
485 port->count--;
486 spin_unlock_irqrestore(&port->slock, flags);
487 port->blocked_open++;
488 while (1) {
489 spin_lock_irqsave(&port->slock, flags);
490 outb(inb(port->ioaddr + UART_MCR) |
491 UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
492 spin_unlock_irqrestore(&port->slock, flags);
493 set_current_state(TASK_INTERRUPTIBLE);
494 if (tty_hung_up_p(filp) || !(port->flags & ASYNC_INITIALIZED)) {
495 if (port->flags & ASYNC_HUP_NOTIFY)
496 retval = -EAGAIN;
497 else
498 retval = -ERESTARTSYS;
499 break;
500 }
501 if (!(port->flags & ASYNC_CLOSING) &&
502 (do_clocal ||
503 (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
504 break;
505 if (signal_pending(current)) {
506 retval = -ERESTARTSYS;
507 break;
508 }
509 schedule();
037ad48b 510 }
a8dea4ec
JS		 511 set_current_state(TASK_RUNNING);
512 remove_wait_queue(&port->open_wait, &wait);
513 if (!tty_hung_up_p(filp))
514 port->count++;
515 port->blocked_open--;
516 if (retval)
517 return retval;
518 port->flags |= ASYNC_NORMAL_ACTIVE;
037ad48b
JS		 519 return 0;
520}
521
a8dea4ec 522static int mxser_set_baud(struct mxser_port *info, long newspd)
037ad48b 523{
a8dea4ec
JS		 524 int quot = 0;
525 unsigned char cval;
526 int ret = 0;
527 unsigned long flags;
037ad48b 528
a8dea4ec
JS		 529 if (!info->tty || !info->tty->termios)
530 return ret;
037ad48b 531
a8dea4ec
JS		 532 if (!(info->ioaddr))
533 return ret;
037ad48b 534
a8dea4ec
JS		 535 if (newspd > info->max_baud)
536 return 0;
037ad48b 537
a8dea4ec
JS		 538 info->realbaud = newspd;
539 if (newspd == 134) {
540 quot = (2 * info->baud_base / 269);
541 } else if (newspd) {
542 quot = info->baud_base / newspd;
543 if (quot == 0)
544 quot = 1;
545 } else {
546 quot = 0;
037ad48b
JS		 547 }
548
a8dea4ec
JS		 549 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
550 info->timeout += HZ / 50; /* Add .02 seconds of slop */
037ad48b 551
a8dea4ec
JS		 552 if (quot) {
553 spin_lock_irqsave(&info->slock, flags);
554 info->MCR |= UART_MCR_DTR;
555 outb(info->MCR, info->ioaddr + UART_MCR);
556 spin_unlock_irqrestore(&info->slock, flags);
557 } else {
558 spin_lock_irqsave(&info->slock, flags);
559 info->MCR &= ~UART_MCR_DTR;
560 outb(info->MCR, info->ioaddr + UART_MCR);
561 spin_unlock_irqrestore(&info->slock, flags);
562 return ret;
037ad48b 563 }
037ad48b 564
a8dea4ec 565 cval = inb(info->ioaddr + UART_LCR);
037ad48b 566
a8dea4ec 567 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
037ad48b 568
a8dea4ec
JS		 569 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
570 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
571 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
037ad48b 572
037ad48b 573
a8dea4ec
JS		 574 return ret;
575}
037ad48b 576
a8dea4ec
JS		 577/*
578 * This routine is called to set the UART divisor registers to match
579 * the specified baud rate for a serial port.
580 */
581static int mxser_change_speed(struct mxser_port *info,
582 struct termios *old_termios)
583{
584 unsigned cflag, cval, fcr;
585 int ret = 0;
586 unsigned char status;
587 long baud;
588 unsigned long flags;
037ad48b 589
a8dea4ec
JS		 590 if (!info->tty || !info->tty->termios)
591 return ret;
592 cflag = info->tty->termios->c_cflag;
593 if (!(info->ioaddr))
594 return ret;
037ad48b 595
a8dea4ec
JS		 596 if (mxser_set_baud_method[info->tty->index] == 0) {
597 baud = tty_get_baud_rate(info->tty);
598 mxser_set_baud(info, baud);
599 }
037ad48b 600
a8dea4ec
JS		 601 /* byte size and parity */
602 switch (cflag & CSIZE) {
603 case CS5:
604 cval = 0x00;
605 break;
606 case CS6:
607 cval = 0x01;
608 break;
609 case CS7:
610 cval = 0x02;
611 break;
612 case CS8:
613 cval = 0x03;
614 break;
615 default:
616 cval = 0x00;
617 break; /* too keep GCC shut... */
618 }
619 if (cflag & CSTOPB)
620 cval |= 0x04;
621 if (cflag & PARENB)
622 cval |= UART_LCR_PARITY;
623 if (!(cflag & PARODD))
624 cval |= UART_LCR_EPAR;
625 if (cflag & CMSPAR)
626 cval |= UART_LCR_SPAR;
037ad48b 627
a8dea4ec
JS		 628 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
629 if (info->board->chip_flag) {
630 fcr = UART_FCR_ENABLE_FIFO;
631 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
632 SET_MOXA_MUST_FIFO_VALUE(info);
633 } else
634 fcr = 0;
635 } else {
636 fcr = UART_FCR_ENABLE_FIFO;
637 /* following add by Victor Yu. 08-30-2002 */
638 if (info->board->chip_flag) {
639 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
640 SET_MOXA_MUST_FIFO_VALUE(info);
641 } else {
642 /* above add by Victor Yu. 08-30-2002 */
643 switch (info->rx_trigger) {
644 case 1:
645 fcr |= UART_FCR_TRIGGER_1;
646 break;
647 case 4:
648 fcr |= UART_FCR_TRIGGER_4;
649 break;
650 case 8:
651 fcr |= UART_FCR_TRIGGER_8;
652 break;
653 default:
654 fcr |= UART_FCR_TRIGGER_14;
655 break;
656 }
037ad48b 657 }
037ad48b
JS		 658 }
659
a8dea4ec
JS		 660 /* CTS flow control flag and modem status interrupts */
661 info->IER &= ~UART_IER_MSI;
662 info->MCR &= ~UART_MCR_AFE;
663 if (cflag & CRTSCTS) {
664 info->flags |= ASYNC_CTS_FLOW;
665 info->IER |= UART_IER_MSI;
666 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
667 info->MCR |= UART_MCR_AFE;
668/* status = mxser_get_msr(info->ioaddr, 0, info->port); */
669/*
670 save_flags(flags);
671 cli();
672 status = inb(baseaddr + UART_MSR);
673 restore_flags(flags);
674*/
675 /* mxser_check_modem_status(info, status); */
676 } else {
677/* status = mxser_get_msr(info->ioaddr, 0, info->port); */
678 /* MX_LOCK(&info->slock); */
679 status = inb(info->ioaddr + UART_MSR);
680 /* MX_UNLOCK(&info->slock); */
681 if (info->tty->hw_stopped) {
682 if (status & UART_MSR_CTS) {
683 info->tty->hw_stopped = 0;
684 if (info->type != PORT_16550A &&
685 !info->board->chip_flag) {
686 outb(info->IER & ~UART_IER_THRI,
687 info->ioaddr +
688 UART_IER);
689 info->IER |= UART_IER_THRI;
690 outb(info->IER, info->ioaddr +
691 UART_IER);
692 }
693 set_bit(MXSER_EVENT_TXLOW, &info->event);
694 schedule_work(&info->tqueue); }
695 } else {
696 if (!(status & UART_MSR_CTS)) {
697 info->tty->hw_stopped = 1;
698 if ((info->type != PORT_16550A) &&
699 (!info->board->chip_flag)) {
700 info->IER &= ~UART_IER_THRI;
701 outb(info->IER, info->ioaddr +
702 UART_IER);
703 }
704 }
705 }
706 }
707 } else {
708 info->flags &= ~ASYNC_CTS_FLOW;
709 }
710 outb(info->MCR, info->ioaddr + UART_MCR);
711 if (cflag & CLOCAL) {
712 info->flags &= ~ASYNC_CHECK_CD;
713 } else {
714 info->flags |= ASYNC_CHECK_CD;
715 info->IER |= UART_IER_MSI;
716 }
717 outb(info->IER, info->ioaddr + UART_IER);
037ad48b 718
a8dea4ec
JS		 719 /*
720 * Set up parity check flag
721 */
722 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
723 if (I_INPCK(info->tty))
724 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
725 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
726 info->read_status_mask |= UART_LSR_BI;
037ad48b 727
a8dea4ec 728 info->ignore_status_mask = 0;
037ad48b 729
a8dea4ec
JS		 730 if (I_IGNBRK(info->tty)) {
731 info->ignore_status_mask |= UART_LSR_BI;
732 info->read_status_mask |= UART_LSR_BI;
733 /*
734 * If we're ignore parity and break indicators, ignore
735 * overruns too. (For real raw support).
736 */
737 if (I_IGNPAR(info->tty)) {
738 info->ignore_status_mask |=
739 UART_LSR_OE |
740 UART_LSR_PE |
741 UART_LSR_FE;
742 info->read_status_mask |=
743 UART_LSR_OE |
744 UART_LSR_PE |
745 UART_LSR_FE;
037ad48b 746 }
037ad48b 747 }
a8dea4ec
JS		 748 /* following add by Victor Yu. 09-02-2002 */
749 if (info->board->chip_flag) {
750 spin_lock_irqsave(&info->slock, flags);
751 SET_MOXA_MUST_XON1_VALUE(info->ioaddr, START_CHAR(info->tty));
752 SET_MOXA_MUST_XOFF1_VALUE(info->ioaddr, STOP_CHAR(info->tty));
753 if (I_IXON(info->tty)) {
754 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
755 } else {
756 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
037ad48b 757 }
a8dea4ec
JS		 758 if (I_IXOFF(info->tty)) {
759 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
760 } else {
761 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
037ad48b 762 }
a8dea4ec
JS		 763 /*
764 if ( I_IXANY(info->tty) ) {
765 info->MCR |= MOXA_MUST_MCR_XON_ANY;
766 ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->ioaddr);
767 } else {
768 info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
769 DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->ioaddr);
770 }
771 */
772 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 773 }
a8dea4ec 774 /* above add by Victor Yu. 09-02-2002 */
037ad48b 775
037ad48b 776
a8dea4ec
JS		 777 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
778 outb(cval, info->ioaddr + UART_LCR);
037ad48b 779
a8dea4ec 780 return ret;
037ad48b
JS		 781}
782
a8dea4ec 783static void mxser_check_modem_status(struct mxser_port *port, int status)
037ad48b 784{
a8dea4ec
JS		 785 /* update input line counters */
786 if (status & UART_MSR_TERI)
787 port->icount.rng++;
788 if (status & UART_MSR_DDSR)
789 port->icount.dsr++;
790 if (status & UART_MSR_DDCD)
791 port->icount.dcd++;
792 if (status & UART_MSR_DCTS)
793 port->icount.cts++;
794 port->mon_data.modem_status = status;
795 wake_up_interruptible(&port->delta_msr_wait);
037ad48b 796
a8dea4ec
JS		 797 if ((port->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
798 if (status & UART_MSR_DCD)
799 wake_up_interruptible(&port->open_wait);
800 schedule_work(&port->tqueue);
801 }
037ad48b 802
a8dea4ec
JS		 803 if (port->flags & ASYNC_CTS_FLOW) {
804 if (port->tty->hw_stopped) {
805 if (status & UART_MSR_CTS) {
806 port->tty->hw_stopped = 0;
807
808 if ((port->type != PORT_16550A) &&
809 (!port->board->chip_flag)) {
810 outb(port->IER & ~UART_IER_THRI,
811 port->ioaddr + UART_IER);
812 port->IER |= UART_IER_THRI;
813 outb(port->IER, port->ioaddr +
814 UART_IER);
815 }
816 set_bit(MXSER_EVENT_TXLOW, &port->event);
817 schedule_work(&port->tqueue);
818 }
819 } else {
820 if (!(status & UART_MSR_CTS)) {
821 port->tty->hw_stopped = 1;
822 if (port->type != PORT_16550A &&
823 !port->board->chip_flag) {
824 port->IER &= ~UART_IER_THRI;
825 outb(port->IER, port->ioaddr +
826 UART_IER);
827 }
828 }
829 }
830 }
037ad48b
JS		 831}
832
a8dea4ec 833static int mxser_startup(struct mxser_port *info)
037ad48b 834{
a8dea4ec
JS		 835 unsigned long page;
836 unsigned long flags;
037ad48b 837
a8dea4ec
JS		 838 page = __get_free_page(GFP_KERNEL);
839 if (!page)
840 return -ENOMEM;
037ad48b 841
a8dea4ec 842 spin_lock_irqsave(&info->slock, flags);
037ad48b 843
a8dea4ec
JS		 844 if (info->flags & ASYNC_INITIALIZED) {
845 free_page(page);
846 spin_unlock_irqrestore(&info->slock, flags);
847 return 0;
848 }
037ad48b 849
a8dea4ec
JS		 850 if (!info->ioaddr || !info->type) {
851 if (info->tty)
852 set_bit(TTY_IO_ERROR, &info->tty->flags);
853 free_page(page);
854 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 855 return 0;
a8dea4ec
JS		 856 }
857 if (info->xmit_buf)
858 free_page(page);
859 else
860 info->xmit_buf = (unsigned char *) page;
037ad48b 861
037ad48b 862 /*
a8dea4ec
JS		 863 * Clear the FIFO buffers and disable them
864 * (they will be reenabled in mxser_change_speed())
037ad48b 865 */
a8dea4ec
JS		 866 if (info->board->chip_flag)
867 outb((UART_FCR_CLEAR_RCVR |
868 UART_FCR_CLEAR_XMIT |
869 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
870 else
871 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
872 info->ioaddr + UART_FCR);
873
874 /*
875 * At this point there's no way the LSR could still be 0xFF;
876 * if it is, then bail out, because there's likely no UART
877 * here.
878 */
879 if (inb(info->ioaddr + UART_LSR) == 0xff) {
880 spin_unlock_irqrestore(&info->slock, flags);
881 if (capable(CAP_SYS_ADMIN)) {
882 if (info->tty)
883 set_bit(TTY_IO_ERROR, &info->tty->flags);
884 return 0;
885 } else
886 return -ENODEV;
887 }
888
889 /*
890 * Clear the interrupt registers.
891 */
892 (void) inb(info->ioaddr + UART_LSR);
893 (void) inb(info->ioaddr + UART_RX);
894 (void) inb(info->ioaddr + UART_IIR);
895 (void) inb(info->ioaddr + UART_MSR);
896
897 /*
898 * Now, initialize the UART
899 */
900 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
901 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
902 outb(info->MCR, info->ioaddr + UART_MCR);
903
904 /*
905 * Finally, enable interrupts
906 */
907 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
908 /* info->IER = UART_IER_RLSI | UART_IER_RDI; */
909
910 /* following add by Victor Yu. 08-30-2002 */
911 if (info->board->chip_flag)
912 info->IER |= MOXA_MUST_IER_EGDAI;
913 /* above add by Victor Yu. 08-30-2002 */
914 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
915
916 /*
917 * And clear the interrupt registers again for luck.
918 */
919 (void) inb(info->ioaddr + UART_LSR);
920 (void) inb(info->ioaddr + UART_RX);
921 (void) inb(info->ioaddr + UART_IIR);
922 (void) inb(info->ioaddr + UART_MSR);
923
924 if (info->tty)
925 clear_bit(TTY_IO_ERROR, &info->tty->flags);
926 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
927
928 /*
929 * and set the speed of the serial port
930 */
931 spin_unlock_irqrestore(&info->slock, flags);
932 mxser_change_speed(info, NULL);
933
934 info->flags |= ASYNC_INITIALIZED;
935 return 0;
936}
937
938/*
939 * This routine will shutdown a serial port; interrupts maybe disabled, and
940 * DTR is dropped if the hangup on close termio flag is on.
941 */
942static void mxser_shutdown(struct mxser_port *info)
943{
944 unsigned long flags;
945
946 if (!(info->flags & ASYNC_INITIALIZED))
947 return;
948
949 spin_lock_irqsave(&info->slock, flags);
950
951 /*
952 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
953 * here so the queue might never be waken up
954 */
955 wake_up_interruptible(&info->delta_msr_wait);
956
957 /*
958 * Free the IRQ, if necessary
959 */
960 if (info->xmit_buf) {
961 free_page((unsigned long) info->xmit_buf);
962 info->xmit_buf = NULL;
963 }
964
965 info->IER = 0;
966 outb(0x00, info->ioaddr + UART_IER);
967
968 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
969 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
970 outb(info->MCR, info->ioaddr + UART_MCR);
971
972 /* clear Rx/Tx FIFO's */
973 /* following add by Victor Yu. 08-30-2002 */
974 if (info->board->chip_flag)
975 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
976 MOXA_MUST_FCR_GDA_MODE_ENABLE,
977 info->ioaddr + UART_FCR);
978 else
979 /* above add by Victor Yu. 08-30-2002 */
980 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
981 info->ioaddr + UART_FCR);
982
983 /* read data port to reset things */
984 (void) inb(info->ioaddr + UART_RX);
985
986 if (info->tty)
987 set_bit(TTY_IO_ERROR, &info->tty->flags);
988
989 info->flags &= ~ASYNC_INITIALIZED;
990
991 /* following add by Victor Yu. 09-23-2002 */
992 if (info->board->chip_flag)
993 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
994 /* above add by Victor Yu. 09-23-2002 */
995
996 spin_unlock_irqrestore(&info->slock, flags);
997}
998
999/*
1000 * This routine is called whenever a serial port is opened. It
1001 * enables interrupts for a serial port, linking in its async structure into
1002 * the IRQ chain. It also performs the serial-specific
1003 * initialization for the tty structure.
1004 */
1005static int mxser_open(struct tty_struct *tty, struct file *filp)
1006{
1007 struct mxser_port *info;
1008 int retval, line;
1009
1010 /* initialize driver_data in case something fails */
1011 tty->driver_data = NULL;
1012
1013 line = tty->index;
1014 if (line == MXSER_PORTS)
1015 return 0;
1016 if (line < 0 || line > MXSER_PORTS)
1017 return -ENODEV;
1018 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1019 if (!info->ioaddr)
1020 return -ENODEV;
1021
1022 tty->driver_data = info;
1023 info->tty = tty;
1024 /*
1025 * Start up serial port
1026 */
1027 info->count++;
1028 retval = mxser_startup(info);
1029 if (retval)
1030 return retval;
1031
1032 retval = mxser_block_til_ready(tty, filp, info);
1033 if (retval)
1034 return retval;
1035
1036 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
037ad48b
JS		 1037 if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
1038 *tty->termios = info->normal_termios;
1039 else
1040 *tty->termios = info->callout_termios;
1041 mxser_change_speed(info, NULL);
1042 }
1043
08a4ae44 1044 info->session = process_session(current);
037ad48b
JS		 1045 info->pgrp = process_group(current);
1046
1047 /*
1048 status = mxser_get_msr(info->base, 0, info->port);
1049 mxser_check_modem_status(info, status);
1050 */
1051
1052/* unmark here for very high baud rate (ex. 921600 bps) used */
1053 tty->low_latency = 1;
1054 return 0;
1055}
1056
1057/*
1058 * This routine is called when the serial port gets closed. First, we
1059 * wait for the last remaining data to be sent. Then, we unlink its
1060 * async structure from the interrupt chain if necessary, and we free
1061 * that IRQ if nothing is left in the chain.
1062 */
1063static void mxser_close(struct tty_struct *tty, struct file *filp)
1064{
55b307da 1065 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1066
1067 unsigned long timeout;
1068 unsigned long flags;
037ad48b
JS		 1069
1070 if (tty->index == MXSER_PORTS)
1071 return;
1072 if (!info)
1073 return;
1074
1075 spin_lock_irqsave(&info->slock, flags);
1076
1077 if (tty_hung_up_p(filp)) {
1078 spin_unlock_irqrestore(&info->slock, flags);
1079 return;
1080 }
1081 if ((tty->count == 1) && (info->count != 1)) {
1082 /*
1083 * Uh, oh. tty->count is 1, which means that the tty
1084 * structure will be freed. Info->count should always
1085 * be one in these conditions. If it's greater than
1086 * one, we've got real problems, since it means the
1087 * serial port won't be shutdown.
1088 */
1089 printk(KERN_ERR "mxser_close: bad serial port count; "
1090 "tty->count is 1, info->count is %d\n", info->count);
1091 info->count = 1;
1092 }
1093 if (--info->count < 0) {
1094 printk(KERN_ERR "mxser_close: bad serial port count for "
55b307da 1095 "ttys%d: %d\n", tty->index, info->count);
037ad48b
JS		 1096 info->count = 0;
1097 }
1098 if (info->count) {
1099 spin_unlock_irqrestore(&info->slock, flags);
1100 return;
1101 }
1102 info->flags |= ASYNC_CLOSING;
1103 spin_unlock_irqrestore(&info->slock, flags);
1104 /*
1105 * Save the termios structure, since this port may have
1106 * separate termios for callout and dialin.
1107 */
1108 if (info->flags & ASYNC_NORMAL_ACTIVE)
1109 info->normal_termios = *tty->termios;
1110 /*
1111 * Now we wait for the transmit buffer to clear; and we notify
1112 * the line discipline to only process XON/XOFF characters.
1113 */
1114 tty->closing = 1;
1115 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1116 tty_wait_until_sent(tty, info->closing_wait);
1117 /*
1118 * At this point we stop accepting input. To do this, we
1119 * disable the receive line status interrupts, and tell the
1120 * interrupt driver to stop checking the data ready bit in the
1121 * line status register.
1122 */
1123 info->IER &= ~UART_IER_RLSI;
55b307da 1124 if (info->board->chip_flag)
037ad48b
JS		 1125 info->IER &= ~MOXA_MUST_RECV_ISR;
1126/* by William
1127 info->read_status_mask &= ~UART_LSR_DR;
1128*/
1129 if (info->flags & ASYNC_INITIALIZED) {
55b307da 1130 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1131 /*
1132 * Before we drop DTR, make sure the UART transmitter
1133 * has completely drained; this is especially
1134 * important if there is a transmit FIFO!
1135 */
1136 timeout = jiffies + HZ;
55b307da 1137 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
037ad48b
JS		 1138 schedule_timeout_interruptible(5);
1139 if (time_after(jiffies, timeout))
1140 break;
1141 }
1142 }
1143 mxser_shutdown(info);
1144
1145 if (tty->driver->flush_buffer)
1146 tty->driver->flush_buffer(tty);
1147
7e8bcf9a 1148 tty_ldisc_flush(tty);
037ad48b
JS		 1149
1150 tty->closing = 0;
1151 info->event = 0;
1152 info->tty = NULL;
1153 if (info->blocked_open) {
1154 if (info->close_delay)
1155 schedule_timeout_interruptible(info->close_delay);
1156 wake_up_interruptible(&info->open_wait);
1157 }
1158
1159 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1160 wake_up_interruptible(&info->close_wait);
1161
1162}
1163
1164static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1165{
1166 int c, total = 0;
55b307da 1167 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1168 unsigned long flags;
1169
1170 if (!info->xmit_buf)
1171 return 0;
1172
1173 while (1) {
1174 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1175 SERIAL_XMIT_SIZE - info->xmit_head));
1176 if (c <= 0)
1177 break;
1178
1179 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1180 spin_lock_irqsave(&info->slock, flags);
1181 info->xmit_head = (info->xmit_head + c) &
1182 (SERIAL_XMIT_SIZE - 1);
1183 info->xmit_cnt += c;
1184 spin_unlock_irqrestore(&info->slock, flags);
1185
1186 buf += c;
1187 count -= c;
1188 total += c;
1189 }
1190
3306ce3d
JS		 1191 if (info->xmit_cnt && !tty->stopped
1192 /*&& !(info->IER & UART_IER_THRI)*/) {
037ad48b
JS		 1193 if (!tty->hw_stopped ||
1194 (info->type == PORT_16550A) ||
55b307da 1195 (info->board->chip_flag)) {
037ad48b 1196 spin_lock_irqsave(&info->slock, flags);
55b307da
JS		 1197 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1198 UART_IER);
037ad48b 1199 info->IER |= UART_IER_THRI;
55b307da 1200 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1201 spin_unlock_irqrestore(&info->slock, flags);
1202 }
1203 }
1204 return total;
1205}
1206
1207static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1208{
55b307da 1209 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1210 unsigned long flags;
1211
1212 if (!info->xmit_buf)
1213 return;
1214
1215 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1216 return;
1217
1218 spin_lock_irqsave(&info->slock, flags);
1219 info->xmit_buf[info->xmit_head++] = ch;
1220 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1221 info->xmit_cnt++;
1222 spin_unlock_irqrestore(&info->slock, flags);
3306ce3d 1223 if (!tty->stopped /*&& !(info->IER & UART_IER_THRI)*/) {
037ad48b
JS		 1224 if (!tty->hw_stopped ||
1225 (info->type == PORT_16550A) ||
55b307da 1226 info->board->chip_flag) {
037ad48b 1227 spin_lock_irqsave(&info->slock, flags);
55b307da 1228 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
037ad48b 1229 info->IER |= UART_IER_THRI;
55b307da 1230 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1231 spin_unlock_irqrestore(&info->slock, flags);
1232 }
1233 }
1234}
1235
1236
1237static void mxser_flush_chars(struct tty_struct *tty)
1238{
55b307da 1239 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1240 unsigned long flags;
1241
1242 if (info->xmit_cnt <= 0 ||
1243 tty->stopped ||
1244 !info->xmit_buf ||
1245 (tty->hw_stopped &&
1246 (info->type != PORT_16550A) &&
55b307da 1247 (!info->board->chip_flag)
037ad48b
JS		 1248 ))
1249 return;
1250
1251 spin_lock_irqsave(&info->slock, flags);
1252
55b307da 1253 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
037ad48b 1254 info->IER |= UART_IER_THRI;
55b307da 1255 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1256
1257 spin_unlock_irqrestore(&info->slock, flags);
1258}
1259
1260static int mxser_write_room(struct tty_struct *tty)
1261{
55b307da 1262 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1263 int ret;
1264
1265 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1266 if (ret < 0)
1267 ret = 0;
1268 return ret;
1269}
1270
1271static int mxser_chars_in_buffer(struct tty_struct *tty)
1272{
55b307da 1273 struct mxser_port *info = tty->driver_data;
3306ce3d
JS		 1274 int len = info->xmit_cnt;
1275
55b307da 1276 if (!(inb(info->ioaddr + UART_LSR) & UART_LSR_THRE))
3306ce3d
JS		 1277 len++;
1278
1279 return len;
037ad48b
JS		 1280}
1281
1282static void mxser_flush_buffer(struct tty_struct *tty)
1283{
55b307da 1284 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1285 char fcr;
1286 unsigned long flags;
1287
1288
1289 spin_lock_irqsave(&info->slock, flags);
1290 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1291
1292 /* below added by shinhay */
55b307da 1293 fcr = inb(info->ioaddr + UART_FCR);
037ad48b 1294 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
55b307da
JS		 1295 info->ioaddr + UART_FCR);
1296 outb(fcr, info->ioaddr + UART_FCR);
037ad48b
JS		 1297
1298 spin_unlock_irqrestore(&info->slock, flags);
1299 /* above added by shinhay */
1300
7e8bcf9a 1301 tty_wakeup(tty);
037ad48b
JS		 1302}
1303
a8dea4ec
JS		 1304/*
1305 * ------------------------------------------------------------
1306 * friends of mxser_ioctl()
1307 * ------------------------------------------------------------
1308 */
1309static int mxser_get_serial_info(struct mxser_port *info,
1310 struct serial_struct __user *retinfo)
037ad48b 1311{
a8dea4ec 1312 struct serial_struct tmp;
037ad48b 1313
a8dea4ec
JS		 1314 if (!retinfo)
1315 return -EFAULT;
1316 memset(&tmp, 0, sizeof(tmp));
1317 tmp.type = info->type;
1318 tmp.line = info->tty->index;
1319 tmp.port = info->ioaddr;
1320 tmp.irq = info->board->irq;
1321 tmp.flags = info->flags;
1322 tmp.baud_base = info->baud_base;
1323 tmp.close_delay = info->close_delay;
1324 tmp.closing_wait = info->closing_wait;
1325 tmp.custom_divisor = info->custom_divisor;
1326 tmp.hub6 = 0;
1327 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1328 return -EFAULT;
1329 return 0;
1330}
037ad48b 1331
a8dea4ec
JS		 1332static int mxser_set_serial_info(struct mxser_port *info,
1333 struct serial_struct __user *new_info)
1334{
1335 struct serial_struct new_serial;
1336 unsigned int flags;
1337 int retval = 0;
037ad48b 1338
a8dea4ec
JS		 1339 if (!new_info || !info->ioaddr)
1340 return -EFAULT;
1341 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1342 return -EFAULT;
037ad48b 1343
a8dea4ec
JS		 1344 if ((new_serial.irq != info->board->irq) ||
1345 (new_serial.port != info->ioaddr) ||
1346 (new_serial.custom_divisor != info->custom_divisor) ||
1347 (new_serial.baud_base != info->baud_base))
1348 return -EPERM;
037ad48b 1349
a8dea4ec
JS		 1350 flags = info->flags & ASYNC_SPD_MASK;
1351
1352 if (!capable(CAP_SYS_ADMIN)) {
1353 if ((new_serial.baud_base != info->baud_base) ||
1354 (new_serial.close_delay != info->close_delay) ||
1355 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
1356 return -EPERM;
1357 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
1358 (new_serial.flags & ASYNC_USR_MASK));
1359 } else {
037ad48b 1360 /*
a8dea4ec
JS		 1361 * OK, past this point, all the error checking has been done.
1362 * At this point, we start making changes.....
037ad48b 1363 */
a8dea4ec
JS		 1364 info->flags = ((info->flags & ~ASYNC_FLAGS) |
1365 (new_serial.flags & ASYNC_FLAGS));
1366 info->close_delay = new_serial.close_delay * HZ / 100;
1367 info->closing_wait = new_serial.closing_wait * HZ / 100;
1368 info->tty->low_latency =
1369 (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1370 info->tty->low_latency = 0; /* (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; */
1371 }
037ad48b 1372
a8dea4ec
JS		 1373 /* added by casper, 3/17/2000, for mouse */
1374 info->type = new_serial.type;
037ad48b 1375
a8dea4ec
JS		 1376 process_txrx_fifo(info);
1377
1378 if (info->flags & ASYNC_INITIALIZED) {
1379 if (flags != (info->flags & ASYNC_SPD_MASK))
1380 mxser_change_speed(info, NULL);
1381 } else
1382 retval = mxser_startup(info);
1383
1384 return retval;
1385}
037ad48b 1386
a8dea4ec
JS		 1387/*
1388 * mxser_get_lsr_info - get line status register info
1389 *
1390 * Purpose: Let user call ioctl() to get info when the UART physically
1391 * is emptied. On bus types like RS485, the transmitter must
1392 * release the bus after transmitting. This must be done when
1393 * the transmit shift register is empty, not be done when the
1394 * transmit holding register is empty. This functionality
1395 * allows an RS485 driver to be written in user space.
1396 */
1397static int mxser_get_lsr_info(struct mxser_port *info,
1398 unsigned int __user *value)
1399{
1400 unsigned char status;
1401 unsigned int result;
1402 unsigned long flags;
037ad48b 1403
a8dea4ec
JS		 1404 spin_lock_irqsave(&info->slock, flags);
1405 status = inb(info->ioaddr + UART_LSR);
1406 spin_unlock_irqrestore(&info->slock, flags);
1407 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1408 return put_user(result, value);
1409}
037ad48b 1410
a8dea4ec
JS		 1411/*
1412 * This routine sends a break character out the serial port.
1413 */
1414static void mxser_send_break(struct mxser_port *info, int duration)
1415{
1416 unsigned long flags;
037ad48b 1417
a8dea4ec
JS		 1418 if (!info->ioaddr)
1419 return;
1420 set_current_state(TASK_INTERRUPTIBLE);
1421 spin_lock_irqsave(&info->slock, flags);
1422 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
1423 info->ioaddr + UART_LCR);
1424 spin_unlock_irqrestore(&info->slock, flags);
1425 schedule_timeout(duration);
1426 spin_lock_irqsave(&info->slock, flags);
1427 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
1428 info->ioaddr + UART_LCR);
1429 spin_unlock_irqrestore(&info->slock, flags);
1430}
037ad48b 1431
a8dea4ec
JS		 1432static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1433{
1434 struct mxser_port *info = tty->driver_data;
1435 unsigned char control, status;
1436 unsigned long flags;
037ad48b 1437
037ad48b 1438
a8dea4ec
JS		 1439 if (tty->index == MXSER_PORTS)
1440 return -ENOIOCTLCMD;
214efebb 1441 if (test_bit(TTY_IO_ERROR, &tty->flags))
a8dea4ec 1442 return -EIO;
037ad48b 1443
a8dea4ec 1444 control = info->MCR;
037ad48b 1445
a8dea4ec
JS		 1446 spin_lock_irqsave(&info->slock, flags);
1447 status = inb(info->ioaddr + UART_MSR);
1448 if (status & UART_MSR_ANY_DELTA)
1449 mxser_check_modem_status(info, status);
1450 spin_unlock_irqrestore(&info->slock, flags);
1451 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1452 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1453 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1454 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1455 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1456 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1457}
037ad48b 1458
a8dea4ec
JS		 1459static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1460 unsigned int set, unsigned int clear)
1461{
1462 struct mxser_port *info = tty->driver_data;
1463 unsigned long flags;
037ad48b 1464
037ad48b 1465
a8dea4ec
JS		 1466 if (tty->index == MXSER_PORTS)
1467 return -ENOIOCTLCMD;
214efebb 1468 if (test_bit(TTY_IO_ERROR, &tty->flags))
a8dea4ec 1469 return -EIO;
037ad48b 1470
a8dea4ec 1471 spin_lock_irqsave(&info->slock, flags);
037ad48b 1472
a8dea4ec
JS		 1473 if (set & TIOCM_RTS)
1474 info->MCR |= UART_MCR_RTS;
1475 if (set & TIOCM_DTR)
1476 info->MCR |= UART_MCR_DTR;
037ad48b 1477
a8dea4ec
JS		 1478 if (clear & TIOCM_RTS)
1479 info->MCR &= ~UART_MCR_RTS;
1480 if (clear & TIOCM_DTR)
1481 info->MCR &= ~UART_MCR_DTR;
037ad48b 1482
a8dea4ec
JS		 1483 outb(info->MCR, info->ioaddr + UART_MCR);
1484 spin_unlock_irqrestore(&info->slock, flags);
037ad48b
JS		 1485 return 0;
1486}
1487
a8dea4ec 1488static int mxser_program_mode(int port)
037ad48b 1489{
a8dea4ec
JS		 1490 int id, i, j, n;
1491 /* unsigned long flags; */
037ad48b 1492
a8dea4ec
JS		 1493 spin_lock(&gm_lock);
1494 outb(0, port);
1495 outb(0, port);
1496 outb(0, port);
1497 (void)inb(port);
1498 (void)inb(port);
1499 outb(0, port);
1500 (void)inb(port);
1501 /* restore_flags(flags); */
1502 spin_unlock(&gm_lock);
037ad48b 1503
a8dea4ec
JS		 1504 id = inb(port + 1) & 0x1F;
1505 if ((id != C168_ASIC_ID) &&
1506 (id != C104_ASIC_ID) &&
1507 (id != C102_ASIC_ID) &&
1508 (id != CI132_ASIC_ID) &&
1509 (id != CI134_ASIC_ID) &&
1510 (id != CI104J_ASIC_ID))
1511 return -1;
1512 for (i = 0, j = 0; i < 4; i++) {
1513 n = inb(port + 2);
1514 if (n == 'M') {
1515 j = 1;
1516 } else if ((j == 1) && (n == 1)) {
1517 j = 2;
1518 break;
1519 } else
1520 j = 0;
1521 }
1522 if (j != 2)
1523 id = -2;
1524 return id;
1525}
1526
1527static void mxser_normal_mode(int port)
1528{
1529 int i, n;
1530
1531 outb(0xA5, port + 1);
1532 outb(0x80, port + 3);
1533 outb(12, port + 0); /* 9600 bps */
1534 outb(0, port + 1);
1535 outb(0x03, port + 3); /* 8 data bits */
1536 outb(0x13, port + 4); /* loop back mode */
1537 for (i = 0; i < 16; i++) {
1538 n = inb(port + 5);
1539 if ((n & 0x61) == 0x60)
1540 break;
1541 if ((n & 1) == 1)
1542 (void)inb(port);
1543 }
1544 outb(0x00, port + 4);
1545}
1546
1547#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1548#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1549#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1550#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1551#define EN_CCMD 0x000 /* Chip's command register */
1552#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1553#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1554#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1555#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1556#define EN0_DCFG 0x00E /* Data configuration reg WR */
1557#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1558#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1559#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1560static int mxser_read_register(int port, unsigned short *regs)
1561{
1562 int i, k, value, id;
1563 unsigned int j;
1564
1565 id = mxser_program_mode(port);
1566 if (id < 0)
1567 return id;
1568 for (i = 0; i < 14; i++) {
1569 k = (i & 0x3F) | 0x180;
1570 for (j = 0x100; j > 0; j >>= 1) {
1571 outb(CHIP_CS, port);
1572 if (k & j) {
1573 outb(CHIP_CS | CHIP_DO, port);
1574 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1575 } else {
1576 outb(CHIP_CS, port);
1577 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1578 }
1579 }
1580 (void)inb(port);
1581 value = 0;
1582 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1583 outb(CHIP_CS, port);
1584 outb(CHIP_CS | CHIP_SK, port);
1585 if (inb(port) & CHIP_DI)
1586 value |= j;
1587 }
1588 regs[i] = value;
1589 outb(0, port);
1590 }
1591 mxser_normal_mode(port);
1592 return id;
1593}
1594
a8dea4ec
JS		 1595static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1596{
1597 struct mxser_port *port;
1598 int result, status;
1599 unsigned int i, j;
1600
1601 switch (cmd) {
1602 case MOXA_GET_CONF:
1603/* if (copy_to_user(argp, mxsercfg,
1604 sizeof(struct mxser_hwconf) * 4))
1605 return -EFAULT;
1606 return 0;*/
1607 return -ENXIO;
1608 case MOXA_GET_MAJOR:
1609 if (copy_to_user(argp, &ttymajor, sizeof(int)))
1610 return -EFAULT;
1611 return 0;
1612
1613 case MOXA_GET_CUMAJOR:
1614 if (copy_to_user(argp, &calloutmajor, sizeof(int)))
037ad48b
JS		 1615 return -EFAULT;
1616 return 0;
1617
1618 case MOXA_CHKPORTENABLE:
1619 result = 0;
55b307da
JS		 1620
1621 for (i = 0; i < MXSER_BOARDS; i++)
1622 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1623 if (mxser_boards[i].ports[j].ioaddr)
1624 result |= (1 << i);
1625
037ad48b
JS		 1626 return put_user(result, (unsigned long __user *)argp);
1627 case MOXA_GETDATACOUNT:
1628 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1629 return -EFAULT;
1630 return 0;
1631 case MOXA_GETMSTATUS:
55b307da
JS		 1632 for (i = 0; i < MXSER_BOARDS; i++)
1633 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1634 port = &mxser_boards[i].ports[j];
1635
1636 GMStatus[i].ri = 0;
1637 if (!port->ioaddr) {
1638 GMStatus[i].dcd = 0;
1639 GMStatus[i].dsr = 0;
1640 GMStatus[i].cts = 0;
1641 continue;
1642 }
037ad48b 1643
55b307da
JS		 1644 if (!port->tty || !port->tty->termios)
1645 GMStatus[i].cflag =
1646 port->normal_termios.c_cflag;
1647 else
1648 GMStatus[i].cflag =
1649 port->tty->termios->c_cflag;
037ad48b 1650
55b307da
JS		 1651 status = inb(port->ioaddr + UART_MSR);
1652 if (status & 0x80 /*UART_MSR_DCD */ )
1653 GMStatus[i].dcd = 1;
1654 else
1655 GMStatus[i].dcd = 0;
037ad48b 1656
55b307da
JS		 1657 if (status & 0x20 /*UART_MSR_DSR */ )
1658 GMStatus[i].dsr = 1;
1659 else
1660 GMStatus[i].dsr = 0;
037ad48b
JS		 1661
1662
55b307da
JS		 1663 if (status & 0x10 /*UART_MSR_CTS */ )
1664 GMStatus[i].cts = 1;
1665 else
1666 GMStatus[i].cts = 0;
1667 }
037ad48b
JS		 1668 if (copy_to_user(argp, GMStatus,
1669 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1670 return -EFAULT;
1671 return 0;
1672 case MOXA_ASPP_MON_EXT: {
55b307da
JS		 1673 int status, p, shiftbit;
1674 unsigned long opmode;
1675 unsigned cflag, iflag;
037ad48b 1676
55b307da
JS		 1677 for (i = 0; i < MXSER_BOARDS; i++)
1678 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1679 port = &mxser_boards[i].ports[j];
1680 if (!port->ioaddr)
037ad48b
JS		 1681 continue;
1682
55b307da
JS		 1683 status = mxser_get_msr(port->ioaddr, 0, i);
1684/* mxser_check_modem_status(port, status); */
1685
037ad48b 1686 if (status & UART_MSR_TERI)
55b307da 1687 port->icount.rng++;
037ad48b 1688 if (status & UART_MSR_DDSR)
55b307da 1689 port->icount.dsr++;
037ad48b 1690 if (status & UART_MSR_DDCD)
55b307da 1691 port->icount.dcd++;
037ad48b 1692 if (status & UART_MSR_DCTS)
55b307da
JS		 1693 port->icount.cts++;
1694
1695 port->mon_data.modem_status = status;
1696 mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt;
1697 mon_data_ext.tx_cnt[i] = port->mon_data.txcnt;
1698 mon_data_ext.up_rxcnt[i] =
1699 port->mon_data.up_rxcnt;
1700 mon_data_ext.up_txcnt[i] =
1701 port->mon_data.up_txcnt;
1702 mon_data_ext.modem_status[i] =
1703 port->mon_data.modem_status;
1704 mon_data_ext.baudrate[i] = port->realbaud;
1705
1706 if (!port->tty || !port->tty->termios) {
1707 cflag = port->normal_termios.c_cflag;
1708 iflag = port->normal_termios.c_iflag;
037ad48b 1709 } else {
55b307da
JS		 1710 cflag = port->tty->termios->c_cflag;
1711 iflag = port->tty->termios->c_iflag;
037ad48b
JS		 1712 }
1713
1714 mon_data_ext.databits[i] = cflag & CSIZE;
1715
1716 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1717
55b307da
JS		 1718 mon_data_ext.parity[i] =
1719 cflag & (PARENB | PARODD | CMSPAR);
037ad48b
JS		 1720
1721 mon_data_ext.flowctrl[i] = 0x00;
1722
1723 if (cflag & CRTSCTS)
1724 mon_data_ext.flowctrl[i] |= 0x03;
1725
1726 if (iflag & (IXON | IXOFF))
1727 mon_data_ext.flowctrl[i] |= 0x0C;
1728
55b307da 1729 if (port->type == PORT_16550A)
037ad48b
JS		 1730 mon_data_ext.fifo[i] = 1;
1731 else
1732 mon_data_ext.fifo[i] = 0;
1733
1734 p = i % 4;
1735 shiftbit = p * 2;
55b307da 1736 opmode = inb(port->opmode_ioaddr) >> shiftbit;
037ad48b
JS		 1737 opmode &= OP_MODE_MASK;
1738
1739 mon_data_ext.iftype[i] = opmode;
1740
1741 }
55b307da
JS		 1742 if (copy_to_user(argp, &mon_data_ext,
1743 sizeof(mon_data_ext)))
037ad48b
JS		 1744 return -EFAULT;
1745
1746 return 0;
1747
55b307da 1748 } default:
037ad48b
JS		 1749 return -ENOIOCTLCMD;
1750 }
1751 return 0;
1752}
1753
a8dea4ec
JS		 1754static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1755 unsigned int cmd, unsigned long arg)
037ad48b 1756{
55b307da 1757 struct mxser_port *info = tty->driver_data;
a8dea4ec
JS		 1758 struct async_icount cprev, cnow; /* kernel counter temps */
1759 struct serial_icounter_struct __user *p_cuser;
1760 unsigned long templ;
1761 unsigned long flags;
1762 void __user *argp = (void __user *)arg;
1763 int retval;
037ad48b 1764
a8dea4ec
JS		 1765 if (tty->index == MXSER_PORTS)
1766 return mxser_ioctl_special(cmd, argp);
1767
1768 /* following add by Victor Yu. 01-05-2004 */
1769 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1770 int p;
1771 unsigned long opmode;
1772 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1773 int shiftbit;
1774 unsigned char val, mask;
1775
1776 p = tty->index % 4;
1777 if (cmd == MOXA_SET_OP_MODE) {
1778 if (get_user(opmode, (int __user *) argp))
1779 return -EFAULT;
1780 if (opmode != RS232_MODE &&
1781 opmode != RS485_2WIRE_MODE &&
1782 opmode != RS422_MODE &&
1783 opmode != RS485_4WIRE_MODE)
1784 return -EFAULT;
1785 mask = ModeMask[p];
1786 shiftbit = p * 2;
1787 val = inb(info->opmode_ioaddr);
1788 val &= mask;
1789 val |= (opmode << shiftbit);
1790 outb(val, info->opmode_ioaddr);
1791 } else {
1792 shiftbit = p * 2;
1793 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1794 opmode &= OP_MODE_MASK;
1795 if (copy_to_user(argp, &opmode, sizeof(int)))
1796 return -EFAULT;
3306ce3d 1797 }
a8dea4ec 1798 return 0;
037ad48b 1799 }
a8dea4ec 1800 /* above add by Victor Yu. 01-05-2004 */
037ad48b 1801
214efebb
JS		 1802 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1803 test_bit(TTY_IO_ERROR, &tty->flags))
1804 return -EIO;
1805
a8dea4ec
JS		 1806 switch (cmd) {
1807 case TCSBRK: /* SVID version: non-zero arg --> no break */
1808 retval = tty_check_change(tty);
1809 if (retval)
1810 return retval;
1811 tty_wait_until_sent(tty, 0);
1812 if (!arg)
1813 mxser_send_break(info, HZ / 4); /* 1/4 second */
1814 return 0;
1815 case TCSBRKP: /* support for POSIX tcsendbreak() */
1816 retval = tty_check_change(tty);
1817 if (retval)
1818 return retval;
1819 tty_wait_until_sent(tty, 0);
1820 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
1821 return 0;
1822 case TIOCGSOFTCAR:
1823 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
1824 case TIOCSSOFTCAR:
1825 if (get_user(templ, (unsigned long __user *) argp))
1826 return -EFAULT;
1827 arg = templ;
1828 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
1829 return 0;
1830 case TIOCGSERIAL:
1831 return mxser_get_serial_info(info, argp);
1832 case TIOCSSERIAL:
1833 return mxser_set_serial_info(info, argp);
1834 case TIOCSERGETLSR: /* Get line status register */
1835 return mxser_get_lsr_info(info, argp);
1836 /*
1837 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1838 * - mask passed in arg for lines of interest
1839 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1840 * Caller should use TIOCGICOUNT to see which one it was
1841 */
1842 case TIOCMIWAIT: {
1843 DECLARE_WAITQUEUE(wait, current);
1844 int ret;
1845 spin_lock_irqsave(&info->slock, flags);
1846 cprev = info->icount; /* note the counters on entry */
1847 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 1848
a8dea4ec
JS		 1849 add_wait_queue(&info->delta_msr_wait, &wait);
1850 while (1) {
1851 spin_lock_irqsave(&info->slock, flags);
1852 cnow = info->icount; /* atomic copy */
1853 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 1854
a8dea4ec
JS		 1855 set_current_state(TASK_INTERRUPTIBLE);
1856 if (((arg & TIOCM_RNG) &&
1857 (cnow.rng != cprev.rng)) ||
1858 ((arg & TIOCM_DSR) &&
1859 (cnow.dsr != cprev.dsr)) ||
1860 ((arg & TIOCM_CD) &&
1861 (cnow.dcd != cprev.dcd)) ||
1862 ((arg & TIOCM_CTS) &&
1863 (cnow.cts != cprev.cts))) {
1864 ret = 0;
1865 break;
3306ce3d 1866 }
a8dea4ec
JS		 1867 /* see if a signal did it */
1868 if (signal_pending(current)) {
1869 ret = -ERESTARTSYS;
1870 break;
1871 }
1872 cprev = cnow;
037ad48b 1873 }
a8dea4ec
JS		 1874 current->state = TASK_RUNNING;
1875 remove_wait_queue(&info->delta_msr_wait, &wait);
1876 break;
037ad48b 1877 }
a8dea4ec
JS		 1878 /* NOTREACHED */
1879 /*
1880 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1881 * Return: write counters to the user passed counter struct
1882 * NB: both 1->0 and 0->1 transitions are counted except for
1883 * RI where only 0->1 is counted.
1884 */
1885 case TIOCGICOUNT:
1886 spin_lock_irqsave(&info->slock, flags);
1887 cnow = info->icount;
1888 spin_unlock_irqrestore(&info->slock, flags);
1889 p_cuser = argp;
1890 /* modified by casper 1/11/2000 */
1891 if (put_user(cnow.frame, &p_cuser->frame))
1892 return -EFAULT;
1893 if (put_user(cnow.brk, &p_cuser->brk))
1894 return -EFAULT;
1895 if (put_user(cnow.overrun, &p_cuser->overrun))
1896 return -EFAULT;
1897 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1898 return -EFAULT;
1899 if (put_user(cnow.parity, &p_cuser->parity))
1900 return -EFAULT;
1901 if (put_user(cnow.rx, &p_cuser->rx))
1902 return -EFAULT;
1903 if (put_user(cnow.tx, &p_cuser->tx))
1904 return -EFAULT;
1905 put_user(cnow.cts, &p_cuser->cts);
1906 put_user(cnow.dsr, &p_cuser->dsr);
1907 put_user(cnow.rng, &p_cuser->rng);
1908 put_user(cnow.dcd, &p_cuser->dcd);
1909 return 0;
1910 case MOXA_HighSpeedOn:
1911 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1912 case MOXA_SDS_RSTICOUNTER:
1913 info->mon_data.rxcnt = 0;
1914 info->mon_data.txcnt = 0;
1915 return 0;
1916/* (above) added by James. */
1917 case MOXA_ASPP_SETBAUD:{
1918 long baud;
1919 if (get_user(baud, (long __user *)argp))
1920 return -EFAULT;
1921 mxser_set_baud(info, baud);
1922 return 0;
1923 }
1924 case MOXA_ASPP_GETBAUD:
1925 if (copy_to_user(argp, &info->realbaud, sizeof(long)))
1926 return -EFAULT;
037ad48b 1927
a8dea4ec 1928 return 0;
037ad48b 1929
a8dea4ec
JS		 1930 case MOXA_ASPP_OQUEUE:{
1931 int len, lsr;
037ad48b 1932
a8dea4ec
JS		 1933 len = mxser_chars_in_buffer(tty);
1934
1935 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1936
1937 len += (lsr ? 0 : 1);
1938
1939 if (copy_to_user(argp, &len, sizeof(int)))
1940 return -EFAULT;
1941
1942 return 0;
037ad48b 1943 }
a8dea4ec
JS		 1944 case MOXA_ASPP_MON: {
1945 int mcr, status;
037ad48b 1946
a8dea4ec
JS		 1947 /* info->mon_data.ser_param = tty->termios->c_cflag; */
1948
1949 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1950 mxser_check_modem_status(info, status);
1951
1952 mcr = inb(info->ioaddr + UART_MCR);
1953 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1954 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1955 else
1956 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1957
1958 if (mcr & MOXA_MUST_MCR_TX_XON)
1959 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1960 else
1961 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1962
1963 if (info->tty->hw_stopped)
1964 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1965 else
1966 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1967
1968 if (copy_to_user(argp, &info->mon_data,
1969 sizeof(struct mxser_mon)))
1970 return -EFAULT;
1971
1972 return 0;
1973 }
1974 case MOXA_ASPP_LSTATUS: {
1975 if (copy_to_user(argp, &info->err_shadow,
1976 sizeof(unsigned char)))
1977 return -EFAULT;
1978
1979 info->err_shadow = 0;
1980 return 0;
1981 }
1982 case MOXA_SET_BAUD_METHOD: {
1983 int method;
1984
1985 if (get_user(method, (int __user *)argp))
1986 return -EFAULT;
1987 mxser_set_baud_method[tty->index] = method;
1988 if (copy_to_user(argp, &method, sizeof(int)))
1989 return -EFAULT;
1990
1991 return 0;
1992 }
1993 default:
1994 return -ENOIOCTLCMD;
1995 }
1996 return 0;
1997}
1998
1999static void mxser_stoprx(struct tty_struct *tty)
2000{
2001 struct mxser_port *info = tty->driver_data;
037ad48b 2002
a8dea4ec
JS		 2003 info->ldisc_stop_rx = 1;
2004 if (I_IXOFF(tty)) {
037ad48b 2005 /* following add by Victor Yu. 09-02-2002 */
55b307da 2006 if (info->board->chip_flag) {
a8dea4ec
JS		 2007 info->IER &= ~MOXA_MUST_RECV_ISR;
2008 outb(info->IER, info->ioaddr + UART_IER);
2009 } else if (!(info->flags & ASYNC_CLOSING)) {
2010 info->x_char = STOP_CHAR(tty);
2011 outb(0, info->ioaddr + UART_IER);
2012 info->IER |= UART_IER_THRI;
2013 outb(info->IER, info->ioaddr + UART_IER);
037ad48b 2014 }
a8dea4ec 2015 }
037ad48b 2016
a8dea4ec
JS		 2017 if (info->tty->termios->c_cflag & CRTSCTS) {
2018 info->MCR &= ~UART_MCR_RTS;
2019 outb(info->MCR, info->ioaddr + UART_MCR);
2020 }
2021}
2022
2023/*
2024 * This routine is called by the upper-layer tty layer to signal that
2025 * incoming characters should be throttled.
2026 */
2027static void mxser_throttle(struct tty_struct *tty)
2028{
2029 mxser_stoprx(tty);
2030}
2031
2032static void mxser_unthrottle(struct tty_struct *tty)
2033{
2034 struct mxser_port *info = tty->driver_data;
2035
2036 /* startrx */
2037 info->ldisc_stop_rx = 0;
2038 if (I_IXOFF(tty)) {
2039 if (info->x_char)
2040 info->x_char = 0;
2041 else {
2042 /* following add by Victor Yu. 09-02-2002 */
2043 if (info->board->chip_flag) {
2044 info->IER |= MOXA_MUST_RECV_ISR;
2045 outb(info->IER, info->ioaddr + UART_IER);
2046 } else if (!(info->flags & ASYNC_CLOSING)) {
2047 info->x_char = START_CHAR(tty);
2048 outb(0, info->ioaddr + UART_IER);
2049 info->IER |= UART_IER_THRI;
2050 outb(info->IER, info->ioaddr + UART_IER);
2051 }
2052 }
2053 }
2054
2055 if (info->tty->termios->c_cflag & CRTSCTS) {
2056 info->MCR |= UART_MCR_RTS;
2057 outb(info->MCR, info->ioaddr + UART_MCR);
037ad48b
JS		 2058 }
2059}
2060
2061/*
2062 * mxser_stop() and mxser_start()
2063 *
2064 * This routines are called before setting or resetting tty->stopped.
2065 * They enable or disable transmitter interrupts, as necessary.
2066 */
2067static void mxser_stop(struct tty_struct *tty)
2068{
55b307da 2069 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 2070 unsigned long flags;
2071
2072 spin_lock_irqsave(&info->slock, flags);
2073 if (info->IER & UART_IER_THRI) {
2074 info->IER &= ~UART_IER_THRI;
55b307da 2075 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 2076 }
2077 spin_unlock_irqrestore(&info->slock, flags);
2078}
2079
2080static void mxser_start(struct tty_struct *tty)
2081{
55b307da 2082 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 2083 unsigned long flags;
2084
2085 spin_lock_irqsave(&info->slock, flags);
3306ce3d
JS		 2086 if (info->xmit_cnt && info->xmit_buf
2087 /* && !(info->IER & UART_IER_THRI) */) {
55b307da 2088 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
037ad48b 2089 info->IER |= UART_IER_THRI;
55b307da 2090 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 2091 }
2092 spin_unlock_irqrestore(&info->slock, flags);
2093}
2094
a8dea4ec
JS		 2095static void mxser_set_termios(struct tty_struct *tty, struct termios *old_termios)
2096{
2097 struct mxser_port *info = tty->driver_data;
2098 unsigned long flags;
2099
2100 if ((tty->termios->c_cflag != old_termios->c_cflag) ||
2101 (RELEVANT_IFLAG(tty->termios->c_iflag) != RELEVANT_IFLAG(old_termios->c_iflag))) {
2102
2103 mxser_change_speed(info, old_termios);
2104
2105 if ((old_termios->c_cflag & CRTSCTS) &&
2106 !(tty->termios->c_cflag & CRTSCTS)) {
2107 tty->hw_stopped = 0;
2108 mxser_start(tty);
2109 }
2110 }
2111
2112/* Handle sw stopped */
2113 if ((old_termios->c_iflag & IXON) &&
2114 !(tty->termios->c_iflag & IXON)) {
2115 tty->stopped = 0;
2116
2117 /* following add by Victor Yu. 09-02-2002 */
2118 if (info->board->chip_flag) {
2119 spin_lock_irqsave(&info->slock, flags);
2120 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
2121 spin_unlock_irqrestore(&info->slock, flags);
2122 }
2123 /* above add by Victor Yu. 09-02-2002 */
2124
2125 mxser_start(tty);
2126 }
2127}
2128
037ad48b
JS		 2129/*
2130 * mxser_wait_until_sent() --- wait until the transmitter is empty
2131 */
2132static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
2133{
55b307da 2134 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 2135 unsigned long orig_jiffies, char_time;
2136 int lsr;
2137
2138 if (info->type == PORT_UNKNOWN)
2139 return;
2140
2141 if (info->xmit_fifo_size == 0)
2142 return; /* Just in case.... */
2143
2144 orig_jiffies = jiffies;
2145 /*
2146 * Set the check interval to be 1/5 of the estimated time to
2147 * send a single character, and make it at least 1. The check
2148 * interval should also be less than the timeout.
2149 *
2150 * Note: we have to use pretty tight timings here to satisfy
2151 * the NIST-PCTS.
2152 */
2153 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2154 char_time = char_time / 5;
2155 if (char_time == 0)
2156 char_time = 1;
2157 if (timeout && timeout < char_time)
2158 char_time = timeout;
2159 /*
2160 * If the transmitter hasn't cleared in twice the approximate
2161 * amount of time to send the entire FIFO, it probably won't
2162 * ever clear. This assumes the UART isn't doing flow
2163 * control, which is currently the case. Hence, if it ever
2164 * takes longer than info->timeout, this is probably due to a
2165 * UART bug of some kind. So, we clamp the timeout parameter at
2166 * 2*info->timeout.
2167 */
2168 if (!timeout || timeout > 2 * info->timeout)
2169 timeout = 2 * info->timeout;
2170#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2171 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2172 timeout, char_time);
2173 printk("jiff=%lu...", jiffies);
2174#endif
55b307da 2175 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
037ad48b
JS		 2176#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2177 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2178#endif
2179 schedule_timeout_interruptible(char_time);
2180 if (signal_pending(current))
2181 break;
2182 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2183 break;
2184 }
2185 set_current_state(TASK_RUNNING);
2186
2187#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2188 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
a8dea4ec
JS		 2189#endif
2190}
037ad48b
JS		 2191
2192
a8dea4ec
JS		 2193/*
2194 * This routine is called by tty_hangup() when a hangup is signaled.
2195 */
2196void mxser_hangup(struct tty_struct *tty)
2197{
2198 struct mxser_port *info = tty->driver_data;
037ad48b 2199
a8dea4ec
JS		 2200 mxser_flush_buffer(tty);
2201 mxser_shutdown(info);
2202 info->event = 0;
2203 info->count = 0;
2204 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2205 info->tty = NULL;
2206 wake_up_interruptible(&info->open_wait);
037ad48b
JS		 2207}
2208
2209
a8dea4ec
JS		 2210/* added by James 03-12-2004. */
2211/*
2212 * mxser_rs_break() --- routine which turns the break handling on or off
2213 */
2214static void mxser_rs_break(struct tty_struct *tty, int break_state)
037ad48b 2215{
a8dea4ec 2216 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 2217 unsigned long flags;
2218
a8dea4ec
JS		 2219 spin_lock_irqsave(&info->slock, flags);
2220 if (break_state == -1)
2221 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2222 info->ioaddr + UART_LCR);
2223 else
2224 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2225 info->ioaddr + UART_LCR);
2226 spin_unlock_irqrestore(&info->slock, flags);
2227}
037ad48b 2228
a8dea4ec 2229/* (above) added by James. */
037ad48b 2230
a8dea4ec
JS		 2231static void mxser_receive_chars(struct mxser_port *port, int *status)
2232{
2233 struct tty_struct *tty = port->tty;
2234 unsigned char ch, gdl;
2235 int ignored = 0;
2236 int cnt = 0;
2237 int recv_room;
2238 int max = 256;
2239 unsigned long flags;
037ad48b 2240
a8dea4ec
JS		 2241 spin_lock_irqsave(&port->slock, flags);
2242
2243 recv_room = tty->receive_room;
2244 if ((recv_room == 0) && (!port->ldisc_stop_rx)) {
2245 /* mxser_throttle(tty); */
2246 mxser_stoprx(tty);
2247 /* return; */
037ad48b
JS		 2248 }
2249
a8dea4ec
JS		 2250 /* following add by Victor Yu. 09-02-2002 */
2251 if (port->board->chip_flag != MOXA_OTHER_UART) {
037ad48b 2252
a8dea4ec
JS		 2253 if (*status & UART_LSR_SPECIAL)
2254 goto intr_old;
2255 /* following add by Victor Yu. 02-11-2004 */
2256 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2257 (*status & MOXA_MUST_LSR_RERR))
2258 goto intr_old;
2259 /* above add by Victor Yu. 02-14-2004 */
2260 if (*status & MOXA_MUST_LSR_RERR)
2261 goto intr_old;
2262
2263 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2264
2265 /* add by Victor Yu. 02-11-2004 */
2266 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2267 gdl &= MOXA_MUST_GDL_MASK;
2268 if (gdl >= recv_room) {
2269 if (!port->ldisc_stop_rx) {
2270 /* mxser_throttle(tty); */
2271 mxser_stoprx(tty);
2272 }
2273 /* return; */
2274 }
2275 while (gdl--) {
2276 ch = inb(port->ioaddr + UART_RX);
2277 tty_insert_flip_char(tty, ch, 0);
2278 cnt++;
2279 }
2280 goto end_intr;
037ad48b 2281 }
a8dea4ec
JS		 2282 intr_old:
2283 /* above add by Victor Yu. 09-02-2002 */
037ad48b 2284
a8dea4ec
JS		 2285 do {
2286 if (max-- < 0)
2287 break;
037ad48b 2288
a8dea4ec
JS		 2289 ch = inb(port->ioaddr + UART_RX);
2290 /* following add by Victor Yu. 09-02-2002 */
2291 if (port->board->chip_flag && (*status & UART_LSR_OE)
2292 /*&& !(*status&UART_LSR_DR) */)
2293 outb(0x23, port->ioaddr + UART_FCR);
2294 *status &= port->read_status_mask;
2295 /* above add by Victor Yu. 09-02-2002 */
2296 if (*status & port->ignore_status_mask) {
2297 if (++ignored > 100)
2298 break;
2299 } else {
2300 char flag = 0;
2301 if (*status & UART_LSR_SPECIAL) {
2302 if (*status & UART_LSR_BI) {
2303 flag = TTY_BREAK;
2304/* added by casper 1/11/2000 */
2305 port->icount.brk++;
037ad48b 2306
a8dea4ec
JS		 2307 if (port->flags & ASYNC_SAK)
2308 do_SAK(tty);
2309 } else if (*status & UART_LSR_PE) {
2310 flag = TTY_PARITY;
2311/* added by casper 1/11/2000 */
2312 port->icount.parity++;
2313 } else if (*status & UART_LSR_FE) {
2314 flag = TTY_FRAME;
2315/* added by casper 1/11/2000 */
2316 port->icount.frame++;
2317 } else if (*status & UART_LSR_OE) {
2318 flag = TTY_OVERRUN;
2319/* added by casper 1/11/2000 */
2320 port->icount.overrun++;
2321 } else
2322 flags = TTY_BREAK;
2323 } else
2324 flags = 0;
2325 tty_insert_flip_char(tty, ch, flag);
2326 cnt++;
2327 if (cnt >= recv_room) {
2328 if (!port->ldisc_stop_rx) {
2329 /* mxser_throttle(tty); */
2330 mxser_stoprx(tty);
2331 }
2332 break;
2333 }
037ad48b 2334
a8dea4ec 2335 }
037ad48b 2336
a8dea4ec
JS		 2337 /* following add by Victor Yu. 09-02-2002 */
2338 if (port->board->chip_flag)
2339 break;
037ad48b 2340
a8dea4ec
JS		 2341 /* mask by Victor Yu. 09-02-2002
2342 *status = inb(port->ioaddr + UART_LSR) & port->read_status_mask;
2343 */
2344 /* following add by Victor Yu. 09-02-2002 */
2345 *status = inb(port->ioaddr + UART_LSR);
2346 /* above add by Victor Yu. 09-02-2002 */
2347 } while (*status & UART_LSR_DR);
037ad48b 2348
a8dea4ec
JS		 2349end_intr: /* add by Victor Yu. 09-02-2002 */
2350 mxvar_log.rxcnt[port->tty->index] += cnt;
2351 port->mon_data.rxcnt += cnt;
2352 port->mon_data.up_rxcnt += cnt;
2353 spin_unlock_irqrestore(&port->slock, flags);
2354
2355 tty_flip_buffer_push(tty);
037ad48b
JS		 2356}
2357
a8dea4ec 2358static void mxser_transmit_chars(struct mxser_port *port)
037ad48b 2359{
a8dea4ec
JS		 2360 int count, cnt;
2361 unsigned long flags;
037ad48b 2362
a8dea4ec 2363 spin_lock_irqsave(&port->slock, flags);
037ad48b 2364
a8dea4ec
JS		 2365 if (port->x_char) {
2366 outb(port->x_char, port->ioaddr + UART_TX);
2367 port->x_char = 0;
2368 mxvar_log.txcnt[port->tty->index]++;
2369 port->mon_data.txcnt++;
2370 port->mon_data.up_txcnt++;
2371
2372/* added by casper 1/11/2000 */
2373 port->icount.tx++;
2374 goto unlock;
037ad48b
JS		 2375 }
2376
a8dea4ec
JS		 2377 if (port->xmit_buf == 0)
2378 goto unlock;
037ad48b 2379
a8dea4ec
JS		 2380 if (port->xmit_cnt == 0) {
2381 if (port->xmit_cnt < WAKEUP_CHARS) { /* XXX what's this for?? */
2382 set_bit(MXSER_EVENT_TXLOW, &port->event);
2383 schedule_work(&port->tqueue);
2384 }
2385 goto unlock;
2386 }
2387 if (port->tty->stopped || (port->tty->hw_stopped &&
2388 (port->type != PORT_16550A) &&
2389 (!port->board->chip_flag))) {
2390 port->IER &= ~UART_IER_THRI;
2391 outb(port->IER, port->ioaddr + UART_IER);
2392 goto unlock;
2393 }
037ad48b 2394
a8dea4ec
JS		 2395 cnt = port->xmit_cnt;
2396 count = port->xmit_fifo_size;
2397 do {
2398 outb(port->xmit_buf[port->xmit_tail++],
2399 port->ioaddr + UART_TX);
2400 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2401 if (--port->xmit_cnt <= 0)
2402 break;
2403 } while (--count > 0);
2404 mxvar_log.txcnt[port->tty->index] += (cnt - port->xmit_cnt);
55b307da 2405
a8dea4ec
JS		 2406/* added by James 03-12-2004. */
2407 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2408 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
037ad48b 2409
a8dea4ec
JS		 2410/* added by casper 1/11/2000 */
2411 port->icount.tx += (cnt - port->xmit_cnt);
037ad48b 2412
a8dea4ec
JS		 2413 if (port->xmit_cnt < WAKEUP_CHARS) {
2414 set_bit(MXSER_EVENT_TXLOW, &port->event);
2415 schedule_work(&port->tqueue);
2416 }
2417 if (port->xmit_cnt <= 0) {
2418 port->IER &= ~UART_IER_THRI;
2419 outb(port->IER, port->ioaddr + UART_IER);
2420 }
2421unlock:
2422 spin_unlock_irqrestore(&port->slock, flags);
037ad48b
JS		 2423}
2424
2425/*
a8dea4ec 2426 * This is the serial driver's generic interrupt routine
037ad48b 2427 */
a8dea4ec 2428static irqreturn_t mxser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
037ad48b 2429{
a8dea4ec
JS		 2430 int status, iir, i;
2431 struct mxser_board *brd = NULL;
2432 struct mxser_port *port;
2433 int max, irqbits, bits, msr;
2434 int pass_counter = 0;
2435 unsigned int int_cnt;
2436 int handled = IRQ_NONE;
037ad48b 2437
a8dea4ec 2438 /* spin_lock(&gm_lock); */
037ad48b 2439
a8dea4ec
JS		 2440 for (i = 0; i < MXSER_BOARDS; i++)
2441 if (dev_id == &mxser_boards[i]) {
2442 brd = dev_id;
2443 break;
2444 }
037ad48b 2445
a8dea4ec
JS		 2446 if (i == MXSER_BOARDS)
2447 goto irq_stop;
2448 if (brd == NULL)
2449 goto irq_stop;
2450 max = mxser_numports[brd->board_type - 1];
2451 while (1) {
2452 irqbits = inb(brd->vector) & brd->vector_mask;
2453 if (irqbits == brd->vector_mask)
2454 break;
037ad48b 2455
a8dea4ec
JS		 2456 handled = IRQ_HANDLED;
2457 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2458 if (irqbits == brd->vector_mask)
2459 break;
2460 if (bits & irqbits)
2461 continue;
2462 port = &brd->ports[i];
037ad48b 2463
a8dea4ec
JS		 2464 int_cnt = 0;
2465 do {
2466 /* following add by Victor Yu. 09-13-2002 */
2467 iir = inb(port->ioaddr + UART_IIR);
2468 if (iir & UART_IIR_NO_INT)
2469 break;
2470 iir &= MOXA_MUST_IIR_MASK;
2471 if (!port->tty) {
2472 status = inb(port->ioaddr + UART_LSR);
2473 outb(0x27, port->ioaddr + UART_FCR);
2474 inb(port->ioaddr + UART_MSR);
2475 break;
2476 }
2477 /* above add by Victor Yu. 09-13-2002 */
037ad48b 2478
a8dea4ec
JS		 2479 /* following add by Victor Yu. 09-02-2002 */
2480 status = inb(port->ioaddr + UART_LSR);
2481
2482 if (status & UART_LSR_PE)
2483 port->err_shadow |= NPPI_NOTIFY_PARITY;
2484 if (status & UART_LSR_FE)
2485 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2486 if (status & UART_LSR_OE)
2487 port->err_shadow |=
2488 NPPI_NOTIFY_HW_OVERRUN;
2489 if (status & UART_LSR_BI)
2490 port->err_shadow |= NPPI_NOTIFY_BREAK;
2491
2492 if (port->board->chip_flag) {
2493 /*
2494 if ( (status & 0x02) && !(status & 0x01) ) {
2495 outb(port->ioaddr+UART_FCR, 0x23);
2496 continue;
2497 }
2498 */
2499 if (iir == MOXA_MUST_IIR_GDA ||
2500 iir == MOXA_MUST_IIR_RDA ||
2501 iir == MOXA_MUST_IIR_RTO ||
2502 iir == MOXA_MUST_IIR_LSR)
2503 mxser_receive_chars(port,
2504 &status);
2505
2506 } else {
2507 /* above add by Victor Yu. 09-02-2002 */
2508
2509 status &= port->read_status_mask;
2510 if (status & UART_LSR_DR)
2511 mxser_receive_chars(port,
2512 &status);
2513 }
2514 msr = inb(port->ioaddr + UART_MSR);
2515 if (msr & UART_MSR_ANY_DELTA)
2516 mxser_check_modem_status(port, msr);
2517
2518 /* following add by Victor Yu. 09-13-2002 */
2519 if (port->board->chip_flag) {
2520 if (iir == 0x02 && (status &
2521 UART_LSR_THRE))
2522 mxser_transmit_chars(port);
2523 } else {
2524 /* above add by Victor Yu. 09-13-2002 */
2525
2526 if (status & UART_LSR_THRE)
2527 mxser_transmit_chars(port);
2528 }
2529 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2530 }
2531 if (pass_counter++ > MXSER_ISR_PASS_LIMIT)
2532 break; /* Prevent infinite loops */
2533 }
2534
2535 irq_stop:
2536 /* spin_unlock(&gm_lock); */
2537 return handled;
037ad48b
JS		 2538}
2539
a8dea4ec
JS		 2540static const struct tty_operations mxser_ops = {
2541 .open = mxser_open,
2542 .close = mxser_close,
2543 .write = mxser_write,
2544 .put_char = mxser_put_char,
2545 .flush_chars = mxser_flush_chars,
2546 .write_room = mxser_write_room,
2547 .chars_in_buffer = mxser_chars_in_buffer,
2548 .flush_buffer = mxser_flush_buffer,
2549 .ioctl = mxser_ioctl,
2550 .throttle = mxser_throttle,
2551 .unthrottle = mxser_unthrottle,
2552 .set_termios = mxser_set_termios,
2553 .stop = mxser_stop,
2554 .start = mxser_start,
2555 .hangup = mxser_hangup,
2556 .break_ctl = mxser_rs_break,
2557 .wait_until_sent = mxser_wait_until_sent,
2558 .tiocmget = mxser_tiocmget,
2559 .tiocmset = mxser_tiocmset,
2560};
2561
2562/*
2563 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2564 */
2565
171d3a86
JS		 2566static void mxser_release_res(struct mxser_board *brd, unsigned int irq)
2567{
2568 struct pci_dev *pdev = brd->pdev;
2569
2570 if (irq)
2571 free_irq(brd->irq, brd);
2572 if (pdev != NULL) { /* PCI */
2573 pci_release_region(pdev, 2);
2574 pci_release_region(pdev, 3);
2575 pci_dev_put(pdev);
2576 } else {
2577 release_region(brd->ports[0].ioaddr, 8 * brd->nports);
2578 release_region(brd->vector, 1);
2579 }
2580}
2581
a8dea4ec 2582static int __devinit mxser_initbrd(struct mxser_board *brd)
037ad48b 2583{
a8dea4ec
JS		 2584 struct mxser_port *info;
2585 unsigned int i;
2586 int retval;
2587
2588 printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud);
2589
2590 for (i = 0; i < brd->nports; i++) {
2591 info = &brd->ports[i];
2592 info->board = brd;
2593 info->stop_rx = 0;
2594 info->ldisc_stop_rx = 0;
037ad48b 2595
a8dea4ec
JS		 2596 /* Enhance mode enabled here */
2597 if (brd->chip_flag != MOXA_OTHER_UART)
2598 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->ioaddr);
037ad48b 2599
a8dea4ec
JS		 2600 info->flags = ASYNC_SHARE_IRQ;
2601 info->type = brd->uart_type;
037ad48b 2602
a8dea4ec 2603 process_txrx_fifo(info);
037ad48b 2604
a8dea4ec
JS		 2605 info->custom_divisor = info->baud_base * 16;
2606 info->close_delay = 5 * HZ / 10;
2607 info->closing_wait = 30 * HZ;
2608 INIT_WORK(&info->tqueue, mxser_do_softint, info);
2609 info->normal_termios = mxvar_sdriver->init_termios;
2610 init_waitqueue_head(&info->open_wait);
2611 init_waitqueue_head(&info->close_wait);
2612 init_waitqueue_head(&info->delta_msr_wait);
2613 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2614 info->err_shadow = 0;
2615 spin_lock_init(&info->slock);
037ad48b 2616
a8dea4ec
JS		 2617 /* before set INT ISR, disable all int */
2618 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2619 info->ioaddr + UART_IER);
2620 }
2621 /*
2622 * Allocate the IRQ if necessary
2623 */
037ad48b 2624
a8dea4ec
JS		 2625 retval = request_irq(brd->irq, mxser_interrupt,
2626 (brd->ports[0].flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED :
2627 IRQF_DISABLED, "mxser", brd);
2628 if (retval) {
2629 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2630 "conflict with another device.\n",
2631 mxser_brdname[brd->board_type - 1], brd->irq);
171d3a86
JS		 2632 /* We hold resources, we need to release them. */
2633 mxser_release_res(brd, 0);
a8dea4ec
JS		 2634 return retval;
2635 }
037ad48b
JS		 2636 return 0;
2637}
2638
943f2959 2639static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
037ad48b
JS		 2640{
2641 int id, i, bits;
2642 unsigned short regs[16], irq;
2643 unsigned char scratch, scratch2;
2644
55b307da 2645 brd->chip_flag = MOXA_OTHER_UART;
037ad48b
JS		 2646
2647 id = mxser_read_register(cap, regs);
2648 if (id == C168_ASIC_ID) {
55b307da
JS		 2649 brd->board_type = MXSER_BOARD_C168_ISA;
2650 brd->nports = 8;
037ad48b 2651 } else if (id == C104_ASIC_ID) {
55b307da
JS		 2652 brd->board_type = MXSER_BOARD_C104_ISA;
2653 brd->nports = 4;
037ad48b 2654 } else if (id == C102_ASIC_ID) {
55b307da
JS		 2655 brd->board_type = MXSER_BOARD_C102_ISA;
2656 brd->nports = 2;
037ad48b 2657 } else if (id == CI132_ASIC_ID) {
55b307da
JS		 2658 brd->board_type = MXSER_BOARD_CI132;
2659 brd->nports = 2;
037ad48b 2660 } else if (id == CI134_ASIC_ID) {
55b307da
JS		 2661 brd->board_type = MXSER_BOARD_CI134;
2662 brd->nports = 4;
037ad48b 2663 } else if (id == CI104J_ASIC_ID) {
55b307da
JS		 2664 brd->board_type = MXSER_BOARD_CI104J;
2665 brd->nports = 4;
037ad48b
JS		 2666 } else
2667 return 0;
2668
2669 irq = 0;
55b307da 2670 if (brd->nports == 2) {
037ad48b
JS		 2671 irq = regs[9] & 0xF000;
2672 irq = irq | (irq >> 4);
2673 if (irq != (regs[9] & 0xFF00))
2674 return MXSER_ERR_IRQ_CONFLIT;
55b307da 2675 } else if (brd->nports == 4) {
037ad48b
JS		 2676 irq = regs[9] & 0xF000;
2677 irq = irq | (irq >> 4);
2678 irq = irq | (irq >> 8);
2679 if (irq != regs[9])
2680 return MXSER_ERR_IRQ_CONFLIT;
55b307da 2681 } else if (brd->nports == 8) {
037ad48b
JS		 2682 irq = regs[9] & 0xF000;
2683 irq = irq | (irq >> 4);
2684 irq = irq | (irq >> 8);
2685 if ((irq != regs[9]) || (irq != regs[10]))
2686 return MXSER_ERR_IRQ_CONFLIT;
2687 }
2688
a8dea4ec
JS		 2689 if (!irq)
2690 return MXSER_ERR_IRQ;
2691 brd->irq = ((int)(irq & 0xF000) >> 12);
2692 for (i = 0; i < 8; i++)
2693 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2694 if ((regs[12] & 0x80) == 0)
2695 return MXSER_ERR_VECTOR;
2696 brd->vector = (int)regs[11]; /* interrupt vector */
2697 if (id == 1)
2698 brd->vector_mask = 0x00FF;
2699 else
2700 brd->vector_mask = 0x000F;
2701 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2702 if (regs[12] & bits) {
2703 brd->ports[i].baud_base = 921600;
2704 brd->ports[i].max_baud = 921600; /* add by Victor Yu. 09-04-2002 */
2705 } else {
2706 brd->ports[i].baud_base = 115200;
2707 brd->ports[i].max_baud = 115200; /* add by Victor Yu. 09-04-2002 */
2708 }
2709 }
2710 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2711 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2712 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2713 outb(scratch2, cap + UART_LCR);
2714 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2715 scratch = inb(cap + UART_IIR);
2716
2717 if (scratch & 0xC0)
2718 brd->uart_type = PORT_16550A;
2719 else
2720 brd->uart_type = PORT_16450;
2721 if (id == 1)
2722 brd->nports = 8;
2723 else
2724 brd->nports = 4;
2725 if (!request_region(brd->ports[0].ioaddr, 8 * brd->nports, "mxser(IO)"))
2726 return MXSER_ERR_IOADDR;
2727 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2728 release_region(brd->ports[0].ioaddr, 8 * brd->nports);
2729 return MXSER_ERR_VECTOR;
2730 }
2731 return brd->nports;
2732}
2733
2734static int __init mxser_get_PCI_conf(int board_type, struct mxser_board *brd,
2735 struct pci_dev *pdev)
2736{
2737 unsigned int i, j;
2738 unsigned long ioaddress;
2739 int retval;
2740
2741 /* io address */
2742 brd->board_type = board_type;
2743 brd->nports = mxser_numports[board_type - 1];
2744 ioaddress = pci_resource_start(pdev, 2);
2745 retval = pci_request_region(pdev, 2, "mxser(IO)");
2746 if (retval)
2747 goto err;
2748
2749 for (i = 0; i < brd->nports; i++)
2750 brd->ports[i].ioaddr = ioaddress + 8 * i;
2751
2752 /* vector */
2753 ioaddress = pci_resource_start(pdev, 3);
2754 retval = pci_request_region(pdev, 3, "mxser(vector)");
2755 if (retval)
2756 goto err_relio;
2757 brd->vector = ioaddress;
2758
2759 /* irq */
2760 brd->irq = pdev->irq;
2761
2762 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2763 brd->uart_type = PORT_16550A;
2764 brd->vector_mask = 0;
2765
2766 for (i = 0; i < brd->nports; i++) {
2767 for (j = 0; j < UART_INFO_NUM; j++) {
2768 if (Gpci_uart_info[j].type == brd->chip_flag) {
2769 brd->ports[i].max_baud =
2770 Gpci_uart_info[j].max_baud;
2771
2772 /* exception....CP-102 */
2773 if (board_type == MXSER_BOARD_CP102)
2774 brd->ports[i].max_baud = 921600;
2775 break;
2776 }
2777 }
2778 }
2779
2780 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2781 for (i = 0; i < brd->nports; i++) {
2782 if (i < 4)
2783 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2784 else
2785 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2786 }
2787 outb(0, ioaddress + 4); /* default set to RS232 mode */
2788 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2789 }
2790
2791 for (i = 0; i < brd->nports; i++) {
2792 brd->vector_mask |= (1 << i);
2793 brd->ports[i].baud_base = 921600;
2794 }
2795 return 0;
2796err_relio:
2797 pci_release_region(pdev, 2);
2798err:
2799 return retval;
2800}
2801
2802static int __init mxser_module_init(void)
2803{
2804 struct pci_dev *pdev = NULL;
2805 struct mxser_board *brd;
eae4436a
JS		 2806 unsigned long cap;
2807 unsigned int i, m, isaloop;
a8dea4ec
JS		 2808 int retval, b, n;
2809
2810 pr_debug("Loading module mxser ...\n");
2811
2812 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2813 if (!mxvar_sdriver)
2814 return -ENOMEM;
2815 spin_lock_init(&gm_lock);
2816
2817 for (i = 0; i < MXSER_BOARDS; i++)
2818 mxser_boards[i].board_type = -1;
2819
2820 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2821 MXSER_VERSION);
2822
2823 /* Initialize the tty_driver structure */
2824 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2825 mxvar_sdriver->name = "ttyM";
2826 mxvar_sdriver->major = ttymajor;
2827 mxvar_sdriver->minor_start = 0;
2828 mxvar_sdriver->num = MXSER_PORTS + 1;
2829 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2830 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2831 mxvar_sdriver->init_termios = tty_std_termios;
2832 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
938ef180 2833 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
a8dea4ec
JS		 2834 tty_set_operations(mxvar_sdriver, &mxser_ops);
2835 mxvar_sdriver->ttys = mxvar_tty;
2836 mxvar_sdriver->termios = mxvar_termios;
2837 mxvar_sdriver->termios_locked = mxvar_termios_locked;
2838
938ef180
JS		 2839 retval = tty_register_driver(mxvar_sdriver);
2840 if (retval) {
2841 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2842 "tty driver !\n");
2843 goto err_put;
2844 }
2845
a8dea4ec
JS		 2846 mxvar_diagflag = 0;
2847
2848 m = 0;
2849 /* Start finding ISA boards here */
eae4436a
JS		 2850 for (isaloop = 0; isaloop < 2; isaloop++)
2851 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
2852 if (!isaloop)
2853 cap = mxserBoardCAP[b]; /* predefined */
2854 else
2855 cap = ioaddr[b]; /* module param */
a8dea4ec 2856
eae4436a
JS		 2857 if (!cap)
2858 continue;
a8dea4ec 2859
eae4436a
JS		 2860 brd = &mxser_boards[m];
2861 retval = mxser_get_ISA_conf(cap, brd);
2862
2863 if (retval != 0)
2864 printk(KERN_INFO "Found MOXA %s board "
2865 "(CAP=0x%x)\n",
2866 mxser_brdname[brd->board_type - 1],
2867 ioaddr[b]);
2868
2869 if (retval <= 0) {
2870 if (retval == MXSER_ERR_IRQ)
2871 printk(KERN_ERR "Invalid interrupt "
2872 "number, board not "
2873 "configured\n");
2874 else if (retval == MXSER_ERR_IRQ_CONFLIT)
2875 printk(KERN_ERR "Invalid interrupt "
2876 "number, board not "
2877 "configured\n");
2878 else if (retval == MXSER_ERR_VECTOR)
2879 printk(KERN_ERR "Invalid interrupt "
2880 "vector, board not "
2881 "configured\n");
2882 else if (retval == MXSER_ERR_IOADDR)
2883 printk(KERN_ERR "Invalid I/O address, "
2884 "board not configured\n");
a8dea4ec 2885
eae4436a
JS		 2886 continue;
2887 }
a8dea4ec 2888
eae4436a 2889 brd->pdev = NULL;
a8dea4ec 2890
eae4436a
JS		 2891 /* mxser_initbrd will hook ISR. */
2892 if (mxser_initbrd(brd) < 0)
2893 continue;
a8dea4ec 2894
938ef180
JS		 2895 for (i = 0; i < brd->nports; i++)
2896 tty_register_device(mxvar_sdriver,
2897 m * MXSER_PORTS_PER_BOARD + i, NULL);
2898
eae4436a 2899 m++;
037ad48b 2900 }
a8dea4ec 2901
a8dea4ec
JS		 2902 /* start finding PCI board here */
2903 n = ARRAY_SIZE(mxser_pcibrds) - 1;
2904 b = 0;
2905 while (b < n) {
2906 pdev = pci_get_device(mxser_pcibrds[b].vendor,
2907 mxser_pcibrds[b].device, pdev);
2908 if (pdev == NULL) {
2909 b++;
2910 continue;
2911 }
2912 printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
2913 mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1],
2914 pdev->bus->number, PCI_SLOT(pdev->devfn));
2915 if (m >= MXSER_BOARDS)
2916 printk(KERN_ERR
2917 "Too many Smartio/Industio family boards find "
2918 "(maximum %d), board not configured\n",
2919 MXSER_BOARDS);
2920 else {
2921 if (pci_enable_device(pdev)) {
2922 printk(KERN_ERR "Moxa SmartI/O PCI enable "
2923 "fail !\n");
2924 continue;
2925 }
2926 brd = &mxser_boards[m];
2927 brd->pdev = pdev;
2928 retval = mxser_get_PCI_conf(
2929 (int)mxser_pcibrds[b].driver_data,
2930 brd, pdev);
2931 if (retval < 0) {
2932 if (retval == MXSER_ERR_IRQ)
2933 printk(KERN_ERR
2934 "Invalid interrupt number, "
2935 "board not configured\n");
2936 else if (retval == MXSER_ERR_IRQ_CONFLIT)
2937 printk(KERN_ERR
2938 "Invalid interrupt number, "
2939 "board not configured\n");
2940 else if (retval == MXSER_ERR_VECTOR)
2941 printk(KERN_ERR
2942 "Invalid interrupt vector, "
2943 "board not configured\n");
2944 else if (retval == MXSER_ERR_IOADDR)
2945 printk(KERN_ERR
2946 "Invalid I/O address, "
2947 "board not configured\n");
2948 continue;
2949 }
2950 /* mxser_initbrd will hook ISR. */
2951 if (mxser_initbrd(brd) < 0)
2952 continue;
938ef180
JS		 2953 for (i = 0; i < brd->nports; i++)
2954 tty_register_device(mxvar_sdriver,
2955 m * MXSER_PORTS_PER_BOARD + i,
2956 &pdev->dev);
2957
a8dea4ec
JS		 2958 m++;
2959 /* Keep an extra reference if we succeeded. It will
2960 be returned at unload time */
2961 pci_dev_get(pdev);
2962 }
7a7a5c33 2963 }
037ad48b 2964
938ef180
JS		 2965 if (!m) {
2966 retval = -ENODEV;
2967 goto err_unr;
037ad48b 2968 }
a8dea4ec
JS		 2969
2970 pr_debug("Done.\n");
2971
938ef180
JS		 2972 return 0;
2973err_unr:
2974 tty_unregister_driver(mxvar_sdriver);
2975err_put:
2976 put_tty_driver(mxvar_sdriver);
a8dea4ec 2977 return retval;
037ad48b
JS		 2978}
2979
a8dea4ec 2980static void __exit mxser_module_exit(void)
037ad48b 2981{
ead568c9 2982 unsigned int i;
037ad48b 2983
a8dea4ec 2984 pr_debug("Unloading module mxser ...\n");
037ad48b 2985
938ef180
JS		 2986 for (i = 0; i < MXSER_PORTS; i++)
2987 tty_unregister_device(mxvar_sdriver, i);
ead568c9
JS		 2988 tty_unregister_driver(mxvar_sdriver);
2989 put_tty_driver(mxvar_sdriver);
037ad48b 2990
171d3a86
JS		 2991 for (i = 0; i < MXSER_BOARDS; i++)
2992 if (mxser_boards[i].board_type != -1)
2993 mxser_release_res(&mxser_boards[i], 1);
037ad48b 2994
a8dea4ec 2995 pr_debug("Done.\n");
037ad48b
JS		 2996}
2997
2998module_init(mxser_module_init);
2999module_exit(mxser_module_exit);
Linux kernel - Deliverables
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