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[PATCH] Char: mxser_new, compact structures, round2
[deliverable/linux.git] / drivers / char / mxser_new.c
CommitLineData
037ad48b
JS		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
3306ce3d 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com.tw).
c88cb8f9 5 * Copyright (C) 2006 Jiri Slaby <jirislaby@gmail.com>
037ad48b 6 *
c88cb8f9
JS		 7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
037ad48b
JS		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
037ad48b
JS		 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
18 * - Fixed x86_64 cleanness
19 * - Fixed sleep with spinlock held in mxser_send_break
20 */
21
037ad48b
JS		 22#include <linux/module.h>
23#include <linux/autoconf.h>
24#include <linux/errno.h>
25#include <linux/signal.h>
26#include <linux/sched.h>
27#include <linux/timer.h>
28#include <linux/interrupt.h>
29#include <linux/tty.h>
30#include <linux/tty_flip.h>
31#include <linux/serial.h>
32#include <linux/serial_reg.h>
33#include <linux/major.h>
34#include <linux/string.h>
35#include <linux/fcntl.h>
36#include <linux/ptrace.h>
37#include <linux/gfp.h>
38#include <linux/ioport.h>
39#include <linux/mm.h>
40#include <linux/smp_lock.h>
41#include <linux/delay.h>
42#include <linux/pci.h>
43
44#include <asm/system.h>
45#include <asm/io.h>
46#include <asm/irq.h>
47#include <asm/bitops.h>
48#include <asm/uaccess.h>
49
771f2d1a 50#include "mxser_new.h"
037ad48b 51
55b307da 52#define MXSER_VERSION "2.0"
037ad48b
JS		 53#define MXSERMAJOR 174
54#define MXSERCUMAJOR 175
55
56#define MXSER_EVENT_TXLOW 1
57#define MXSER_EVENT_HANGUP 2
58
59#define MXSER_BOARDS 4 /* Max. boards */
60#define MXSER_PORTS 32 /* Max. ports */
61#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
3306ce3d 62#define MXSER_ISR_PASS_LIMIT 99999L
037ad48b
JS		 63
64#define MXSER_ERR_IOADDR -1
65#define MXSER_ERR_IRQ -2
66#define MXSER_ERR_IRQ_CONFLIT -3
67#define MXSER_ERR_VECTOR -4
68
69#define SERIAL_TYPE_NORMAL 1
70#define SERIAL_TYPE_CALLOUT 2
71
72#define WAKEUP_CHARS 256
73
74#define UART_MCR_AFE 0x20
75#define UART_LSR_SPECIAL 0x1E
76
77#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK|\
78 IXON|IXOFF))
79
037ad48b
JS		 80#define C168_ASIC_ID 1
81#define C104_ASIC_ID 2
82#define C102_ASIC_ID 0xB
83#define CI132_ASIC_ID 4
84#define CI134_ASIC_ID 3
85#define CI104J_ASIC_ID 5
86
cd7ed64e
JS		 87#define MXSER_HIGHBAUD 1
88#define MXSER_HAS2 2
037ad48b
JS		 89
90/* This is only for PCI */
cd7ed64e 91static const struct {
037ad48b
JS		 92 int type;
93 int tx_fifo;
94 int rx_fifo;
95 int xmit_fifo_size;
96 int rx_high_water;
97 int rx_trigger;
98 int rx_low_water;
99 long max_baud;
cd7ed64e 100} Gpci_uart_info[] = {
037ad48b
JS		 101 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
102 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
103 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
104};
cd7ed64e
JS		 105#define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
106
107struct mxser_cardinfo {
108 unsigned int nports;
109 char *name;
110 unsigned int flags;
111};
112
113static const struct mxser_cardinfo mxser_cards[] = {
114 { 8, "C168 series", }, /* C168-ISA */
115 { 4, "C104 series", }, /* C104-ISA */
116 { 4, "CI-104J series", }, /* CI104J */
117 { 8, "C168H/PCI series", }, /* C168-PCI */
118 { 4, "C104H/PCI series", }, /* C104-PCI */
119 { 4, "C102 series", MXSER_HAS2 }, /* C102-ISA */
120 { 4, "CI-132 series", MXSER_HAS2 }, /* CI132 */
121 { 4, "CI-134 series", }, /* CI134 */
122 { 2, "CP-132 series", }, /* CP132 */
123 { 4, "CP-114 series", }, /* CP114 */
124 { 4, "CT-114 series", }, /* CT114 */
125 { 2, "CP-102 series", MXSER_HIGHBAUD }, /* CP102 */
126 { 4, "CP-104U series", }, /* CP104U */
127 { 8, "CP-168U series", }, /* CP168U */
128 { 2, "CP-132U series", }, /* CP132U */
129 { 4, "CP-134U series", }, /* CP134U */
130 { 4, "CP-104JU series", }, /* CP104JU */
131 { 8, "Moxa UC7000 Serial", }, /* RC7000 */
132 { 8, "CP-118U series", }, /* CP118U */
133 { 2, "CP-102UL series", }, /* CP102UL */
134 { 2, "CP-102U series", }, /* CP102U */
135 { 8, "CP-118EL series", }, /* CP118EL */
136 { 8, "CP-168EL series", }, /* CP168EL */
137 { 4, "CP-104EL series", } /* CP104EL */
138};
037ad48b 139
cd7ed64e
JS		 140/* driver_data correspond to the lines in the structure above
141 see also ISA probe function before you change something */
037ad48b 142static struct pci_device_id mxser_pcibrds[] = {
3306ce3d 143 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168),
cd7ed64e 144 .driver_data = 3 },
3306ce3d 145 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104),
cd7ed64e 146 .driver_data = 4 },
3306ce3d 147 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132),
cd7ed64e 148 .driver_data = 8 },
3306ce3d 149 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114),
cd7ed64e 150 .driver_data = 9 },
3306ce3d 151 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114),
cd7ed64e 152 .driver_data = 10 },
3306ce3d 153 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102),
cd7ed64e 154 .driver_data = 11 },
3306ce3d 155 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U),
cd7ed64e 156 .driver_data = 12 },
3306ce3d 157 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U),
cd7ed64e 158 .driver_data = 13 },
3306ce3d 159 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U),
cd7ed64e 160 .driver_data = 14 },
3306ce3d 161 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U),
cd7ed64e 162 .driver_data = 15 },
3306ce3d 163 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU),
cd7ed64e 164 .driver_data = 16 },
3306ce3d 165 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000),
cd7ed64e 166 .driver_data = 17 },
3306ce3d 167 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U),
cd7ed64e 168 .driver_data = 18 },
3306ce3d 169 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL),
cd7ed64e 170 .driver_data = 19 },
3306ce3d 171 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U),
cd7ed64e 172 .driver_data = 20 },
3306ce3d 173 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118EL),
cd7ed64e 174 .driver_data = 21 },
3306ce3d 175 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168EL),
cd7ed64e 176 .driver_data = 22 },
3306ce3d 177 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104EL),
cd7ed64e 178 .driver_data = 23 },
3306ce3d 179 { }
037ad48b 180};
037ad48b
JS		 181MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
182
037ad48b
JS		 183static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
184static int ttymajor = MXSERMAJOR;
185static int calloutmajor = MXSERCUMAJOR;
037ad48b
JS		 186
187/* Variables for insmod */
188
189MODULE_AUTHOR("Casper Yang");
190MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
191module_param_array(ioaddr, int, NULL, 0);
192module_param(ttymajor, int, 0);
037ad48b
JS		 193MODULE_LICENSE("GPL");
194
195struct mxser_log {
196 int tick;
197 unsigned long rxcnt[MXSER_PORTS];
198 unsigned long txcnt[MXSER_PORTS];
199};
200
201
202struct mxser_mon {
203 unsigned long rxcnt;
204 unsigned long txcnt;
205 unsigned long up_rxcnt;
206 unsigned long up_txcnt;
207 int modem_status;
208 unsigned char hold_reason;
209};
210
211struct mxser_mon_ext {
212 unsigned long rx_cnt[32];
213 unsigned long tx_cnt[32];
214 unsigned long up_rxcnt[32];
215 unsigned long up_txcnt[32];
216 int modem_status[32];
217
218 long baudrate[32];
219 int databits[32];
220 int stopbits[32];
221 int parity[32];
222 int flowctrl[32];
223 int fifo[32];
224 int iftype[32];
225};
226
55b307da
JS		 227struct mxser_board;
228
229struct mxser_port {
230 struct mxser_board *board;
231 struct tty_struct *tty;
232
233 unsigned long ioaddr;
234 unsigned long opmode_ioaddr;
235 int max_baud;
037ad48b 236
037ad48b
JS		 237 int rx_high_water;
238 int rx_trigger; /* Rx fifo trigger level */
239 int rx_low_water;
240 int baud_base; /* max. speed */
55b307da 241 long realbaud;
037ad48b 242 int type; /* UART type */
55b307da
JS		 243 int flags; /* defined in tty.h */
244 long session; /* Session of opening process */
245 long pgrp; /* pgrp of opening process */
246
037ad48b 247 int x_char; /* xon/xoff character */
037ad48b
JS		 248 int IER; /* Interrupt Enable Register */
249 int MCR; /* Modem control register */
55b307da
JS		 250
251 unsigned char stop_rx;
252 unsigned char ldisc_stop_rx;
253
254 int custom_divisor;
255 int close_delay;
256 unsigned short closing_wait;
257 unsigned char err_shadow;
037ad48b 258 unsigned long event;
55b307da 259
037ad48b
JS		 260 int count; /* # of fd on device */
261 int blocked_open; /* # of blocked opens */
55b307da
JS		 262 struct async_icount icount; /* kernel counters for 4 input interrupts */
263 int timeout;
264
265 int read_status_mask;
266 int ignore_status_mask;
267 int xmit_fifo_size;
037ad48b
JS		 268 unsigned char *xmit_buf;
269 int xmit_head;
270 int xmit_tail;
271 int xmit_cnt;
55b307da 272
037ad48b
JS		 273 struct termios normal_termios;
274 struct termios callout_termios;
55b307da
JS		 275
276 struct mxser_mon mon_data;
277
278 spinlock_t slock;
279 struct work_struct tqueue;
037ad48b
JS		 280 wait_queue_head_t open_wait;
281 wait_queue_head_t close_wait;
282 wait_queue_head_t delta_msr_wait;
55b307da
JS		 283};
284
285struct mxser_board {
286 struct pci_dev *pdev; /* temporary (until pci probing) */
287
288 int irq;
cd7ed64e 289 const struct mxser_cardinfo *info;
55b307da
JS		 290 unsigned long vector;
291 unsigned long vector_mask;
292
293 int chip_flag;
294 int uart_type;
295
296 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
037ad48b
JS		 297};
298
299struct mxser_mstatus {
300 tcflag_t cflag;
301 int cts;
302 int dsr;
303 int ri;
304 int dcd;
305};
306
307static struct mxser_mstatus GMStatus[MXSER_PORTS];
308
309static int mxserBoardCAP[MXSER_BOARDS] = {
310 0, 0, 0, 0
311 /* 0x180, 0x280, 0x200, 0x320 */
312};
313
55b307da 314static struct mxser_board mxser_boards[MXSER_BOARDS];
037ad48b 315static struct tty_driver *mxvar_sdriver;
037ad48b
JS		 316static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
317static struct termios *mxvar_termios[MXSER_PORTS + 1];
318static struct termios *mxvar_termios_locked[MXSER_PORTS + 1];
319static struct mxser_log mxvar_log;
320static int mxvar_diagflag;
321static unsigned char mxser_msr[MXSER_PORTS + 1];
322static struct mxser_mon_ext mon_data_ext;
323static int mxser_set_baud_method[MXSER_PORTS + 1];
324static spinlock_t gm_lock;
325
037ad48b
JS		 326static int CheckIsMoxaMust(int io)
327{
328 u8 oldmcr, hwid;
329 int i;
330
331 outb(0, io + UART_LCR);
332 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
333 oldmcr = inb(io + UART_MCR);
334 outb(0, io + UART_MCR);
335 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
336 if ((hwid = inb(io + UART_MCR)) != 0) {
337 outb(oldmcr, io + UART_MCR);
338 return MOXA_OTHER_UART;
339 }
340
341 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
cd7ed64e
JS		 342 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
343 if (hwid == Gpci_uart_info[i].type)
037ad48b
JS		 344 return (int)hwid;
345 }
346 return MOXA_OTHER_UART;
347}
348
349/* above is modified by Victor Yu. 08-15-2002 */
350
55b307da 351static void process_txrx_fifo(struct mxser_port *info)
037ad48b
JS		 352{
353 int i;
354
355 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
356 info->rx_trigger = 1;
357 info->rx_high_water = 1;
358 info->rx_low_water = 1;
359 info->xmit_fifo_size = 1;
55b307da
JS		 360 } else
361 for (i = 0; i < UART_INFO_NUM; i++)
362 if (info->board->chip_flag == Gpci_uart_info[i].type) {
037ad48b
JS		 363 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
364 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
365 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
366 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
367 break;
368 }
037ad48b
JS		 369}
370
a8dea4ec 371static void mxser_do_softint(void *private_)
037ad48b 372{
a8dea4ec
JS		 373 struct mxser_port *info = private_;
374 struct tty_struct *tty;
037ad48b 375
a8dea4ec 376 tty = info->tty;
037ad48b 377
a8dea4ec
JS		 378 if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
379 tty_wakeup(tty);
380 if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
381 tty_hangup(tty);
382}
037ad48b 383
a8dea4ec
JS		 384static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
385{
386 unsigned char status = 0;
037ad48b 387
a8dea4ec 388 status = inb(baseaddr + UART_MSR);
037ad48b 389
a8dea4ec
JS		 390 mxser_msr[port] &= 0x0F;
391 mxser_msr[port] |= status;
392 status = mxser_msr[port];
393 if (mode)
394 mxser_msr[port] = 0;
037ad48b 395
a8dea4ec
JS		 396 return status;
397}
55b307da 398
a8dea4ec
JS		 399static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
400 struct mxser_port *port)
401{
402 DECLARE_WAITQUEUE(wait, current);
403 int retval;
404 int do_clocal = 0;
405 unsigned long flags;
406
407 /*
408 * If non-blocking mode is set, or the port is not enabled,
409 * then make the check up front and then exit.
410 */
214efebb
JS		 411 if ((filp->f_flags & O_NONBLOCK) ||
412 test_bit(TTY_IO_ERROR, &tty->flags)) {
a8dea4ec
JS		 413 port->flags |= ASYNC_NORMAL_ACTIVE;
414 return 0;
037ad48b 415 }
a8dea4ec
JS		 416
417 if (tty->termios->c_cflag & CLOCAL)
418 do_clocal = 1;
419
037ad48b 420 /*
a8dea4ec
JS		 421 * Block waiting for the carrier detect and the line to become
422 * free (i.e., not in use by the callout). While we are in
423 * this loop, port->count is dropped by one, so that
424 * mxser_close() knows when to free things. We restore it upon
425 * exit, either normal or abnormal.
037ad48b 426 */
a8dea4ec
JS		 427 retval = 0;
428 add_wait_queue(&port->open_wait, &wait);
037ad48b 429
a8dea4ec
JS		 430 spin_lock_irqsave(&port->slock, flags);
431 if (!tty_hung_up_p(filp))
432 port->count--;
433 spin_unlock_irqrestore(&port->slock, flags);
434 port->blocked_open++;
435 while (1) {
436 spin_lock_irqsave(&port->slock, flags);
437 outb(inb(port->ioaddr + UART_MCR) |
438 UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
439 spin_unlock_irqrestore(&port->slock, flags);
440 set_current_state(TASK_INTERRUPTIBLE);
441 if (tty_hung_up_p(filp) || !(port->flags & ASYNC_INITIALIZED)) {
442 if (port->flags & ASYNC_HUP_NOTIFY)
443 retval = -EAGAIN;
444 else
445 retval = -ERESTARTSYS;
446 break;
447 }
448 if (!(port->flags & ASYNC_CLOSING) &&
449 (do_clocal ||
450 (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
451 break;
452 if (signal_pending(current)) {
453 retval = -ERESTARTSYS;
454 break;
455 }
456 schedule();
037ad48b 457 }
a8dea4ec
JS		 458 set_current_state(TASK_RUNNING);
459 remove_wait_queue(&port->open_wait, &wait);
460 if (!tty_hung_up_p(filp))
461 port->count++;
462 port->blocked_open--;
463 if (retval)
464 return retval;
465 port->flags |= ASYNC_NORMAL_ACTIVE;
037ad48b
JS		 466 return 0;
467}
468
a8dea4ec 469static int mxser_set_baud(struct mxser_port *info, long newspd)
037ad48b 470{
a8dea4ec
JS		 471 int quot = 0;
472 unsigned char cval;
473 int ret = 0;
474 unsigned long flags;
037ad48b 475
a8dea4ec
JS		 476 if (!info->tty || !info->tty->termios)
477 return ret;
037ad48b 478
a8dea4ec
JS		 479 if (!(info->ioaddr))
480 return ret;
037ad48b 481
a8dea4ec
JS		 482 if (newspd > info->max_baud)
483 return 0;
037ad48b 484
a8dea4ec
JS		 485 info->realbaud = newspd;
486 if (newspd == 134) {
487 quot = (2 * info->baud_base / 269);
488 } else if (newspd) {
489 quot = info->baud_base / newspd;
490 if (quot == 0)
491 quot = 1;
492 } else {
493 quot = 0;
037ad48b
JS		 494 }
495
a8dea4ec
JS		 496 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
497 info->timeout += HZ / 50; /* Add .02 seconds of slop */
037ad48b 498
a8dea4ec
JS		 499 if (quot) {
500 spin_lock_irqsave(&info->slock, flags);
501 info->MCR |= UART_MCR_DTR;
502 outb(info->MCR, info->ioaddr + UART_MCR);
503 spin_unlock_irqrestore(&info->slock, flags);
504 } else {
505 spin_lock_irqsave(&info->slock, flags);
506 info->MCR &= ~UART_MCR_DTR;
507 outb(info->MCR, info->ioaddr + UART_MCR);
508 spin_unlock_irqrestore(&info->slock, flags);
509 return ret;
037ad48b 510 }
037ad48b 511
a8dea4ec 512 cval = inb(info->ioaddr + UART_LCR);
037ad48b 513
a8dea4ec 514 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
037ad48b 515
a8dea4ec
JS		 516 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
517 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
518 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
037ad48b 519
037ad48b 520
a8dea4ec
JS		 521 return ret;
522}
037ad48b 523
a8dea4ec
JS		 524/*
525 * This routine is called to set the UART divisor registers to match
526 * the specified baud rate for a serial port.
527 */
528static int mxser_change_speed(struct mxser_port *info,
529 struct termios *old_termios)
530{
531 unsigned cflag, cval, fcr;
532 int ret = 0;
533 unsigned char status;
534 long baud;
535 unsigned long flags;
037ad48b 536
a8dea4ec
JS		 537 if (!info->tty || !info->tty->termios)
538 return ret;
539 cflag = info->tty->termios->c_cflag;
540 if (!(info->ioaddr))
541 return ret;
037ad48b 542
a8dea4ec
JS		 543 if (mxser_set_baud_method[info->tty->index] == 0) {
544 baud = tty_get_baud_rate(info->tty);
545 mxser_set_baud(info, baud);
546 }
037ad48b 547
a8dea4ec
JS		 548 /* byte size and parity */
549 switch (cflag & CSIZE) {
550 case CS5:
551 cval = 0x00;
552 break;
553 case CS6:
554 cval = 0x01;
555 break;
556 case CS7:
557 cval = 0x02;
558 break;
559 case CS8:
560 cval = 0x03;
561 break;
562 default:
563 cval = 0x00;
564 break; /* too keep GCC shut... */
565 }
566 if (cflag & CSTOPB)
567 cval |= 0x04;
568 if (cflag & PARENB)
569 cval |= UART_LCR_PARITY;
570 if (!(cflag & PARODD))
571 cval |= UART_LCR_EPAR;
572 if (cflag & CMSPAR)
573 cval |= UART_LCR_SPAR;
037ad48b 574
a8dea4ec
JS		 575 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
576 if (info->board->chip_flag) {
577 fcr = UART_FCR_ENABLE_FIFO;
578 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
579 SET_MOXA_MUST_FIFO_VALUE(info);
580 } else
581 fcr = 0;
582 } else {
583 fcr = UART_FCR_ENABLE_FIFO;
584 /* following add by Victor Yu. 08-30-2002 */
585 if (info->board->chip_flag) {
586 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
587 SET_MOXA_MUST_FIFO_VALUE(info);
588 } else {
589 /* above add by Victor Yu. 08-30-2002 */
590 switch (info->rx_trigger) {
591 case 1:
592 fcr |= UART_FCR_TRIGGER_1;
593 break;
594 case 4:
595 fcr |= UART_FCR_TRIGGER_4;
596 break;
597 case 8:
598 fcr |= UART_FCR_TRIGGER_8;
599 break;
600 default:
601 fcr |= UART_FCR_TRIGGER_14;
602 break;
603 }
037ad48b 604 }
037ad48b
JS		 605 }
606
a8dea4ec
JS		 607 /* CTS flow control flag and modem status interrupts */
608 info->IER &= ~UART_IER_MSI;
609 info->MCR &= ~UART_MCR_AFE;
610 if (cflag & CRTSCTS) {
611 info->flags |= ASYNC_CTS_FLOW;
612 info->IER |= UART_IER_MSI;
613 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
614 info->MCR |= UART_MCR_AFE;
615/* status = mxser_get_msr(info->ioaddr, 0, info->port); */
616/*
617 save_flags(flags);
618 cli();
619 status = inb(baseaddr + UART_MSR);
620 restore_flags(flags);
621*/
622 /* mxser_check_modem_status(info, status); */
623 } else {
624/* status = mxser_get_msr(info->ioaddr, 0, info->port); */
625 /* MX_LOCK(&info->slock); */
626 status = inb(info->ioaddr + UART_MSR);
627 /* MX_UNLOCK(&info->slock); */
628 if (info->tty->hw_stopped) {
629 if (status & UART_MSR_CTS) {
630 info->tty->hw_stopped = 0;
631 if (info->type != PORT_16550A &&
632 !info->board->chip_flag) {
633 outb(info->IER & ~UART_IER_THRI,
634 info->ioaddr +
635 UART_IER);
636 info->IER |= UART_IER_THRI;
637 outb(info->IER, info->ioaddr +
638 UART_IER);
639 }
640 set_bit(MXSER_EVENT_TXLOW, &info->event);
641 schedule_work(&info->tqueue); }
642 } else {
643 if (!(status & UART_MSR_CTS)) {
644 info->tty->hw_stopped = 1;
645 if ((info->type != PORT_16550A) &&
646 (!info->board->chip_flag)) {
647 info->IER &= ~UART_IER_THRI;
648 outb(info->IER, info->ioaddr +
649 UART_IER);
650 }
651 }
652 }
653 }
654 } else {
655 info->flags &= ~ASYNC_CTS_FLOW;
656 }
657 outb(info->MCR, info->ioaddr + UART_MCR);
658 if (cflag & CLOCAL) {
659 info->flags &= ~ASYNC_CHECK_CD;
660 } else {
661 info->flags |= ASYNC_CHECK_CD;
662 info->IER |= UART_IER_MSI;
663 }
664 outb(info->IER, info->ioaddr + UART_IER);
037ad48b 665
a8dea4ec
JS		 666 /*
667 * Set up parity check flag
668 */
669 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
670 if (I_INPCK(info->tty))
671 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
672 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
673 info->read_status_mask |= UART_LSR_BI;
037ad48b 674
a8dea4ec 675 info->ignore_status_mask = 0;
037ad48b 676
a8dea4ec
JS		 677 if (I_IGNBRK(info->tty)) {
678 info->ignore_status_mask |= UART_LSR_BI;
679 info->read_status_mask |= UART_LSR_BI;
680 /*
681 * If we're ignore parity and break indicators, ignore
682 * overruns too. (For real raw support).
683 */
684 if (I_IGNPAR(info->tty)) {
685 info->ignore_status_mask |=
686 UART_LSR_OE |
687 UART_LSR_PE |
688 UART_LSR_FE;
689 info->read_status_mask |=
690 UART_LSR_OE |
691 UART_LSR_PE |
692 UART_LSR_FE;
037ad48b 693 }
037ad48b 694 }
a8dea4ec
JS		 695 /* following add by Victor Yu. 09-02-2002 */
696 if (info->board->chip_flag) {
697 spin_lock_irqsave(&info->slock, flags);
698 SET_MOXA_MUST_XON1_VALUE(info->ioaddr, START_CHAR(info->tty));
699 SET_MOXA_MUST_XOFF1_VALUE(info->ioaddr, STOP_CHAR(info->tty));
700 if (I_IXON(info->tty)) {
701 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
702 } else {
703 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
037ad48b 704 }
a8dea4ec
JS		 705 if (I_IXOFF(info->tty)) {
706 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
707 } else {
708 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
037ad48b 709 }
a8dea4ec
JS		 710 /*
711 if ( I_IXANY(info->tty) ) {
712 info->MCR |= MOXA_MUST_MCR_XON_ANY;
713 ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->ioaddr);
714 } else {
715 info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
716 DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->ioaddr);
717 }
718 */
719 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 720 }
a8dea4ec 721 /* above add by Victor Yu. 09-02-2002 */
037ad48b 722
037ad48b 723
a8dea4ec
JS		 724 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
725 outb(cval, info->ioaddr + UART_LCR);
037ad48b 726
a8dea4ec 727 return ret;
037ad48b
JS		 728}
729
a8dea4ec 730static void mxser_check_modem_status(struct mxser_port *port, int status)
037ad48b 731{
a8dea4ec
JS		 732 /* update input line counters */
733 if (status & UART_MSR_TERI)
734 port->icount.rng++;
735 if (status & UART_MSR_DDSR)
736 port->icount.dsr++;
737 if (status & UART_MSR_DDCD)
738 port->icount.dcd++;
739 if (status & UART_MSR_DCTS)
740 port->icount.cts++;
741 port->mon_data.modem_status = status;
742 wake_up_interruptible(&port->delta_msr_wait);
037ad48b 743
a8dea4ec
JS		 744 if ((port->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
745 if (status & UART_MSR_DCD)
746 wake_up_interruptible(&port->open_wait);
747 schedule_work(&port->tqueue);
748 }
037ad48b 749
a8dea4ec
JS		 750 if (port->flags & ASYNC_CTS_FLOW) {
751 if (port->tty->hw_stopped) {
752 if (status & UART_MSR_CTS) {
753 port->tty->hw_stopped = 0;
754
755 if ((port->type != PORT_16550A) &&
756 (!port->board->chip_flag)) {
757 outb(port->IER & ~UART_IER_THRI,
758 port->ioaddr + UART_IER);
759 port->IER |= UART_IER_THRI;
760 outb(port->IER, port->ioaddr +
761 UART_IER);
762 }
763 set_bit(MXSER_EVENT_TXLOW, &port->event);
764 schedule_work(&port->tqueue);
765 }
766 } else {
767 if (!(status & UART_MSR_CTS)) {
768 port->tty->hw_stopped = 1;
769 if (port->type != PORT_16550A &&
770 !port->board->chip_flag) {
771 port->IER &= ~UART_IER_THRI;
772 outb(port->IER, port->ioaddr +
773 UART_IER);
774 }
775 }
776 }
777 }
037ad48b
JS		 778}
779
a8dea4ec 780static int mxser_startup(struct mxser_port *info)
037ad48b 781{
a8dea4ec
JS		 782 unsigned long page;
783 unsigned long flags;
037ad48b 784
a8dea4ec
JS		 785 page = __get_free_page(GFP_KERNEL);
786 if (!page)
787 return -ENOMEM;
037ad48b 788
a8dea4ec 789 spin_lock_irqsave(&info->slock, flags);
037ad48b 790
a8dea4ec
JS		 791 if (info->flags & ASYNC_INITIALIZED) {
792 free_page(page);
793 spin_unlock_irqrestore(&info->slock, flags);
794 return 0;
795 }
037ad48b 796
a8dea4ec
JS		 797 if (!info->ioaddr || !info->type) {
798 if (info->tty)
799 set_bit(TTY_IO_ERROR, &info->tty->flags);
800 free_page(page);
801 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 802 return 0;
a8dea4ec
JS		 803 }
804 if (info->xmit_buf)
805 free_page(page);
806 else
807 info->xmit_buf = (unsigned char *) page;
037ad48b 808
037ad48b 809 /*
a8dea4ec
JS		 810 * Clear the FIFO buffers and disable them
811 * (they will be reenabled in mxser_change_speed())
037ad48b 812 */
a8dea4ec
JS		 813 if (info->board->chip_flag)
814 outb((UART_FCR_CLEAR_RCVR |
815 UART_FCR_CLEAR_XMIT |
816 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
817 else
818 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
819 info->ioaddr + UART_FCR);
820
821 /*
822 * At this point there's no way the LSR could still be 0xFF;
823 * if it is, then bail out, because there's likely no UART
824 * here.
825 */
826 if (inb(info->ioaddr + UART_LSR) == 0xff) {
827 spin_unlock_irqrestore(&info->slock, flags);
828 if (capable(CAP_SYS_ADMIN)) {
829 if (info->tty)
830 set_bit(TTY_IO_ERROR, &info->tty->flags);
831 return 0;
832 } else
833 return -ENODEV;
834 }
835
836 /*
837 * Clear the interrupt registers.
838 */
839 (void) inb(info->ioaddr + UART_LSR);
840 (void) inb(info->ioaddr + UART_RX);
841 (void) inb(info->ioaddr + UART_IIR);
842 (void) inb(info->ioaddr + UART_MSR);
843
844 /*
845 * Now, initialize the UART
846 */
847 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
848 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
849 outb(info->MCR, info->ioaddr + UART_MCR);
850
851 /*
852 * Finally, enable interrupts
853 */
854 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
855 /* info->IER = UART_IER_RLSI | UART_IER_RDI; */
856
857 /* following add by Victor Yu. 08-30-2002 */
858 if (info->board->chip_flag)
859 info->IER |= MOXA_MUST_IER_EGDAI;
860 /* above add by Victor Yu. 08-30-2002 */
861 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
862
863 /*
864 * And clear the interrupt registers again for luck.
865 */
866 (void) inb(info->ioaddr + UART_LSR);
867 (void) inb(info->ioaddr + UART_RX);
868 (void) inb(info->ioaddr + UART_IIR);
869 (void) inb(info->ioaddr + UART_MSR);
870
871 if (info->tty)
872 clear_bit(TTY_IO_ERROR, &info->tty->flags);
873 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
874
875 /*
876 * and set the speed of the serial port
877 */
878 spin_unlock_irqrestore(&info->slock, flags);
879 mxser_change_speed(info, NULL);
880
881 info->flags |= ASYNC_INITIALIZED;
882 return 0;
883}
884
885/*
886 * This routine will shutdown a serial port; interrupts maybe disabled, and
887 * DTR is dropped if the hangup on close termio flag is on.
888 */
889static void mxser_shutdown(struct mxser_port *info)
890{
891 unsigned long flags;
892
893 if (!(info->flags & ASYNC_INITIALIZED))
894 return;
895
896 spin_lock_irqsave(&info->slock, flags);
897
898 /*
899 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
900 * here so the queue might never be waken up
901 */
902 wake_up_interruptible(&info->delta_msr_wait);
903
904 /*
905 * Free the IRQ, if necessary
906 */
907 if (info->xmit_buf) {
908 free_page((unsigned long) info->xmit_buf);
909 info->xmit_buf = NULL;
910 }
911
912 info->IER = 0;
913 outb(0x00, info->ioaddr + UART_IER);
914
915 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
916 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
917 outb(info->MCR, info->ioaddr + UART_MCR);
918
919 /* clear Rx/Tx FIFO's */
920 /* following add by Victor Yu. 08-30-2002 */
921 if (info->board->chip_flag)
922 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
923 MOXA_MUST_FCR_GDA_MODE_ENABLE,
924 info->ioaddr + UART_FCR);
925 else
926 /* above add by Victor Yu. 08-30-2002 */
927 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
928 info->ioaddr + UART_FCR);
929
930 /* read data port to reset things */
931 (void) inb(info->ioaddr + UART_RX);
932
933 if (info->tty)
934 set_bit(TTY_IO_ERROR, &info->tty->flags);
935
936 info->flags &= ~ASYNC_INITIALIZED;
937
938 /* following add by Victor Yu. 09-23-2002 */
939 if (info->board->chip_flag)
940 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
941 /* above add by Victor Yu. 09-23-2002 */
942
943 spin_unlock_irqrestore(&info->slock, flags);
944}
945
946/*
947 * This routine is called whenever a serial port is opened. It
948 * enables interrupts for a serial port, linking in its async structure into
949 * the IRQ chain. It also performs the serial-specific
950 * initialization for the tty structure.
951 */
952static int mxser_open(struct tty_struct *tty, struct file *filp)
953{
954 struct mxser_port *info;
955 int retval, line;
956
957 /* initialize driver_data in case something fails */
958 tty->driver_data = NULL;
959
960 line = tty->index;
961 if (line == MXSER_PORTS)
962 return 0;
963 if (line < 0 || line > MXSER_PORTS)
964 return -ENODEV;
965 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
966 if (!info->ioaddr)
967 return -ENODEV;
968
969 tty->driver_data = info;
970 info->tty = tty;
971 /*
972 * Start up serial port
973 */
974 info->count++;
975 retval = mxser_startup(info);
976 if (retval)
977 return retval;
978
979 retval = mxser_block_til_ready(tty, filp, info);
980 if (retval)
981 return retval;
982
983 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
037ad48b
JS		 984 if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
985 *tty->termios = info->normal_termios;
986 else
987 *tty->termios = info->callout_termios;
988 mxser_change_speed(info, NULL);
989 }
990
08a4ae44 991 info->session = process_session(current);
037ad48b
JS		 992 info->pgrp = process_group(current);
993
994 /*
995 status = mxser_get_msr(info->base, 0, info->port);
996 mxser_check_modem_status(info, status);
997 */
998
999/* unmark here for very high baud rate (ex. 921600 bps) used */
1000 tty->low_latency = 1;
1001 return 0;
1002}
1003
1004/*
1005 * This routine is called when the serial port gets closed. First, we
1006 * wait for the last remaining data to be sent. Then, we unlink its
1007 * async structure from the interrupt chain if necessary, and we free
1008 * that IRQ if nothing is left in the chain.
1009 */
1010static void mxser_close(struct tty_struct *tty, struct file *filp)
1011{
55b307da 1012 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1013
1014 unsigned long timeout;
1015 unsigned long flags;
037ad48b
JS		 1016
1017 if (tty->index == MXSER_PORTS)
1018 return;
1019 if (!info)
1020 return;
1021
1022 spin_lock_irqsave(&info->slock, flags);
1023
1024 if (tty_hung_up_p(filp)) {
1025 spin_unlock_irqrestore(&info->slock, flags);
1026 return;
1027 }
1028 if ((tty->count == 1) && (info->count != 1)) {
1029 /*
1030 * Uh, oh. tty->count is 1, which means that the tty
1031 * structure will be freed. Info->count should always
1032 * be one in these conditions. If it's greater than
1033 * one, we've got real problems, since it means the
1034 * serial port won't be shutdown.
1035 */
1036 printk(KERN_ERR "mxser_close: bad serial port count; "
1037 "tty->count is 1, info->count is %d\n", info->count);
1038 info->count = 1;
1039 }
1040 if (--info->count < 0) {
1041 printk(KERN_ERR "mxser_close: bad serial port count for "
55b307da 1042 "ttys%d: %d\n", tty->index, info->count);
037ad48b
JS		 1043 info->count = 0;
1044 }
1045 if (info->count) {
1046 spin_unlock_irqrestore(&info->slock, flags);
1047 return;
1048 }
1049 info->flags |= ASYNC_CLOSING;
1050 spin_unlock_irqrestore(&info->slock, flags);
1051 /*
1052 * Save the termios structure, since this port may have
1053 * separate termios for callout and dialin.
1054 */
1055 if (info->flags & ASYNC_NORMAL_ACTIVE)
1056 info->normal_termios = *tty->termios;
1057 /*
1058 * Now we wait for the transmit buffer to clear; and we notify
1059 * the line discipline to only process XON/XOFF characters.
1060 */
1061 tty->closing = 1;
1062 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1063 tty_wait_until_sent(tty, info->closing_wait);
1064 /*
1065 * At this point we stop accepting input. To do this, we
1066 * disable the receive line status interrupts, and tell the
1067 * interrupt driver to stop checking the data ready bit in the
1068 * line status register.
1069 */
1070 info->IER &= ~UART_IER_RLSI;
55b307da 1071 if (info->board->chip_flag)
037ad48b
JS		 1072 info->IER &= ~MOXA_MUST_RECV_ISR;
1073/* by William
1074 info->read_status_mask &= ~UART_LSR_DR;
1075*/
1076 if (info->flags & ASYNC_INITIALIZED) {
55b307da 1077 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1078 /*
1079 * Before we drop DTR, make sure the UART transmitter
1080 * has completely drained; this is especially
1081 * important if there is a transmit FIFO!
1082 */
1083 timeout = jiffies + HZ;
55b307da 1084 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
037ad48b
JS		 1085 schedule_timeout_interruptible(5);
1086 if (time_after(jiffies, timeout))
1087 break;
1088 }
1089 }
1090 mxser_shutdown(info);
1091
1092 if (tty->driver->flush_buffer)
1093 tty->driver->flush_buffer(tty);
1094
7e8bcf9a 1095 tty_ldisc_flush(tty);
037ad48b
JS		 1096
1097 tty->closing = 0;
1098 info->event = 0;
1099 info->tty = NULL;
1100 if (info->blocked_open) {
1101 if (info->close_delay)
1102 schedule_timeout_interruptible(info->close_delay);
1103 wake_up_interruptible(&info->open_wait);
1104 }
1105
1106 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1107 wake_up_interruptible(&info->close_wait);
1108
1109}
1110
1111static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1112{
1113 int c, total = 0;
55b307da 1114 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1115 unsigned long flags;
1116
1117 if (!info->xmit_buf)
1118 return 0;
1119
1120 while (1) {
1121 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1122 SERIAL_XMIT_SIZE - info->xmit_head));
1123 if (c <= 0)
1124 break;
1125
1126 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1127 spin_lock_irqsave(&info->slock, flags);
1128 info->xmit_head = (info->xmit_head + c) &
1129 (SERIAL_XMIT_SIZE - 1);
1130 info->xmit_cnt += c;
1131 spin_unlock_irqrestore(&info->slock, flags);
1132
1133 buf += c;
1134 count -= c;
1135 total += c;
1136 }
1137
3306ce3d
JS		 1138 if (info->xmit_cnt && !tty->stopped
1139 /*&& !(info->IER & UART_IER_THRI)*/) {
037ad48b
JS		 1140 if (!tty->hw_stopped ||
1141 (info->type == PORT_16550A) ||
55b307da 1142 (info->board->chip_flag)) {
037ad48b 1143 spin_lock_irqsave(&info->slock, flags);
55b307da
JS		 1144 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1145 UART_IER);
037ad48b 1146 info->IER |= UART_IER_THRI;
55b307da 1147 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1148 spin_unlock_irqrestore(&info->slock, flags);
1149 }
1150 }
1151 return total;
1152}
1153
1154static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1155{
55b307da 1156 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1157 unsigned long flags;
1158
1159 if (!info->xmit_buf)
1160 return;
1161
1162 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1163 return;
1164
1165 spin_lock_irqsave(&info->slock, flags);
1166 info->xmit_buf[info->xmit_head++] = ch;
1167 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1168 info->xmit_cnt++;
1169 spin_unlock_irqrestore(&info->slock, flags);
3306ce3d 1170 if (!tty->stopped /*&& !(info->IER & UART_IER_THRI)*/) {
037ad48b
JS		 1171 if (!tty->hw_stopped ||
1172 (info->type == PORT_16550A) ||
55b307da 1173 info->board->chip_flag) {
037ad48b 1174 spin_lock_irqsave(&info->slock, flags);
55b307da 1175 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
037ad48b 1176 info->IER |= UART_IER_THRI;
55b307da 1177 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1178 spin_unlock_irqrestore(&info->slock, flags);
1179 }
1180 }
1181}
1182
1183
1184static void mxser_flush_chars(struct tty_struct *tty)
1185{
55b307da 1186 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1187 unsigned long flags;
1188
1189 if (info->xmit_cnt <= 0 ||
1190 tty->stopped ||
1191 !info->xmit_buf ||
1192 (tty->hw_stopped &&
1193 (info->type != PORT_16550A) &&
55b307da 1194 (!info->board->chip_flag)
037ad48b
JS		 1195 ))
1196 return;
1197
1198 spin_lock_irqsave(&info->slock, flags);
1199
55b307da 1200 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
037ad48b 1201 info->IER |= UART_IER_THRI;
55b307da 1202 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1203
1204 spin_unlock_irqrestore(&info->slock, flags);
1205}
1206
1207static int mxser_write_room(struct tty_struct *tty)
1208{
55b307da 1209 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1210 int ret;
1211
1212 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1213 if (ret < 0)
1214 ret = 0;
1215 return ret;
1216}
1217
1218static int mxser_chars_in_buffer(struct tty_struct *tty)
1219{
55b307da 1220 struct mxser_port *info = tty->driver_data;
3306ce3d
JS		 1221 int len = info->xmit_cnt;
1222
55b307da 1223 if (!(inb(info->ioaddr + UART_LSR) & UART_LSR_THRE))
3306ce3d
JS		 1224 len++;
1225
1226 return len;
037ad48b
JS		 1227}
1228
1229static void mxser_flush_buffer(struct tty_struct *tty)
1230{
55b307da 1231 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1232 char fcr;
1233 unsigned long flags;
1234
1235
1236 spin_lock_irqsave(&info->slock, flags);
1237 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1238
1239 /* below added by shinhay */
55b307da 1240 fcr = inb(info->ioaddr + UART_FCR);
037ad48b 1241 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
55b307da
JS		 1242 info->ioaddr + UART_FCR);
1243 outb(fcr, info->ioaddr + UART_FCR);
037ad48b
JS		 1244
1245 spin_unlock_irqrestore(&info->slock, flags);
1246 /* above added by shinhay */
1247
7e8bcf9a 1248 tty_wakeup(tty);
037ad48b
JS		 1249}
1250
a8dea4ec
JS		 1251/*
1252 * ------------------------------------------------------------
1253 * friends of mxser_ioctl()
1254 * ------------------------------------------------------------
1255 */
1256static int mxser_get_serial_info(struct mxser_port *info,
1257 struct serial_struct __user *retinfo)
037ad48b 1258{
a8dea4ec 1259 struct serial_struct tmp;
037ad48b 1260
a8dea4ec
JS		 1261 if (!retinfo)
1262 return -EFAULT;
1263 memset(&tmp, 0, sizeof(tmp));
1264 tmp.type = info->type;
1265 tmp.line = info->tty->index;
1266 tmp.port = info->ioaddr;
1267 tmp.irq = info->board->irq;
1268 tmp.flags = info->flags;
1269 tmp.baud_base = info->baud_base;
1270 tmp.close_delay = info->close_delay;
1271 tmp.closing_wait = info->closing_wait;
1272 tmp.custom_divisor = info->custom_divisor;
1273 tmp.hub6 = 0;
1274 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1275 return -EFAULT;
1276 return 0;
1277}
037ad48b 1278
a8dea4ec
JS		 1279static int mxser_set_serial_info(struct mxser_port *info,
1280 struct serial_struct __user *new_info)
1281{
1282 struct serial_struct new_serial;
1283 unsigned int flags;
1284 int retval = 0;
037ad48b 1285
a8dea4ec
JS		 1286 if (!new_info || !info->ioaddr)
1287 return -EFAULT;
1288 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1289 return -EFAULT;
037ad48b 1290
a8dea4ec
JS		 1291 if ((new_serial.irq != info->board->irq) ||
1292 (new_serial.port != info->ioaddr) ||
1293 (new_serial.custom_divisor != info->custom_divisor) ||
1294 (new_serial.baud_base != info->baud_base))
1295 return -EPERM;
037ad48b 1296
a8dea4ec
JS		 1297 flags = info->flags & ASYNC_SPD_MASK;
1298
1299 if (!capable(CAP_SYS_ADMIN)) {
1300 if ((new_serial.baud_base != info->baud_base) ||
1301 (new_serial.close_delay != info->close_delay) ||
1302 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
1303 return -EPERM;
1304 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
1305 (new_serial.flags & ASYNC_USR_MASK));
1306 } else {
037ad48b 1307 /*
a8dea4ec
JS		 1308 * OK, past this point, all the error checking has been done.
1309 * At this point, we start making changes.....
037ad48b 1310 */
a8dea4ec
JS		 1311 info->flags = ((info->flags & ~ASYNC_FLAGS) |
1312 (new_serial.flags & ASYNC_FLAGS));
1313 info->close_delay = new_serial.close_delay * HZ / 100;
1314 info->closing_wait = new_serial.closing_wait * HZ / 100;
1315 info->tty->low_latency =
1316 (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1317 info->tty->low_latency = 0; /* (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; */
1318 }
037ad48b 1319
a8dea4ec
JS		 1320 /* added by casper, 3/17/2000, for mouse */
1321 info->type = new_serial.type;
037ad48b 1322
a8dea4ec
JS		 1323 process_txrx_fifo(info);
1324
1325 if (info->flags & ASYNC_INITIALIZED) {
1326 if (flags != (info->flags & ASYNC_SPD_MASK))
1327 mxser_change_speed(info, NULL);
1328 } else
1329 retval = mxser_startup(info);
1330
1331 return retval;
1332}
037ad48b 1333
a8dea4ec
JS		 1334/*
1335 * mxser_get_lsr_info - get line status register info
1336 *
1337 * Purpose: Let user call ioctl() to get info when the UART physically
1338 * is emptied. On bus types like RS485, the transmitter must
1339 * release the bus after transmitting. This must be done when
1340 * the transmit shift register is empty, not be done when the
1341 * transmit holding register is empty. This functionality
1342 * allows an RS485 driver to be written in user space.
1343 */
1344static int mxser_get_lsr_info(struct mxser_port *info,
1345 unsigned int __user *value)
1346{
1347 unsigned char status;
1348 unsigned int result;
1349 unsigned long flags;
037ad48b 1350
a8dea4ec
JS		 1351 spin_lock_irqsave(&info->slock, flags);
1352 status = inb(info->ioaddr + UART_LSR);
1353 spin_unlock_irqrestore(&info->slock, flags);
1354 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1355 return put_user(result, value);
1356}
037ad48b 1357
a8dea4ec
JS		 1358/*
1359 * This routine sends a break character out the serial port.
1360 */
1361static void mxser_send_break(struct mxser_port *info, int duration)
1362{
1363 unsigned long flags;
037ad48b 1364
a8dea4ec
JS		 1365 if (!info->ioaddr)
1366 return;
1367 set_current_state(TASK_INTERRUPTIBLE);
1368 spin_lock_irqsave(&info->slock, flags);
1369 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
1370 info->ioaddr + UART_LCR);
1371 spin_unlock_irqrestore(&info->slock, flags);
1372 schedule_timeout(duration);
1373 spin_lock_irqsave(&info->slock, flags);
1374 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
1375 info->ioaddr + UART_LCR);
1376 spin_unlock_irqrestore(&info->slock, flags);
1377}
037ad48b 1378
a8dea4ec
JS		 1379static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1380{
1381 struct mxser_port *info = tty->driver_data;
1382 unsigned char control, status;
1383 unsigned long flags;
037ad48b 1384
037ad48b 1385
a8dea4ec
JS		 1386 if (tty->index == MXSER_PORTS)
1387 return -ENOIOCTLCMD;
214efebb 1388 if (test_bit(TTY_IO_ERROR, &tty->flags))
a8dea4ec 1389 return -EIO;
037ad48b 1390
a8dea4ec 1391 control = info->MCR;
037ad48b 1392
a8dea4ec
JS		 1393 spin_lock_irqsave(&info->slock, flags);
1394 status = inb(info->ioaddr + UART_MSR);
1395 if (status & UART_MSR_ANY_DELTA)
1396 mxser_check_modem_status(info, status);
1397 spin_unlock_irqrestore(&info->slock, flags);
1398 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1399 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1400 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1401 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1402 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1403 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1404}
037ad48b 1405
a8dea4ec
JS		 1406static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1407 unsigned int set, unsigned int clear)
1408{
1409 struct mxser_port *info = tty->driver_data;
1410 unsigned long flags;
037ad48b 1411
037ad48b 1412
a8dea4ec
JS		 1413 if (tty->index == MXSER_PORTS)
1414 return -ENOIOCTLCMD;
214efebb 1415 if (test_bit(TTY_IO_ERROR, &tty->flags))
a8dea4ec 1416 return -EIO;
037ad48b 1417
a8dea4ec 1418 spin_lock_irqsave(&info->slock, flags);
037ad48b 1419
a8dea4ec
JS		 1420 if (set & TIOCM_RTS)
1421 info->MCR |= UART_MCR_RTS;
1422 if (set & TIOCM_DTR)
1423 info->MCR |= UART_MCR_DTR;
037ad48b 1424
a8dea4ec
JS		 1425 if (clear & TIOCM_RTS)
1426 info->MCR &= ~UART_MCR_RTS;
1427 if (clear & TIOCM_DTR)
1428 info->MCR &= ~UART_MCR_DTR;
037ad48b 1429
a8dea4ec
JS		 1430 outb(info->MCR, info->ioaddr + UART_MCR);
1431 spin_unlock_irqrestore(&info->slock, flags);
037ad48b
JS		 1432 return 0;
1433}
1434
a8dea4ec 1435static int mxser_program_mode(int port)
037ad48b 1436{
a8dea4ec
JS		 1437 int id, i, j, n;
1438 /* unsigned long flags; */
037ad48b 1439
a8dea4ec
JS		 1440 spin_lock(&gm_lock);
1441 outb(0, port);
1442 outb(0, port);
1443 outb(0, port);
1444 (void)inb(port);
1445 (void)inb(port);
1446 outb(0, port);
1447 (void)inb(port);
1448 /* restore_flags(flags); */
1449 spin_unlock(&gm_lock);
037ad48b 1450
a8dea4ec
JS		 1451 id = inb(port + 1) & 0x1F;
1452 if ((id != C168_ASIC_ID) &&
1453 (id != C104_ASIC_ID) &&
1454 (id != C102_ASIC_ID) &&
1455 (id != CI132_ASIC_ID) &&
1456 (id != CI134_ASIC_ID) &&
1457 (id != CI104J_ASIC_ID))
1458 return -1;
1459 for (i = 0, j = 0; i < 4; i++) {
1460 n = inb(port + 2);
1461 if (n == 'M') {
1462 j = 1;
1463 } else if ((j == 1) && (n == 1)) {
1464 j = 2;
1465 break;
1466 } else
1467 j = 0;
1468 }
1469 if (j != 2)
1470 id = -2;
1471 return id;
1472}
1473
1474static void mxser_normal_mode(int port)
1475{
1476 int i, n;
1477
1478 outb(0xA5, port + 1);
1479 outb(0x80, port + 3);
1480 outb(12, port + 0); /* 9600 bps */
1481 outb(0, port + 1);
1482 outb(0x03, port + 3); /* 8 data bits */
1483 outb(0x13, port + 4); /* loop back mode */
1484 for (i = 0; i < 16; i++) {
1485 n = inb(port + 5);
1486 if ((n & 0x61) == 0x60)
1487 break;
1488 if ((n & 1) == 1)
1489 (void)inb(port);
1490 }
1491 outb(0x00, port + 4);
1492}
1493
1494#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1495#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1496#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1497#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1498#define EN_CCMD 0x000 /* Chip's command register */
1499#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1500#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1501#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1502#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1503#define EN0_DCFG 0x00E /* Data configuration reg WR */
1504#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1505#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1506#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1507static int mxser_read_register(int port, unsigned short *regs)
1508{
1509 int i, k, value, id;
1510 unsigned int j;
1511
1512 id = mxser_program_mode(port);
1513 if (id < 0)
1514 return id;
1515 for (i = 0; i < 14; i++) {
1516 k = (i & 0x3F) | 0x180;
1517 for (j = 0x100; j > 0; j >>= 1) {
1518 outb(CHIP_CS, port);
1519 if (k & j) {
1520 outb(CHIP_CS | CHIP_DO, port);
1521 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1522 } else {
1523 outb(CHIP_CS, port);
1524 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1525 }
1526 }
1527 (void)inb(port);
1528 value = 0;
1529 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1530 outb(CHIP_CS, port);
1531 outb(CHIP_CS | CHIP_SK, port);
1532 if (inb(port) & CHIP_DI)
1533 value |= j;
1534 }
1535 regs[i] = value;
1536 outb(0, port);
1537 }
1538 mxser_normal_mode(port);
1539 return id;
1540}
1541
a8dea4ec
JS		 1542static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1543{
1544 struct mxser_port *port;
1545 int result, status;
1546 unsigned int i, j;
1547
1548 switch (cmd) {
1549 case MOXA_GET_CONF:
1550/* if (copy_to_user(argp, mxsercfg,
1551 sizeof(struct mxser_hwconf) * 4))
1552 return -EFAULT;
1553 return 0;*/
1554 return -ENXIO;
1555 case MOXA_GET_MAJOR:
1556 if (copy_to_user(argp, &ttymajor, sizeof(int)))
1557 return -EFAULT;
1558 return 0;
1559
1560 case MOXA_GET_CUMAJOR:
1561 if (copy_to_user(argp, &calloutmajor, sizeof(int)))
037ad48b
JS		 1562 return -EFAULT;
1563 return 0;
1564
1565 case MOXA_CHKPORTENABLE:
1566 result = 0;
55b307da
JS		 1567
1568 for (i = 0; i < MXSER_BOARDS; i++)
1569 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1570 if (mxser_boards[i].ports[j].ioaddr)
1571 result |= (1 << i);
1572
037ad48b
JS		 1573 return put_user(result, (unsigned long __user *)argp);
1574 case MOXA_GETDATACOUNT:
1575 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1576 return -EFAULT;
1577 return 0;
1578 case MOXA_GETMSTATUS:
55b307da
JS		 1579 for (i = 0; i < MXSER_BOARDS; i++)
1580 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1581 port = &mxser_boards[i].ports[j];
1582
1583 GMStatus[i].ri = 0;
1584 if (!port->ioaddr) {
1585 GMStatus[i].dcd = 0;
1586 GMStatus[i].dsr = 0;
1587 GMStatus[i].cts = 0;
1588 continue;
1589 }
037ad48b 1590
55b307da
JS		 1591 if (!port->tty || !port->tty->termios)
1592 GMStatus[i].cflag =
1593 port->normal_termios.c_cflag;
1594 else
1595 GMStatus[i].cflag =
1596 port->tty->termios->c_cflag;
037ad48b 1597
55b307da
JS		 1598 status = inb(port->ioaddr + UART_MSR);
1599 if (status & 0x80 /*UART_MSR_DCD */ )
1600 GMStatus[i].dcd = 1;
1601 else
1602 GMStatus[i].dcd = 0;
037ad48b 1603
55b307da
JS		 1604 if (status & 0x20 /*UART_MSR_DSR */ )
1605 GMStatus[i].dsr = 1;
1606 else
1607 GMStatus[i].dsr = 0;
037ad48b
JS		 1608
1609
55b307da
JS		 1610 if (status & 0x10 /*UART_MSR_CTS */ )
1611 GMStatus[i].cts = 1;
1612 else
1613 GMStatus[i].cts = 0;
1614 }
037ad48b
JS		 1615 if (copy_to_user(argp, GMStatus,
1616 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1617 return -EFAULT;
1618 return 0;
1619 case MOXA_ASPP_MON_EXT: {
55b307da
JS		 1620 int status, p, shiftbit;
1621 unsigned long opmode;
1622 unsigned cflag, iflag;
037ad48b 1623
55b307da
JS		 1624 for (i = 0; i < MXSER_BOARDS; i++)
1625 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1626 port = &mxser_boards[i].ports[j];
1627 if (!port->ioaddr)
037ad48b
JS		 1628 continue;
1629
55b307da
JS		 1630 status = mxser_get_msr(port->ioaddr, 0, i);
1631/* mxser_check_modem_status(port, status); */
1632
037ad48b 1633 if (status & UART_MSR_TERI)
55b307da 1634 port->icount.rng++;
037ad48b 1635 if (status & UART_MSR_DDSR)
55b307da 1636 port->icount.dsr++;
037ad48b 1637 if (status & UART_MSR_DDCD)
55b307da 1638 port->icount.dcd++;
037ad48b 1639 if (status & UART_MSR_DCTS)
55b307da
JS		 1640 port->icount.cts++;
1641
1642 port->mon_data.modem_status = status;
1643 mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt;
1644 mon_data_ext.tx_cnt[i] = port->mon_data.txcnt;
1645 mon_data_ext.up_rxcnt[i] =
1646 port->mon_data.up_rxcnt;
1647 mon_data_ext.up_txcnt[i] =
1648 port->mon_data.up_txcnt;
1649 mon_data_ext.modem_status[i] =
1650 port->mon_data.modem_status;
1651 mon_data_ext.baudrate[i] = port->realbaud;
1652
1653 if (!port->tty || !port->tty->termios) {
1654 cflag = port->normal_termios.c_cflag;
1655 iflag = port->normal_termios.c_iflag;
037ad48b 1656 } else {
55b307da
JS		 1657 cflag = port->tty->termios->c_cflag;
1658 iflag = port->tty->termios->c_iflag;
037ad48b
JS		 1659 }
1660
1661 mon_data_ext.databits[i] = cflag & CSIZE;
1662
1663 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1664
55b307da
JS		 1665 mon_data_ext.parity[i] =
1666 cflag & (PARENB | PARODD | CMSPAR);
037ad48b
JS		 1667
1668 mon_data_ext.flowctrl[i] = 0x00;
1669
1670 if (cflag & CRTSCTS)
1671 mon_data_ext.flowctrl[i] |= 0x03;
1672
1673 if (iflag & (IXON | IXOFF))
1674 mon_data_ext.flowctrl[i] |= 0x0C;
1675
55b307da 1676 if (port->type == PORT_16550A)
037ad48b
JS		 1677 mon_data_ext.fifo[i] = 1;
1678 else
1679 mon_data_ext.fifo[i] = 0;
1680
1681 p = i % 4;
1682 shiftbit = p * 2;
55b307da 1683 opmode = inb(port->opmode_ioaddr) >> shiftbit;
037ad48b
JS		 1684 opmode &= OP_MODE_MASK;
1685
1686 mon_data_ext.iftype[i] = opmode;
1687
1688 }
55b307da
JS		 1689 if (copy_to_user(argp, &mon_data_ext,
1690 sizeof(mon_data_ext)))
037ad48b
JS		 1691 return -EFAULT;
1692
1693 return 0;
1694
55b307da 1695 } default:
037ad48b
JS		 1696 return -ENOIOCTLCMD;
1697 }
1698 return 0;
1699}
1700
a8dea4ec
JS		 1701static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1702 unsigned int cmd, unsigned long arg)
037ad48b 1703{
55b307da 1704 struct mxser_port *info = tty->driver_data;
a8dea4ec
JS		 1705 struct async_icount cprev, cnow; /* kernel counter temps */
1706 struct serial_icounter_struct __user *p_cuser;
1707 unsigned long templ;
1708 unsigned long flags;
1709 void __user *argp = (void __user *)arg;
1710 int retval;
037ad48b 1711
a8dea4ec
JS		 1712 if (tty->index == MXSER_PORTS)
1713 return mxser_ioctl_special(cmd, argp);
1714
1715 /* following add by Victor Yu. 01-05-2004 */
1716 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1717 int p;
1718 unsigned long opmode;
1719 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1720 int shiftbit;
1721 unsigned char val, mask;
1722
1723 p = tty->index % 4;
1724 if (cmd == MOXA_SET_OP_MODE) {
1725 if (get_user(opmode, (int __user *) argp))
1726 return -EFAULT;
1727 if (opmode != RS232_MODE &&
1728 opmode != RS485_2WIRE_MODE &&
1729 opmode != RS422_MODE &&
1730 opmode != RS485_4WIRE_MODE)
1731 return -EFAULT;
1732 mask = ModeMask[p];
1733 shiftbit = p * 2;
1734 val = inb(info->opmode_ioaddr);
1735 val &= mask;
1736 val |= (opmode << shiftbit);
1737 outb(val, info->opmode_ioaddr);
1738 } else {
1739 shiftbit = p * 2;
1740 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1741 opmode &= OP_MODE_MASK;
1742 if (copy_to_user(argp, &opmode, sizeof(int)))
1743 return -EFAULT;
3306ce3d 1744 }
a8dea4ec 1745 return 0;
037ad48b 1746 }
a8dea4ec 1747 /* above add by Victor Yu. 01-05-2004 */
037ad48b 1748
214efebb
JS		 1749 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1750 test_bit(TTY_IO_ERROR, &tty->flags))
1751 return -EIO;
1752
a8dea4ec
JS		 1753 switch (cmd) {
1754 case TCSBRK: /* SVID version: non-zero arg --> no break */
1755 retval = tty_check_change(tty);
1756 if (retval)
1757 return retval;
1758 tty_wait_until_sent(tty, 0);
1759 if (!arg)
1760 mxser_send_break(info, HZ / 4); /* 1/4 second */
1761 return 0;
1762 case TCSBRKP: /* support for POSIX tcsendbreak() */
1763 retval = tty_check_change(tty);
1764 if (retval)
1765 return retval;
1766 tty_wait_until_sent(tty, 0);
1767 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
1768 return 0;
1769 case TIOCGSOFTCAR:
1770 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
1771 case TIOCSSOFTCAR:
1772 if (get_user(templ, (unsigned long __user *) argp))
1773 return -EFAULT;
1774 arg = templ;
1775 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
1776 return 0;
1777 case TIOCGSERIAL:
1778 return mxser_get_serial_info(info, argp);
1779 case TIOCSSERIAL:
1780 return mxser_set_serial_info(info, argp);
1781 case TIOCSERGETLSR: /* Get line status register */
1782 return mxser_get_lsr_info(info, argp);
1783 /*
1784 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1785 * - mask passed in arg for lines of interest
1786 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1787 * Caller should use TIOCGICOUNT to see which one it was
1788 */
1789 case TIOCMIWAIT: {
1790 DECLARE_WAITQUEUE(wait, current);
1791 int ret;
1792 spin_lock_irqsave(&info->slock, flags);
1793 cprev = info->icount; /* note the counters on entry */
1794 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 1795
a8dea4ec
JS		 1796 add_wait_queue(&info->delta_msr_wait, &wait);
1797 while (1) {
1798 spin_lock_irqsave(&info->slock, flags);
1799 cnow = info->icount; /* atomic copy */
1800 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 1801
a8dea4ec
JS		 1802 set_current_state(TASK_INTERRUPTIBLE);
1803 if (((arg & TIOCM_RNG) &&
1804 (cnow.rng != cprev.rng)) ||
1805 ((arg & TIOCM_DSR) &&
1806 (cnow.dsr != cprev.dsr)) ||
1807 ((arg & TIOCM_CD) &&
1808 (cnow.dcd != cprev.dcd)) ||
1809 ((arg & TIOCM_CTS) &&
1810 (cnow.cts != cprev.cts))) {
1811 ret = 0;
1812 break;
3306ce3d 1813 }
a8dea4ec
JS		 1814 /* see if a signal did it */
1815 if (signal_pending(current)) {
1816 ret = -ERESTARTSYS;
1817 break;
1818 }
1819 cprev = cnow;
037ad48b 1820 }
a8dea4ec
JS		 1821 current->state = TASK_RUNNING;
1822 remove_wait_queue(&info->delta_msr_wait, &wait);
1823 break;
037ad48b 1824 }
a8dea4ec
JS		 1825 /* NOTREACHED */
1826 /*
1827 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1828 * Return: write counters to the user passed counter struct
1829 * NB: both 1->0 and 0->1 transitions are counted except for
1830 * RI where only 0->1 is counted.
1831 */
1832 case TIOCGICOUNT:
1833 spin_lock_irqsave(&info->slock, flags);
1834 cnow = info->icount;
1835 spin_unlock_irqrestore(&info->slock, flags);
1836 p_cuser = argp;
1837 /* modified by casper 1/11/2000 */
1838 if (put_user(cnow.frame, &p_cuser->frame))
1839 return -EFAULT;
1840 if (put_user(cnow.brk, &p_cuser->brk))
1841 return -EFAULT;
1842 if (put_user(cnow.overrun, &p_cuser->overrun))
1843 return -EFAULT;
1844 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1845 return -EFAULT;
1846 if (put_user(cnow.parity, &p_cuser->parity))
1847 return -EFAULT;
1848 if (put_user(cnow.rx, &p_cuser->rx))
1849 return -EFAULT;
1850 if (put_user(cnow.tx, &p_cuser->tx))
1851 return -EFAULT;
1852 put_user(cnow.cts, &p_cuser->cts);
1853 put_user(cnow.dsr, &p_cuser->dsr);
1854 put_user(cnow.rng, &p_cuser->rng);
1855 put_user(cnow.dcd, &p_cuser->dcd);
1856 return 0;
1857 case MOXA_HighSpeedOn:
1858 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1859 case MOXA_SDS_RSTICOUNTER:
1860 info->mon_data.rxcnt = 0;
1861 info->mon_data.txcnt = 0;
1862 return 0;
1863/* (above) added by James. */
1864 case MOXA_ASPP_SETBAUD:{
1865 long baud;
1866 if (get_user(baud, (long __user *)argp))
1867 return -EFAULT;
1868 mxser_set_baud(info, baud);
1869 return 0;
1870 }
1871 case MOXA_ASPP_GETBAUD:
1872 if (copy_to_user(argp, &info->realbaud, sizeof(long)))
1873 return -EFAULT;
037ad48b 1874
a8dea4ec 1875 return 0;
037ad48b 1876
a8dea4ec
JS		 1877 case MOXA_ASPP_OQUEUE:{
1878 int len, lsr;
037ad48b 1879
a8dea4ec
JS		 1880 len = mxser_chars_in_buffer(tty);
1881
1882 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1883
1884 len += (lsr ? 0 : 1);
1885
1886 if (copy_to_user(argp, &len, sizeof(int)))
1887 return -EFAULT;
1888
1889 return 0;
037ad48b 1890 }
a8dea4ec
JS		 1891 case MOXA_ASPP_MON: {
1892 int mcr, status;
037ad48b 1893
a8dea4ec
JS		 1894 /* info->mon_data.ser_param = tty->termios->c_cflag; */
1895
1896 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1897 mxser_check_modem_status(info, status);
1898
1899 mcr = inb(info->ioaddr + UART_MCR);
1900 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1901 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1902 else
1903 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1904
1905 if (mcr & MOXA_MUST_MCR_TX_XON)
1906 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1907 else
1908 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1909
1910 if (info->tty->hw_stopped)
1911 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1912 else
1913 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1914
1915 if (copy_to_user(argp, &info->mon_data,
1916 sizeof(struct mxser_mon)))
1917 return -EFAULT;
1918
1919 return 0;
1920 }
1921 case MOXA_ASPP_LSTATUS: {
1922 if (copy_to_user(argp, &info->err_shadow,
1923 sizeof(unsigned char)))
1924 return -EFAULT;
1925
1926 info->err_shadow = 0;
1927 return 0;
1928 }
1929 case MOXA_SET_BAUD_METHOD: {
1930 int method;
1931
1932 if (get_user(method, (int __user *)argp))
1933 return -EFAULT;
1934 mxser_set_baud_method[tty->index] = method;
1935 if (copy_to_user(argp, &method, sizeof(int)))
1936 return -EFAULT;
1937
1938 return 0;
1939 }
1940 default:
1941 return -ENOIOCTLCMD;
1942 }
1943 return 0;
1944}
1945
1946static void mxser_stoprx(struct tty_struct *tty)
1947{
1948 struct mxser_port *info = tty->driver_data;
037ad48b 1949
a8dea4ec
JS		 1950 info->ldisc_stop_rx = 1;
1951 if (I_IXOFF(tty)) {
037ad48b 1952 /* following add by Victor Yu. 09-02-2002 */
55b307da 1953 if (info->board->chip_flag) {
a8dea4ec
JS		 1954 info->IER &= ~MOXA_MUST_RECV_ISR;
1955 outb(info->IER, info->ioaddr + UART_IER);
1956 } else if (!(info->flags & ASYNC_CLOSING)) {
1957 info->x_char = STOP_CHAR(tty);
1958 outb(0, info->ioaddr + UART_IER);
1959 info->IER |= UART_IER_THRI;
1960 outb(info->IER, info->ioaddr + UART_IER);
037ad48b 1961 }
a8dea4ec 1962 }
037ad48b 1963
a8dea4ec
JS		 1964 if (info->tty->termios->c_cflag & CRTSCTS) {
1965 info->MCR &= ~UART_MCR_RTS;
1966 outb(info->MCR, info->ioaddr + UART_MCR);
1967 }
1968}
1969
1970/*
1971 * This routine is called by the upper-layer tty layer to signal that
1972 * incoming characters should be throttled.
1973 */
1974static void mxser_throttle(struct tty_struct *tty)
1975{
1976 mxser_stoprx(tty);
1977}
1978
1979static void mxser_unthrottle(struct tty_struct *tty)
1980{
1981 struct mxser_port *info = tty->driver_data;
1982
1983 /* startrx */
1984 info->ldisc_stop_rx = 0;
1985 if (I_IXOFF(tty)) {
1986 if (info->x_char)
1987 info->x_char = 0;
1988 else {
1989 /* following add by Victor Yu. 09-02-2002 */
1990 if (info->board->chip_flag) {
1991 info->IER |= MOXA_MUST_RECV_ISR;
1992 outb(info->IER, info->ioaddr + UART_IER);
1993 } else if (!(info->flags & ASYNC_CLOSING)) {
1994 info->x_char = START_CHAR(tty);
1995 outb(0, info->ioaddr + UART_IER);
1996 info->IER |= UART_IER_THRI;
1997 outb(info->IER, info->ioaddr + UART_IER);
1998 }
1999 }
2000 }
2001
2002 if (info->tty->termios->c_cflag & CRTSCTS) {
2003 info->MCR |= UART_MCR_RTS;
2004 outb(info->MCR, info->ioaddr + UART_MCR);
037ad48b
JS		 2005 }
2006}
2007
2008/*
2009 * mxser_stop() and mxser_start()
2010 *
2011 * This routines are called before setting or resetting tty->stopped.
2012 * They enable or disable transmitter interrupts, as necessary.
2013 */
2014static void mxser_stop(struct tty_struct *tty)
2015{
55b307da 2016 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 2017 unsigned long flags;
2018
2019 spin_lock_irqsave(&info->slock, flags);
2020 if (info->IER & UART_IER_THRI) {
2021 info->IER &= ~UART_IER_THRI;
55b307da 2022 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 2023 }
2024 spin_unlock_irqrestore(&info->slock, flags);
2025}
2026
2027static void mxser_start(struct tty_struct *tty)
2028{
55b307da 2029 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 2030 unsigned long flags;
2031
2032 spin_lock_irqsave(&info->slock, flags);
3306ce3d
JS		 2033 if (info->xmit_cnt && info->xmit_buf
2034 /* && !(info->IER & UART_IER_THRI) */) {
55b307da 2035 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
037ad48b 2036 info->IER |= UART_IER_THRI;
55b307da 2037 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 2038 }
2039 spin_unlock_irqrestore(&info->slock, flags);
2040}
2041
a8dea4ec
JS		 2042static void mxser_set_termios(struct tty_struct *tty, struct termios *old_termios)
2043{
2044 struct mxser_port *info = tty->driver_data;
2045 unsigned long flags;
2046
2047 if ((tty->termios->c_cflag != old_termios->c_cflag) ||
2048 (RELEVANT_IFLAG(tty->termios->c_iflag) != RELEVANT_IFLAG(old_termios->c_iflag))) {
2049
2050 mxser_change_speed(info, old_termios);
2051
2052 if ((old_termios->c_cflag & CRTSCTS) &&
2053 !(tty->termios->c_cflag & CRTSCTS)) {
2054 tty->hw_stopped = 0;
2055 mxser_start(tty);
2056 }
2057 }
2058
2059/* Handle sw stopped */
2060 if ((old_termios->c_iflag & IXON) &&
2061 !(tty->termios->c_iflag & IXON)) {
2062 tty->stopped = 0;
2063
2064 /* following add by Victor Yu. 09-02-2002 */
2065 if (info->board->chip_flag) {
2066 spin_lock_irqsave(&info->slock, flags);
2067 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
2068 spin_unlock_irqrestore(&info->slock, flags);
2069 }
2070 /* above add by Victor Yu. 09-02-2002 */
2071
2072 mxser_start(tty);
2073 }
2074}
2075
037ad48b
JS		 2076/*
2077 * mxser_wait_until_sent() --- wait until the transmitter is empty
2078 */
2079static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
2080{
55b307da 2081 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 2082 unsigned long orig_jiffies, char_time;
2083 int lsr;
2084
2085 if (info->type == PORT_UNKNOWN)
2086 return;
2087
2088 if (info->xmit_fifo_size == 0)
2089 return; /* Just in case.... */
2090
2091 orig_jiffies = jiffies;
2092 /*
2093 * Set the check interval to be 1/5 of the estimated time to
2094 * send a single character, and make it at least 1. The check
2095 * interval should also be less than the timeout.
2096 *
2097 * Note: we have to use pretty tight timings here to satisfy
2098 * the NIST-PCTS.
2099 */
2100 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2101 char_time = char_time / 5;
2102 if (char_time == 0)
2103 char_time = 1;
2104 if (timeout && timeout < char_time)
2105 char_time = timeout;
2106 /*
2107 * If the transmitter hasn't cleared in twice the approximate
2108 * amount of time to send the entire FIFO, it probably won't
2109 * ever clear. This assumes the UART isn't doing flow
2110 * control, which is currently the case. Hence, if it ever
2111 * takes longer than info->timeout, this is probably due to a
2112 * UART bug of some kind. So, we clamp the timeout parameter at
2113 * 2*info->timeout.
2114 */
2115 if (!timeout || timeout > 2 * info->timeout)
2116 timeout = 2 * info->timeout;
2117#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2118 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2119 timeout, char_time);
2120 printk("jiff=%lu...", jiffies);
2121#endif
55b307da 2122 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
037ad48b
JS		 2123#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2124 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2125#endif
2126 schedule_timeout_interruptible(char_time);
2127 if (signal_pending(current))
2128 break;
2129 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2130 break;
2131 }
2132 set_current_state(TASK_RUNNING);
2133
2134#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2135 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
a8dea4ec
JS		 2136#endif
2137}
037ad48b
JS		 2138
2139
a8dea4ec
JS		 2140/*
2141 * This routine is called by tty_hangup() when a hangup is signaled.
2142 */
2143void mxser_hangup(struct tty_struct *tty)
2144{
2145 struct mxser_port *info = tty->driver_data;
037ad48b 2146
a8dea4ec
JS		 2147 mxser_flush_buffer(tty);
2148 mxser_shutdown(info);
2149 info->event = 0;
2150 info->count = 0;
2151 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2152 info->tty = NULL;
2153 wake_up_interruptible(&info->open_wait);
037ad48b
JS		 2154}
2155
2156
a8dea4ec
JS		 2157/* added by James 03-12-2004. */
2158/*
2159 * mxser_rs_break() --- routine which turns the break handling on or off
2160 */
2161static void mxser_rs_break(struct tty_struct *tty, int break_state)
037ad48b 2162{
a8dea4ec 2163 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 2164 unsigned long flags;
2165
a8dea4ec
JS		 2166 spin_lock_irqsave(&info->slock, flags);
2167 if (break_state == -1)
2168 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2169 info->ioaddr + UART_LCR);
2170 else
2171 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2172 info->ioaddr + UART_LCR);
2173 spin_unlock_irqrestore(&info->slock, flags);
2174}
037ad48b 2175
a8dea4ec 2176/* (above) added by James. */
037ad48b 2177
a8dea4ec
JS		 2178static void mxser_receive_chars(struct mxser_port *port, int *status)
2179{
2180 struct tty_struct *tty = port->tty;
2181 unsigned char ch, gdl;
2182 int ignored = 0;
2183 int cnt = 0;
2184 int recv_room;
2185 int max = 256;
2186 unsigned long flags;
037ad48b 2187
a8dea4ec
JS		 2188 spin_lock_irqsave(&port->slock, flags);
2189
2190 recv_room = tty->receive_room;
2191 if ((recv_room == 0) && (!port->ldisc_stop_rx)) {
2192 /* mxser_throttle(tty); */
2193 mxser_stoprx(tty);
2194 /* return; */
037ad48b
JS		 2195 }
2196
a8dea4ec
JS		 2197 /* following add by Victor Yu. 09-02-2002 */
2198 if (port->board->chip_flag != MOXA_OTHER_UART) {
037ad48b 2199
a8dea4ec
JS		 2200 if (*status & UART_LSR_SPECIAL)
2201 goto intr_old;
2202 /* following add by Victor Yu. 02-11-2004 */
2203 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2204 (*status & MOXA_MUST_LSR_RERR))
2205 goto intr_old;
2206 /* above add by Victor Yu. 02-14-2004 */
2207 if (*status & MOXA_MUST_LSR_RERR)
2208 goto intr_old;
2209
2210 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2211
2212 /* add by Victor Yu. 02-11-2004 */
2213 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2214 gdl &= MOXA_MUST_GDL_MASK;
2215 if (gdl >= recv_room) {
2216 if (!port->ldisc_stop_rx) {
2217 /* mxser_throttle(tty); */
2218 mxser_stoprx(tty);
2219 }
2220 /* return; */
2221 }
2222 while (gdl--) {
2223 ch = inb(port->ioaddr + UART_RX);
2224 tty_insert_flip_char(tty, ch, 0);
2225 cnt++;
2226 }
2227 goto end_intr;
037ad48b 2228 }
a8dea4ec
JS		 2229 intr_old:
2230 /* above add by Victor Yu. 09-02-2002 */
037ad48b 2231
a8dea4ec
JS		 2232 do {
2233 if (max-- < 0)
2234 break;
037ad48b 2235
a8dea4ec
JS		 2236 ch = inb(port->ioaddr + UART_RX);
2237 /* following add by Victor Yu. 09-02-2002 */
2238 if (port->board->chip_flag && (*status & UART_LSR_OE)
2239 /*&& !(*status&UART_LSR_DR) */)
2240 outb(0x23, port->ioaddr + UART_FCR);
2241 *status &= port->read_status_mask;
2242 /* above add by Victor Yu. 09-02-2002 */
2243 if (*status & port->ignore_status_mask) {
2244 if (++ignored > 100)
2245 break;
2246 } else {
2247 char flag = 0;
2248 if (*status & UART_LSR_SPECIAL) {
2249 if (*status & UART_LSR_BI) {
2250 flag = TTY_BREAK;
2251/* added by casper 1/11/2000 */
2252 port->icount.brk++;
037ad48b 2253
a8dea4ec
JS		 2254 if (port->flags & ASYNC_SAK)
2255 do_SAK(tty);
2256 } else if (*status & UART_LSR_PE) {
2257 flag = TTY_PARITY;
2258/* added by casper 1/11/2000 */
2259 port->icount.parity++;
2260 } else if (*status & UART_LSR_FE) {
2261 flag = TTY_FRAME;
2262/* added by casper 1/11/2000 */
2263 port->icount.frame++;
2264 } else if (*status & UART_LSR_OE) {
2265 flag = TTY_OVERRUN;
2266/* added by casper 1/11/2000 */
2267 port->icount.overrun++;
2268 } else
2269 flags = TTY_BREAK;
2270 } else
2271 flags = 0;
2272 tty_insert_flip_char(tty, ch, flag);
2273 cnt++;
2274 if (cnt >= recv_room) {
2275 if (!port->ldisc_stop_rx) {
2276 /* mxser_throttle(tty); */
2277 mxser_stoprx(tty);
2278 }
2279 break;
2280 }
037ad48b 2281
a8dea4ec 2282 }
037ad48b 2283
a8dea4ec
JS		 2284 /* following add by Victor Yu. 09-02-2002 */
2285 if (port->board->chip_flag)
2286 break;
037ad48b 2287
a8dea4ec
JS		 2288 /* mask by Victor Yu. 09-02-2002
2289 *status = inb(port->ioaddr + UART_LSR) & port->read_status_mask;
2290 */
2291 /* following add by Victor Yu. 09-02-2002 */
2292 *status = inb(port->ioaddr + UART_LSR);
2293 /* above add by Victor Yu. 09-02-2002 */
2294 } while (*status & UART_LSR_DR);
037ad48b 2295
a8dea4ec
JS		 2296end_intr: /* add by Victor Yu. 09-02-2002 */
2297 mxvar_log.rxcnt[port->tty->index] += cnt;
2298 port->mon_data.rxcnt += cnt;
2299 port->mon_data.up_rxcnt += cnt;
2300 spin_unlock_irqrestore(&port->slock, flags);
2301
2302 tty_flip_buffer_push(tty);
037ad48b
JS		 2303}
2304
a8dea4ec 2305static void mxser_transmit_chars(struct mxser_port *port)
037ad48b 2306{
a8dea4ec
JS		 2307 int count, cnt;
2308 unsigned long flags;
037ad48b 2309
a8dea4ec 2310 spin_lock_irqsave(&port->slock, flags);
037ad48b 2311
a8dea4ec
JS		 2312 if (port->x_char) {
2313 outb(port->x_char, port->ioaddr + UART_TX);
2314 port->x_char = 0;
2315 mxvar_log.txcnt[port->tty->index]++;
2316 port->mon_data.txcnt++;
2317 port->mon_data.up_txcnt++;
2318
2319/* added by casper 1/11/2000 */
2320 port->icount.tx++;
2321 goto unlock;
037ad48b
JS		 2322 }
2323
a8dea4ec
JS		 2324 if (port->xmit_buf == 0)
2325 goto unlock;
037ad48b 2326
a8dea4ec
JS		 2327 if (port->xmit_cnt == 0) {
2328 if (port->xmit_cnt < WAKEUP_CHARS) { /* XXX what's this for?? */
2329 set_bit(MXSER_EVENT_TXLOW, &port->event);
2330 schedule_work(&port->tqueue);
2331 }
2332 goto unlock;
2333 }
2334 if (port->tty->stopped || (port->tty->hw_stopped &&
2335 (port->type != PORT_16550A) &&
2336 (!port->board->chip_flag))) {
2337 port->IER &= ~UART_IER_THRI;
2338 outb(port->IER, port->ioaddr + UART_IER);
2339 goto unlock;
2340 }
037ad48b 2341
a8dea4ec
JS		 2342 cnt = port->xmit_cnt;
2343 count = port->xmit_fifo_size;
2344 do {
2345 outb(port->xmit_buf[port->xmit_tail++],
2346 port->ioaddr + UART_TX);
2347 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2348 if (--port->xmit_cnt <= 0)
2349 break;
2350 } while (--count > 0);
2351 mxvar_log.txcnt[port->tty->index] += (cnt - port->xmit_cnt);
55b307da 2352
a8dea4ec
JS		 2353/* added by James 03-12-2004. */
2354 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2355 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
037ad48b 2356
a8dea4ec
JS		 2357/* added by casper 1/11/2000 */
2358 port->icount.tx += (cnt - port->xmit_cnt);
037ad48b 2359
a8dea4ec
JS		 2360 if (port->xmit_cnt < WAKEUP_CHARS) {
2361 set_bit(MXSER_EVENT_TXLOW, &port->event);
2362 schedule_work(&port->tqueue);
2363 }
2364 if (port->xmit_cnt <= 0) {
2365 port->IER &= ~UART_IER_THRI;
2366 outb(port->IER, port->ioaddr + UART_IER);
2367 }
2368unlock:
2369 spin_unlock_irqrestore(&port->slock, flags);
037ad48b
JS		 2370}
2371
2372/*
a8dea4ec 2373 * This is the serial driver's generic interrupt routine
037ad48b 2374 */
a8dea4ec 2375static irqreturn_t mxser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
037ad48b 2376{
a8dea4ec
JS		 2377 int status, iir, i;
2378 struct mxser_board *brd = NULL;
2379 struct mxser_port *port;
2380 int max, irqbits, bits, msr;
2381 int pass_counter = 0;
2382 unsigned int int_cnt;
2383 int handled = IRQ_NONE;
037ad48b 2384
a8dea4ec 2385 /* spin_lock(&gm_lock); */
037ad48b 2386
a8dea4ec
JS		 2387 for (i = 0; i < MXSER_BOARDS; i++)
2388 if (dev_id == &mxser_boards[i]) {
2389 brd = dev_id;
2390 break;
2391 }
037ad48b 2392
a8dea4ec
JS		 2393 if (i == MXSER_BOARDS)
2394 goto irq_stop;
2395 if (brd == NULL)
2396 goto irq_stop;
cd7ed64e 2397 max = brd->info->nports;
a8dea4ec
JS		 2398 while (1) {
2399 irqbits = inb(brd->vector) & brd->vector_mask;
2400 if (irqbits == brd->vector_mask)
2401 break;
037ad48b 2402
a8dea4ec
JS		 2403 handled = IRQ_HANDLED;
2404 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2405 if (irqbits == brd->vector_mask)
2406 break;
2407 if (bits & irqbits)
2408 continue;
2409 port = &brd->ports[i];
037ad48b 2410
a8dea4ec
JS		 2411 int_cnt = 0;
2412 do {
2413 /* following add by Victor Yu. 09-13-2002 */
2414 iir = inb(port->ioaddr + UART_IIR);
2415 if (iir & UART_IIR_NO_INT)
2416 break;
2417 iir &= MOXA_MUST_IIR_MASK;
2418 if (!port->tty) {
2419 status = inb(port->ioaddr + UART_LSR);
2420 outb(0x27, port->ioaddr + UART_FCR);
2421 inb(port->ioaddr + UART_MSR);
2422 break;
2423 }
2424 /* above add by Victor Yu. 09-13-2002 */
037ad48b 2425
a8dea4ec
JS		 2426 /* following add by Victor Yu. 09-02-2002 */
2427 status = inb(port->ioaddr + UART_LSR);
2428
2429 if (status & UART_LSR_PE)
2430 port->err_shadow |= NPPI_NOTIFY_PARITY;
2431 if (status & UART_LSR_FE)
2432 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2433 if (status & UART_LSR_OE)
2434 port->err_shadow |=
2435 NPPI_NOTIFY_HW_OVERRUN;
2436 if (status & UART_LSR_BI)
2437 port->err_shadow |= NPPI_NOTIFY_BREAK;
2438
2439 if (port->board->chip_flag) {
2440 /*
2441 if ( (status & 0x02) && !(status & 0x01) ) {
2442 outb(port->ioaddr+UART_FCR, 0x23);
2443 continue;
2444 }
2445 */
2446 if (iir == MOXA_MUST_IIR_GDA ||
2447 iir == MOXA_MUST_IIR_RDA ||
2448 iir == MOXA_MUST_IIR_RTO ||
2449 iir == MOXA_MUST_IIR_LSR)
2450 mxser_receive_chars(port,
2451 &status);
2452
2453 } else {
2454 /* above add by Victor Yu. 09-02-2002 */
2455
2456 status &= port->read_status_mask;
2457 if (status & UART_LSR_DR)
2458 mxser_receive_chars(port,
2459 &status);
2460 }
2461 msr = inb(port->ioaddr + UART_MSR);
2462 if (msr & UART_MSR_ANY_DELTA)
2463 mxser_check_modem_status(port, msr);
2464
2465 /* following add by Victor Yu. 09-13-2002 */
2466 if (port->board->chip_flag) {
2467 if (iir == 0x02 && (status &
2468 UART_LSR_THRE))
2469 mxser_transmit_chars(port);
2470 } else {
2471 /* above add by Victor Yu. 09-13-2002 */
2472
2473 if (status & UART_LSR_THRE)
2474 mxser_transmit_chars(port);
2475 }
2476 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2477 }
2478 if (pass_counter++ > MXSER_ISR_PASS_LIMIT)
2479 break; /* Prevent infinite loops */
2480 }
2481
2482 irq_stop:
2483 /* spin_unlock(&gm_lock); */
2484 return handled;
037ad48b
JS		 2485}
2486
a8dea4ec
JS		 2487static const struct tty_operations mxser_ops = {
2488 .open = mxser_open,
2489 .close = mxser_close,
2490 .write = mxser_write,
2491 .put_char = mxser_put_char,
2492 .flush_chars = mxser_flush_chars,
2493 .write_room = mxser_write_room,
2494 .chars_in_buffer = mxser_chars_in_buffer,
2495 .flush_buffer = mxser_flush_buffer,
2496 .ioctl = mxser_ioctl,
2497 .throttle = mxser_throttle,
2498 .unthrottle = mxser_unthrottle,
2499 .set_termios = mxser_set_termios,
2500 .stop = mxser_stop,
2501 .start = mxser_start,
2502 .hangup = mxser_hangup,
2503 .break_ctl = mxser_rs_break,
2504 .wait_until_sent = mxser_wait_until_sent,
2505 .tiocmget = mxser_tiocmget,
2506 .tiocmset = mxser_tiocmset,
2507};
2508
2509/*
2510 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2511 */
2512
171d3a86
JS		 2513static void mxser_release_res(struct mxser_board *brd, unsigned int irq)
2514{
2515 struct pci_dev *pdev = brd->pdev;
2516
2517 if (irq)
2518 free_irq(brd->irq, brd);
2519 if (pdev != NULL) { /* PCI */
2520 pci_release_region(pdev, 2);
2521 pci_release_region(pdev, 3);
2522 pci_dev_put(pdev);
2523 } else {
cd7ed64e 2524 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
171d3a86
JS		 2525 release_region(brd->vector, 1);
2526 }
2527}
2528
a8dea4ec 2529static int __devinit mxser_initbrd(struct mxser_board *brd)
037ad48b 2530{
a8dea4ec
JS		 2531 struct mxser_port *info;
2532 unsigned int i;
2533 int retval;
2534
2535 printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud);
2536
cd7ed64e 2537 for (i = 0; i < brd->info->nports; i++) {
a8dea4ec
JS		 2538 info = &brd->ports[i];
2539 info->board = brd;
2540 info->stop_rx = 0;
2541 info->ldisc_stop_rx = 0;
037ad48b 2542
a8dea4ec
JS		 2543 /* Enhance mode enabled here */
2544 if (brd->chip_flag != MOXA_OTHER_UART)
2545 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->ioaddr);
037ad48b 2546
a8dea4ec
JS		 2547 info->flags = ASYNC_SHARE_IRQ;
2548 info->type = brd->uart_type;
037ad48b 2549
a8dea4ec 2550 process_txrx_fifo(info);
037ad48b 2551
a8dea4ec
JS		 2552 info->custom_divisor = info->baud_base * 16;
2553 info->close_delay = 5 * HZ / 10;
2554 info->closing_wait = 30 * HZ;
2555 INIT_WORK(&info->tqueue, mxser_do_softint, info);
2556 info->normal_termios = mxvar_sdriver->init_termios;
2557 init_waitqueue_head(&info->open_wait);
2558 init_waitqueue_head(&info->close_wait);
2559 init_waitqueue_head(&info->delta_msr_wait);
2560 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2561 info->err_shadow = 0;
2562 spin_lock_init(&info->slock);
037ad48b 2563
a8dea4ec
JS		 2564 /* before set INT ISR, disable all int */
2565 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2566 info->ioaddr + UART_IER);
2567 }
2568 /*
2569 * Allocate the IRQ if necessary
2570 */
037ad48b 2571
a8dea4ec
JS		 2572 retval = request_irq(brd->irq, mxser_interrupt,
2573 (brd->ports[0].flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED :
2574 IRQF_DISABLED, "mxser", brd);
2575 if (retval) {
2576 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2577 "conflict with another device.\n",
cd7ed64e 2578 brd->info->name, brd->irq);
171d3a86
JS		 2579 /* We hold resources, we need to release them. */
2580 mxser_release_res(brd, 0);
a8dea4ec
JS		 2581 return retval;
2582 }
037ad48b
JS		 2583 return 0;
2584}
2585
943f2959 2586static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
037ad48b
JS		 2587{
2588 int id, i, bits;
2589 unsigned short regs[16], irq;
2590 unsigned char scratch, scratch2;
2591
55b307da 2592 brd->chip_flag = MOXA_OTHER_UART;
037ad48b
JS		 2593
2594 id = mxser_read_register(cap, regs);
cd7ed64e
JS		 2595 switch (id) {
2596 case C168_ASIC_ID:
2597 brd->info = &mxser_cards[0];
2598 break;
2599 case C104_ASIC_ID:
2600 brd->info = &mxser_cards[1];
2601 break;
2602 case CI104J_ASIC_ID:
2603 brd->info = &mxser_cards[2];
2604 break;
2605 case C102_ASIC_ID:
2606 brd->info = &mxser_cards[5];
2607 break;
2608 case CI132_ASIC_ID:
2609 brd->info = &mxser_cards[6];
2610 break;
2611 case CI134_ASIC_ID:
2612 brd->info = &mxser_cards[7];
2613 break;
2614 default:
037ad48b 2615 return 0;
cd7ed64e 2616 }
037ad48b
JS		 2617
2618 irq = 0;
cd7ed64e
JS		 2619 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2620 Flag-hack checks if configuration should be read as 2-port here. */
2621 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
037ad48b
JS		 2622 irq = regs[9] & 0xF000;
2623 irq = irq | (irq >> 4);
2624 if (irq != (regs[9] & 0xFF00))
2625 return MXSER_ERR_IRQ_CONFLIT;
cd7ed64e 2626 } else if (brd->info->nports == 4) {
037ad48b
JS		 2627 irq = regs[9] & 0xF000;
2628 irq = irq | (irq >> 4);
2629 irq = irq | (irq >> 8);
2630 if (irq != regs[9])
2631 return MXSER_ERR_IRQ_CONFLIT;
cd7ed64e 2632 } else if (brd->info->nports == 8) {
037ad48b
JS		 2633 irq = regs[9] & 0xF000;
2634 irq = irq | (irq >> 4);
2635 irq = irq | (irq >> 8);
2636 if ((irq != regs[9]) || (irq != regs[10]))
2637 return MXSER_ERR_IRQ_CONFLIT;
2638 }
2639
a8dea4ec
JS		 2640 if (!irq)
2641 return MXSER_ERR_IRQ;
2642 brd->irq = ((int)(irq & 0xF000) >> 12);
2643 for (i = 0; i < 8; i++)
2644 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2645 if ((regs[12] & 0x80) == 0)
2646 return MXSER_ERR_VECTOR;
2647 brd->vector = (int)regs[11]; /* interrupt vector */
2648 if (id == 1)
2649 brd->vector_mask = 0x00FF;
2650 else
2651 brd->vector_mask = 0x000F;
2652 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2653 if (regs[12] & bits) {
2654 brd->ports[i].baud_base = 921600;
2655 brd->ports[i].max_baud = 921600; /* add by Victor Yu. 09-04-2002 */
2656 } else {
2657 brd->ports[i].baud_base = 115200;
2658 brd->ports[i].max_baud = 115200; /* add by Victor Yu. 09-04-2002 */
2659 }
2660 }
2661 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2662 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2663 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2664 outb(scratch2, cap + UART_LCR);
2665 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2666 scratch = inb(cap + UART_IIR);
2667
2668 if (scratch & 0xC0)
2669 brd->uart_type = PORT_16550A;
2670 else
2671 brd->uart_type = PORT_16450;
cd7ed64e
JS		 2672 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2673 "mxser(IO)"))
a8dea4ec
JS		 2674 return MXSER_ERR_IOADDR;
2675 if (!request_region(brd->vector, 1, "mxser(vector)")) {
cd7ed64e 2676 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
a8dea4ec
JS		 2677 return MXSER_ERR_VECTOR;
2678 }
cd7ed64e 2679 return brd->info->nports;
a8dea4ec
JS		 2680}
2681
cd7ed64e
JS		 2682static int __init mxser_get_PCI_conf(const struct pci_device_id *ent,
2683 struct mxser_board *brd, struct pci_dev *pdev)
a8dea4ec
JS		 2684{
2685 unsigned int i, j;
2686 unsigned long ioaddress;
2687 int retval;
2688
2689 /* io address */
cd7ed64e 2690 brd->info = &mxser_cards[ent->driver_data];
a8dea4ec
JS		 2691 ioaddress = pci_resource_start(pdev, 2);
2692 retval = pci_request_region(pdev, 2, "mxser(IO)");
2693 if (retval)
2694 goto err;
2695
cd7ed64e 2696 for (i = 0; i < brd->info->nports; i++)
a8dea4ec
JS		 2697 brd->ports[i].ioaddr = ioaddress + 8 * i;
2698
2699 /* vector */
2700 ioaddress = pci_resource_start(pdev, 3);
2701 retval = pci_request_region(pdev, 3, "mxser(vector)");
2702 if (retval)
2703 goto err_relio;
2704 brd->vector = ioaddress;
2705
2706 /* irq */
2707 brd->irq = pdev->irq;
2708
2709 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2710 brd->uart_type = PORT_16550A;
2711 brd->vector_mask = 0;
2712
cd7ed64e 2713 for (i = 0; i < brd->info->nports; i++) {
a8dea4ec
JS		 2714 for (j = 0; j < UART_INFO_NUM; j++) {
2715 if (Gpci_uart_info[j].type == brd->chip_flag) {
2716 brd->ports[i].max_baud =
2717 Gpci_uart_info[j].max_baud;
2718
2719 /* exception....CP-102 */
cd7ed64e 2720 if (brd->info->flags & MXSER_HIGHBAUD)
a8dea4ec
JS		 2721 brd->ports[i].max_baud = 921600;
2722 break;
2723 }
2724 }
2725 }
2726
2727 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
cd7ed64e 2728 for (i = 0; i < brd->info->nports; i++) {
a8dea4ec
JS		 2729 if (i < 4)
2730 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2731 else
2732 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2733 }
2734 outb(0, ioaddress + 4); /* default set to RS232 mode */
2735 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2736 }
2737
cd7ed64e 2738 for (i = 0; i < brd->info->nports; i++) {
a8dea4ec
JS		 2739 brd->vector_mask |= (1 << i);
2740 brd->ports[i].baud_base = 921600;
2741 }
2742 return 0;
2743err_relio:
2744 pci_release_region(pdev, 2);
2745err:
2746 return retval;
2747}
2748
2749static int __init mxser_module_init(void)
2750{
2751 struct pci_dev *pdev = NULL;
2752 struct mxser_board *brd;
eae4436a
JS		 2753 unsigned long cap;
2754 unsigned int i, m, isaloop;
a8dea4ec
JS		 2755 int retval, b, n;
2756
2757 pr_debug("Loading module mxser ...\n");
2758
2759 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2760 if (!mxvar_sdriver)
2761 return -ENOMEM;
2762 spin_lock_init(&gm_lock);
2763
a8dea4ec
JS		 2764 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2765 MXSER_VERSION);
2766
2767 /* Initialize the tty_driver structure */
2768 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2769 mxvar_sdriver->name = "ttyM";
2770 mxvar_sdriver->major = ttymajor;
2771 mxvar_sdriver->minor_start = 0;
2772 mxvar_sdriver->num = MXSER_PORTS + 1;
2773 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2774 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2775 mxvar_sdriver->init_termios = tty_std_termios;
2776 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
938ef180 2777 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
a8dea4ec
JS		 2778 tty_set_operations(mxvar_sdriver, &mxser_ops);
2779 mxvar_sdriver->ttys = mxvar_tty;
2780 mxvar_sdriver->termios = mxvar_termios;
2781 mxvar_sdriver->termios_locked = mxvar_termios_locked;
2782
938ef180
JS		 2783 retval = tty_register_driver(mxvar_sdriver);
2784 if (retval) {
2785 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2786 "tty driver !\n");
2787 goto err_put;
2788 }
2789
a8dea4ec
JS		 2790 mxvar_diagflag = 0;
2791
2792 m = 0;
2793 /* Start finding ISA boards here */
eae4436a
JS		 2794 for (isaloop = 0; isaloop < 2; isaloop++)
2795 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
2796 if (!isaloop)
2797 cap = mxserBoardCAP[b]; /* predefined */
2798 else
2799 cap = ioaddr[b]; /* module param */
a8dea4ec 2800
eae4436a
JS		 2801 if (!cap)
2802 continue;
a8dea4ec 2803
eae4436a
JS		 2804 brd = &mxser_boards[m];
2805 retval = mxser_get_ISA_conf(cap, brd);
2806
2807 if (retval != 0)
2808 printk(KERN_INFO "Found MOXA %s board "
2809 "(CAP=0x%x)\n",
cd7ed64e 2810 brd->info->name, ioaddr[b]);
eae4436a
JS		 2811
2812 if (retval <= 0) {
2813 if (retval == MXSER_ERR_IRQ)
2814 printk(KERN_ERR "Invalid interrupt "
2815 "number, board not "
2816 "configured\n");
2817 else if (retval == MXSER_ERR_IRQ_CONFLIT)
2818 printk(KERN_ERR "Invalid interrupt "
2819 "number, board not "
2820 "configured\n");
2821 else if (retval == MXSER_ERR_VECTOR)
2822 printk(KERN_ERR "Invalid interrupt "
2823 "vector, board not "
2824 "configured\n");
2825 else if (retval == MXSER_ERR_IOADDR)
2826 printk(KERN_ERR "Invalid I/O address, "
2827 "board not configured\n");
a8dea4ec 2828
eae4436a
JS		 2829 continue;
2830 }
a8dea4ec 2831
eae4436a 2832 brd->pdev = NULL;
a8dea4ec 2833
eae4436a
JS		 2834 /* mxser_initbrd will hook ISR. */
2835 if (mxser_initbrd(brd) < 0)
2836 continue;
a8dea4ec 2837
cd7ed64e 2838 for (i = 0; i < brd->info->nports; i++)
938ef180
JS		 2839 tty_register_device(mxvar_sdriver,
2840 m * MXSER_PORTS_PER_BOARD + i, NULL);
2841
eae4436a 2842 m++;
037ad48b 2843 }
a8dea4ec 2844
a8dea4ec
JS		 2845 /* start finding PCI board here */
2846 n = ARRAY_SIZE(mxser_pcibrds) - 1;
2847 b = 0;
2848 while (b < n) {
2849 pdev = pci_get_device(mxser_pcibrds[b].vendor,
2850 mxser_pcibrds[b].device, pdev);
2851 if (pdev == NULL) {
2852 b++;
2853 continue;
2854 }
2855 printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
cd7ed64e 2856 mxser_cards[mxser_pcibrds[b].driver_data].name,
a8dea4ec
JS		 2857 pdev->bus->number, PCI_SLOT(pdev->devfn));
2858 if (m >= MXSER_BOARDS)
2859 printk(KERN_ERR
2860 "Too many Smartio/Industio family boards find "
2861 "(maximum %d), board not configured\n",
2862 MXSER_BOARDS);
2863 else {
2864 if (pci_enable_device(pdev)) {
2865 printk(KERN_ERR "Moxa SmartI/O PCI enable "
2866 "fail !\n");
2867 continue;
2868 }
2869 brd = &mxser_boards[m];
2870 brd->pdev = pdev;
cd7ed64e 2871 retval = mxser_get_PCI_conf(&mxser_pcibrds[b],
a8dea4ec
JS		 2872 brd, pdev);
2873 if (retval < 0) {
2874 if (retval == MXSER_ERR_IRQ)
2875 printk(KERN_ERR
2876 "Invalid interrupt number, "
2877 "board not configured\n");
2878 else if (retval == MXSER_ERR_IRQ_CONFLIT)
2879 printk(KERN_ERR
2880 "Invalid interrupt number, "
2881 "board not configured\n");
2882 else if (retval == MXSER_ERR_VECTOR)
2883 printk(KERN_ERR
2884 "Invalid interrupt vector, "
2885 "board not configured\n");
2886 else if (retval == MXSER_ERR_IOADDR)
2887 printk(KERN_ERR
2888 "Invalid I/O address, "
2889 "board not configured\n");
2890 continue;
2891 }
2892 /* mxser_initbrd will hook ISR. */
2893 if (mxser_initbrd(brd) < 0)
2894 continue;
cd7ed64e 2895 for (i = 0; i < brd->info->nports; i++)
938ef180
JS		 2896 tty_register_device(mxvar_sdriver,
2897 m * MXSER_PORTS_PER_BOARD + i,
2898 &pdev->dev);
2899
a8dea4ec
JS		 2900 m++;
2901 /* Keep an extra reference if we succeeded. It will
2902 be returned at unload time */
2903 pci_dev_get(pdev);
2904 }
7a7a5c33 2905 }
037ad48b 2906
938ef180
JS		 2907 if (!m) {
2908 retval = -ENODEV;
2909 goto err_unr;
037ad48b 2910 }
a8dea4ec
JS		 2911
2912 pr_debug("Done.\n");
2913
938ef180
JS		 2914 return 0;
2915err_unr:
2916 tty_unregister_driver(mxvar_sdriver);
2917err_put:
2918 put_tty_driver(mxvar_sdriver);
a8dea4ec 2919 return retval;
037ad48b
JS		 2920}
2921
a8dea4ec 2922static void __exit mxser_module_exit(void)
037ad48b 2923{
ead568c9 2924 unsigned int i;
037ad48b 2925
a8dea4ec 2926 pr_debug("Unloading module mxser ...\n");
037ad48b 2927
938ef180
JS		 2928 for (i = 0; i < MXSER_PORTS; i++)
2929 tty_unregister_device(mxvar_sdriver, i);
ead568c9
JS		 2930 tty_unregister_driver(mxvar_sdriver);
2931 put_tty_driver(mxvar_sdriver);
037ad48b 2932
171d3a86 2933 for (i = 0; i < MXSER_BOARDS; i++)
cd7ed64e 2934 if (mxser_boards[i].info != NULL)
171d3a86 2935 mxser_release_res(&mxser_boards[i], 1);
037ad48b 2936
a8dea4ec 2937 pr_debug("Done.\n");
037ad48b
JS		 2938}
2939
2940module_init(mxser_module_init);
2941module_exit(mxser_module_exit);
Linux kernel - Deliverables
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