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[PATCH] Char: mxser_new, CMSPAR is defined
[deliverable/linux.git] / drivers / char / mxser_new.c
CommitLineData
037ad48b
JS		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
3306ce3d 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com.tw).
c88cb8f9 5 * Copyright (C) 2006 Jiri Slaby <jirislaby@gmail.com>
037ad48b 6 *
c88cb8f9
JS		 7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
037ad48b
JS		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
037ad48b
JS		 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
18 * - Fixed x86_64 cleanness
19 * - Fixed sleep with spinlock held in mxser_send_break
20 */
21
037ad48b
JS		 22#include <linux/module.h>
23#include <linux/autoconf.h>
24#include <linux/errno.h>
25#include <linux/signal.h>
26#include <linux/sched.h>
27#include <linux/timer.h>
28#include <linux/interrupt.h>
29#include <linux/tty.h>
30#include <linux/tty_flip.h>
31#include <linux/serial.h>
32#include <linux/serial_reg.h>
33#include <linux/major.h>
34#include <linux/string.h>
35#include <linux/fcntl.h>
36#include <linux/ptrace.h>
37#include <linux/gfp.h>
38#include <linux/ioport.h>
39#include <linux/mm.h>
40#include <linux/smp_lock.h>
41#include <linux/delay.h>
42#include <linux/pci.h>
43
44#include <asm/system.h>
45#include <asm/io.h>
46#include <asm/irq.h>
47#include <asm/bitops.h>
48#include <asm/uaccess.h>
49
771f2d1a 50#include "mxser_new.h"
037ad48b 51
55b307da 52#define MXSER_VERSION "2.0"
037ad48b
JS		 53#define MXSERMAJOR 174
54#define MXSERCUMAJOR 175
55
56#define MXSER_EVENT_TXLOW 1
57#define MXSER_EVENT_HANGUP 2
58
59#define MXSER_BOARDS 4 /* Max. boards */
60#define MXSER_PORTS 32 /* Max. ports */
61#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
3306ce3d 62#define MXSER_ISR_PASS_LIMIT 99999L
037ad48b
JS		 63
64#define MXSER_ERR_IOADDR -1
65#define MXSER_ERR_IRQ -2
66#define MXSER_ERR_IRQ_CONFLIT -3
67#define MXSER_ERR_VECTOR -4
68
69#define SERIAL_TYPE_NORMAL 1
70#define SERIAL_TYPE_CALLOUT 2
71
72#define WAKEUP_CHARS 256
73
74#define UART_MCR_AFE 0x20
75#define UART_LSR_SPECIAL 0x1E
76
77#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK|\
78 IXON|IXOFF))
79
037ad48b
JS		 80#define C168_ASIC_ID 1
81#define C104_ASIC_ID 2
82#define C102_ASIC_ID 0xB
83#define CI132_ASIC_ID 4
84#define CI134_ASIC_ID 3
85#define CI104J_ASIC_ID 5
86
87enum {
88 MXSER_BOARD_C168_ISA = 1,
89 MXSER_BOARD_C104_ISA,
90 MXSER_BOARD_CI104J,
91 MXSER_BOARD_C168_PCI,
92 MXSER_BOARD_C104_PCI,
93 MXSER_BOARD_C102_ISA,
94 MXSER_BOARD_CI132,
95 MXSER_BOARD_CI134,
96 MXSER_BOARD_CP132,
97 MXSER_BOARD_CP114,
98 MXSER_BOARD_CT114,
99 MXSER_BOARD_CP102,
100 MXSER_BOARD_CP104U,
101 MXSER_BOARD_CP168U,
102 MXSER_BOARD_CP132U,
103 MXSER_BOARD_CP134U,
104 MXSER_BOARD_CP104JU,
105 MXSER_BOARD_RC7000,
106 MXSER_BOARD_CP118U,
107 MXSER_BOARD_CP102UL,
108 MXSER_BOARD_CP102U,
3306ce3d
JS		 109 MXSER_BOARD_CP118EL,
110 MXSER_BOARD_CP168EL,
111 MXSER_BOARD_CP104EL
037ad48b
JS		 112};
113
114static char *mxser_brdname[] = {
115 "C168 series",
116 "C104 series",
117 "CI-104J series",
118 "C168H/PCI series",
119 "C104H/PCI series",
120 "C102 series",
121 "CI-132 series",
122 "CI-134 series",
123 "CP-132 series",
124 "CP-114 series",
125 "CT-114 series",
126 "CP-102 series",
127 "CP-104U series",
128 "CP-168U series",
129 "CP-132U series",
130 "CP-134U series",
131 "CP-104JU series",
132 "Moxa UC7000 Serial",
133 "CP-118U series",
134 "CP-102UL series",
135 "CP-102U series",
3306ce3d
JS		 136 "CP-118EL series",
137 "CP-168EL series",
138 "CP-104EL series"
037ad48b
JS		 139};
140
141static int mxser_numports[] = {
142 8, /* C168-ISA */
143 4, /* C104-ISA */
144 4, /* CI104J */
145 8, /* C168-PCI */
146 4, /* C104-PCI */
147 2, /* C102-ISA */
148 2, /* CI132 */
149 4, /* CI134 */
150 2, /* CP132 */
151 4, /* CP114 */
152 4, /* CT114 */
153 2, /* CP102 */
154 4, /* CP104U */
155 8, /* CP168U */
156 2, /* CP132U */
157 4, /* CP134U */
158 4, /* CP104JU */
159 8, /* RC7000 */
160 8, /* CP118U */
161 2, /* CP102UL */
162 2, /* CP102U */
3306ce3d
JS		 163 8, /* CP118EL */
164 8, /* CP168EL */
165 4 /* CP104EL */
037ad48b
JS		 166};
167
168#define UART_TYPE_NUM 2
169
170static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
171 MOXA_MUST_MU150_HWID,
172 MOXA_MUST_MU860_HWID
173};
174
175/* This is only for PCI */
176#define UART_INFO_NUM 3
177struct mxpciuart_info {
178 int type;
179 int tx_fifo;
180 int rx_fifo;
181 int xmit_fifo_size;
182 int rx_high_water;
183 int rx_trigger;
184 int rx_low_water;
185 long max_baud;
186};
187
188static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
189 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
190 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
191 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
192};
193
037ad48b 194static struct pci_device_id mxser_pcibrds[] = {
3306ce3d
JS		 195 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168),
196 .driver_data = MXSER_BOARD_C168_PCI },
197 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104),
198 .driver_data = MXSER_BOARD_C104_PCI },
199 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132),
200 .driver_data = MXSER_BOARD_CP132 },
201 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114),
202 .driver_data = MXSER_BOARD_CP114 },
203 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114),
204 .driver_data = MXSER_BOARD_CT114 },
205 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102),
206 .driver_data = MXSER_BOARD_CP102 },
207 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U),
208 .driver_data = MXSER_BOARD_CP104U },
209 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U),
210 .driver_data = MXSER_BOARD_CP168U },
211 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U),
212 .driver_data = MXSER_BOARD_CP132U },
213 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U),
214 .driver_data = MXSER_BOARD_CP134U },
215 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU),
216 .driver_data = MXSER_BOARD_CP104JU },
217 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000),
218 .driver_data = MXSER_BOARD_RC7000 },
219 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U),
220 .driver_data = MXSER_BOARD_CP118U },
221 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL),
222 .driver_data = MXSER_BOARD_CP102UL },
223 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U),
224 .driver_data = MXSER_BOARD_CP102U },
225 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118EL),
226 .driver_data = MXSER_BOARD_CP118EL },
227 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168EL),
228 .driver_data = MXSER_BOARD_CP168EL },
229 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104EL),
230 .driver_data = MXSER_BOARD_CP104EL },
231 { }
037ad48b 232};
037ad48b
JS		 233MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
234
037ad48b
JS		 235static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
236static int ttymajor = MXSERMAJOR;
237static int calloutmajor = MXSERCUMAJOR;
037ad48b
JS		 238
239/* Variables for insmod */
240
241MODULE_AUTHOR("Casper Yang");
242MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
243module_param_array(ioaddr, int, NULL, 0);
244module_param(ttymajor, int, 0);
037ad48b
JS		 245MODULE_LICENSE("GPL");
246
247struct mxser_log {
248 int tick;
249 unsigned long rxcnt[MXSER_PORTS];
250 unsigned long txcnt[MXSER_PORTS];
251};
252
253
254struct mxser_mon {
255 unsigned long rxcnt;
256 unsigned long txcnt;
257 unsigned long up_rxcnt;
258 unsigned long up_txcnt;
259 int modem_status;
260 unsigned char hold_reason;
261};
262
263struct mxser_mon_ext {
264 unsigned long rx_cnt[32];
265 unsigned long tx_cnt[32];
266 unsigned long up_rxcnt[32];
267 unsigned long up_txcnt[32];
268 int modem_status[32];
269
270 long baudrate[32];
271 int databits[32];
272 int stopbits[32];
273 int parity[32];
274 int flowctrl[32];
275 int fifo[32];
276 int iftype[32];
277};
278
55b307da
JS		 279struct mxser_board;
280
281struct mxser_port {
282 struct mxser_board *board;
283 struct tty_struct *tty;
284
285 unsigned long ioaddr;
286 unsigned long opmode_ioaddr;
287 int max_baud;
037ad48b 288
037ad48b
JS		 289 int rx_high_water;
290 int rx_trigger; /* Rx fifo trigger level */
291 int rx_low_water;
292 int baud_base; /* max. speed */
55b307da 293 long realbaud;
037ad48b 294 int type; /* UART type */
55b307da
JS		 295 int flags; /* defined in tty.h */
296 long session; /* Session of opening process */
297 long pgrp; /* pgrp of opening process */
298
037ad48b 299 int x_char; /* xon/xoff character */
037ad48b
JS		 300 int IER; /* Interrupt Enable Register */
301 int MCR; /* Modem control register */
55b307da
JS		 302
303 unsigned char stop_rx;
304 unsigned char ldisc_stop_rx;
305
306 int custom_divisor;
307 int close_delay;
308 unsigned short closing_wait;
309 unsigned char err_shadow;
037ad48b 310 unsigned long event;
55b307da 311
037ad48b
JS		 312 int count; /* # of fd on device */
313 int blocked_open; /* # of blocked opens */
55b307da
JS		 314 struct async_icount icount; /* kernel counters for 4 input interrupts */
315 int timeout;
316
317 int read_status_mask;
318 int ignore_status_mask;
319 int xmit_fifo_size;
037ad48b
JS		 320 unsigned char *xmit_buf;
321 int xmit_head;
322 int xmit_tail;
323 int xmit_cnt;
55b307da 324
037ad48b
JS		 325 struct termios normal_termios;
326 struct termios callout_termios;
55b307da
JS		 327
328 struct mxser_mon mon_data;
329
330 spinlock_t slock;
331 struct work_struct tqueue;
037ad48b
JS		 332 wait_queue_head_t open_wait;
333 wait_queue_head_t close_wait;
334 wait_queue_head_t delta_msr_wait;
55b307da
JS		 335};
336
337struct mxser_board {
338 struct pci_dev *pdev; /* temporary (until pci probing) */
339
340 int irq;
341 int board_type;
342 unsigned int nports;
343 unsigned long vector;
344 unsigned long vector_mask;
345
346 int chip_flag;
347 int uart_type;
348
349 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
037ad48b
JS		 350};
351
352struct mxser_mstatus {
353 tcflag_t cflag;
354 int cts;
355 int dsr;
356 int ri;
357 int dcd;
358};
359
360static struct mxser_mstatus GMStatus[MXSER_PORTS];
361
362static int mxserBoardCAP[MXSER_BOARDS] = {
363 0, 0, 0, 0
364 /* 0x180, 0x280, 0x200, 0x320 */
365};
366
55b307da 367static struct mxser_board mxser_boards[MXSER_BOARDS];
037ad48b 368static struct tty_driver *mxvar_sdriver;
037ad48b
JS		 369static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
370static struct termios *mxvar_termios[MXSER_PORTS + 1];
371static struct termios *mxvar_termios_locked[MXSER_PORTS + 1];
372static struct mxser_log mxvar_log;
373static int mxvar_diagflag;
374static unsigned char mxser_msr[MXSER_PORTS + 1];
375static struct mxser_mon_ext mon_data_ext;
376static int mxser_set_baud_method[MXSER_PORTS + 1];
377static spinlock_t gm_lock;
378
037ad48b
JS		 379static int CheckIsMoxaMust(int io)
380{
381 u8 oldmcr, hwid;
382 int i;
383
384 outb(0, io + UART_LCR);
385 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
386 oldmcr = inb(io + UART_MCR);
387 outb(0, io + UART_MCR);
388 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
389 if ((hwid = inb(io + UART_MCR)) != 0) {
390 outb(oldmcr, io + UART_MCR);
391 return MOXA_OTHER_UART;
392 }
393
394 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
395 for (i = 0; i < UART_TYPE_NUM; i++) {
396 if (hwid == Gmoxa_uart_id[i])
397 return (int)hwid;
398 }
399 return MOXA_OTHER_UART;
400}
401
402/* above is modified by Victor Yu. 08-15-2002 */
403
55b307da 404static void process_txrx_fifo(struct mxser_port *info)
037ad48b
JS		 405{
406 int i;
407
408 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
409 info->rx_trigger = 1;
410 info->rx_high_water = 1;
411 info->rx_low_water = 1;
412 info->xmit_fifo_size = 1;
55b307da
JS		 413 } else
414 for (i = 0; i < UART_INFO_NUM; i++)
415 if (info->board->chip_flag == Gpci_uart_info[i].type) {
037ad48b
JS		 416 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
417 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
418 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
419 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
420 break;
421 }
037ad48b
JS		 422}
423
a8dea4ec 424static void mxser_do_softint(void *private_)
037ad48b 425{
a8dea4ec
JS		 426 struct mxser_port *info = private_;
427 struct tty_struct *tty;
037ad48b 428
a8dea4ec 429 tty = info->tty;
037ad48b 430
a8dea4ec
JS		 431 if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
432 tty_wakeup(tty);
433 if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
434 tty_hangup(tty);
435}
037ad48b 436
a8dea4ec
JS		 437static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
438{
439 unsigned char status = 0;
037ad48b 440
a8dea4ec 441 status = inb(baseaddr + UART_MSR);
037ad48b 442
a8dea4ec
JS		 443 mxser_msr[port] &= 0x0F;
444 mxser_msr[port] |= status;
445 status = mxser_msr[port];
446 if (mode)
447 mxser_msr[port] = 0;
037ad48b 448
a8dea4ec
JS		 449 return status;
450}
55b307da 451
a8dea4ec
JS		 452static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
453 struct mxser_port *port)
454{
455 DECLARE_WAITQUEUE(wait, current);
456 int retval;
457 int do_clocal = 0;
458 unsigned long flags;
459
460 /*
461 * If non-blocking mode is set, or the port is not enabled,
462 * then make the check up front and then exit.
463 */
464 if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
465 port->flags |= ASYNC_NORMAL_ACTIVE;
466 return 0;
037ad48b 467 }
a8dea4ec
JS		 468
469 if (tty->termios->c_cflag & CLOCAL)
470 do_clocal = 1;
471
037ad48b 472 /*
a8dea4ec
JS		 473 * Block waiting for the carrier detect and the line to become
474 * free (i.e., not in use by the callout). While we are in
475 * this loop, port->count is dropped by one, so that
476 * mxser_close() knows when to free things. We restore it upon
477 * exit, either normal or abnormal.
037ad48b 478 */
a8dea4ec
JS		 479 retval = 0;
480 add_wait_queue(&port->open_wait, &wait);
037ad48b 481
a8dea4ec
JS		 482 spin_lock_irqsave(&port->slock, flags);
483 if (!tty_hung_up_p(filp))
484 port->count--;
485 spin_unlock_irqrestore(&port->slock, flags);
486 port->blocked_open++;
487 while (1) {
488 spin_lock_irqsave(&port->slock, flags);
489 outb(inb(port->ioaddr + UART_MCR) |
490 UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
491 spin_unlock_irqrestore(&port->slock, flags);
492 set_current_state(TASK_INTERRUPTIBLE);
493 if (tty_hung_up_p(filp) || !(port->flags & ASYNC_INITIALIZED)) {
494 if (port->flags & ASYNC_HUP_NOTIFY)
495 retval = -EAGAIN;
496 else
497 retval = -ERESTARTSYS;
498 break;
499 }
500 if (!(port->flags & ASYNC_CLOSING) &&
501 (do_clocal ||
502 (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
503 break;
504 if (signal_pending(current)) {
505 retval = -ERESTARTSYS;
506 break;
507 }
508 schedule();
037ad48b 509 }
a8dea4ec
JS		 510 set_current_state(TASK_RUNNING);
511 remove_wait_queue(&port->open_wait, &wait);
512 if (!tty_hung_up_p(filp))
513 port->count++;
514 port->blocked_open--;
515 if (retval)
516 return retval;
517 port->flags |= ASYNC_NORMAL_ACTIVE;
037ad48b
JS		 518 return 0;
519}
520
a8dea4ec 521static int mxser_set_baud(struct mxser_port *info, long newspd)
037ad48b 522{
a8dea4ec
JS		 523 int quot = 0;
524 unsigned char cval;
525 int ret = 0;
526 unsigned long flags;
037ad48b 527
a8dea4ec
JS		 528 if (!info->tty || !info->tty->termios)
529 return ret;
037ad48b 530
a8dea4ec
JS		 531 if (!(info->ioaddr))
532 return ret;
037ad48b 533
a8dea4ec
JS		 534 if (newspd > info->max_baud)
535 return 0;
037ad48b 536
a8dea4ec
JS		 537 info->realbaud = newspd;
538 if (newspd == 134) {
539 quot = (2 * info->baud_base / 269);
540 } else if (newspd) {
541 quot = info->baud_base / newspd;
542 if (quot == 0)
543 quot = 1;
544 } else {
545 quot = 0;
037ad48b
JS		 546 }
547
a8dea4ec
JS		 548 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
549 info->timeout += HZ / 50; /* Add .02 seconds of slop */
037ad48b 550
a8dea4ec
JS		 551 if (quot) {
552 spin_lock_irqsave(&info->slock, flags);
553 info->MCR |= UART_MCR_DTR;
554 outb(info->MCR, info->ioaddr + UART_MCR);
555 spin_unlock_irqrestore(&info->slock, flags);
556 } else {
557 spin_lock_irqsave(&info->slock, flags);
558 info->MCR &= ~UART_MCR_DTR;
559 outb(info->MCR, info->ioaddr + UART_MCR);
560 spin_unlock_irqrestore(&info->slock, flags);
561 return ret;
037ad48b 562 }
037ad48b 563
a8dea4ec 564 cval = inb(info->ioaddr + UART_LCR);
037ad48b 565
a8dea4ec 566 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
037ad48b 567
a8dea4ec
JS		 568 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
569 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
570 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
037ad48b 571
037ad48b 572
a8dea4ec
JS		 573 return ret;
574}
037ad48b 575
a8dea4ec
JS		 576/*
577 * This routine is called to set the UART divisor registers to match
578 * the specified baud rate for a serial port.
579 */
580static int mxser_change_speed(struct mxser_port *info,
581 struct termios *old_termios)
582{
583 unsigned cflag, cval, fcr;
584 int ret = 0;
585 unsigned char status;
586 long baud;
587 unsigned long flags;
037ad48b 588
a8dea4ec
JS		 589 if (!info->tty || !info->tty->termios)
590 return ret;
591 cflag = info->tty->termios->c_cflag;
592 if (!(info->ioaddr))
593 return ret;
037ad48b 594
a8dea4ec
JS		 595#ifndef B921600
596#define B921600 (B460800 +1)
597#endif
598 if (mxser_set_baud_method[info->tty->index] == 0) {
599 baud = tty_get_baud_rate(info->tty);
600 mxser_set_baud(info, baud);
601 }
037ad48b 602
a8dea4ec
JS		 603 /* byte size and parity */
604 switch (cflag & CSIZE) {
605 case CS5:
606 cval = 0x00;
607 break;
608 case CS6:
609 cval = 0x01;
610 break;
611 case CS7:
612 cval = 0x02;
613 break;
614 case CS8:
615 cval = 0x03;
616 break;
617 default:
618 cval = 0x00;
619 break; /* too keep GCC shut... */
620 }
621 if (cflag & CSTOPB)
622 cval |= 0x04;
623 if (cflag & PARENB)
624 cval |= UART_LCR_PARITY;
625 if (!(cflag & PARODD))
626 cval |= UART_LCR_EPAR;
627 if (cflag & CMSPAR)
628 cval |= UART_LCR_SPAR;
037ad48b 629
a8dea4ec
JS		 630 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
631 if (info->board->chip_flag) {
632 fcr = UART_FCR_ENABLE_FIFO;
633 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
634 SET_MOXA_MUST_FIFO_VALUE(info);
635 } else
636 fcr = 0;
637 } else {
638 fcr = UART_FCR_ENABLE_FIFO;
639 /* following add by Victor Yu. 08-30-2002 */
640 if (info->board->chip_flag) {
641 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
642 SET_MOXA_MUST_FIFO_VALUE(info);
643 } else {
644 /* above add by Victor Yu. 08-30-2002 */
645 switch (info->rx_trigger) {
646 case 1:
647 fcr |= UART_FCR_TRIGGER_1;
648 break;
649 case 4:
650 fcr |= UART_FCR_TRIGGER_4;
651 break;
652 case 8:
653 fcr |= UART_FCR_TRIGGER_8;
654 break;
655 default:
656 fcr |= UART_FCR_TRIGGER_14;
657 break;
658 }
037ad48b 659 }
037ad48b
JS		 660 }
661
a8dea4ec
JS		 662 /* CTS flow control flag and modem status interrupts */
663 info->IER &= ~UART_IER_MSI;
664 info->MCR &= ~UART_MCR_AFE;
665 if (cflag & CRTSCTS) {
666 info->flags |= ASYNC_CTS_FLOW;
667 info->IER |= UART_IER_MSI;
668 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
669 info->MCR |= UART_MCR_AFE;
670/* status = mxser_get_msr(info->ioaddr, 0, info->port); */
671/*
672 save_flags(flags);
673 cli();
674 status = inb(baseaddr + UART_MSR);
675 restore_flags(flags);
676*/
677 /* mxser_check_modem_status(info, status); */
678 } else {
679/* status = mxser_get_msr(info->ioaddr, 0, info->port); */
680 /* MX_LOCK(&info->slock); */
681 status = inb(info->ioaddr + UART_MSR);
682 /* MX_UNLOCK(&info->slock); */
683 if (info->tty->hw_stopped) {
684 if (status & UART_MSR_CTS) {
685 info->tty->hw_stopped = 0;
686 if (info->type != PORT_16550A &&
687 !info->board->chip_flag) {
688 outb(info->IER & ~UART_IER_THRI,
689 info->ioaddr +
690 UART_IER);
691 info->IER |= UART_IER_THRI;
692 outb(info->IER, info->ioaddr +
693 UART_IER);
694 }
695 set_bit(MXSER_EVENT_TXLOW, &info->event);
696 schedule_work(&info->tqueue); }
697 } else {
698 if (!(status & UART_MSR_CTS)) {
699 info->tty->hw_stopped = 1;
700 if ((info->type != PORT_16550A) &&
701 (!info->board->chip_flag)) {
702 info->IER &= ~UART_IER_THRI;
703 outb(info->IER, info->ioaddr +
704 UART_IER);
705 }
706 }
707 }
708 }
709 } else {
710 info->flags &= ~ASYNC_CTS_FLOW;
711 }
712 outb(info->MCR, info->ioaddr + UART_MCR);
713 if (cflag & CLOCAL) {
714 info->flags &= ~ASYNC_CHECK_CD;
715 } else {
716 info->flags |= ASYNC_CHECK_CD;
717 info->IER |= UART_IER_MSI;
718 }
719 outb(info->IER, info->ioaddr + UART_IER);
037ad48b 720
a8dea4ec
JS		 721 /*
722 * Set up parity check flag
723 */
724 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
725 if (I_INPCK(info->tty))
726 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
727 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
728 info->read_status_mask |= UART_LSR_BI;
037ad48b 729
a8dea4ec 730 info->ignore_status_mask = 0;
037ad48b 731
a8dea4ec
JS		 732 if (I_IGNBRK(info->tty)) {
733 info->ignore_status_mask |= UART_LSR_BI;
734 info->read_status_mask |= UART_LSR_BI;
735 /*
736 * If we're ignore parity and break indicators, ignore
737 * overruns too. (For real raw support).
738 */
739 if (I_IGNPAR(info->tty)) {
740 info->ignore_status_mask |=
741 UART_LSR_OE |
742 UART_LSR_PE |
743 UART_LSR_FE;
744 info->read_status_mask |=
745 UART_LSR_OE |
746 UART_LSR_PE |
747 UART_LSR_FE;
037ad48b 748 }
037ad48b 749 }
a8dea4ec
JS		 750 /* following add by Victor Yu. 09-02-2002 */
751 if (info->board->chip_flag) {
752 spin_lock_irqsave(&info->slock, flags);
753 SET_MOXA_MUST_XON1_VALUE(info->ioaddr, START_CHAR(info->tty));
754 SET_MOXA_MUST_XOFF1_VALUE(info->ioaddr, STOP_CHAR(info->tty));
755 if (I_IXON(info->tty)) {
756 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
757 } else {
758 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
037ad48b 759 }
a8dea4ec
JS		 760 if (I_IXOFF(info->tty)) {
761 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
762 } else {
763 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
037ad48b 764 }
a8dea4ec
JS		 765 /*
766 if ( I_IXANY(info->tty) ) {
767 info->MCR |= MOXA_MUST_MCR_XON_ANY;
768 ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->ioaddr);
769 } else {
770 info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
771 DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->ioaddr);
772 }
773 */
774 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 775 }
a8dea4ec 776 /* above add by Victor Yu. 09-02-2002 */
037ad48b 777
037ad48b 778
a8dea4ec
JS		 779 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
780 outb(cval, info->ioaddr + UART_LCR);
037ad48b 781
a8dea4ec 782 return ret;
037ad48b
JS		 783}
784
a8dea4ec 785static void mxser_check_modem_status(struct mxser_port *port, int status)
037ad48b 786{
a8dea4ec
JS		 787 /* update input line counters */
788 if (status & UART_MSR_TERI)
789 port->icount.rng++;
790 if (status & UART_MSR_DDSR)
791 port->icount.dsr++;
792 if (status & UART_MSR_DDCD)
793 port->icount.dcd++;
794 if (status & UART_MSR_DCTS)
795 port->icount.cts++;
796 port->mon_data.modem_status = status;
797 wake_up_interruptible(&port->delta_msr_wait);
037ad48b 798
a8dea4ec
JS		 799 if ((port->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
800 if (status & UART_MSR_DCD)
801 wake_up_interruptible(&port->open_wait);
802 schedule_work(&port->tqueue);
803 }
037ad48b 804
a8dea4ec
JS		 805 if (port->flags & ASYNC_CTS_FLOW) {
806 if (port->tty->hw_stopped) {
807 if (status & UART_MSR_CTS) {
808 port->tty->hw_stopped = 0;
809
810 if ((port->type != PORT_16550A) &&
811 (!port->board->chip_flag)) {
812 outb(port->IER & ~UART_IER_THRI,
813 port->ioaddr + UART_IER);
814 port->IER |= UART_IER_THRI;
815 outb(port->IER, port->ioaddr +
816 UART_IER);
817 }
818 set_bit(MXSER_EVENT_TXLOW, &port->event);
819 schedule_work(&port->tqueue);
820 }
821 } else {
822 if (!(status & UART_MSR_CTS)) {
823 port->tty->hw_stopped = 1;
824 if (port->type != PORT_16550A &&
825 !port->board->chip_flag) {
826 port->IER &= ~UART_IER_THRI;
827 outb(port->IER, port->ioaddr +
828 UART_IER);
829 }
830 }
831 }
832 }
037ad48b
JS		 833}
834
a8dea4ec 835static int mxser_startup(struct mxser_port *info)
037ad48b 836{
a8dea4ec
JS		 837 unsigned long page;
838 unsigned long flags;
037ad48b 839
a8dea4ec
JS		 840 page = __get_free_page(GFP_KERNEL);
841 if (!page)
842 return -ENOMEM;
037ad48b 843
a8dea4ec 844 spin_lock_irqsave(&info->slock, flags);
037ad48b 845
a8dea4ec
JS		 846 if (info->flags & ASYNC_INITIALIZED) {
847 free_page(page);
848 spin_unlock_irqrestore(&info->slock, flags);
849 return 0;
850 }
037ad48b 851
a8dea4ec
JS		 852 if (!info->ioaddr || !info->type) {
853 if (info->tty)
854 set_bit(TTY_IO_ERROR, &info->tty->flags);
855 free_page(page);
856 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 857 return 0;
a8dea4ec
JS		 858 }
859 if (info->xmit_buf)
860 free_page(page);
861 else
862 info->xmit_buf = (unsigned char *) page;
037ad48b 863
037ad48b 864 /*
a8dea4ec
JS		 865 * Clear the FIFO buffers and disable them
866 * (they will be reenabled in mxser_change_speed())
037ad48b 867 */
a8dea4ec
JS		 868 if (info->board->chip_flag)
869 outb((UART_FCR_CLEAR_RCVR |
870 UART_FCR_CLEAR_XMIT |
871 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
872 else
873 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
874 info->ioaddr + UART_FCR);
875
876 /*
877 * At this point there's no way the LSR could still be 0xFF;
878 * if it is, then bail out, because there's likely no UART
879 * here.
880 */
881 if (inb(info->ioaddr + UART_LSR) == 0xff) {
882 spin_unlock_irqrestore(&info->slock, flags);
883 if (capable(CAP_SYS_ADMIN)) {
884 if (info->tty)
885 set_bit(TTY_IO_ERROR, &info->tty->flags);
886 return 0;
887 } else
888 return -ENODEV;
889 }
890
891 /*
892 * Clear the interrupt registers.
893 */
894 (void) inb(info->ioaddr + UART_LSR);
895 (void) inb(info->ioaddr + UART_RX);
896 (void) inb(info->ioaddr + UART_IIR);
897 (void) inb(info->ioaddr + UART_MSR);
898
899 /*
900 * Now, initialize the UART
901 */
902 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
903 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
904 outb(info->MCR, info->ioaddr + UART_MCR);
905
906 /*
907 * Finally, enable interrupts
908 */
909 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
910 /* info->IER = UART_IER_RLSI | UART_IER_RDI; */
911
912 /* following add by Victor Yu. 08-30-2002 */
913 if (info->board->chip_flag)
914 info->IER |= MOXA_MUST_IER_EGDAI;
915 /* above add by Victor Yu. 08-30-2002 */
916 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
917
918 /*
919 * And clear the interrupt registers again for luck.
920 */
921 (void) inb(info->ioaddr + UART_LSR);
922 (void) inb(info->ioaddr + UART_RX);
923 (void) inb(info->ioaddr + UART_IIR);
924 (void) inb(info->ioaddr + UART_MSR);
925
926 if (info->tty)
927 clear_bit(TTY_IO_ERROR, &info->tty->flags);
928 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
929
930 /*
931 * and set the speed of the serial port
932 */
933 spin_unlock_irqrestore(&info->slock, flags);
934 mxser_change_speed(info, NULL);
935
936 info->flags |= ASYNC_INITIALIZED;
937 return 0;
938}
939
940/*
941 * This routine will shutdown a serial port; interrupts maybe disabled, and
942 * DTR is dropped if the hangup on close termio flag is on.
943 */
944static void mxser_shutdown(struct mxser_port *info)
945{
946 unsigned long flags;
947
948 if (!(info->flags & ASYNC_INITIALIZED))
949 return;
950
951 spin_lock_irqsave(&info->slock, flags);
952
953 /*
954 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
955 * here so the queue might never be waken up
956 */
957 wake_up_interruptible(&info->delta_msr_wait);
958
959 /*
960 * Free the IRQ, if necessary
961 */
962 if (info->xmit_buf) {
963 free_page((unsigned long) info->xmit_buf);
964 info->xmit_buf = NULL;
965 }
966
967 info->IER = 0;
968 outb(0x00, info->ioaddr + UART_IER);
969
970 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
971 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
972 outb(info->MCR, info->ioaddr + UART_MCR);
973
974 /* clear Rx/Tx FIFO's */
975 /* following add by Victor Yu. 08-30-2002 */
976 if (info->board->chip_flag)
977 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
978 MOXA_MUST_FCR_GDA_MODE_ENABLE,
979 info->ioaddr + UART_FCR);
980 else
981 /* above add by Victor Yu. 08-30-2002 */
982 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
983 info->ioaddr + UART_FCR);
984
985 /* read data port to reset things */
986 (void) inb(info->ioaddr + UART_RX);
987
988 if (info->tty)
989 set_bit(TTY_IO_ERROR, &info->tty->flags);
990
991 info->flags &= ~ASYNC_INITIALIZED;
992
993 /* following add by Victor Yu. 09-23-2002 */
994 if (info->board->chip_flag)
995 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
996 /* above add by Victor Yu. 09-23-2002 */
997
998 spin_unlock_irqrestore(&info->slock, flags);
999}
1000
1001/*
1002 * This routine is called whenever a serial port is opened. It
1003 * enables interrupts for a serial port, linking in its async structure into
1004 * the IRQ chain. It also performs the serial-specific
1005 * initialization for the tty structure.
1006 */
1007static int mxser_open(struct tty_struct *tty, struct file *filp)
1008{
1009 struct mxser_port *info;
1010 int retval, line;
1011
1012 /* initialize driver_data in case something fails */
1013 tty->driver_data = NULL;
1014
1015 line = tty->index;
1016 if (line == MXSER_PORTS)
1017 return 0;
1018 if (line < 0 || line > MXSER_PORTS)
1019 return -ENODEV;
1020 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1021 if (!info->ioaddr)
1022 return -ENODEV;
1023
1024 tty->driver_data = info;
1025 info->tty = tty;
1026 /*
1027 * Start up serial port
1028 */
1029 info->count++;
1030 retval = mxser_startup(info);
1031 if (retval)
1032 return retval;
1033
1034 retval = mxser_block_til_ready(tty, filp, info);
1035 if (retval)
1036 return retval;
1037
1038 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
037ad48b
JS		 1039 if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
1040 *tty->termios = info->normal_termios;
1041 else
1042 *tty->termios = info->callout_termios;
1043 mxser_change_speed(info, NULL);
1044 }
1045
08a4ae44 1046 info->session = process_session(current);
037ad48b
JS		 1047 info->pgrp = process_group(current);
1048
1049 /*
1050 status = mxser_get_msr(info->base, 0, info->port);
1051 mxser_check_modem_status(info, status);
1052 */
1053
1054/* unmark here for very high baud rate (ex. 921600 bps) used */
1055 tty->low_latency = 1;
1056 return 0;
1057}
1058
1059/*
1060 * This routine is called when the serial port gets closed. First, we
1061 * wait for the last remaining data to be sent. Then, we unlink its
1062 * async structure from the interrupt chain if necessary, and we free
1063 * that IRQ if nothing is left in the chain.
1064 */
1065static void mxser_close(struct tty_struct *tty, struct file *filp)
1066{
55b307da 1067 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1068
1069 unsigned long timeout;
1070 unsigned long flags;
1071 struct tty_ldisc *ld;
1072
1073 if (tty->index == MXSER_PORTS)
1074 return;
1075 if (!info)
1076 return;
1077
1078 spin_lock_irqsave(&info->slock, flags);
1079
1080 if (tty_hung_up_p(filp)) {
1081 spin_unlock_irqrestore(&info->slock, flags);
1082 return;
1083 }
1084 if ((tty->count == 1) && (info->count != 1)) {
1085 /*
1086 * Uh, oh. tty->count is 1, which means that the tty
1087 * structure will be freed. Info->count should always
1088 * be one in these conditions. If it's greater than
1089 * one, we've got real problems, since it means the
1090 * serial port won't be shutdown.
1091 */
1092 printk(KERN_ERR "mxser_close: bad serial port count; "
1093 "tty->count is 1, info->count is %d\n", info->count);
1094 info->count = 1;
1095 }
1096 if (--info->count < 0) {
1097 printk(KERN_ERR "mxser_close: bad serial port count for "
55b307da 1098 "ttys%d: %d\n", tty->index, info->count);
037ad48b
JS		 1099 info->count = 0;
1100 }
1101 if (info->count) {
1102 spin_unlock_irqrestore(&info->slock, flags);
1103 return;
1104 }
1105 info->flags |= ASYNC_CLOSING;
1106 spin_unlock_irqrestore(&info->slock, flags);
1107 /*
1108 * Save the termios structure, since this port may have
1109 * separate termios for callout and dialin.
1110 */
1111 if (info->flags & ASYNC_NORMAL_ACTIVE)
1112 info->normal_termios = *tty->termios;
1113 /*
1114 * Now we wait for the transmit buffer to clear; and we notify
1115 * the line discipline to only process XON/XOFF characters.
1116 */
1117 tty->closing = 1;
1118 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1119 tty_wait_until_sent(tty, info->closing_wait);
1120 /*
1121 * At this point we stop accepting input. To do this, we
1122 * disable the receive line status interrupts, and tell the
1123 * interrupt driver to stop checking the data ready bit in the
1124 * line status register.
1125 */
1126 info->IER &= ~UART_IER_RLSI;
55b307da 1127 if (info->board->chip_flag)
037ad48b
JS		 1128 info->IER &= ~MOXA_MUST_RECV_ISR;
1129/* by William
1130 info->read_status_mask &= ~UART_LSR_DR;
1131*/
1132 if (info->flags & ASYNC_INITIALIZED) {
55b307da 1133 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1134 /*
1135 * Before we drop DTR, make sure the UART transmitter
1136 * has completely drained; this is especially
1137 * important if there is a transmit FIFO!
1138 */
1139 timeout = jiffies + HZ;
55b307da 1140 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
037ad48b
JS		 1141 schedule_timeout_interruptible(5);
1142 if (time_after(jiffies, timeout))
1143 break;
1144 }
1145 }
1146 mxser_shutdown(info);
1147
1148 if (tty->driver->flush_buffer)
1149 tty->driver->flush_buffer(tty);
1150
1151 ld = tty_ldisc_ref(tty);
1152 if (ld) {
1153 if (ld->flush_buffer)
1154 ld->flush_buffer(tty);
1155 tty_ldisc_deref(ld);
1156 }
1157
1158 tty->closing = 0;
1159 info->event = 0;
1160 info->tty = NULL;
1161 if (info->blocked_open) {
1162 if (info->close_delay)
1163 schedule_timeout_interruptible(info->close_delay);
1164 wake_up_interruptible(&info->open_wait);
1165 }
1166
1167 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1168 wake_up_interruptible(&info->close_wait);
1169
1170}
1171
1172static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1173{
1174 int c, total = 0;
55b307da 1175 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1176 unsigned long flags;
1177
1178 if (!info->xmit_buf)
1179 return 0;
1180
1181 while (1) {
1182 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1183 SERIAL_XMIT_SIZE - info->xmit_head));
1184 if (c <= 0)
1185 break;
1186
1187 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1188 spin_lock_irqsave(&info->slock, flags);
1189 info->xmit_head = (info->xmit_head + c) &
1190 (SERIAL_XMIT_SIZE - 1);
1191 info->xmit_cnt += c;
1192 spin_unlock_irqrestore(&info->slock, flags);
1193
1194 buf += c;
1195 count -= c;
1196 total += c;
1197 }
1198
3306ce3d
JS		 1199 if (info->xmit_cnt && !tty->stopped
1200 /*&& !(info->IER & UART_IER_THRI)*/) {
037ad48b
JS		 1201 if (!tty->hw_stopped ||
1202 (info->type == PORT_16550A) ||
55b307da 1203 (info->board->chip_flag)) {
037ad48b 1204 spin_lock_irqsave(&info->slock, flags);
55b307da
JS		 1205 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1206 UART_IER);
037ad48b 1207 info->IER |= UART_IER_THRI;
55b307da 1208 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1209 spin_unlock_irqrestore(&info->slock, flags);
1210 }
1211 }
1212 return total;
1213}
1214
1215static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1216{
55b307da 1217 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1218 unsigned long flags;
1219
1220 if (!info->xmit_buf)
1221 return;
1222
1223 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1224 return;
1225
1226 spin_lock_irqsave(&info->slock, flags);
1227 info->xmit_buf[info->xmit_head++] = ch;
1228 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1229 info->xmit_cnt++;
1230 spin_unlock_irqrestore(&info->slock, flags);
3306ce3d 1231 if (!tty->stopped /*&& !(info->IER & UART_IER_THRI)*/) {
037ad48b
JS		 1232 if (!tty->hw_stopped ||
1233 (info->type == PORT_16550A) ||
55b307da 1234 info->board->chip_flag) {
037ad48b 1235 spin_lock_irqsave(&info->slock, flags);
55b307da 1236 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
037ad48b 1237 info->IER |= UART_IER_THRI;
55b307da 1238 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1239 spin_unlock_irqrestore(&info->slock, flags);
1240 }
1241 }
1242}
1243
1244
1245static void mxser_flush_chars(struct tty_struct *tty)
1246{
55b307da 1247 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1248 unsigned long flags;
1249
1250 if (info->xmit_cnt <= 0 ||
1251 tty->stopped ||
1252 !info->xmit_buf ||
1253 (tty->hw_stopped &&
1254 (info->type != PORT_16550A) &&
55b307da 1255 (!info->board->chip_flag)
037ad48b
JS		 1256 ))
1257 return;
1258
1259 spin_lock_irqsave(&info->slock, flags);
1260
55b307da 1261 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
037ad48b 1262 info->IER |= UART_IER_THRI;
55b307da 1263 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1264
1265 spin_unlock_irqrestore(&info->slock, flags);
1266}
1267
1268static int mxser_write_room(struct tty_struct *tty)
1269{
55b307da 1270 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1271 int ret;
1272
1273 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1274 if (ret < 0)
1275 ret = 0;
1276 return ret;
1277}
1278
1279static int mxser_chars_in_buffer(struct tty_struct *tty)
1280{
55b307da 1281 struct mxser_port *info = tty->driver_data;
3306ce3d
JS		 1282 int len = info->xmit_cnt;
1283
55b307da 1284 if (!(inb(info->ioaddr + UART_LSR) & UART_LSR_THRE))
3306ce3d
JS		 1285 len++;
1286
1287 return len;
037ad48b
JS		 1288}
1289
1290static void mxser_flush_buffer(struct tty_struct *tty)
1291{
55b307da 1292 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1293 char fcr;
1294 unsigned long flags;
1295
1296
1297 spin_lock_irqsave(&info->slock, flags);
1298 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1299
1300 /* below added by shinhay */
55b307da 1301 fcr = inb(info->ioaddr + UART_FCR);
037ad48b 1302 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
55b307da
JS		 1303 info->ioaddr + UART_FCR);
1304 outb(fcr, info->ioaddr + UART_FCR);
037ad48b
JS		 1305
1306 spin_unlock_irqrestore(&info->slock, flags);
1307 /* above added by shinhay */
1308
1309 wake_up_interruptible(&tty->write_wait);
1310 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && tty->ldisc.write_wakeup)
1311 (tty->ldisc.write_wakeup) (tty);
1312}
1313
a8dea4ec
JS		 1314/*
1315 * ------------------------------------------------------------
1316 * friends of mxser_ioctl()
1317 * ------------------------------------------------------------
1318 */
1319static int mxser_get_serial_info(struct mxser_port *info,
1320 struct serial_struct __user *retinfo)
037ad48b 1321{
a8dea4ec 1322 struct serial_struct tmp;
037ad48b 1323
a8dea4ec
JS		 1324 if (!retinfo)
1325 return -EFAULT;
1326 memset(&tmp, 0, sizeof(tmp));
1327 tmp.type = info->type;
1328 tmp.line = info->tty->index;
1329 tmp.port = info->ioaddr;
1330 tmp.irq = info->board->irq;
1331 tmp.flags = info->flags;
1332 tmp.baud_base = info->baud_base;
1333 tmp.close_delay = info->close_delay;
1334 tmp.closing_wait = info->closing_wait;
1335 tmp.custom_divisor = info->custom_divisor;
1336 tmp.hub6 = 0;
1337 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1338 return -EFAULT;
1339 return 0;
1340}
037ad48b 1341
a8dea4ec
JS		 1342static int mxser_set_serial_info(struct mxser_port *info,
1343 struct serial_struct __user *new_info)
1344{
1345 struct serial_struct new_serial;
1346 unsigned int flags;
1347 int retval = 0;
037ad48b 1348
a8dea4ec
JS		 1349 if (!new_info || !info->ioaddr)
1350 return -EFAULT;
1351 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1352 return -EFAULT;
037ad48b 1353
a8dea4ec
JS		 1354 if ((new_serial.irq != info->board->irq) ||
1355 (new_serial.port != info->ioaddr) ||
1356 (new_serial.custom_divisor != info->custom_divisor) ||
1357 (new_serial.baud_base != info->baud_base))
1358 return -EPERM;
037ad48b 1359
a8dea4ec
JS		 1360 flags = info->flags & ASYNC_SPD_MASK;
1361
1362 if (!capable(CAP_SYS_ADMIN)) {
1363 if ((new_serial.baud_base != info->baud_base) ||
1364 (new_serial.close_delay != info->close_delay) ||
1365 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
1366 return -EPERM;
1367 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
1368 (new_serial.flags & ASYNC_USR_MASK));
1369 } else {
037ad48b 1370 /*
a8dea4ec
JS		 1371 * OK, past this point, all the error checking has been done.
1372 * At this point, we start making changes.....
037ad48b 1373 */
a8dea4ec
JS		 1374 info->flags = ((info->flags & ~ASYNC_FLAGS) |
1375 (new_serial.flags & ASYNC_FLAGS));
1376 info->close_delay = new_serial.close_delay * HZ / 100;
1377 info->closing_wait = new_serial.closing_wait * HZ / 100;
1378 info->tty->low_latency =
1379 (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1380 info->tty->low_latency = 0; /* (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; */
1381 }
037ad48b 1382
a8dea4ec
JS		 1383 /* added by casper, 3/17/2000, for mouse */
1384 info->type = new_serial.type;
037ad48b 1385
a8dea4ec
JS		 1386 process_txrx_fifo(info);
1387
1388 if (info->flags & ASYNC_INITIALIZED) {
1389 if (flags != (info->flags & ASYNC_SPD_MASK))
1390 mxser_change_speed(info, NULL);
1391 } else
1392 retval = mxser_startup(info);
1393
1394 return retval;
1395}
037ad48b 1396
a8dea4ec
JS		 1397/*
1398 * mxser_get_lsr_info - get line status register info
1399 *
1400 * Purpose: Let user call ioctl() to get info when the UART physically
1401 * is emptied. On bus types like RS485, the transmitter must
1402 * release the bus after transmitting. This must be done when
1403 * the transmit shift register is empty, not be done when the
1404 * transmit holding register is empty. This functionality
1405 * allows an RS485 driver to be written in user space.
1406 */
1407static int mxser_get_lsr_info(struct mxser_port *info,
1408 unsigned int __user *value)
1409{
1410 unsigned char status;
1411 unsigned int result;
1412 unsigned long flags;
037ad48b 1413
a8dea4ec
JS		 1414 spin_lock_irqsave(&info->slock, flags);
1415 status = inb(info->ioaddr + UART_LSR);
1416 spin_unlock_irqrestore(&info->slock, flags);
1417 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1418 return put_user(result, value);
1419}
037ad48b 1420
a8dea4ec
JS		 1421/*
1422 * This routine sends a break character out the serial port.
1423 */
1424static void mxser_send_break(struct mxser_port *info, int duration)
1425{
1426 unsigned long flags;
037ad48b 1427
a8dea4ec
JS		 1428 if (!info->ioaddr)
1429 return;
1430 set_current_state(TASK_INTERRUPTIBLE);
1431 spin_lock_irqsave(&info->slock, flags);
1432 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
1433 info->ioaddr + UART_LCR);
1434 spin_unlock_irqrestore(&info->slock, flags);
1435 schedule_timeout(duration);
1436 spin_lock_irqsave(&info->slock, flags);
1437 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
1438 info->ioaddr + UART_LCR);
1439 spin_unlock_irqrestore(&info->slock, flags);
1440}
037ad48b 1441
a8dea4ec
JS		 1442static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1443{
1444 struct mxser_port *info = tty->driver_data;
1445 unsigned char control, status;
1446 unsigned long flags;
037ad48b 1447
037ad48b 1448
a8dea4ec
JS		 1449 if (tty->index == MXSER_PORTS)
1450 return -ENOIOCTLCMD;
1451 if (tty->flags & (1 << TTY_IO_ERROR))
1452 return -EIO;
037ad48b 1453
a8dea4ec 1454 control = info->MCR;
037ad48b 1455
a8dea4ec
JS		 1456 spin_lock_irqsave(&info->slock, flags);
1457 status = inb(info->ioaddr + UART_MSR);
1458 if (status & UART_MSR_ANY_DELTA)
1459 mxser_check_modem_status(info, status);
1460 spin_unlock_irqrestore(&info->slock, flags);
1461 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1462 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1463 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1464 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1465 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1466 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1467}
037ad48b 1468
a8dea4ec
JS		 1469static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1470 unsigned int set, unsigned int clear)
1471{
1472 struct mxser_port *info = tty->driver_data;
1473 unsigned long flags;
037ad48b 1474
037ad48b 1475
a8dea4ec
JS		 1476 if (tty->index == MXSER_PORTS)
1477 return -ENOIOCTLCMD;
1478 if (tty->flags & (1 << TTY_IO_ERROR))
1479 return -EIO;
037ad48b 1480
a8dea4ec 1481 spin_lock_irqsave(&info->slock, flags);
037ad48b 1482
a8dea4ec
JS		 1483 if (set & TIOCM_RTS)
1484 info->MCR |= UART_MCR_RTS;
1485 if (set & TIOCM_DTR)
1486 info->MCR |= UART_MCR_DTR;
037ad48b 1487
a8dea4ec
JS		 1488 if (clear & TIOCM_RTS)
1489 info->MCR &= ~UART_MCR_RTS;
1490 if (clear & TIOCM_DTR)
1491 info->MCR &= ~UART_MCR_DTR;
037ad48b 1492
a8dea4ec
JS		 1493 outb(info->MCR, info->ioaddr + UART_MCR);
1494 spin_unlock_irqrestore(&info->slock, flags);
037ad48b
JS		 1495 return 0;
1496}
1497
a8dea4ec 1498static int mxser_program_mode(int port)
037ad48b 1499{
a8dea4ec
JS		 1500 int id, i, j, n;
1501 /* unsigned long flags; */
037ad48b 1502
a8dea4ec
JS		 1503 spin_lock(&gm_lock);
1504 outb(0, port);
1505 outb(0, port);
1506 outb(0, port);
1507 (void)inb(port);
1508 (void)inb(port);
1509 outb(0, port);
1510 (void)inb(port);
1511 /* restore_flags(flags); */
1512 spin_unlock(&gm_lock);
037ad48b 1513
a8dea4ec
JS		 1514 id = inb(port + 1) & 0x1F;
1515 if ((id != C168_ASIC_ID) &&
1516 (id != C104_ASIC_ID) &&
1517 (id != C102_ASIC_ID) &&
1518 (id != CI132_ASIC_ID) &&
1519 (id != CI134_ASIC_ID) &&
1520 (id != CI104J_ASIC_ID))
1521 return -1;
1522 for (i = 0, j = 0; i < 4; i++) {
1523 n = inb(port + 2);
1524 if (n == 'M') {
1525 j = 1;
1526 } else if ((j == 1) && (n == 1)) {
1527 j = 2;
1528 break;
1529 } else
1530 j = 0;
1531 }
1532 if (j != 2)
1533 id = -2;
1534 return id;
1535}
1536
1537static void mxser_normal_mode(int port)
1538{
1539 int i, n;
1540
1541 outb(0xA5, port + 1);
1542 outb(0x80, port + 3);
1543 outb(12, port + 0); /* 9600 bps */
1544 outb(0, port + 1);
1545 outb(0x03, port + 3); /* 8 data bits */
1546 outb(0x13, port + 4); /* loop back mode */
1547 for (i = 0; i < 16; i++) {
1548 n = inb(port + 5);
1549 if ((n & 0x61) == 0x60)
1550 break;
1551 if ((n & 1) == 1)
1552 (void)inb(port);
1553 }
1554 outb(0x00, port + 4);
1555}
1556
1557#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1558#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1559#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1560#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1561#define EN_CCMD 0x000 /* Chip's command register */
1562#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1563#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1564#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1565#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1566#define EN0_DCFG 0x00E /* Data configuration reg WR */
1567#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1568#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1569#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1570static int mxser_read_register(int port, unsigned short *regs)
1571{
1572 int i, k, value, id;
1573 unsigned int j;
1574
1575 id = mxser_program_mode(port);
1576 if (id < 0)
1577 return id;
1578 for (i = 0; i < 14; i++) {
1579 k = (i & 0x3F) | 0x180;
1580 for (j = 0x100; j > 0; j >>= 1) {
1581 outb(CHIP_CS, port);
1582 if (k & j) {
1583 outb(CHIP_CS | CHIP_DO, port);
1584 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1585 } else {
1586 outb(CHIP_CS, port);
1587 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1588 }
1589 }
1590 (void)inb(port);
1591 value = 0;
1592 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1593 outb(CHIP_CS, port);
1594 outb(CHIP_CS | CHIP_SK, port);
1595 if (inb(port) & CHIP_DI)
1596 value |= j;
1597 }
1598 regs[i] = value;
1599 outb(0, port);
1600 }
1601 mxser_normal_mode(port);
1602 return id;
1603}
1604
a8dea4ec
JS		 1605static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1606{
1607 struct mxser_port *port;
1608 int result, status;
1609 unsigned int i, j;
1610
1611 switch (cmd) {
1612 case MOXA_GET_CONF:
1613/* if (copy_to_user(argp, mxsercfg,
1614 sizeof(struct mxser_hwconf) * 4))
1615 return -EFAULT;
1616 return 0;*/
1617 return -ENXIO;
1618 case MOXA_GET_MAJOR:
1619 if (copy_to_user(argp, &ttymajor, sizeof(int)))
1620 return -EFAULT;
1621 return 0;
1622
1623 case MOXA_GET_CUMAJOR:
1624 if (copy_to_user(argp, &calloutmajor, sizeof(int)))
037ad48b
JS		 1625 return -EFAULT;
1626 return 0;
1627
1628 case MOXA_CHKPORTENABLE:
1629 result = 0;
55b307da
JS		 1630
1631 for (i = 0; i < MXSER_BOARDS; i++)
1632 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1633 if (mxser_boards[i].ports[j].ioaddr)
1634 result |= (1 << i);
1635
037ad48b
JS		 1636 return put_user(result, (unsigned long __user *)argp);
1637 case MOXA_GETDATACOUNT:
1638 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1639 return -EFAULT;
1640 return 0;
1641 case MOXA_GETMSTATUS:
55b307da
JS		 1642 for (i = 0; i < MXSER_BOARDS; i++)
1643 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1644 port = &mxser_boards[i].ports[j];
1645
1646 GMStatus[i].ri = 0;
1647 if (!port->ioaddr) {
1648 GMStatus[i].dcd = 0;
1649 GMStatus[i].dsr = 0;
1650 GMStatus[i].cts = 0;
1651 continue;
1652 }
037ad48b 1653
55b307da
JS		 1654 if (!port->tty || !port->tty->termios)
1655 GMStatus[i].cflag =
1656 port->normal_termios.c_cflag;
1657 else
1658 GMStatus[i].cflag =
1659 port->tty->termios->c_cflag;
037ad48b 1660
55b307da
JS		 1661 status = inb(port->ioaddr + UART_MSR);
1662 if (status & 0x80 /*UART_MSR_DCD */ )
1663 GMStatus[i].dcd = 1;
1664 else
1665 GMStatus[i].dcd = 0;
037ad48b 1666
55b307da
JS		 1667 if (status & 0x20 /*UART_MSR_DSR */ )
1668 GMStatus[i].dsr = 1;
1669 else
1670 GMStatus[i].dsr = 0;
037ad48b
JS		 1671
1672
55b307da
JS		 1673 if (status & 0x10 /*UART_MSR_CTS */ )
1674 GMStatus[i].cts = 1;
1675 else
1676 GMStatus[i].cts = 0;
1677 }
037ad48b
JS		 1678 if (copy_to_user(argp, GMStatus,
1679 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1680 return -EFAULT;
1681 return 0;
1682 case MOXA_ASPP_MON_EXT: {
55b307da
JS		 1683 int status, p, shiftbit;
1684 unsigned long opmode;
1685 unsigned cflag, iflag;
037ad48b 1686
55b307da
JS		 1687 for (i = 0; i < MXSER_BOARDS; i++)
1688 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1689 port = &mxser_boards[i].ports[j];
1690 if (!port->ioaddr)
037ad48b
JS		 1691 continue;
1692
55b307da
JS		 1693 status = mxser_get_msr(port->ioaddr, 0, i);
1694/* mxser_check_modem_status(port, status); */
1695
037ad48b 1696 if (status & UART_MSR_TERI)
55b307da 1697 port->icount.rng++;
037ad48b 1698 if (status & UART_MSR_DDSR)
55b307da 1699 port->icount.dsr++;
037ad48b 1700 if (status & UART_MSR_DDCD)
55b307da 1701 port->icount.dcd++;
037ad48b 1702 if (status & UART_MSR_DCTS)
55b307da
JS		 1703 port->icount.cts++;
1704
1705 port->mon_data.modem_status = status;
1706 mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt;
1707 mon_data_ext.tx_cnt[i] = port->mon_data.txcnt;
1708 mon_data_ext.up_rxcnt[i] =
1709 port->mon_data.up_rxcnt;
1710 mon_data_ext.up_txcnt[i] =
1711 port->mon_data.up_txcnt;
1712 mon_data_ext.modem_status[i] =
1713 port->mon_data.modem_status;
1714 mon_data_ext.baudrate[i] = port->realbaud;
1715
1716 if (!port->tty || !port->tty->termios) {
1717 cflag = port->normal_termios.c_cflag;
1718 iflag = port->normal_termios.c_iflag;
037ad48b 1719 } else {
55b307da
JS		 1720 cflag = port->tty->termios->c_cflag;
1721 iflag = port->tty->termios->c_iflag;
037ad48b
JS		 1722 }
1723
1724 mon_data_ext.databits[i] = cflag & CSIZE;
1725
1726 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1727
55b307da
JS		 1728 mon_data_ext.parity[i] =
1729 cflag & (PARENB | PARODD | CMSPAR);
037ad48b
JS		 1730
1731 mon_data_ext.flowctrl[i] = 0x00;
1732
1733 if (cflag & CRTSCTS)
1734 mon_data_ext.flowctrl[i] |= 0x03;
1735
1736 if (iflag & (IXON | IXOFF))
1737 mon_data_ext.flowctrl[i] |= 0x0C;
1738
55b307da 1739 if (port->type == PORT_16550A)
037ad48b
JS		 1740 mon_data_ext.fifo[i] = 1;
1741 else
1742 mon_data_ext.fifo[i] = 0;
1743
1744 p = i % 4;
1745 shiftbit = p * 2;
55b307da 1746 opmode = inb(port->opmode_ioaddr) >> shiftbit;
037ad48b
JS		 1747 opmode &= OP_MODE_MASK;
1748
1749 mon_data_ext.iftype[i] = opmode;
1750
1751 }
55b307da
JS		 1752 if (copy_to_user(argp, &mon_data_ext,
1753 sizeof(mon_data_ext)))
037ad48b
JS		 1754 return -EFAULT;
1755
1756 return 0;
1757
55b307da 1758 } default:
037ad48b
JS		 1759 return -ENOIOCTLCMD;
1760 }
1761 return 0;
1762}
1763
a8dea4ec
JS		 1764static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1765 unsigned int cmd, unsigned long arg)
037ad48b 1766{
55b307da 1767 struct mxser_port *info = tty->driver_data;
a8dea4ec
JS		 1768 struct async_icount cprev, cnow; /* kernel counter temps */
1769 struct serial_icounter_struct __user *p_cuser;
1770 unsigned long templ;
1771 unsigned long flags;
1772 void __user *argp = (void __user *)arg;
1773 int retval;
037ad48b 1774
a8dea4ec
JS		 1775 if (tty->index == MXSER_PORTS)
1776 return mxser_ioctl_special(cmd, argp);
1777
1778 /* following add by Victor Yu. 01-05-2004 */
1779 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1780 int p;
1781 unsigned long opmode;
1782 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1783 int shiftbit;
1784 unsigned char val, mask;
1785
1786 p = tty->index % 4;
1787 if (cmd == MOXA_SET_OP_MODE) {
1788 if (get_user(opmode, (int __user *) argp))
1789 return -EFAULT;
1790 if (opmode != RS232_MODE &&
1791 opmode != RS485_2WIRE_MODE &&
1792 opmode != RS422_MODE &&
1793 opmode != RS485_4WIRE_MODE)
1794 return -EFAULT;
1795 mask = ModeMask[p];
1796 shiftbit = p * 2;
1797 val = inb(info->opmode_ioaddr);
1798 val &= mask;
1799 val |= (opmode << shiftbit);
1800 outb(val, info->opmode_ioaddr);
1801 } else {
1802 shiftbit = p * 2;
1803 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1804 opmode &= OP_MODE_MASK;
1805 if (copy_to_user(argp, &opmode, sizeof(int)))
1806 return -EFAULT;
3306ce3d 1807 }
a8dea4ec 1808 return 0;
037ad48b 1809 }
a8dea4ec 1810 /* above add by Victor Yu. 01-05-2004 */
037ad48b 1811
a8dea4ec
JS		 1812 if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1813 if (tty->flags & (1 << TTY_IO_ERROR))
1814 return -EIO;
037ad48b 1815 }
a8dea4ec
JS		 1816 switch (cmd) {
1817 case TCSBRK: /* SVID version: non-zero arg --> no break */
1818 retval = tty_check_change(tty);
1819 if (retval)
1820 return retval;
1821 tty_wait_until_sent(tty, 0);
1822 if (!arg)
1823 mxser_send_break(info, HZ / 4); /* 1/4 second */
1824 return 0;
1825 case TCSBRKP: /* support for POSIX tcsendbreak() */
1826 retval = tty_check_change(tty);
1827 if (retval)
1828 return retval;
1829 tty_wait_until_sent(tty, 0);
1830 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
1831 return 0;
1832 case TIOCGSOFTCAR:
1833 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
1834 case TIOCSSOFTCAR:
1835 if (get_user(templ, (unsigned long __user *) argp))
1836 return -EFAULT;
1837 arg = templ;
1838 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
1839 return 0;
1840 case TIOCGSERIAL:
1841 return mxser_get_serial_info(info, argp);
1842 case TIOCSSERIAL:
1843 return mxser_set_serial_info(info, argp);
1844 case TIOCSERGETLSR: /* Get line status register */
1845 return mxser_get_lsr_info(info, argp);
1846 /*
1847 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1848 * - mask passed in arg for lines of interest
1849 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1850 * Caller should use TIOCGICOUNT to see which one it was
1851 */
1852 case TIOCMIWAIT: {
1853 DECLARE_WAITQUEUE(wait, current);
1854 int ret;
1855 spin_lock_irqsave(&info->slock, flags);
1856 cprev = info->icount; /* note the counters on entry */
1857 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 1858
a8dea4ec
JS		 1859 add_wait_queue(&info->delta_msr_wait, &wait);
1860 while (1) {
1861 spin_lock_irqsave(&info->slock, flags);
1862 cnow = info->icount; /* atomic copy */
1863 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 1864
a8dea4ec
JS		 1865 set_current_state(TASK_INTERRUPTIBLE);
1866 if (((arg & TIOCM_RNG) &&
1867 (cnow.rng != cprev.rng)) ||
1868 ((arg & TIOCM_DSR) &&
1869 (cnow.dsr != cprev.dsr)) ||
1870 ((arg & TIOCM_CD) &&
1871 (cnow.dcd != cprev.dcd)) ||
1872 ((arg & TIOCM_CTS) &&
1873 (cnow.cts != cprev.cts))) {
1874 ret = 0;
1875 break;
3306ce3d 1876 }
a8dea4ec
JS		 1877 /* see if a signal did it */
1878 if (signal_pending(current)) {
1879 ret = -ERESTARTSYS;
1880 break;
1881 }
1882 cprev = cnow;
037ad48b 1883 }
a8dea4ec
JS		 1884 current->state = TASK_RUNNING;
1885 remove_wait_queue(&info->delta_msr_wait, &wait);
1886 break;
037ad48b 1887 }
a8dea4ec
JS		 1888 /* NOTREACHED */
1889 /*
1890 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1891 * Return: write counters to the user passed counter struct
1892 * NB: both 1->0 and 0->1 transitions are counted except for
1893 * RI where only 0->1 is counted.
1894 */
1895 case TIOCGICOUNT:
1896 spin_lock_irqsave(&info->slock, flags);
1897 cnow = info->icount;
1898 spin_unlock_irqrestore(&info->slock, flags);
1899 p_cuser = argp;
1900 /* modified by casper 1/11/2000 */
1901 if (put_user(cnow.frame, &p_cuser->frame))
1902 return -EFAULT;
1903 if (put_user(cnow.brk, &p_cuser->brk))
1904 return -EFAULT;
1905 if (put_user(cnow.overrun, &p_cuser->overrun))
1906 return -EFAULT;
1907 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1908 return -EFAULT;
1909 if (put_user(cnow.parity, &p_cuser->parity))
1910 return -EFAULT;
1911 if (put_user(cnow.rx, &p_cuser->rx))
1912 return -EFAULT;
1913 if (put_user(cnow.tx, &p_cuser->tx))
1914 return -EFAULT;
1915 put_user(cnow.cts, &p_cuser->cts);
1916 put_user(cnow.dsr, &p_cuser->dsr);
1917 put_user(cnow.rng, &p_cuser->rng);
1918 put_user(cnow.dcd, &p_cuser->dcd);
1919 return 0;
1920 case MOXA_HighSpeedOn:
1921 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1922 case MOXA_SDS_RSTICOUNTER:
1923 info->mon_data.rxcnt = 0;
1924 info->mon_data.txcnt = 0;
1925 return 0;
1926/* (above) added by James. */
1927 case MOXA_ASPP_SETBAUD:{
1928 long baud;
1929 if (get_user(baud, (long __user *)argp))
1930 return -EFAULT;
1931 mxser_set_baud(info, baud);
1932 return 0;
1933 }
1934 case MOXA_ASPP_GETBAUD:
1935 if (copy_to_user(argp, &info->realbaud, sizeof(long)))
1936 return -EFAULT;
037ad48b 1937
a8dea4ec 1938 return 0;
037ad48b 1939
a8dea4ec
JS		 1940 case MOXA_ASPP_OQUEUE:{
1941 int len, lsr;
037ad48b 1942
a8dea4ec
JS		 1943 len = mxser_chars_in_buffer(tty);
1944
1945 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1946
1947 len += (lsr ? 0 : 1);
1948
1949 if (copy_to_user(argp, &len, sizeof(int)))
1950 return -EFAULT;
1951
1952 return 0;
037ad48b 1953 }
a8dea4ec
JS		 1954 case MOXA_ASPP_MON: {
1955 int mcr, status;
037ad48b 1956
a8dea4ec
JS		 1957 /* info->mon_data.ser_param = tty->termios->c_cflag; */
1958
1959 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1960 mxser_check_modem_status(info, status);
1961
1962 mcr = inb(info->ioaddr + UART_MCR);
1963 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1964 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1965 else
1966 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1967
1968 if (mcr & MOXA_MUST_MCR_TX_XON)
1969 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1970 else
1971 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1972
1973 if (info->tty->hw_stopped)
1974 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1975 else
1976 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1977
1978 if (copy_to_user(argp, &info->mon_data,
1979 sizeof(struct mxser_mon)))
1980 return -EFAULT;
1981
1982 return 0;
1983 }
1984 case MOXA_ASPP_LSTATUS: {
1985 if (copy_to_user(argp, &info->err_shadow,
1986 sizeof(unsigned char)))
1987 return -EFAULT;
1988
1989 info->err_shadow = 0;
1990 return 0;
1991 }
1992 case MOXA_SET_BAUD_METHOD: {
1993 int method;
1994
1995 if (get_user(method, (int __user *)argp))
1996 return -EFAULT;
1997 mxser_set_baud_method[tty->index] = method;
1998 if (copy_to_user(argp, &method, sizeof(int)))
1999 return -EFAULT;
2000
2001 return 0;
2002 }
2003 default:
2004 return -ENOIOCTLCMD;
2005 }
2006 return 0;
2007}
2008
2009static void mxser_stoprx(struct tty_struct *tty)
2010{
2011 struct mxser_port *info = tty->driver_data;
037ad48b 2012
a8dea4ec
JS		 2013 info->ldisc_stop_rx = 1;
2014 if (I_IXOFF(tty)) {
037ad48b 2015 /* following add by Victor Yu. 09-02-2002 */
55b307da 2016 if (info->board->chip_flag) {
a8dea4ec
JS		 2017 info->IER &= ~MOXA_MUST_RECV_ISR;
2018 outb(info->IER, info->ioaddr + UART_IER);
2019 } else if (!(info->flags & ASYNC_CLOSING)) {
2020 info->x_char = STOP_CHAR(tty);
2021 outb(0, info->ioaddr + UART_IER);
2022 info->IER |= UART_IER_THRI;
2023 outb(info->IER, info->ioaddr + UART_IER);
037ad48b 2024 }
a8dea4ec 2025 }
037ad48b 2026
a8dea4ec
JS		 2027 if (info->tty->termios->c_cflag & CRTSCTS) {
2028 info->MCR &= ~UART_MCR_RTS;
2029 outb(info->MCR, info->ioaddr + UART_MCR);
2030 }
2031}
2032
2033/*
2034 * This routine is called by the upper-layer tty layer to signal that
2035 * incoming characters should be throttled.
2036 */
2037static void mxser_throttle(struct tty_struct *tty)
2038{
2039 mxser_stoprx(tty);
2040}
2041
2042static void mxser_unthrottle(struct tty_struct *tty)
2043{
2044 struct mxser_port *info = tty->driver_data;
2045
2046 /* startrx */
2047 info->ldisc_stop_rx = 0;
2048 if (I_IXOFF(tty)) {
2049 if (info->x_char)
2050 info->x_char = 0;
2051 else {
2052 /* following add by Victor Yu. 09-02-2002 */
2053 if (info->board->chip_flag) {
2054 info->IER |= MOXA_MUST_RECV_ISR;
2055 outb(info->IER, info->ioaddr + UART_IER);
2056 } else if (!(info->flags & ASYNC_CLOSING)) {
2057 info->x_char = START_CHAR(tty);
2058 outb(0, info->ioaddr + UART_IER);
2059 info->IER |= UART_IER_THRI;
2060 outb(info->IER, info->ioaddr + UART_IER);
2061 }
2062 }
2063 }
2064
2065 if (info->tty->termios->c_cflag & CRTSCTS) {
2066 info->MCR |= UART_MCR_RTS;
2067 outb(info->MCR, info->ioaddr + UART_MCR);
037ad48b
JS		 2068 }
2069}
2070
2071/*
2072 * mxser_stop() and mxser_start()
2073 *
2074 * This routines are called before setting or resetting tty->stopped.
2075 * They enable or disable transmitter interrupts, as necessary.
2076 */
2077static void mxser_stop(struct tty_struct *tty)
2078{
55b307da 2079 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 2080 unsigned long flags;
2081
2082 spin_lock_irqsave(&info->slock, flags);
2083 if (info->IER & UART_IER_THRI) {
2084 info->IER &= ~UART_IER_THRI;
55b307da 2085 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 2086 }
2087 spin_unlock_irqrestore(&info->slock, flags);
2088}
2089
2090static void mxser_start(struct tty_struct *tty)
2091{
55b307da 2092 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 2093 unsigned long flags;
2094
2095 spin_lock_irqsave(&info->slock, flags);
3306ce3d
JS		 2096 if (info->xmit_cnt && info->xmit_buf
2097 /* && !(info->IER & UART_IER_THRI) */) {
55b307da 2098 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
037ad48b 2099 info->IER |= UART_IER_THRI;
55b307da 2100 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 2101 }
2102 spin_unlock_irqrestore(&info->slock, flags);
2103}
2104
a8dea4ec
JS		 2105static void mxser_set_termios(struct tty_struct *tty, struct termios *old_termios)
2106{
2107 struct mxser_port *info = tty->driver_data;
2108 unsigned long flags;
2109
2110 if ((tty->termios->c_cflag != old_termios->c_cflag) ||
2111 (RELEVANT_IFLAG(tty->termios->c_iflag) != RELEVANT_IFLAG(old_termios->c_iflag))) {
2112
2113 mxser_change_speed(info, old_termios);
2114
2115 if ((old_termios->c_cflag & CRTSCTS) &&
2116 !(tty->termios->c_cflag & CRTSCTS)) {
2117 tty->hw_stopped = 0;
2118 mxser_start(tty);
2119 }
2120 }
2121
2122/* Handle sw stopped */
2123 if ((old_termios->c_iflag & IXON) &&
2124 !(tty->termios->c_iflag & IXON)) {
2125 tty->stopped = 0;
2126
2127 /* following add by Victor Yu. 09-02-2002 */
2128 if (info->board->chip_flag) {
2129 spin_lock_irqsave(&info->slock, flags);
2130 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
2131 spin_unlock_irqrestore(&info->slock, flags);
2132 }
2133 /* above add by Victor Yu. 09-02-2002 */
2134
2135 mxser_start(tty);
2136 }
2137}
2138
037ad48b
JS		 2139/*
2140 * mxser_wait_until_sent() --- wait until the transmitter is empty
2141 */
2142static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
2143{
55b307da 2144 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 2145 unsigned long orig_jiffies, char_time;
2146 int lsr;
2147
2148 if (info->type == PORT_UNKNOWN)
2149 return;
2150
2151 if (info->xmit_fifo_size == 0)
2152 return; /* Just in case.... */
2153
2154 orig_jiffies = jiffies;
2155 /*
2156 * Set the check interval to be 1/5 of the estimated time to
2157 * send a single character, and make it at least 1. The check
2158 * interval should also be less than the timeout.
2159 *
2160 * Note: we have to use pretty tight timings here to satisfy
2161 * the NIST-PCTS.
2162 */
2163 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2164 char_time = char_time / 5;
2165 if (char_time == 0)
2166 char_time = 1;
2167 if (timeout && timeout < char_time)
2168 char_time = timeout;
2169 /*
2170 * If the transmitter hasn't cleared in twice the approximate
2171 * amount of time to send the entire FIFO, it probably won't
2172 * ever clear. This assumes the UART isn't doing flow
2173 * control, which is currently the case. Hence, if it ever
2174 * takes longer than info->timeout, this is probably due to a
2175 * UART bug of some kind. So, we clamp the timeout parameter at
2176 * 2*info->timeout.
2177 */
2178 if (!timeout || timeout > 2 * info->timeout)
2179 timeout = 2 * info->timeout;
2180#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2181 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2182 timeout, char_time);
2183 printk("jiff=%lu...", jiffies);
2184#endif
55b307da 2185 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
037ad48b
JS		 2186#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2187 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2188#endif
2189 schedule_timeout_interruptible(char_time);
2190 if (signal_pending(current))
2191 break;
2192 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2193 break;
2194 }
2195 set_current_state(TASK_RUNNING);
2196
2197#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2198 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
a8dea4ec
JS		 2199#endif
2200}
037ad48b
JS		 2201
2202
a8dea4ec
JS		 2203/*
2204 * This routine is called by tty_hangup() when a hangup is signaled.
2205 */
2206void mxser_hangup(struct tty_struct *tty)
2207{
2208 struct mxser_port *info = tty->driver_data;
037ad48b 2209
a8dea4ec
JS		 2210 mxser_flush_buffer(tty);
2211 mxser_shutdown(info);
2212 info->event = 0;
2213 info->count = 0;
2214 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2215 info->tty = NULL;
2216 wake_up_interruptible(&info->open_wait);
037ad48b
JS		 2217}
2218
2219
a8dea4ec
JS		 2220/* added by James 03-12-2004. */
2221/*
2222 * mxser_rs_break() --- routine which turns the break handling on or off
2223 */
2224static void mxser_rs_break(struct tty_struct *tty, int break_state)
037ad48b 2225{
a8dea4ec 2226 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 2227 unsigned long flags;
2228
a8dea4ec
JS		 2229 spin_lock_irqsave(&info->slock, flags);
2230 if (break_state == -1)
2231 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2232 info->ioaddr + UART_LCR);
2233 else
2234 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2235 info->ioaddr + UART_LCR);
2236 spin_unlock_irqrestore(&info->slock, flags);
2237}
037ad48b 2238
a8dea4ec 2239/* (above) added by James. */
037ad48b 2240
a8dea4ec
JS		 2241static void mxser_receive_chars(struct mxser_port *port, int *status)
2242{
2243 struct tty_struct *tty = port->tty;
2244 unsigned char ch, gdl;
2245 int ignored = 0;
2246 int cnt = 0;
2247 int recv_room;
2248 int max = 256;
2249 unsigned long flags;
037ad48b 2250
a8dea4ec
JS		 2251 spin_lock_irqsave(&port->slock, flags);
2252
2253 recv_room = tty->receive_room;
2254 if ((recv_room == 0) && (!port->ldisc_stop_rx)) {
2255 /* mxser_throttle(tty); */
2256 mxser_stoprx(tty);
2257 /* return; */
037ad48b
JS		 2258 }
2259
a8dea4ec
JS		 2260 /* following add by Victor Yu. 09-02-2002 */
2261 if (port->board->chip_flag != MOXA_OTHER_UART) {
037ad48b 2262
a8dea4ec
JS		 2263 if (*status & UART_LSR_SPECIAL)
2264 goto intr_old;
2265 /* following add by Victor Yu. 02-11-2004 */
2266 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2267 (*status & MOXA_MUST_LSR_RERR))
2268 goto intr_old;
2269 /* above add by Victor Yu. 02-14-2004 */
2270 if (*status & MOXA_MUST_LSR_RERR)
2271 goto intr_old;
2272
2273 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2274
2275 /* add by Victor Yu. 02-11-2004 */
2276 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2277 gdl &= MOXA_MUST_GDL_MASK;
2278 if (gdl >= recv_room) {
2279 if (!port->ldisc_stop_rx) {
2280 /* mxser_throttle(tty); */
2281 mxser_stoprx(tty);
2282 }
2283 /* return; */
2284 }
2285 while (gdl--) {
2286 ch = inb(port->ioaddr + UART_RX);
2287 tty_insert_flip_char(tty, ch, 0);
2288 cnt++;
2289 }
2290 goto end_intr;
037ad48b 2291 }
a8dea4ec
JS		 2292 intr_old:
2293 /* above add by Victor Yu. 09-02-2002 */
037ad48b 2294
a8dea4ec
JS		 2295 do {
2296 if (max-- < 0)
2297 break;
037ad48b 2298
a8dea4ec
JS		 2299 ch = inb(port->ioaddr + UART_RX);
2300 /* following add by Victor Yu. 09-02-2002 */
2301 if (port->board->chip_flag && (*status & UART_LSR_OE)
2302 /*&& !(*status&UART_LSR_DR) */)
2303 outb(0x23, port->ioaddr + UART_FCR);
2304 *status &= port->read_status_mask;
2305 /* above add by Victor Yu. 09-02-2002 */
2306 if (*status & port->ignore_status_mask) {
2307 if (++ignored > 100)
2308 break;
2309 } else {
2310 char flag = 0;
2311 if (*status & UART_LSR_SPECIAL) {
2312 if (*status & UART_LSR_BI) {
2313 flag = TTY_BREAK;
2314/* added by casper 1/11/2000 */
2315 port->icount.brk++;
037ad48b 2316
a8dea4ec
JS		 2317 if (port->flags & ASYNC_SAK)
2318 do_SAK(tty);
2319 } else if (*status & UART_LSR_PE) {
2320 flag = TTY_PARITY;
2321/* added by casper 1/11/2000 */
2322 port->icount.parity++;
2323 } else if (*status & UART_LSR_FE) {
2324 flag = TTY_FRAME;
2325/* added by casper 1/11/2000 */
2326 port->icount.frame++;
2327 } else if (*status & UART_LSR_OE) {
2328 flag = TTY_OVERRUN;
2329/* added by casper 1/11/2000 */
2330 port->icount.overrun++;
2331 } else
2332 flags = TTY_BREAK;
2333 } else
2334 flags = 0;
2335 tty_insert_flip_char(tty, ch, flag);
2336 cnt++;
2337 if (cnt >= recv_room) {
2338 if (!port->ldisc_stop_rx) {
2339 /* mxser_throttle(tty); */
2340 mxser_stoprx(tty);
2341 }
2342 break;
2343 }
037ad48b 2344
a8dea4ec 2345 }
037ad48b 2346
a8dea4ec
JS		 2347 /* following add by Victor Yu. 09-02-2002 */
2348 if (port->board->chip_flag)
2349 break;
037ad48b 2350
a8dea4ec
JS		 2351 /* mask by Victor Yu. 09-02-2002
2352 *status = inb(port->ioaddr + UART_LSR) & port->read_status_mask;
2353 */
2354 /* following add by Victor Yu. 09-02-2002 */
2355 *status = inb(port->ioaddr + UART_LSR);
2356 /* above add by Victor Yu. 09-02-2002 */
2357 } while (*status & UART_LSR_DR);
037ad48b 2358
a8dea4ec
JS		 2359end_intr: /* add by Victor Yu. 09-02-2002 */
2360 mxvar_log.rxcnt[port->tty->index] += cnt;
2361 port->mon_data.rxcnt += cnt;
2362 port->mon_data.up_rxcnt += cnt;
2363 spin_unlock_irqrestore(&port->slock, flags);
2364
2365 tty_flip_buffer_push(tty);
037ad48b
JS		 2366}
2367
a8dea4ec 2368static void mxser_transmit_chars(struct mxser_port *port)
037ad48b 2369{
a8dea4ec
JS		 2370 int count, cnt;
2371 unsigned long flags;
037ad48b 2372
a8dea4ec 2373 spin_lock_irqsave(&port->slock, flags);
037ad48b 2374
a8dea4ec
JS		 2375 if (port->x_char) {
2376 outb(port->x_char, port->ioaddr + UART_TX);
2377 port->x_char = 0;
2378 mxvar_log.txcnt[port->tty->index]++;
2379 port->mon_data.txcnt++;
2380 port->mon_data.up_txcnt++;
2381
2382/* added by casper 1/11/2000 */
2383 port->icount.tx++;
2384 goto unlock;
037ad48b
JS		 2385 }
2386
a8dea4ec
JS		 2387 if (port->xmit_buf == 0)
2388 goto unlock;
037ad48b 2389
a8dea4ec
JS		 2390 if (port->xmit_cnt == 0) {
2391 if (port->xmit_cnt < WAKEUP_CHARS) { /* XXX what's this for?? */
2392 set_bit(MXSER_EVENT_TXLOW, &port->event);
2393 schedule_work(&port->tqueue);
2394 }
2395 goto unlock;
2396 }
2397 if (port->tty->stopped || (port->tty->hw_stopped &&
2398 (port->type != PORT_16550A) &&
2399 (!port->board->chip_flag))) {
2400 port->IER &= ~UART_IER_THRI;
2401 outb(port->IER, port->ioaddr + UART_IER);
2402 goto unlock;
2403 }
037ad48b 2404
a8dea4ec
JS		 2405 cnt = port->xmit_cnt;
2406 count = port->xmit_fifo_size;
2407 do {
2408 outb(port->xmit_buf[port->xmit_tail++],
2409 port->ioaddr + UART_TX);
2410 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2411 if (--port->xmit_cnt <= 0)
2412 break;
2413 } while (--count > 0);
2414 mxvar_log.txcnt[port->tty->index] += (cnt - port->xmit_cnt);
55b307da 2415
a8dea4ec
JS		 2416/* added by James 03-12-2004. */
2417 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2418 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
037ad48b 2419
a8dea4ec
JS		 2420/* added by casper 1/11/2000 */
2421 port->icount.tx += (cnt - port->xmit_cnt);
037ad48b 2422
a8dea4ec
JS		 2423 if (port->xmit_cnt < WAKEUP_CHARS) {
2424 set_bit(MXSER_EVENT_TXLOW, &port->event);
2425 schedule_work(&port->tqueue);
2426 }
2427 if (port->xmit_cnt <= 0) {
2428 port->IER &= ~UART_IER_THRI;
2429 outb(port->IER, port->ioaddr + UART_IER);
2430 }
2431unlock:
2432 spin_unlock_irqrestore(&port->slock, flags);
037ad48b
JS		 2433}
2434
2435/*
a8dea4ec 2436 * This is the serial driver's generic interrupt routine
037ad48b 2437 */
a8dea4ec 2438static irqreturn_t mxser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
037ad48b 2439{
a8dea4ec
JS		 2440 int status, iir, i;
2441 struct mxser_board *brd = NULL;
2442 struct mxser_port *port;
2443 int max, irqbits, bits, msr;
2444 int pass_counter = 0;
2445 unsigned int int_cnt;
2446 int handled = IRQ_NONE;
037ad48b 2447
a8dea4ec 2448 /* spin_lock(&gm_lock); */
037ad48b 2449
a8dea4ec
JS		 2450 for (i = 0; i < MXSER_BOARDS; i++)
2451 if (dev_id == &mxser_boards[i]) {
2452 brd = dev_id;
2453 break;
2454 }
037ad48b 2455
a8dea4ec
JS		 2456 if (i == MXSER_BOARDS)
2457 goto irq_stop;
2458 if (brd == NULL)
2459 goto irq_stop;
2460 max = mxser_numports[brd->board_type - 1];
2461 while (1) {
2462 irqbits = inb(brd->vector) & brd->vector_mask;
2463 if (irqbits == brd->vector_mask)
2464 break;
037ad48b 2465
a8dea4ec
JS		 2466 handled = IRQ_HANDLED;
2467 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2468 if (irqbits == brd->vector_mask)
2469 break;
2470 if (bits & irqbits)
2471 continue;
2472 port = &brd->ports[i];
037ad48b 2473
a8dea4ec
JS		 2474 int_cnt = 0;
2475 do {
2476 /* following add by Victor Yu. 09-13-2002 */
2477 iir = inb(port->ioaddr + UART_IIR);
2478 if (iir & UART_IIR_NO_INT)
2479 break;
2480 iir &= MOXA_MUST_IIR_MASK;
2481 if (!port->tty) {
2482 status = inb(port->ioaddr + UART_LSR);
2483 outb(0x27, port->ioaddr + UART_FCR);
2484 inb(port->ioaddr + UART_MSR);
2485 break;
2486 }
2487 /* above add by Victor Yu. 09-13-2002 */
037ad48b 2488
a8dea4ec
JS		 2489 /* following add by Victor Yu. 09-02-2002 */
2490 status = inb(port->ioaddr + UART_LSR);
2491
2492 if (status & UART_LSR_PE)
2493 port->err_shadow |= NPPI_NOTIFY_PARITY;
2494 if (status & UART_LSR_FE)
2495 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2496 if (status & UART_LSR_OE)
2497 port->err_shadow |=
2498 NPPI_NOTIFY_HW_OVERRUN;
2499 if (status & UART_LSR_BI)
2500 port->err_shadow |= NPPI_NOTIFY_BREAK;
2501
2502 if (port->board->chip_flag) {
2503 /*
2504 if ( (status & 0x02) && !(status & 0x01) ) {
2505 outb(port->ioaddr+UART_FCR, 0x23);
2506 continue;
2507 }
2508 */
2509 if (iir == MOXA_MUST_IIR_GDA ||
2510 iir == MOXA_MUST_IIR_RDA ||
2511 iir == MOXA_MUST_IIR_RTO ||
2512 iir == MOXA_MUST_IIR_LSR)
2513 mxser_receive_chars(port,
2514 &status);
2515
2516 } else {
2517 /* above add by Victor Yu. 09-02-2002 */
2518
2519 status &= port->read_status_mask;
2520 if (status & UART_LSR_DR)
2521 mxser_receive_chars(port,
2522 &status);
2523 }
2524 msr = inb(port->ioaddr + UART_MSR);
2525 if (msr & UART_MSR_ANY_DELTA)
2526 mxser_check_modem_status(port, msr);
2527
2528 /* following add by Victor Yu. 09-13-2002 */
2529 if (port->board->chip_flag) {
2530 if (iir == 0x02 && (status &
2531 UART_LSR_THRE))
2532 mxser_transmit_chars(port);
2533 } else {
2534 /* above add by Victor Yu. 09-13-2002 */
2535
2536 if (status & UART_LSR_THRE)
2537 mxser_transmit_chars(port);
2538 }
2539 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2540 }
2541 if (pass_counter++ > MXSER_ISR_PASS_LIMIT)
2542 break; /* Prevent infinite loops */
2543 }
2544
2545 irq_stop:
2546 /* spin_unlock(&gm_lock); */
2547 return handled;
037ad48b
JS		 2548}
2549
a8dea4ec
JS		 2550static const struct tty_operations mxser_ops = {
2551 .open = mxser_open,
2552 .close = mxser_close,
2553 .write = mxser_write,
2554 .put_char = mxser_put_char,
2555 .flush_chars = mxser_flush_chars,
2556 .write_room = mxser_write_room,
2557 .chars_in_buffer = mxser_chars_in_buffer,
2558 .flush_buffer = mxser_flush_buffer,
2559 .ioctl = mxser_ioctl,
2560 .throttle = mxser_throttle,
2561 .unthrottle = mxser_unthrottle,
2562 .set_termios = mxser_set_termios,
2563 .stop = mxser_stop,
2564 .start = mxser_start,
2565 .hangup = mxser_hangup,
2566 .break_ctl = mxser_rs_break,
2567 .wait_until_sent = mxser_wait_until_sent,
2568 .tiocmget = mxser_tiocmget,
2569 .tiocmset = mxser_tiocmset,
2570};
2571
2572/*
2573 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2574 */
2575
2576static int __devinit mxser_initbrd(struct mxser_board *brd)
037ad48b 2577{
a8dea4ec
JS		 2578 struct mxser_port *info;
2579 unsigned int i;
2580 int retval;
2581
2582 printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud);
2583
2584 for (i = 0; i < brd->nports; i++) {
2585 info = &brd->ports[i];
2586 info->board = brd;
2587 info->stop_rx = 0;
2588 info->ldisc_stop_rx = 0;
037ad48b 2589
a8dea4ec
JS		 2590 /* Enhance mode enabled here */
2591 if (brd->chip_flag != MOXA_OTHER_UART)
2592 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->ioaddr);
037ad48b 2593
a8dea4ec
JS		 2594 info->flags = ASYNC_SHARE_IRQ;
2595 info->type = brd->uart_type;
037ad48b 2596
a8dea4ec 2597 process_txrx_fifo(info);
037ad48b 2598
a8dea4ec
JS		 2599 info->custom_divisor = info->baud_base * 16;
2600 info->close_delay = 5 * HZ / 10;
2601 info->closing_wait = 30 * HZ;
2602 INIT_WORK(&info->tqueue, mxser_do_softint, info);
2603 info->normal_termios = mxvar_sdriver->init_termios;
2604 init_waitqueue_head(&info->open_wait);
2605 init_waitqueue_head(&info->close_wait);
2606 init_waitqueue_head(&info->delta_msr_wait);
2607 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2608 info->err_shadow = 0;
2609 spin_lock_init(&info->slock);
037ad48b 2610
a8dea4ec
JS		 2611 /* before set INT ISR, disable all int */
2612 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2613 info->ioaddr + UART_IER);
2614 }
2615 /*
2616 * Allocate the IRQ if necessary
2617 */
037ad48b 2618
a8dea4ec
JS		 2619 retval = request_irq(brd->irq, mxser_interrupt,
2620 (brd->ports[0].flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED :
2621 IRQF_DISABLED, "mxser", brd);
2622 if (retval) {
2623 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2624 "conflict with another device.\n",
2625 mxser_brdname[brd->board_type - 1], brd->irq);
2626 return retval;
2627 }
037ad48b
JS		 2628 return 0;
2629}
2630
943f2959 2631static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
037ad48b
JS		 2632{
2633 int id, i, bits;
2634 unsigned short regs[16], irq;
2635 unsigned char scratch, scratch2;
2636
55b307da 2637 brd->chip_flag = MOXA_OTHER_UART;
037ad48b
JS		 2638
2639 id = mxser_read_register(cap, regs);
2640 if (id == C168_ASIC_ID) {
55b307da
JS		 2641 brd->board_type = MXSER_BOARD_C168_ISA;
2642 brd->nports = 8;
037ad48b 2643 } else if (id == C104_ASIC_ID) {
55b307da
JS		 2644 brd->board_type = MXSER_BOARD_C104_ISA;
2645 brd->nports = 4;
037ad48b 2646 } else if (id == C102_ASIC_ID) {
55b307da
JS		 2647 brd->board_type = MXSER_BOARD_C102_ISA;
2648 brd->nports = 2;
037ad48b 2649 } else if (id == CI132_ASIC_ID) {
55b307da
JS		 2650 brd->board_type = MXSER_BOARD_CI132;
2651 brd->nports = 2;
037ad48b 2652 } else if (id == CI134_ASIC_ID) {
55b307da
JS		 2653 brd->board_type = MXSER_BOARD_CI134;
2654 brd->nports = 4;
037ad48b 2655 } else if (id == CI104J_ASIC_ID) {
55b307da
JS		 2656 brd->board_type = MXSER_BOARD_CI104J;
2657 brd->nports = 4;
037ad48b
JS		 2658 } else
2659 return 0;
2660
2661 irq = 0;
55b307da 2662 if (brd->nports == 2) {
037ad48b
JS		 2663 irq = regs[9] & 0xF000;
2664 irq = irq | (irq >> 4);
2665 if (irq != (regs[9] & 0xFF00))
2666 return MXSER_ERR_IRQ_CONFLIT;
55b307da 2667 } else if (brd->nports == 4) {
037ad48b
JS		 2668 irq = regs[9] & 0xF000;
2669 irq = irq | (irq >> 4);
2670 irq = irq | (irq >> 8);
2671 if (irq != regs[9])
2672 return MXSER_ERR_IRQ_CONFLIT;
55b307da 2673 } else if (brd->nports == 8) {
037ad48b
JS		 2674 irq = regs[9] & 0xF000;
2675 irq = irq | (irq >> 4);
2676 irq = irq | (irq >> 8);
2677 if ((irq != regs[9]) || (irq != regs[10]))
2678 return MXSER_ERR_IRQ_CONFLIT;
2679 }
2680
a8dea4ec
JS		 2681 if (!irq)
2682 return MXSER_ERR_IRQ;
2683 brd->irq = ((int)(irq & 0xF000) >> 12);
2684 for (i = 0; i < 8; i++)
2685 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2686 if ((regs[12] & 0x80) == 0)
2687 return MXSER_ERR_VECTOR;
2688 brd->vector = (int)regs[11]; /* interrupt vector */
2689 if (id == 1)
2690 brd->vector_mask = 0x00FF;
2691 else
2692 brd->vector_mask = 0x000F;
2693 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2694 if (regs[12] & bits) {
2695 brd->ports[i].baud_base = 921600;
2696 brd->ports[i].max_baud = 921600; /* add by Victor Yu. 09-04-2002 */
2697 } else {
2698 brd->ports[i].baud_base = 115200;
2699 brd->ports[i].max_baud = 115200; /* add by Victor Yu. 09-04-2002 */
2700 }
2701 }
2702 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2703 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2704 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2705 outb(scratch2, cap + UART_LCR);
2706 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2707 scratch = inb(cap + UART_IIR);
2708
2709 if (scratch & 0xC0)
2710 brd->uart_type = PORT_16550A;
2711 else
2712 brd->uart_type = PORT_16450;
2713 if (id == 1)
2714 brd->nports = 8;
2715 else
2716 brd->nports = 4;
2717 if (!request_region(brd->ports[0].ioaddr, 8 * brd->nports, "mxser(IO)"))
2718 return MXSER_ERR_IOADDR;
2719 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2720 release_region(brd->ports[0].ioaddr, 8 * brd->nports);
2721 return MXSER_ERR_VECTOR;
2722 }
2723 return brd->nports;
2724}
2725
2726static int __init mxser_get_PCI_conf(int board_type, struct mxser_board *brd,
2727 struct pci_dev *pdev)
2728{
2729 unsigned int i, j;
2730 unsigned long ioaddress;
2731 int retval;
2732
2733 /* io address */
2734 brd->board_type = board_type;
2735 brd->nports = mxser_numports[board_type - 1];
2736 ioaddress = pci_resource_start(pdev, 2);
2737 retval = pci_request_region(pdev, 2, "mxser(IO)");
2738 if (retval)
2739 goto err;
2740
2741 for (i = 0; i < brd->nports; i++)
2742 brd->ports[i].ioaddr = ioaddress + 8 * i;
2743
2744 /* vector */
2745 ioaddress = pci_resource_start(pdev, 3);
2746 retval = pci_request_region(pdev, 3, "mxser(vector)");
2747 if (retval)
2748 goto err_relio;
2749 brd->vector = ioaddress;
2750
2751 /* irq */
2752 brd->irq = pdev->irq;
2753
2754 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2755 brd->uart_type = PORT_16550A;
2756 brd->vector_mask = 0;
2757
2758 for (i = 0; i < brd->nports; i++) {
2759 for (j = 0; j < UART_INFO_NUM; j++) {
2760 if (Gpci_uart_info[j].type == brd->chip_flag) {
2761 brd->ports[i].max_baud =
2762 Gpci_uart_info[j].max_baud;
2763
2764 /* exception....CP-102 */
2765 if (board_type == MXSER_BOARD_CP102)
2766 brd->ports[i].max_baud = 921600;
2767 break;
2768 }
2769 }
2770 }
2771
2772 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2773 for (i = 0; i < brd->nports; i++) {
2774 if (i < 4)
2775 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2776 else
2777 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2778 }
2779 outb(0, ioaddress + 4); /* default set to RS232 mode */
2780 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2781 }
2782
2783 for (i = 0; i < brd->nports; i++) {
2784 brd->vector_mask |= (1 << i);
2785 brd->ports[i].baud_base = 921600;
2786 }
2787 return 0;
2788err_relio:
2789 pci_release_region(pdev, 2);
2790err:
2791 return retval;
2792}
2793
2794static int __init mxser_module_init(void)
2795{
2796 struct pci_dev *pdev = NULL;
2797 struct mxser_board *brd;
2798 unsigned int i, m;
2799 int retval, b, n;
2800
2801 pr_debug("Loading module mxser ...\n");
2802
2803 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2804 if (!mxvar_sdriver)
2805 return -ENOMEM;
2806 spin_lock_init(&gm_lock);
2807
2808 for (i = 0; i < MXSER_BOARDS; i++)
2809 mxser_boards[i].board_type = -1;
2810
2811 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2812 MXSER_VERSION);
2813
2814 /* Initialize the tty_driver structure */
2815 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2816 mxvar_sdriver->name = "ttyM";
2817 mxvar_sdriver->major = ttymajor;
2818 mxvar_sdriver->minor_start = 0;
2819 mxvar_sdriver->num = MXSER_PORTS + 1;
2820 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2821 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2822 mxvar_sdriver->init_termios = tty_std_termios;
2823 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2824 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
2825 tty_set_operations(mxvar_sdriver, &mxser_ops);
2826 mxvar_sdriver->ttys = mxvar_tty;
2827 mxvar_sdriver->termios = mxvar_termios;
2828 mxvar_sdriver->termios_locked = mxvar_termios_locked;
2829
2830 mxvar_diagflag = 0;
2831
2832 m = 0;
2833 /* Start finding ISA boards here */
2834 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
2835 int cap;
2836
2837 if (!(cap = mxserBoardCAP[b]))
2838 continue;
2839
2840 brd = &mxser_boards[m];
2841 retval = mxser_get_ISA_conf(cap, brd);
2842
2843 if (retval != 0)
2844 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
2845 mxser_brdname[brd->board_type - 1], ioaddr[b]);
2846
2847 if (retval <= 0) {
2848 if (retval == MXSER_ERR_IRQ)
2849 printk(KERN_ERR "Invalid interrupt number, "
2850 "board not configured\n");
2851 else if (retval == MXSER_ERR_IRQ_CONFLIT)
2852 printk(KERN_ERR "Invalid interrupt number, "
2853 "board not configured\n");
2854 else if (retval == MXSER_ERR_VECTOR)
2855 printk(KERN_ERR "Invalid interrupt vector, "
2856 "board not configured\n");
2857 else if (retval == MXSER_ERR_IOADDR)
2858 printk(KERN_ERR "Invalid I/O address, "
2859 "board not configured\n");
2860
2861 continue;
2862 }
2863
2864 brd->pdev = NULL;
2865
2866 /* mxser_initbrd will hook ISR. */
2867 if (mxser_initbrd(brd) < 0)
2868 continue;
2869
2870 m++;
2871 }
2872
2873 /* Start finding ISA boards from module arg */
2874 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
2875 unsigned long cap;
2876
2877 if (!(cap = ioaddr[b]))
2878 continue;
2879
2880 brd = &mxser_boards[m];
2881 retval = mxser_get_ISA_conf(cap, &mxser_boards[m]);
2882
2883 if (retval != 0)
2884 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
2885 mxser_brdname[brd->board_type - 1], ioaddr[b]);
2886
2887 if (retval <= 0) {
2888 if (retval == MXSER_ERR_IRQ)
2889 printk(KERN_ERR "Invalid interrupt number, "
2890 "board not configured\n");
2891 else if (retval == MXSER_ERR_IRQ_CONFLIT)
2892 printk(KERN_ERR "Invalid interrupt number, "
2893 "board not configured\n");
2894 else if (retval == MXSER_ERR_VECTOR)
2895 printk(KERN_ERR "Invalid interrupt vector, "
2896 "board not configured\n");
2897 else if (retval == MXSER_ERR_IOADDR)
2898 printk(KERN_ERR "Invalid I/O address, "
2899 "board not configured\n");
2900
2901 continue;
037ad48b 2902 }
a8dea4ec
JS		 2903
2904 brd->pdev = NULL;
2905 /* mxser_initbrd will hook ISR. */
2906 if (mxser_initbrd(brd) < 0)
2907 continue;
2908
2909 m++;
037ad48b 2910 }
037ad48b 2911
a8dea4ec
JS		 2912 /* start finding PCI board here */
2913 n = ARRAY_SIZE(mxser_pcibrds) - 1;
2914 b = 0;
2915 while (b < n) {
2916 pdev = pci_get_device(mxser_pcibrds[b].vendor,
2917 mxser_pcibrds[b].device, pdev);
2918 if (pdev == NULL) {
2919 b++;
2920 continue;
2921 }
2922 printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
2923 mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1],
2924 pdev->bus->number, PCI_SLOT(pdev->devfn));
2925 if (m >= MXSER_BOARDS)
2926 printk(KERN_ERR
2927 "Too many Smartio/Industio family boards find "
2928 "(maximum %d), board not configured\n",
2929 MXSER_BOARDS);
2930 else {
2931 if (pci_enable_device(pdev)) {
2932 printk(KERN_ERR "Moxa SmartI/O PCI enable "
2933 "fail !\n");
2934 continue;
2935 }
2936 brd = &mxser_boards[m];
2937 brd->pdev = pdev;
2938 retval = mxser_get_PCI_conf(
2939 (int)mxser_pcibrds[b].driver_data,
2940 brd, pdev);
2941 if (retval < 0) {
2942 if (retval == MXSER_ERR_IRQ)
2943 printk(KERN_ERR
2944 "Invalid interrupt number, "
2945 "board not configured\n");
2946 else if (retval == MXSER_ERR_IRQ_CONFLIT)
2947 printk(KERN_ERR
2948 "Invalid interrupt number, "
2949 "board not configured\n");
2950 else if (retval == MXSER_ERR_VECTOR)
2951 printk(KERN_ERR
2952 "Invalid interrupt vector, "
2953 "board not configured\n");
2954 else if (retval == MXSER_ERR_IOADDR)
2955 printk(KERN_ERR
2956 "Invalid I/O address, "
2957 "board not configured\n");
2958 continue;
2959 }
2960 /* mxser_initbrd will hook ISR. */
2961 if (mxser_initbrd(brd) < 0)
2962 continue;
2963 m++;
2964 /* Keep an extra reference if we succeeded. It will
2965 be returned at unload time */
2966 pci_dev_get(pdev);
2967 }
7a7a5c33 2968 }
037ad48b 2969
a8dea4ec
JS		 2970 retval = tty_register_driver(mxvar_sdriver);
2971 if (retval) {
2972 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family"
2973 " driver !\n");
2974 put_tty_driver(mxvar_sdriver);
037ad48b 2975
a8dea4ec
JS		 2976 for (i = 0; i < MXSER_BOARDS; i++) {
2977 if (mxser_boards[i].board_type == -1)
2978 continue;
2979 else {
2980 free_irq(mxser_boards[i].irq, &mxser_boards[i]);
2981 /* todo: release io, vector */
037ad48b
JS		 2982 }
2983 }
a8dea4ec 2984 return retval;
037ad48b 2985 }
a8dea4ec
JS		 2986
2987 pr_debug("Done.\n");
2988
2989 return retval;
037ad48b
JS		 2990}
2991
a8dea4ec 2992static void __exit mxser_module_exit(void)
037ad48b 2993{
a8dea4ec 2994 int i, err;
037ad48b 2995
a8dea4ec 2996 pr_debug("Unloading module mxser ...\n");
037ad48b 2997
a8dea4ec
JS		 2998 err = tty_unregister_driver(mxvar_sdriver);
2999 if (!err)
3000 put_tty_driver(mxvar_sdriver);
3001 else
3002 printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
037ad48b 3003
a8dea4ec
JS		 3004 for (i = 0; i < MXSER_BOARDS; i++) {
3005 struct pci_dev *pdev;
037ad48b 3006
a8dea4ec
JS		 3007 if (mxser_boards[i].board_type == -1)
3008 continue;
3009 else {
3010 pdev = mxser_boards[i].pdev;
3011 free_irq(mxser_boards[i].irq, &mxser_boards[i]);
3012 if (pdev != NULL) { /* PCI */
3013 pci_release_region(pdev, 2);
3014 pci_release_region(pdev, 3);
3015 pci_dev_put(pdev);
3016 } else {
3017 release_region(mxser_boards[i].ports[0].ioaddr, 8 * mxser_boards[i].nports);
3018 release_region(mxser_boards[i].vector, 1);
3019 }
3020 }
037ad48b 3021 }
a8dea4ec 3022 pr_debug("Done.\n");
037ad48b
JS		 3023}
3024
3025module_init(mxser_module_init);
3026module_exit(mxser_module_exit);
Linux kernel - Deliverables
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