Commit | Line | Data |
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037ad48b JS |
1 | /* |
2 | * mxser.c -- MOXA Smartio/Industio family multiport serial driver. | |
3 | * | |
3306ce3d | 4 | * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com.tw). |
c88cb8f9 | 5 | * Copyright (C) 2006 Jiri Slaby <jirislaby@gmail.com> |
037ad48b | 6 | * |
c88cb8f9 JS |
7 | * This code is loosely based on the 1.8 moxa driver which is based on |
8 | * Linux serial driver, written by Linus Torvalds, Theodore T'so and | |
9 | * others. | |
037ad48b JS |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
037ad48b JS |
16 | * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox |
17 | * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com. | |
18 | * - Fixed x86_64 cleanness | |
19 | * - Fixed sleep with spinlock held in mxser_send_break | |
20 | */ | |
21 | ||
037ad48b JS |
22 | #include <linux/module.h> |
23 | #include <linux/autoconf.h> | |
24 | #include <linux/errno.h> | |
25 | #include <linux/signal.h> | |
26 | #include <linux/sched.h> | |
27 | #include <linux/timer.h> | |
28 | #include <linux/interrupt.h> | |
29 | #include <linux/tty.h> | |
30 | #include <linux/tty_flip.h> | |
31 | #include <linux/serial.h> | |
32 | #include <linux/serial_reg.h> | |
33 | #include <linux/major.h> | |
34 | #include <linux/string.h> | |
35 | #include <linux/fcntl.h> | |
36 | #include <linux/ptrace.h> | |
37 | #include <linux/gfp.h> | |
38 | #include <linux/ioport.h> | |
39 | #include <linux/mm.h> | |
40 | #include <linux/smp_lock.h> | |
41 | #include <linux/delay.h> | |
42 | #include <linux/pci.h> | |
43 | ||
44 | #include <asm/system.h> | |
45 | #include <asm/io.h> | |
46 | #include <asm/irq.h> | |
47 | #include <asm/bitops.h> | |
48 | #include <asm/uaccess.h> | |
49 | ||
771f2d1a | 50 | #include "mxser_new.h" |
037ad48b | 51 | |
55b307da | 52 | #define MXSER_VERSION "2.0" |
037ad48b JS |
53 | #define MXSERMAJOR 174 |
54 | #define MXSERCUMAJOR 175 | |
55 | ||
56 | #define MXSER_EVENT_TXLOW 1 | |
037ad48b JS |
57 | |
58 | #define MXSER_BOARDS 4 /* Max. boards */ | |
037ad48b | 59 | #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */ |
a8b74de9 | 60 | #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD) |
3306ce3d | 61 | #define MXSER_ISR_PASS_LIMIT 99999L |
037ad48b JS |
62 | |
63 | #define MXSER_ERR_IOADDR -1 | |
64 | #define MXSER_ERR_IRQ -2 | |
65 | #define MXSER_ERR_IRQ_CONFLIT -3 | |
66 | #define MXSER_ERR_VECTOR -4 | |
67 | ||
037ad48b JS |
68 | #define WAKEUP_CHARS 256 |
69 | ||
70 | #define UART_MCR_AFE 0x20 | |
71 | #define UART_LSR_SPECIAL 0x1E | |
72 | ||
73 | #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK|\ | |
74 | IXON|IXOFF)) | |
75 | ||
037ad48b JS |
76 | #define C168_ASIC_ID 1 |
77 | #define C104_ASIC_ID 2 | |
78 | #define C102_ASIC_ID 0xB | |
79 | #define CI132_ASIC_ID 4 | |
80 | #define CI134_ASIC_ID 3 | |
81 | #define CI104J_ASIC_ID 5 | |
82 | ||
cd7ed64e JS |
83 | #define MXSER_HIGHBAUD 1 |
84 | #define MXSER_HAS2 2 | |
037ad48b JS |
85 | |
86 | /* This is only for PCI */ | |
cd7ed64e | 87 | static const struct { |
037ad48b JS |
88 | int type; |
89 | int tx_fifo; | |
90 | int rx_fifo; | |
91 | int xmit_fifo_size; | |
92 | int rx_high_water; | |
93 | int rx_trigger; | |
94 | int rx_low_water; | |
95 | long max_baud; | |
cd7ed64e | 96 | } Gpci_uart_info[] = { |
037ad48b JS |
97 | {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L}, |
98 | {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L}, | |
99 | {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L} | |
100 | }; | |
cd7ed64e JS |
101 | #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info) |
102 | ||
103 | struct mxser_cardinfo { | |
104 | unsigned int nports; | |
105 | char *name; | |
106 | unsigned int flags; | |
107 | }; | |
108 | ||
109 | static const struct mxser_cardinfo mxser_cards[] = { | |
110 | { 8, "C168 series", }, /* C168-ISA */ | |
111 | { 4, "C104 series", }, /* C104-ISA */ | |
112 | { 4, "CI-104J series", }, /* CI104J */ | |
113 | { 8, "C168H/PCI series", }, /* C168-PCI */ | |
114 | { 4, "C104H/PCI series", }, /* C104-PCI */ | |
115 | { 4, "C102 series", MXSER_HAS2 }, /* C102-ISA */ | |
116 | { 4, "CI-132 series", MXSER_HAS2 }, /* CI132 */ | |
117 | { 4, "CI-134 series", }, /* CI134 */ | |
118 | { 2, "CP-132 series", }, /* CP132 */ | |
119 | { 4, "CP-114 series", }, /* CP114 */ | |
120 | { 4, "CT-114 series", }, /* CT114 */ | |
121 | { 2, "CP-102 series", MXSER_HIGHBAUD }, /* CP102 */ | |
122 | { 4, "CP-104U series", }, /* CP104U */ | |
123 | { 8, "CP-168U series", }, /* CP168U */ | |
124 | { 2, "CP-132U series", }, /* CP132U */ | |
125 | { 4, "CP-134U series", }, /* CP134U */ | |
126 | { 4, "CP-104JU series", }, /* CP104JU */ | |
127 | { 8, "Moxa UC7000 Serial", }, /* RC7000 */ | |
128 | { 8, "CP-118U series", }, /* CP118U */ | |
129 | { 2, "CP-102UL series", }, /* CP102UL */ | |
130 | { 2, "CP-102U series", }, /* CP102U */ | |
131 | { 8, "CP-118EL series", }, /* CP118EL */ | |
132 | { 8, "CP-168EL series", }, /* CP168EL */ | |
133 | { 4, "CP-104EL series", } /* CP104EL */ | |
134 | }; | |
037ad48b | 135 | |
cd7ed64e JS |
136 | /* driver_data correspond to the lines in the structure above |
137 | see also ISA probe function before you change something */ | |
037ad48b | 138 | static struct pci_device_id mxser_pcibrds[] = { |
3306ce3d | 139 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168), |
cd7ed64e | 140 | .driver_data = 3 }, |
3306ce3d | 141 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104), |
cd7ed64e | 142 | .driver_data = 4 }, |
3306ce3d | 143 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132), |
cd7ed64e | 144 | .driver_data = 8 }, |
3306ce3d | 145 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114), |
cd7ed64e | 146 | .driver_data = 9 }, |
3306ce3d | 147 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114), |
cd7ed64e | 148 | .driver_data = 10 }, |
3306ce3d | 149 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102), |
cd7ed64e | 150 | .driver_data = 11 }, |
3306ce3d | 151 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U), |
cd7ed64e | 152 | .driver_data = 12 }, |
3306ce3d | 153 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U), |
cd7ed64e | 154 | .driver_data = 13 }, |
3306ce3d | 155 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U), |
cd7ed64e | 156 | .driver_data = 14 }, |
3306ce3d | 157 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U), |
cd7ed64e | 158 | .driver_data = 15 }, |
3306ce3d | 159 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU), |
cd7ed64e | 160 | .driver_data = 16 }, |
3306ce3d | 161 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000), |
cd7ed64e | 162 | .driver_data = 17 }, |
3306ce3d | 163 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U), |
cd7ed64e | 164 | .driver_data = 18 }, |
3306ce3d | 165 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL), |
cd7ed64e | 166 | .driver_data = 19 }, |
3306ce3d | 167 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U), |
cd7ed64e | 168 | .driver_data = 20 }, |
3306ce3d | 169 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118EL), |
cd7ed64e | 170 | .driver_data = 21 }, |
3306ce3d | 171 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168EL), |
cd7ed64e | 172 | .driver_data = 22 }, |
3306ce3d | 173 | { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104EL), |
cd7ed64e | 174 | .driver_data = 23 }, |
3306ce3d | 175 | { } |
037ad48b | 176 | }; |
037ad48b JS |
177 | MODULE_DEVICE_TABLE(pci, mxser_pcibrds); |
178 | ||
037ad48b JS |
179 | static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 }; |
180 | static int ttymajor = MXSERMAJOR; | |
181 | static int calloutmajor = MXSERCUMAJOR; | |
037ad48b JS |
182 | |
183 | /* Variables for insmod */ | |
184 | ||
185 | MODULE_AUTHOR("Casper Yang"); | |
186 | MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver"); | |
187 | module_param_array(ioaddr, int, NULL, 0); | |
188 | module_param(ttymajor, int, 0); | |
037ad48b JS |
189 | MODULE_LICENSE("GPL"); |
190 | ||
191 | struct mxser_log { | |
192 | int tick; | |
193 | unsigned long rxcnt[MXSER_PORTS]; | |
194 | unsigned long txcnt[MXSER_PORTS]; | |
195 | }; | |
196 | ||
197 | ||
198 | struct mxser_mon { | |
199 | unsigned long rxcnt; | |
200 | unsigned long txcnt; | |
201 | unsigned long up_rxcnt; | |
202 | unsigned long up_txcnt; | |
203 | int modem_status; | |
204 | unsigned char hold_reason; | |
205 | }; | |
206 | ||
207 | struct mxser_mon_ext { | |
208 | unsigned long rx_cnt[32]; | |
209 | unsigned long tx_cnt[32]; | |
210 | unsigned long up_rxcnt[32]; | |
211 | unsigned long up_txcnt[32]; | |
212 | int modem_status[32]; | |
213 | ||
214 | long baudrate[32]; | |
215 | int databits[32]; | |
216 | int stopbits[32]; | |
217 | int parity[32]; | |
218 | int flowctrl[32]; | |
219 | int fifo[32]; | |
220 | int iftype[32]; | |
221 | }; | |
222 | ||
55b307da JS |
223 | struct mxser_board; |
224 | ||
225 | struct mxser_port { | |
226 | struct mxser_board *board; | |
227 | struct tty_struct *tty; | |
228 | ||
229 | unsigned long ioaddr; | |
230 | unsigned long opmode_ioaddr; | |
231 | int max_baud; | |
037ad48b | 232 | |
037ad48b JS |
233 | int rx_high_water; |
234 | int rx_trigger; /* Rx fifo trigger level */ | |
235 | int rx_low_water; | |
236 | int baud_base; /* max. speed */ | |
55b307da | 237 | long realbaud; |
037ad48b | 238 | int type; /* UART type */ |
55b307da JS |
239 | int flags; /* defined in tty.h */ |
240 | long session; /* Session of opening process */ | |
241 | long pgrp; /* pgrp of opening process */ | |
242 | ||
037ad48b | 243 | int x_char; /* xon/xoff character */ |
037ad48b JS |
244 | int IER; /* Interrupt Enable Register */ |
245 | int MCR; /* Modem control register */ | |
55b307da JS |
246 | |
247 | unsigned char stop_rx; | |
248 | unsigned char ldisc_stop_rx; | |
249 | ||
250 | int custom_divisor; | |
251 | int close_delay; | |
252 | unsigned short closing_wait; | |
253 | unsigned char err_shadow; | |
037ad48b | 254 | unsigned long event; |
55b307da | 255 | |
037ad48b JS |
256 | int count; /* # of fd on device */ |
257 | int blocked_open; /* # of blocked opens */ | |
55b307da JS |
258 | struct async_icount icount; /* kernel counters for 4 input interrupts */ |
259 | int timeout; | |
260 | ||
261 | int read_status_mask; | |
262 | int ignore_status_mask; | |
263 | int xmit_fifo_size; | |
037ad48b JS |
264 | unsigned char *xmit_buf; |
265 | int xmit_head; | |
266 | int xmit_tail; | |
267 | int xmit_cnt; | |
55b307da | 268 | |
037ad48b JS |
269 | struct termios normal_termios; |
270 | struct termios callout_termios; | |
55b307da JS |
271 | |
272 | struct mxser_mon mon_data; | |
273 | ||
274 | spinlock_t slock; | |
275 | struct work_struct tqueue; | |
037ad48b JS |
276 | wait_queue_head_t open_wait; |
277 | wait_queue_head_t close_wait; | |
278 | wait_queue_head_t delta_msr_wait; | |
55b307da JS |
279 | }; |
280 | ||
281 | struct mxser_board { | |
2094e757 | 282 | unsigned int idx; |
55b307da | 283 | int irq; |
cd7ed64e | 284 | const struct mxser_cardinfo *info; |
55b307da JS |
285 | unsigned long vector; |
286 | unsigned long vector_mask; | |
287 | ||
288 | int chip_flag; | |
289 | int uart_type; | |
290 | ||
291 | struct mxser_port ports[MXSER_PORTS_PER_BOARD]; | |
037ad48b JS |
292 | }; |
293 | ||
294 | struct mxser_mstatus { | |
295 | tcflag_t cflag; | |
296 | int cts; | |
297 | int dsr; | |
298 | int ri; | |
299 | int dcd; | |
300 | }; | |
301 | ||
302 | static struct mxser_mstatus GMStatus[MXSER_PORTS]; | |
303 | ||
304 | static int mxserBoardCAP[MXSER_BOARDS] = { | |
305 | 0, 0, 0, 0 | |
306 | /* 0x180, 0x280, 0x200, 0x320 */ | |
307 | }; | |
308 | ||
55b307da | 309 | static struct mxser_board mxser_boards[MXSER_BOARDS]; |
037ad48b | 310 | static struct tty_driver *mxvar_sdriver; |
037ad48b JS |
311 | static struct mxser_log mxvar_log; |
312 | static int mxvar_diagflag; | |
313 | static unsigned char mxser_msr[MXSER_PORTS + 1]; | |
314 | static struct mxser_mon_ext mon_data_ext; | |
315 | static int mxser_set_baud_method[MXSER_PORTS + 1]; | |
316 | static spinlock_t gm_lock; | |
317 | ||
037ad48b JS |
318 | static int CheckIsMoxaMust(int io) |
319 | { | |
320 | u8 oldmcr, hwid; | |
321 | int i; | |
322 | ||
323 | outb(0, io + UART_LCR); | |
324 | DISABLE_MOXA_MUST_ENCHANCE_MODE(io); | |
325 | oldmcr = inb(io + UART_MCR); | |
326 | outb(0, io + UART_MCR); | |
327 | SET_MOXA_MUST_XON1_VALUE(io, 0x11); | |
328 | if ((hwid = inb(io + UART_MCR)) != 0) { | |
329 | outb(oldmcr, io + UART_MCR); | |
330 | return MOXA_OTHER_UART; | |
331 | } | |
332 | ||
333 | GET_MOXA_MUST_HARDWARE_ID(io, &hwid); | |
cd7ed64e JS |
334 | for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */ |
335 | if (hwid == Gpci_uart_info[i].type) | |
037ad48b JS |
336 | return (int)hwid; |
337 | } | |
338 | return MOXA_OTHER_UART; | |
339 | } | |
340 | ||
55b307da | 341 | static void process_txrx_fifo(struct mxser_port *info) |
037ad48b JS |
342 | { |
343 | int i; | |
344 | ||
345 | if ((info->type == PORT_16450) || (info->type == PORT_8250)) { | |
346 | info->rx_trigger = 1; | |
347 | info->rx_high_water = 1; | |
348 | info->rx_low_water = 1; | |
349 | info->xmit_fifo_size = 1; | |
55b307da JS |
350 | } else |
351 | for (i = 0; i < UART_INFO_NUM; i++) | |
352 | if (info->board->chip_flag == Gpci_uart_info[i].type) { | |
037ad48b JS |
353 | info->rx_trigger = Gpci_uart_info[i].rx_trigger; |
354 | info->rx_low_water = Gpci_uart_info[i].rx_low_water; | |
355 | info->rx_high_water = Gpci_uart_info[i].rx_high_water; | |
356 | info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size; | |
357 | break; | |
358 | } | |
037ad48b JS |
359 | } |
360 | ||
a8dea4ec | 361 | static void mxser_do_softint(void *private_) |
037ad48b | 362 | { |
a8dea4ec | 363 | struct mxser_port *info = private_; |
a8b74de9 | 364 | struct tty_struct *tty = info->tty; |
037ad48b | 365 | |
a8dea4ec JS |
366 | if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event)) |
367 | tty_wakeup(tty); | |
a8dea4ec | 368 | } |
037ad48b | 369 | |
a8dea4ec JS |
370 | static unsigned char mxser_get_msr(int baseaddr, int mode, int port) |
371 | { | |
372 | unsigned char status = 0; | |
037ad48b | 373 | |
a8dea4ec | 374 | status = inb(baseaddr + UART_MSR); |
037ad48b | 375 | |
a8dea4ec JS |
376 | mxser_msr[port] &= 0x0F; |
377 | mxser_msr[port] |= status; | |
378 | status = mxser_msr[port]; | |
379 | if (mode) | |
380 | mxser_msr[port] = 0; | |
037ad48b | 381 | |
a8dea4ec JS |
382 | return status; |
383 | } | |
55b307da | 384 | |
a8dea4ec JS |
385 | static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, |
386 | struct mxser_port *port) | |
387 | { | |
388 | DECLARE_WAITQUEUE(wait, current); | |
389 | int retval; | |
390 | int do_clocal = 0; | |
391 | unsigned long flags; | |
392 | ||
393 | /* | |
394 | * If non-blocking mode is set, or the port is not enabled, | |
395 | * then make the check up front and then exit. | |
396 | */ | |
214efebb JS |
397 | if ((filp->f_flags & O_NONBLOCK) || |
398 | test_bit(TTY_IO_ERROR, &tty->flags)) { | |
a8dea4ec JS |
399 | port->flags |= ASYNC_NORMAL_ACTIVE; |
400 | return 0; | |
037ad48b | 401 | } |
a8dea4ec JS |
402 | |
403 | if (tty->termios->c_cflag & CLOCAL) | |
404 | do_clocal = 1; | |
405 | ||
037ad48b | 406 | /* |
a8dea4ec JS |
407 | * Block waiting for the carrier detect and the line to become |
408 | * free (i.e., not in use by the callout). While we are in | |
409 | * this loop, port->count is dropped by one, so that | |
410 | * mxser_close() knows when to free things. We restore it upon | |
411 | * exit, either normal or abnormal. | |
037ad48b | 412 | */ |
a8dea4ec JS |
413 | retval = 0; |
414 | add_wait_queue(&port->open_wait, &wait); | |
037ad48b | 415 | |
a8dea4ec JS |
416 | spin_lock_irqsave(&port->slock, flags); |
417 | if (!tty_hung_up_p(filp)) | |
418 | port->count--; | |
419 | spin_unlock_irqrestore(&port->slock, flags); | |
420 | port->blocked_open++; | |
421 | while (1) { | |
422 | spin_lock_irqsave(&port->slock, flags); | |
423 | outb(inb(port->ioaddr + UART_MCR) | | |
424 | UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR); | |
425 | spin_unlock_irqrestore(&port->slock, flags); | |
426 | set_current_state(TASK_INTERRUPTIBLE); | |
427 | if (tty_hung_up_p(filp) || !(port->flags & ASYNC_INITIALIZED)) { | |
428 | if (port->flags & ASYNC_HUP_NOTIFY) | |
429 | retval = -EAGAIN; | |
430 | else | |
431 | retval = -ERESTARTSYS; | |
432 | break; | |
433 | } | |
434 | if (!(port->flags & ASYNC_CLOSING) && | |
435 | (do_clocal || | |
436 | (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD))) | |
437 | break; | |
438 | if (signal_pending(current)) { | |
439 | retval = -ERESTARTSYS; | |
440 | break; | |
441 | } | |
442 | schedule(); | |
037ad48b | 443 | } |
a8dea4ec JS |
444 | set_current_state(TASK_RUNNING); |
445 | remove_wait_queue(&port->open_wait, &wait); | |
446 | if (!tty_hung_up_p(filp)) | |
447 | port->count++; | |
448 | port->blocked_open--; | |
449 | if (retval) | |
450 | return retval; | |
451 | port->flags |= ASYNC_NORMAL_ACTIVE; | |
037ad48b JS |
452 | return 0; |
453 | } | |
454 | ||
a8dea4ec | 455 | static int mxser_set_baud(struct mxser_port *info, long newspd) |
037ad48b | 456 | { |
a8dea4ec JS |
457 | int quot = 0; |
458 | unsigned char cval; | |
459 | int ret = 0; | |
460 | unsigned long flags; | |
037ad48b | 461 | |
a8dea4ec JS |
462 | if (!info->tty || !info->tty->termios) |
463 | return ret; | |
037ad48b | 464 | |
a8dea4ec JS |
465 | if (!(info->ioaddr)) |
466 | return ret; | |
037ad48b | 467 | |
a8dea4ec JS |
468 | if (newspd > info->max_baud) |
469 | return 0; | |
037ad48b | 470 | |
a8dea4ec JS |
471 | info->realbaud = newspd; |
472 | if (newspd == 134) { | |
473 | quot = (2 * info->baud_base / 269); | |
474 | } else if (newspd) { | |
475 | quot = info->baud_base / newspd; | |
476 | if (quot == 0) | |
477 | quot = 1; | |
478 | } else { | |
479 | quot = 0; | |
037ad48b JS |
480 | } |
481 | ||
a8dea4ec JS |
482 | info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base); |
483 | info->timeout += HZ / 50; /* Add .02 seconds of slop */ | |
037ad48b | 484 | |
a8dea4ec JS |
485 | if (quot) { |
486 | spin_lock_irqsave(&info->slock, flags); | |
487 | info->MCR |= UART_MCR_DTR; | |
488 | outb(info->MCR, info->ioaddr + UART_MCR); | |
489 | spin_unlock_irqrestore(&info->slock, flags); | |
490 | } else { | |
491 | spin_lock_irqsave(&info->slock, flags); | |
492 | info->MCR &= ~UART_MCR_DTR; | |
493 | outb(info->MCR, info->ioaddr + UART_MCR); | |
494 | spin_unlock_irqrestore(&info->slock, flags); | |
495 | return ret; | |
037ad48b | 496 | } |
037ad48b | 497 | |
a8dea4ec | 498 | cval = inb(info->ioaddr + UART_LCR); |
037ad48b | 499 | |
a8dea4ec | 500 | outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */ |
037ad48b | 501 | |
a8dea4ec JS |
502 | outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */ |
503 | outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */ | |
504 | outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */ | |
037ad48b | 505 | |
037ad48b | 506 | |
a8dea4ec JS |
507 | return ret; |
508 | } | |
037ad48b | 509 | |
a8dea4ec JS |
510 | /* |
511 | * This routine is called to set the UART divisor registers to match | |
512 | * the specified baud rate for a serial port. | |
513 | */ | |
514 | static int mxser_change_speed(struct mxser_port *info, | |
515 | struct termios *old_termios) | |
516 | { | |
517 | unsigned cflag, cval, fcr; | |
518 | int ret = 0; | |
519 | unsigned char status; | |
520 | long baud; | |
521 | unsigned long flags; | |
037ad48b | 522 | |
a8dea4ec JS |
523 | if (!info->tty || !info->tty->termios) |
524 | return ret; | |
525 | cflag = info->tty->termios->c_cflag; | |
526 | if (!(info->ioaddr)) | |
527 | return ret; | |
037ad48b | 528 | |
a8dea4ec JS |
529 | if (mxser_set_baud_method[info->tty->index] == 0) { |
530 | baud = tty_get_baud_rate(info->tty); | |
531 | mxser_set_baud(info, baud); | |
532 | } | |
037ad48b | 533 | |
a8dea4ec JS |
534 | /* byte size and parity */ |
535 | switch (cflag & CSIZE) { | |
536 | case CS5: | |
537 | cval = 0x00; | |
538 | break; | |
539 | case CS6: | |
540 | cval = 0x01; | |
541 | break; | |
542 | case CS7: | |
543 | cval = 0x02; | |
544 | break; | |
545 | case CS8: | |
546 | cval = 0x03; | |
547 | break; | |
548 | default: | |
549 | cval = 0x00; | |
550 | break; /* too keep GCC shut... */ | |
551 | } | |
552 | if (cflag & CSTOPB) | |
553 | cval |= 0x04; | |
554 | if (cflag & PARENB) | |
555 | cval |= UART_LCR_PARITY; | |
556 | if (!(cflag & PARODD)) | |
557 | cval |= UART_LCR_EPAR; | |
558 | if (cflag & CMSPAR) | |
559 | cval |= UART_LCR_SPAR; | |
037ad48b | 560 | |
a8dea4ec JS |
561 | if ((info->type == PORT_8250) || (info->type == PORT_16450)) { |
562 | if (info->board->chip_flag) { | |
563 | fcr = UART_FCR_ENABLE_FIFO; | |
564 | fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; | |
565 | SET_MOXA_MUST_FIFO_VALUE(info); | |
566 | } else | |
567 | fcr = 0; | |
568 | } else { | |
569 | fcr = UART_FCR_ENABLE_FIFO; | |
a8dea4ec JS |
570 | if (info->board->chip_flag) { |
571 | fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; | |
572 | SET_MOXA_MUST_FIFO_VALUE(info); | |
573 | } else { | |
a8dea4ec JS |
574 | switch (info->rx_trigger) { |
575 | case 1: | |
576 | fcr |= UART_FCR_TRIGGER_1; | |
577 | break; | |
578 | case 4: | |
579 | fcr |= UART_FCR_TRIGGER_4; | |
580 | break; | |
581 | case 8: | |
582 | fcr |= UART_FCR_TRIGGER_8; | |
583 | break; | |
584 | default: | |
585 | fcr |= UART_FCR_TRIGGER_14; | |
586 | break; | |
587 | } | |
037ad48b | 588 | } |
037ad48b JS |
589 | } |
590 | ||
a8dea4ec JS |
591 | /* CTS flow control flag and modem status interrupts */ |
592 | info->IER &= ~UART_IER_MSI; | |
593 | info->MCR &= ~UART_MCR_AFE; | |
594 | if (cflag & CRTSCTS) { | |
595 | info->flags |= ASYNC_CTS_FLOW; | |
596 | info->IER |= UART_IER_MSI; | |
597 | if ((info->type == PORT_16550A) || (info->board->chip_flag)) { | |
598 | info->MCR |= UART_MCR_AFE; | |
a8dea4ec | 599 | } else { |
a8dea4ec | 600 | status = inb(info->ioaddr + UART_MSR); |
a8dea4ec JS |
601 | if (info->tty->hw_stopped) { |
602 | if (status & UART_MSR_CTS) { | |
603 | info->tty->hw_stopped = 0; | |
604 | if (info->type != PORT_16550A && | |
605 | !info->board->chip_flag) { | |
606 | outb(info->IER & ~UART_IER_THRI, | |
607 | info->ioaddr + | |
608 | UART_IER); | |
609 | info->IER |= UART_IER_THRI; | |
610 | outb(info->IER, info->ioaddr + | |
611 | UART_IER); | |
612 | } | |
613 | set_bit(MXSER_EVENT_TXLOW, &info->event); | |
614 | schedule_work(&info->tqueue); } | |
615 | } else { | |
616 | if (!(status & UART_MSR_CTS)) { | |
617 | info->tty->hw_stopped = 1; | |
618 | if ((info->type != PORT_16550A) && | |
619 | (!info->board->chip_flag)) { | |
620 | info->IER &= ~UART_IER_THRI; | |
621 | outb(info->IER, info->ioaddr + | |
622 | UART_IER); | |
623 | } | |
624 | } | |
625 | } | |
626 | } | |
627 | } else { | |
628 | info->flags &= ~ASYNC_CTS_FLOW; | |
629 | } | |
630 | outb(info->MCR, info->ioaddr + UART_MCR); | |
631 | if (cflag & CLOCAL) { | |
632 | info->flags &= ~ASYNC_CHECK_CD; | |
633 | } else { | |
634 | info->flags |= ASYNC_CHECK_CD; | |
635 | info->IER |= UART_IER_MSI; | |
636 | } | |
637 | outb(info->IER, info->ioaddr + UART_IER); | |
037ad48b | 638 | |
a8dea4ec JS |
639 | /* |
640 | * Set up parity check flag | |
641 | */ | |
642 | info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; | |
643 | if (I_INPCK(info->tty)) | |
644 | info->read_status_mask |= UART_LSR_FE | UART_LSR_PE; | |
645 | if (I_BRKINT(info->tty) || I_PARMRK(info->tty)) | |
646 | info->read_status_mask |= UART_LSR_BI; | |
037ad48b | 647 | |
a8dea4ec | 648 | info->ignore_status_mask = 0; |
037ad48b | 649 | |
a8dea4ec JS |
650 | if (I_IGNBRK(info->tty)) { |
651 | info->ignore_status_mask |= UART_LSR_BI; | |
652 | info->read_status_mask |= UART_LSR_BI; | |
653 | /* | |
654 | * If we're ignore parity and break indicators, ignore | |
655 | * overruns too. (For real raw support). | |
656 | */ | |
657 | if (I_IGNPAR(info->tty)) { | |
658 | info->ignore_status_mask |= | |
659 | UART_LSR_OE | | |
660 | UART_LSR_PE | | |
661 | UART_LSR_FE; | |
662 | info->read_status_mask |= | |
663 | UART_LSR_OE | | |
664 | UART_LSR_PE | | |
665 | UART_LSR_FE; | |
037ad48b | 666 | } |
037ad48b | 667 | } |
a8dea4ec JS |
668 | if (info->board->chip_flag) { |
669 | spin_lock_irqsave(&info->slock, flags); | |
670 | SET_MOXA_MUST_XON1_VALUE(info->ioaddr, START_CHAR(info->tty)); | |
671 | SET_MOXA_MUST_XOFF1_VALUE(info->ioaddr, STOP_CHAR(info->tty)); | |
672 | if (I_IXON(info->tty)) { | |
673 | ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
674 | } else { | |
675 | DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
037ad48b | 676 | } |
a8dea4ec JS |
677 | if (I_IXOFF(info->tty)) { |
678 | ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
679 | } else { | |
680 | DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
037ad48b | 681 | } |
a8dea4ec | 682 | spin_unlock_irqrestore(&info->slock, flags); |
037ad48b | 683 | } |
037ad48b | 684 | |
037ad48b | 685 | |
a8dea4ec JS |
686 | outb(fcr, info->ioaddr + UART_FCR); /* set fcr */ |
687 | outb(cval, info->ioaddr + UART_LCR); | |
037ad48b | 688 | |
a8dea4ec | 689 | return ret; |
037ad48b JS |
690 | } |
691 | ||
a8dea4ec | 692 | static void mxser_check_modem_status(struct mxser_port *port, int status) |
037ad48b | 693 | { |
a8dea4ec JS |
694 | /* update input line counters */ |
695 | if (status & UART_MSR_TERI) | |
696 | port->icount.rng++; | |
697 | if (status & UART_MSR_DDSR) | |
698 | port->icount.dsr++; | |
699 | if (status & UART_MSR_DDCD) | |
700 | port->icount.dcd++; | |
701 | if (status & UART_MSR_DCTS) | |
702 | port->icount.cts++; | |
703 | port->mon_data.modem_status = status; | |
704 | wake_up_interruptible(&port->delta_msr_wait); | |
037ad48b | 705 | |
a8dea4ec JS |
706 | if ((port->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { |
707 | if (status & UART_MSR_DCD) | |
708 | wake_up_interruptible(&port->open_wait); | |
709 | schedule_work(&port->tqueue); | |
710 | } | |
037ad48b | 711 | |
a8dea4ec JS |
712 | if (port->flags & ASYNC_CTS_FLOW) { |
713 | if (port->tty->hw_stopped) { | |
714 | if (status & UART_MSR_CTS) { | |
715 | port->tty->hw_stopped = 0; | |
716 | ||
717 | if ((port->type != PORT_16550A) && | |
718 | (!port->board->chip_flag)) { | |
719 | outb(port->IER & ~UART_IER_THRI, | |
720 | port->ioaddr + UART_IER); | |
721 | port->IER |= UART_IER_THRI; | |
722 | outb(port->IER, port->ioaddr + | |
723 | UART_IER); | |
724 | } | |
725 | set_bit(MXSER_EVENT_TXLOW, &port->event); | |
726 | schedule_work(&port->tqueue); | |
727 | } | |
728 | } else { | |
729 | if (!(status & UART_MSR_CTS)) { | |
730 | port->tty->hw_stopped = 1; | |
731 | if (port->type != PORT_16550A && | |
732 | !port->board->chip_flag) { | |
733 | port->IER &= ~UART_IER_THRI; | |
734 | outb(port->IER, port->ioaddr + | |
735 | UART_IER); | |
736 | } | |
737 | } | |
738 | } | |
739 | } | |
037ad48b JS |
740 | } |
741 | ||
a8dea4ec | 742 | static int mxser_startup(struct mxser_port *info) |
037ad48b | 743 | { |
a8dea4ec JS |
744 | unsigned long page; |
745 | unsigned long flags; | |
037ad48b | 746 | |
a8dea4ec JS |
747 | page = __get_free_page(GFP_KERNEL); |
748 | if (!page) | |
749 | return -ENOMEM; | |
037ad48b | 750 | |
a8dea4ec | 751 | spin_lock_irqsave(&info->slock, flags); |
037ad48b | 752 | |
a8dea4ec JS |
753 | if (info->flags & ASYNC_INITIALIZED) { |
754 | free_page(page); | |
755 | spin_unlock_irqrestore(&info->slock, flags); | |
756 | return 0; | |
757 | } | |
037ad48b | 758 | |
a8dea4ec JS |
759 | if (!info->ioaddr || !info->type) { |
760 | if (info->tty) | |
761 | set_bit(TTY_IO_ERROR, &info->tty->flags); | |
762 | free_page(page); | |
763 | spin_unlock_irqrestore(&info->slock, flags); | |
037ad48b | 764 | return 0; |
a8dea4ec JS |
765 | } |
766 | if (info->xmit_buf) | |
767 | free_page(page); | |
768 | else | |
769 | info->xmit_buf = (unsigned char *) page; | |
037ad48b | 770 | |
037ad48b | 771 | /* |
a8dea4ec JS |
772 | * Clear the FIFO buffers and disable them |
773 | * (they will be reenabled in mxser_change_speed()) | |
037ad48b | 774 | */ |
a8dea4ec JS |
775 | if (info->board->chip_flag) |
776 | outb((UART_FCR_CLEAR_RCVR | | |
777 | UART_FCR_CLEAR_XMIT | | |
778 | MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR); | |
779 | else | |
780 | outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), | |
781 | info->ioaddr + UART_FCR); | |
782 | ||
783 | /* | |
784 | * At this point there's no way the LSR could still be 0xFF; | |
785 | * if it is, then bail out, because there's likely no UART | |
786 | * here. | |
787 | */ | |
788 | if (inb(info->ioaddr + UART_LSR) == 0xff) { | |
789 | spin_unlock_irqrestore(&info->slock, flags); | |
790 | if (capable(CAP_SYS_ADMIN)) { | |
791 | if (info->tty) | |
792 | set_bit(TTY_IO_ERROR, &info->tty->flags); | |
793 | return 0; | |
794 | } else | |
795 | return -ENODEV; | |
796 | } | |
797 | ||
798 | /* | |
799 | * Clear the interrupt registers. | |
800 | */ | |
801 | (void) inb(info->ioaddr + UART_LSR); | |
802 | (void) inb(info->ioaddr + UART_RX); | |
803 | (void) inb(info->ioaddr + UART_IIR); | |
804 | (void) inb(info->ioaddr + UART_MSR); | |
805 | ||
806 | /* | |
807 | * Now, initialize the UART | |
808 | */ | |
809 | outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */ | |
810 | info->MCR = UART_MCR_DTR | UART_MCR_RTS; | |
811 | outb(info->MCR, info->ioaddr + UART_MCR); | |
812 | ||
813 | /* | |
814 | * Finally, enable interrupts | |
815 | */ | |
816 | info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; | |
a8dea4ec | 817 | |
a8dea4ec JS |
818 | if (info->board->chip_flag) |
819 | info->IER |= MOXA_MUST_IER_EGDAI; | |
a8dea4ec JS |
820 | outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */ |
821 | ||
822 | /* | |
823 | * And clear the interrupt registers again for luck. | |
824 | */ | |
825 | (void) inb(info->ioaddr + UART_LSR); | |
826 | (void) inb(info->ioaddr + UART_RX); | |
827 | (void) inb(info->ioaddr + UART_IIR); | |
828 | (void) inb(info->ioaddr + UART_MSR); | |
829 | ||
830 | if (info->tty) | |
831 | clear_bit(TTY_IO_ERROR, &info->tty->flags); | |
832 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | |
833 | ||
834 | /* | |
835 | * and set the speed of the serial port | |
836 | */ | |
837 | spin_unlock_irqrestore(&info->slock, flags); | |
838 | mxser_change_speed(info, NULL); | |
839 | ||
840 | info->flags |= ASYNC_INITIALIZED; | |
841 | return 0; | |
842 | } | |
843 | ||
844 | /* | |
845 | * This routine will shutdown a serial port; interrupts maybe disabled, and | |
846 | * DTR is dropped if the hangup on close termio flag is on. | |
847 | */ | |
848 | static void mxser_shutdown(struct mxser_port *info) | |
849 | { | |
850 | unsigned long flags; | |
851 | ||
852 | if (!(info->flags & ASYNC_INITIALIZED)) | |
853 | return; | |
854 | ||
855 | spin_lock_irqsave(&info->slock, flags); | |
856 | ||
857 | /* | |
858 | * clear delta_msr_wait queue to avoid mem leaks: we may free the irq | |
859 | * here so the queue might never be waken up | |
860 | */ | |
861 | wake_up_interruptible(&info->delta_msr_wait); | |
862 | ||
863 | /* | |
864 | * Free the IRQ, if necessary | |
865 | */ | |
866 | if (info->xmit_buf) { | |
867 | free_page((unsigned long) info->xmit_buf); | |
868 | info->xmit_buf = NULL; | |
869 | } | |
870 | ||
871 | info->IER = 0; | |
872 | outb(0x00, info->ioaddr + UART_IER); | |
873 | ||
874 | if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) | |
875 | info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS); | |
876 | outb(info->MCR, info->ioaddr + UART_MCR); | |
877 | ||
878 | /* clear Rx/Tx FIFO's */ | |
a8dea4ec JS |
879 | if (info->board->chip_flag) |
880 | outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | | |
881 | MOXA_MUST_FCR_GDA_MODE_ENABLE, | |
882 | info->ioaddr + UART_FCR); | |
883 | else | |
a8dea4ec JS |
884 | outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, |
885 | info->ioaddr + UART_FCR); | |
886 | ||
887 | /* read data port to reset things */ | |
888 | (void) inb(info->ioaddr + UART_RX); | |
889 | ||
890 | if (info->tty) | |
891 | set_bit(TTY_IO_ERROR, &info->tty->flags); | |
892 | ||
893 | info->flags &= ~ASYNC_INITIALIZED; | |
894 | ||
a8dea4ec JS |
895 | if (info->board->chip_flag) |
896 | SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
a8dea4ec JS |
897 | |
898 | spin_unlock_irqrestore(&info->slock, flags); | |
899 | } | |
900 | ||
901 | /* | |
902 | * This routine is called whenever a serial port is opened. It | |
903 | * enables interrupts for a serial port, linking in its async structure into | |
904 | * the IRQ chain. It also performs the serial-specific | |
905 | * initialization for the tty structure. | |
906 | */ | |
907 | static int mxser_open(struct tty_struct *tty, struct file *filp) | |
908 | { | |
909 | struct mxser_port *info; | |
910 | int retval, line; | |
911 | ||
912 | /* initialize driver_data in case something fails */ | |
913 | tty->driver_data = NULL; | |
914 | ||
915 | line = tty->index; | |
916 | if (line == MXSER_PORTS) | |
917 | return 0; | |
918 | if (line < 0 || line > MXSER_PORTS) | |
919 | return -ENODEV; | |
920 | info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD]; | |
921 | if (!info->ioaddr) | |
922 | return -ENODEV; | |
923 | ||
924 | tty->driver_data = info; | |
925 | info->tty = tty; | |
926 | /* | |
927 | * Start up serial port | |
928 | */ | |
929 | info->count++; | |
930 | retval = mxser_startup(info); | |
931 | if (retval) | |
932 | return retval; | |
933 | ||
934 | retval = mxser_block_til_ready(tty, filp, info); | |
935 | if (retval) | |
936 | return retval; | |
937 | ||
938 | if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) { | |
037ad48b JS |
939 | if (tty->driver->subtype == SERIAL_TYPE_NORMAL) |
940 | *tty->termios = info->normal_termios; | |
941 | else | |
942 | *tty->termios = info->callout_termios; | |
943 | mxser_change_speed(info, NULL); | |
944 | } | |
945 | ||
08a4ae44 | 946 | info->session = process_session(current); |
037ad48b JS |
947 | info->pgrp = process_group(current); |
948 | ||
e079f495 | 949 | /* unmark here for very high baud rate (ex. 921600 bps) used */ |
037ad48b JS |
950 | tty->low_latency = 1; |
951 | return 0; | |
952 | } | |
953 | ||
954 | /* | |
955 | * This routine is called when the serial port gets closed. First, we | |
956 | * wait for the last remaining data to be sent. Then, we unlink its | |
957 | * async structure from the interrupt chain if necessary, and we free | |
958 | * that IRQ if nothing is left in the chain. | |
959 | */ | |
960 | static void mxser_close(struct tty_struct *tty, struct file *filp) | |
961 | { | |
55b307da | 962 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
963 | |
964 | unsigned long timeout; | |
965 | unsigned long flags; | |
037ad48b JS |
966 | |
967 | if (tty->index == MXSER_PORTS) | |
968 | return; | |
969 | if (!info) | |
970 | return; | |
971 | ||
972 | spin_lock_irqsave(&info->slock, flags); | |
973 | ||
974 | if (tty_hung_up_p(filp)) { | |
975 | spin_unlock_irqrestore(&info->slock, flags); | |
976 | return; | |
977 | } | |
978 | if ((tty->count == 1) && (info->count != 1)) { | |
979 | /* | |
980 | * Uh, oh. tty->count is 1, which means that the tty | |
981 | * structure will be freed. Info->count should always | |
982 | * be one in these conditions. If it's greater than | |
983 | * one, we've got real problems, since it means the | |
984 | * serial port won't be shutdown. | |
985 | */ | |
986 | printk(KERN_ERR "mxser_close: bad serial port count; " | |
987 | "tty->count is 1, info->count is %d\n", info->count); | |
988 | info->count = 1; | |
989 | } | |
990 | if (--info->count < 0) { | |
991 | printk(KERN_ERR "mxser_close: bad serial port count for " | |
55b307da | 992 | "ttys%d: %d\n", tty->index, info->count); |
037ad48b JS |
993 | info->count = 0; |
994 | } | |
995 | if (info->count) { | |
996 | spin_unlock_irqrestore(&info->slock, flags); | |
997 | return; | |
998 | } | |
999 | info->flags |= ASYNC_CLOSING; | |
1000 | spin_unlock_irqrestore(&info->slock, flags); | |
1001 | /* | |
1002 | * Save the termios structure, since this port may have | |
1003 | * separate termios for callout and dialin. | |
1004 | */ | |
1005 | if (info->flags & ASYNC_NORMAL_ACTIVE) | |
1006 | info->normal_termios = *tty->termios; | |
1007 | /* | |
1008 | * Now we wait for the transmit buffer to clear; and we notify | |
1009 | * the line discipline to only process XON/XOFF characters. | |
1010 | */ | |
1011 | tty->closing = 1; | |
1012 | if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) | |
1013 | tty_wait_until_sent(tty, info->closing_wait); | |
1014 | /* | |
1015 | * At this point we stop accepting input. To do this, we | |
1016 | * disable the receive line status interrupts, and tell the | |
1017 | * interrupt driver to stop checking the data ready bit in the | |
1018 | * line status register. | |
1019 | */ | |
1020 | info->IER &= ~UART_IER_RLSI; | |
55b307da | 1021 | if (info->board->chip_flag) |
037ad48b | 1022 | info->IER &= ~MOXA_MUST_RECV_ISR; |
e079f495 | 1023 | |
037ad48b | 1024 | if (info->flags & ASYNC_INITIALIZED) { |
55b307da | 1025 | outb(info->IER, info->ioaddr + UART_IER); |
037ad48b JS |
1026 | /* |
1027 | * Before we drop DTR, make sure the UART transmitter | |
1028 | * has completely drained; this is especially | |
1029 | * important if there is a transmit FIFO! | |
1030 | */ | |
1031 | timeout = jiffies + HZ; | |
55b307da | 1032 | while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) { |
037ad48b JS |
1033 | schedule_timeout_interruptible(5); |
1034 | if (time_after(jiffies, timeout)) | |
1035 | break; | |
1036 | } | |
1037 | } | |
1038 | mxser_shutdown(info); | |
1039 | ||
1040 | if (tty->driver->flush_buffer) | |
1041 | tty->driver->flush_buffer(tty); | |
1042 | ||
7e8bcf9a | 1043 | tty_ldisc_flush(tty); |
037ad48b JS |
1044 | |
1045 | tty->closing = 0; | |
1046 | info->event = 0; | |
1047 | info->tty = NULL; | |
1048 | if (info->blocked_open) { | |
1049 | if (info->close_delay) | |
1050 | schedule_timeout_interruptible(info->close_delay); | |
1051 | wake_up_interruptible(&info->open_wait); | |
1052 | } | |
1053 | ||
1054 | info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING); | |
1055 | wake_up_interruptible(&info->close_wait); | |
1056 | ||
1057 | } | |
1058 | ||
1059 | static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) | |
1060 | { | |
1061 | int c, total = 0; | |
55b307da | 1062 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
1063 | unsigned long flags; |
1064 | ||
1065 | if (!info->xmit_buf) | |
1066 | return 0; | |
1067 | ||
1068 | while (1) { | |
1069 | c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, | |
1070 | SERIAL_XMIT_SIZE - info->xmit_head)); | |
1071 | if (c <= 0) | |
1072 | break; | |
1073 | ||
1074 | memcpy(info->xmit_buf + info->xmit_head, buf, c); | |
1075 | spin_lock_irqsave(&info->slock, flags); | |
1076 | info->xmit_head = (info->xmit_head + c) & | |
1077 | (SERIAL_XMIT_SIZE - 1); | |
1078 | info->xmit_cnt += c; | |
1079 | spin_unlock_irqrestore(&info->slock, flags); | |
1080 | ||
1081 | buf += c; | |
1082 | count -= c; | |
1083 | total += c; | |
1084 | } | |
1085 | ||
e079f495 | 1086 | if (info->xmit_cnt && !tty->stopped) { |
037ad48b JS |
1087 | if (!tty->hw_stopped || |
1088 | (info->type == PORT_16550A) || | |
55b307da | 1089 | (info->board->chip_flag)) { |
037ad48b | 1090 | spin_lock_irqsave(&info->slock, flags); |
55b307da JS |
1091 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + |
1092 | UART_IER); | |
037ad48b | 1093 | info->IER |= UART_IER_THRI; |
55b307da | 1094 | outb(info->IER, info->ioaddr + UART_IER); |
037ad48b JS |
1095 | spin_unlock_irqrestore(&info->slock, flags); |
1096 | } | |
1097 | } | |
1098 | return total; | |
1099 | } | |
1100 | ||
1101 | static void mxser_put_char(struct tty_struct *tty, unsigned char ch) | |
1102 | { | |
55b307da | 1103 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
1104 | unsigned long flags; |
1105 | ||
1106 | if (!info->xmit_buf) | |
1107 | return; | |
1108 | ||
1109 | if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1) | |
1110 | return; | |
1111 | ||
1112 | spin_lock_irqsave(&info->slock, flags); | |
1113 | info->xmit_buf[info->xmit_head++] = ch; | |
1114 | info->xmit_head &= SERIAL_XMIT_SIZE - 1; | |
1115 | info->xmit_cnt++; | |
1116 | spin_unlock_irqrestore(&info->slock, flags); | |
e079f495 | 1117 | if (!tty->stopped) { |
037ad48b JS |
1118 | if (!tty->hw_stopped || |
1119 | (info->type == PORT_16550A) || | |
55b307da | 1120 | info->board->chip_flag) { |
037ad48b | 1121 | spin_lock_irqsave(&info->slock, flags); |
55b307da | 1122 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
037ad48b | 1123 | info->IER |= UART_IER_THRI; |
55b307da | 1124 | outb(info->IER, info->ioaddr + UART_IER); |
037ad48b JS |
1125 | spin_unlock_irqrestore(&info->slock, flags); |
1126 | } | |
1127 | } | |
1128 | } | |
1129 | ||
1130 | ||
1131 | static void mxser_flush_chars(struct tty_struct *tty) | |
1132 | { | |
55b307da | 1133 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
1134 | unsigned long flags; |
1135 | ||
1136 | if (info->xmit_cnt <= 0 || | |
1137 | tty->stopped || | |
1138 | !info->xmit_buf || | |
1139 | (tty->hw_stopped && | |
1140 | (info->type != PORT_16550A) && | |
55b307da | 1141 | (!info->board->chip_flag) |
037ad48b JS |
1142 | )) |
1143 | return; | |
1144 | ||
1145 | spin_lock_irqsave(&info->slock, flags); | |
1146 | ||
55b307da | 1147 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
037ad48b | 1148 | info->IER |= UART_IER_THRI; |
55b307da | 1149 | outb(info->IER, info->ioaddr + UART_IER); |
037ad48b JS |
1150 | |
1151 | spin_unlock_irqrestore(&info->slock, flags); | |
1152 | } | |
1153 | ||
1154 | static int mxser_write_room(struct tty_struct *tty) | |
1155 | { | |
55b307da | 1156 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
1157 | int ret; |
1158 | ||
1159 | ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; | |
1160 | if (ret < 0) | |
1161 | ret = 0; | |
1162 | return ret; | |
1163 | } | |
1164 | ||
1165 | static int mxser_chars_in_buffer(struct tty_struct *tty) | |
1166 | { | |
55b307da | 1167 | struct mxser_port *info = tty->driver_data; |
925e9c1c | 1168 | return info->xmit_cnt; |
037ad48b JS |
1169 | } |
1170 | ||
1171 | static void mxser_flush_buffer(struct tty_struct *tty) | |
1172 | { | |
55b307da | 1173 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
1174 | char fcr; |
1175 | unsigned long flags; | |
1176 | ||
1177 | ||
1178 | spin_lock_irqsave(&info->slock, flags); | |
1179 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | |
1180 | ||
55b307da | 1181 | fcr = inb(info->ioaddr + UART_FCR); |
037ad48b | 1182 | outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), |
55b307da JS |
1183 | info->ioaddr + UART_FCR); |
1184 | outb(fcr, info->ioaddr + UART_FCR); | |
037ad48b JS |
1185 | |
1186 | spin_unlock_irqrestore(&info->slock, flags); | |
037ad48b | 1187 | |
7e8bcf9a | 1188 | tty_wakeup(tty); |
037ad48b JS |
1189 | } |
1190 | ||
a8dea4ec JS |
1191 | /* |
1192 | * ------------------------------------------------------------ | |
1193 | * friends of mxser_ioctl() | |
1194 | * ------------------------------------------------------------ | |
1195 | */ | |
1196 | static int mxser_get_serial_info(struct mxser_port *info, | |
1197 | struct serial_struct __user *retinfo) | |
037ad48b | 1198 | { |
a8dea4ec | 1199 | struct serial_struct tmp; |
037ad48b | 1200 | |
a8dea4ec JS |
1201 | if (!retinfo) |
1202 | return -EFAULT; | |
1203 | memset(&tmp, 0, sizeof(tmp)); | |
1204 | tmp.type = info->type; | |
1205 | tmp.line = info->tty->index; | |
1206 | tmp.port = info->ioaddr; | |
1207 | tmp.irq = info->board->irq; | |
1208 | tmp.flags = info->flags; | |
1209 | tmp.baud_base = info->baud_base; | |
1210 | tmp.close_delay = info->close_delay; | |
1211 | tmp.closing_wait = info->closing_wait; | |
1212 | tmp.custom_divisor = info->custom_divisor; | |
1213 | tmp.hub6 = 0; | |
1214 | if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) | |
1215 | return -EFAULT; | |
1216 | return 0; | |
1217 | } | |
037ad48b | 1218 | |
a8dea4ec JS |
1219 | static int mxser_set_serial_info(struct mxser_port *info, |
1220 | struct serial_struct __user *new_info) | |
1221 | { | |
1222 | struct serial_struct new_serial; | |
1223 | unsigned int flags; | |
1224 | int retval = 0; | |
037ad48b | 1225 | |
a8dea4ec JS |
1226 | if (!new_info || !info->ioaddr) |
1227 | return -EFAULT; | |
1228 | if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) | |
1229 | return -EFAULT; | |
037ad48b | 1230 | |
a8dea4ec JS |
1231 | if ((new_serial.irq != info->board->irq) || |
1232 | (new_serial.port != info->ioaddr) || | |
1233 | (new_serial.custom_divisor != info->custom_divisor) || | |
1234 | (new_serial.baud_base != info->baud_base)) | |
1235 | return -EPERM; | |
037ad48b | 1236 | |
a8dea4ec JS |
1237 | flags = info->flags & ASYNC_SPD_MASK; |
1238 | ||
1239 | if (!capable(CAP_SYS_ADMIN)) { | |
1240 | if ((new_serial.baud_base != info->baud_base) || | |
1241 | (new_serial.close_delay != info->close_delay) || | |
1242 | ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK))) | |
1243 | return -EPERM; | |
1244 | info->flags = ((info->flags & ~ASYNC_USR_MASK) | | |
1245 | (new_serial.flags & ASYNC_USR_MASK)); | |
1246 | } else { | |
037ad48b | 1247 | /* |
a8dea4ec JS |
1248 | * OK, past this point, all the error checking has been done. |
1249 | * At this point, we start making changes..... | |
037ad48b | 1250 | */ |
a8dea4ec JS |
1251 | info->flags = ((info->flags & ~ASYNC_FLAGS) | |
1252 | (new_serial.flags & ASYNC_FLAGS)); | |
1253 | info->close_delay = new_serial.close_delay * HZ / 100; | |
1254 | info->closing_wait = new_serial.closing_wait * HZ / 100; | |
1255 | info->tty->low_latency = | |
1256 | (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; | |
e079f495 | 1257 | info->tty->low_latency = 0; |
a8dea4ec | 1258 | } |
037ad48b | 1259 | |
a8dea4ec | 1260 | info->type = new_serial.type; |
037ad48b | 1261 | |
a8dea4ec JS |
1262 | process_txrx_fifo(info); |
1263 | ||
1264 | if (info->flags & ASYNC_INITIALIZED) { | |
1265 | if (flags != (info->flags & ASYNC_SPD_MASK)) | |
1266 | mxser_change_speed(info, NULL); | |
1267 | } else | |
1268 | retval = mxser_startup(info); | |
1269 | ||
1270 | return retval; | |
1271 | } | |
037ad48b | 1272 | |
a8dea4ec JS |
1273 | /* |
1274 | * mxser_get_lsr_info - get line status register info | |
1275 | * | |
1276 | * Purpose: Let user call ioctl() to get info when the UART physically | |
1277 | * is emptied. On bus types like RS485, the transmitter must | |
1278 | * release the bus after transmitting. This must be done when | |
1279 | * the transmit shift register is empty, not be done when the | |
1280 | * transmit holding register is empty. This functionality | |
1281 | * allows an RS485 driver to be written in user space. | |
1282 | */ | |
1283 | static int mxser_get_lsr_info(struct mxser_port *info, | |
1284 | unsigned int __user *value) | |
1285 | { | |
1286 | unsigned char status; | |
1287 | unsigned int result; | |
1288 | unsigned long flags; | |
037ad48b | 1289 | |
a8dea4ec JS |
1290 | spin_lock_irqsave(&info->slock, flags); |
1291 | status = inb(info->ioaddr + UART_LSR); | |
1292 | spin_unlock_irqrestore(&info->slock, flags); | |
1293 | result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); | |
1294 | return put_user(result, value); | |
1295 | } | |
037ad48b | 1296 | |
a8dea4ec JS |
1297 | /* |
1298 | * This routine sends a break character out the serial port. | |
1299 | */ | |
1300 | static void mxser_send_break(struct mxser_port *info, int duration) | |
1301 | { | |
1302 | unsigned long flags; | |
037ad48b | 1303 | |
a8dea4ec JS |
1304 | if (!info->ioaddr) |
1305 | return; | |
1306 | set_current_state(TASK_INTERRUPTIBLE); | |
1307 | spin_lock_irqsave(&info->slock, flags); | |
1308 | outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, | |
1309 | info->ioaddr + UART_LCR); | |
1310 | spin_unlock_irqrestore(&info->slock, flags); | |
1311 | schedule_timeout(duration); | |
1312 | spin_lock_irqsave(&info->slock, flags); | |
1313 | outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, | |
1314 | info->ioaddr + UART_LCR); | |
1315 | spin_unlock_irqrestore(&info->slock, flags); | |
1316 | } | |
037ad48b | 1317 | |
a8dea4ec JS |
1318 | static int mxser_tiocmget(struct tty_struct *tty, struct file *file) |
1319 | { | |
1320 | struct mxser_port *info = tty->driver_data; | |
1321 | unsigned char control, status; | |
1322 | unsigned long flags; | |
037ad48b | 1323 | |
037ad48b | 1324 | |
a8dea4ec JS |
1325 | if (tty->index == MXSER_PORTS) |
1326 | return -ENOIOCTLCMD; | |
214efebb | 1327 | if (test_bit(TTY_IO_ERROR, &tty->flags)) |
a8dea4ec | 1328 | return -EIO; |
037ad48b | 1329 | |
a8dea4ec | 1330 | control = info->MCR; |
037ad48b | 1331 | |
a8dea4ec JS |
1332 | spin_lock_irqsave(&info->slock, flags); |
1333 | status = inb(info->ioaddr + UART_MSR); | |
1334 | if (status & UART_MSR_ANY_DELTA) | |
1335 | mxser_check_modem_status(info, status); | |
1336 | spin_unlock_irqrestore(&info->slock, flags); | |
1337 | return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | | |
1338 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | | |
1339 | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | | |
1340 | ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | | |
1341 | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | | |
1342 | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); | |
1343 | } | |
037ad48b | 1344 | |
a8dea4ec JS |
1345 | static int mxser_tiocmset(struct tty_struct *tty, struct file *file, |
1346 | unsigned int set, unsigned int clear) | |
1347 | { | |
1348 | struct mxser_port *info = tty->driver_data; | |
1349 | unsigned long flags; | |
037ad48b | 1350 | |
037ad48b | 1351 | |
a8dea4ec JS |
1352 | if (tty->index == MXSER_PORTS) |
1353 | return -ENOIOCTLCMD; | |
214efebb | 1354 | if (test_bit(TTY_IO_ERROR, &tty->flags)) |
a8dea4ec | 1355 | return -EIO; |
037ad48b | 1356 | |
a8dea4ec | 1357 | spin_lock_irqsave(&info->slock, flags); |
037ad48b | 1358 | |
a8dea4ec JS |
1359 | if (set & TIOCM_RTS) |
1360 | info->MCR |= UART_MCR_RTS; | |
1361 | if (set & TIOCM_DTR) | |
1362 | info->MCR |= UART_MCR_DTR; | |
037ad48b | 1363 | |
a8dea4ec JS |
1364 | if (clear & TIOCM_RTS) |
1365 | info->MCR &= ~UART_MCR_RTS; | |
1366 | if (clear & TIOCM_DTR) | |
1367 | info->MCR &= ~UART_MCR_DTR; | |
037ad48b | 1368 | |
a8dea4ec JS |
1369 | outb(info->MCR, info->ioaddr + UART_MCR); |
1370 | spin_unlock_irqrestore(&info->slock, flags); | |
037ad48b JS |
1371 | return 0; |
1372 | } | |
1373 | ||
a8dea4ec | 1374 | static int mxser_program_mode(int port) |
037ad48b | 1375 | { |
a8dea4ec | 1376 | int id, i, j, n; |
037ad48b | 1377 | |
a8dea4ec JS |
1378 | spin_lock(&gm_lock); |
1379 | outb(0, port); | |
1380 | outb(0, port); | |
1381 | outb(0, port); | |
1382 | (void)inb(port); | |
1383 | (void)inb(port); | |
1384 | outb(0, port); | |
1385 | (void)inb(port); | |
a8dea4ec | 1386 | spin_unlock(&gm_lock); |
037ad48b | 1387 | |
a8dea4ec JS |
1388 | id = inb(port + 1) & 0x1F; |
1389 | if ((id != C168_ASIC_ID) && | |
1390 | (id != C104_ASIC_ID) && | |
1391 | (id != C102_ASIC_ID) && | |
1392 | (id != CI132_ASIC_ID) && | |
1393 | (id != CI134_ASIC_ID) && | |
1394 | (id != CI104J_ASIC_ID)) | |
1395 | return -1; | |
1396 | for (i = 0, j = 0; i < 4; i++) { | |
1397 | n = inb(port + 2); | |
1398 | if (n == 'M') { | |
1399 | j = 1; | |
1400 | } else if ((j == 1) && (n == 1)) { | |
1401 | j = 2; | |
1402 | break; | |
1403 | } else | |
1404 | j = 0; | |
1405 | } | |
1406 | if (j != 2) | |
1407 | id = -2; | |
1408 | return id; | |
1409 | } | |
1410 | ||
1411 | static void mxser_normal_mode(int port) | |
1412 | { | |
1413 | int i, n; | |
1414 | ||
1415 | outb(0xA5, port + 1); | |
1416 | outb(0x80, port + 3); | |
1417 | outb(12, port + 0); /* 9600 bps */ | |
1418 | outb(0, port + 1); | |
1419 | outb(0x03, port + 3); /* 8 data bits */ | |
1420 | outb(0x13, port + 4); /* loop back mode */ | |
1421 | for (i = 0; i < 16; i++) { | |
1422 | n = inb(port + 5); | |
1423 | if ((n & 0x61) == 0x60) | |
1424 | break; | |
1425 | if ((n & 1) == 1) | |
1426 | (void)inb(port); | |
1427 | } | |
1428 | outb(0x00, port + 4); | |
1429 | } | |
1430 | ||
1431 | #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */ | |
1432 | #define CHIP_DO 0x02 /* Serial Data Output in Eprom */ | |
1433 | #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */ | |
1434 | #define CHIP_DI 0x08 /* Serial Data Input in Eprom */ | |
1435 | #define EN_CCMD 0x000 /* Chip's command register */ | |
1436 | #define EN0_RSARLO 0x008 /* Remote start address reg 0 */ | |
1437 | #define EN0_RSARHI 0x009 /* Remote start address reg 1 */ | |
1438 | #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */ | |
1439 | #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */ | |
1440 | #define EN0_DCFG 0x00E /* Data configuration reg WR */ | |
1441 | #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */ | |
1442 | #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */ | |
1443 | #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */ | |
1444 | static int mxser_read_register(int port, unsigned short *regs) | |
1445 | { | |
1446 | int i, k, value, id; | |
1447 | unsigned int j; | |
1448 | ||
1449 | id = mxser_program_mode(port); | |
1450 | if (id < 0) | |
1451 | return id; | |
1452 | for (i = 0; i < 14; i++) { | |
1453 | k = (i & 0x3F) | 0x180; | |
1454 | for (j = 0x100; j > 0; j >>= 1) { | |
1455 | outb(CHIP_CS, port); | |
1456 | if (k & j) { | |
1457 | outb(CHIP_CS | CHIP_DO, port); | |
1458 | outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */ | |
1459 | } else { | |
1460 | outb(CHIP_CS, port); | |
1461 | outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */ | |
1462 | } | |
1463 | } | |
1464 | (void)inb(port); | |
1465 | value = 0; | |
1466 | for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) { | |
1467 | outb(CHIP_CS, port); | |
1468 | outb(CHIP_CS | CHIP_SK, port); | |
1469 | if (inb(port) & CHIP_DI) | |
1470 | value |= j; | |
1471 | } | |
1472 | regs[i] = value; | |
1473 | outb(0, port); | |
1474 | } | |
1475 | mxser_normal_mode(port); | |
1476 | return id; | |
1477 | } | |
1478 | ||
a8dea4ec JS |
1479 | static int mxser_ioctl_special(unsigned int cmd, void __user *argp) |
1480 | { | |
1481 | struct mxser_port *port; | |
1482 | int result, status; | |
1483 | unsigned int i, j; | |
1484 | ||
1485 | switch (cmd) { | |
1486 | case MOXA_GET_CONF: | |
1487 | /* if (copy_to_user(argp, mxsercfg, | |
1488 | sizeof(struct mxser_hwconf) * 4)) | |
1489 | return -EFAULT; | |
1490 | return 0;*/ | |
1491 | return -ENXIO; | |
1492 | case MOXA_GET_MAJOR: | |
1493 | if (copy_to_user(argp, &ttymajor, sizeof(int))) | |
1494 | return -EFAULT; | |
1495 | return 0; | |
1496 | ||
1497 | case MOXA_GET_CUMAJOR: | |
1498 | if (copy_to_user(argp, &calloutmajor, sizeof(int))) | |
037ad48b JS |
1499 | return -EFAULT; |
1500 | return 0; | |
1501 | ||
1502 | case MOXA_CHKPORTENABLE: | |
1503 | result = 0; | |
55b307da JS |
1504 | |
1505 | for (i = 0; i < MXSER_BOARDS; i++) | |
1506 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) | |
1507 | if (mxser_boards[i].ports[j].ioaddr) | |
1508 | result |= (1 << i); | |
1509 | ||
037ad48b JS |
1510 | return put_user(result, (unsigned long __user *)argp); |
1511 | case MOXA_GETDATACOUNT: | |
1512 | if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log))) | |
1513 | return -EFAULT; | |
1514 | return 0; | |
1515 | case MOXA_GETMSTATUS: | |
55b307da JS |
1516 | for (i = 0; i < MXSER_BOARDS; i++) |
1517 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { | |
1518 | port = &mxser_boards[i].ports[j]; | |
1519 | ||
1520 | GMStatus[i].ri = 0; | |
1521 | if (!port->ioaddr) { | |
1522 | GMStatus[i].dcd = 0; | |
1523 | GMStatus[i].dsr = 0; | |
1524 | GMStatus[i].cts = 0; | |
1525 | continue; | |
1526 | } | |
037ad48b | 1527 | |
55b307da JS |
1528 | if (!port->tty || !port->tty->termios) |
1529 | GMStatus[i].cflag = | |
1530 | port->normal_termios.c_cflag; | |
1531 | else | |
1532 | GMStatus[i].cflag = | |
1533 | port->tty->termios->c_cflag; | |
037ad48b | 1534 | |
55b307da JS |
1535 | status = inb(port->ioaddr + UART_MSR); |
1536 | if (status & 0x80 /*UART_MSR_DCD */ ) | |
1537 | GMStatus[i].dcd = 1; | |
1538 | else | |
1539 | GMStatus[i].dcd = 0; | |
037ad48b | 1540 | |
55b307da JS |
1541 | if (status & 0x20 /*UART_MSR_DSR */ ) |
1542 | GMStatus[i].dsr = 1; | |
1543 | else | |
1544 | GMStatus[i].dsr = 0; | |
037ad48b JS |
1545 | |
1546 | ||
55b307da JS |
1547 | if (status & 0x10 /*UART_MSR_CTS */ ) |
1548 | GMStatus[i].cts = 1; | |
1549 | else | |
1550 | GMStatus[i].cts = 0; | |
1551 | } | |
037ad48b JS |
1552 | if (copy_to_user(argp, GMStatus, |
1553 | sizeof(struct mxser_mstatus) * MXSER_PORTS)) | |
1554 | return -EFAULT; | |
1555 | return 0; | |
1556 | case MOXA_ASPP_MON_EXT: { | |
55b307da JS |
1557 | int status, p, shiftbit; |
1558 | unsigned long opmode; | |
1559 | unsigned cflag, iflag; | |
037ad48b | 1560 | |
55b307da JS |
1561 | for (i = 0; i < MXSER_BOARDS; i++) |
1562 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { | |
1563 | port = &mxser_boards[i].ports[j]; | |
1564 | if (!port->ioaddr) | |
037ad48b JS |
1565 | continue; |
1566 | ||
55b307da | 1567 | status = mxser_get_msr(port->ioaddr, 0, i); |
55b307da | 1568 | |
037ad48b | 1569 | if (status & UART_MSR_TERI) |
55b307da | 1570 | port->icount.rng++; |
037ad48b | 1571 | if (status & UART_MSR_DDSR) |
55b307da | 1572 | port->icount.dsr++; |
037ad48b | 1573 | if (status & UART_MSR_DDCD) |
55b307da | 1574 | port->icount.dcd++; |
037ad48b | 1575 | if (status & UART_MSR_DCTS) |
55b307da JS |
1576 | port->icount.cts++; |
1577 | ||
1578 | port->mon_data.modem_status = status; | |
1579 | mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt; | |
1580 | mon_data_ext.tx_cnt[i] = port->mon_data.txcnt; | |
1581 | mon_data_ext.up_rxcnt[i] = | |
1582 | port->mon_data.up_rxcnt; | |
1583 | mon_data_ext.up_txcnt[i] = | |
1584 | port->mon_data.up_txcnt; | |
1585 | mon_data_ext.modem_status[i] = | |
1586 | port->mon_data.modem_status; | |
1587 | mon_data_ext.baudrate[i] = port->realbaud; | |
1588 | ||
1589 | if (!port->tty || !port->tty->termios) { | |
1590 | cflag = port->normal_termios.c_cflag; | |
1591 | iflag = port->normal_termios.c_iflag; | |
037ad48b | 1592 | } else { |
55b307da JS |
1593 | cflag = port->tty->termios->c_cflag; |
1594 | iflag = port->tty->termios->c_iflag; | |
037ad48b JS |
1595 | } |
1596 | ||
1597 | mon_data_ext.databits[i] = cflag & CSIZE; | |
1598 | ||
1599 | mon_data_ext.stopbits[i] = cflag & CSTOPB; | |
1600 | ||
55b307da JS |
1601 | mon_data_ext.parity[i] = |
1602 | cflag & (PARENB | PARODD | CMSPAR); | |
037ad48b JS |
1603 | |
1604 | mon_data_ext.flowctrl[i] = 0x00; | |
1605 | ||
1606 | if (cflag & CRTSCTS) | |
1607 | mon_data_ext.flowctrl[i] |= 0x03; | |
1608 | ||
1609 | if (iflag & (IXON | IXOFF)) | |
1610 | mon_data_ext.flowctrl[i] |= 0x0C; | |
1611 | ||
55b307da | 1612 | if (port->type == PORT_16550A) |
037ad48b JS |
1613 | mon_data_ext.fifo[i] = 1; |
1614 | else | |
1615 | mon_data_ext.fifo[i] = 0; | |
1616 | ||
1617 | p = i % 4; | |
1618 | shiftbit = p * 2; | |
55b307da | 1619 | opmode = inb(port->opmode_ioaddr) >> shiftbit; |
037ad48b JS |
1620 | opmode &= OP_MODE_MASK; |
1621 | ||
1622 | mon_data_ext.iftype[i] = opmode; | |
1623 | ||
1624 | } | |
55b307da JS |
1625 | if (copy_to_user(argp, &mon_data_ext, |
1626 | sizeof(mon_data_ext))) | |
037ad48b JS |
1627 | return -EFAULT; |
1628 | ||
1629 | return 0; | |
1630 | ||
55b307da | 1631 | } default: |
037ad48b JS |
1632 | return -ENOIOCTLCMD; |
1633 | } | |
1634 | return 0; | |
1635 | } | |
1636 | ||
a8dea4ec JS |
1637 | static int mxser_ioctl(struct tty_struct *tty, struct file *file, |
1638 | unsigned int cmd, unsigned long arg) | |
037ad48b | 1639 | { |
55b307da | 1640 | struct mxser_port *info = tty->driver_data; |
a8dea4ec JS |
1641 | struct async_icount cprev, cnow; /* kernel counter temps */ |
1642 | struct serial_icounter_struct __user *p_cuser; | |
1643 | unsigned long templ; | |
1644 | unsigned long flags; | |
1645 | void __user *argp = (void __user *)arg; | |
1646 | int retval; | |
037ad48b | 1647 | |
a8dea4ec JS |
1648 | if (tty->index == MXSER_PORTS) |
1649 | return mxser_ioctl_special(cmd, argp); | |
1650 | ||
a8dea4ec JS |
1651 | if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) { |
1652 | int p; | |
1653 | unsigned long opmode; | |
1654 | static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f }; | |
1655 | int shiftbit; | |
1656 | unsigned char val, mask; | |
1657 | ||
1658 | p = tty->index % 4; | |
1659 | if (cmd == MOXA_SET_OP_MODE) { | |
1660 | if (get_user(opmode, (int __user *) argp)) | |
1661 | return -EFAULT; | |
1662 | if (opmode != RS232_MODE && | |
1663 | opmode != RS485_2WIRE_MODE && | |
1664 | opmode != RS422_MODE && | |
1665 | opmode != RS485_4WIRE_MODE) | |
1666 | return -EFAULT; | |
1667 | mask = ModeMask[p]; | |
1668 | shiftbit = p * 2; | |
1669 | val = inb(info->opmode_ioaddr); | |
1670 | val &= mask; | |
1671 | val |= (opmode << shiftbit); | |
1672 | outb(val, info->opmode_ioaddr); | |
1673 | } else { | |
1674 | shiftbit = p * 2; | |
1675 | opmode = inb(info->opmode_ioaddr) >> shiftbit; | |
1676 | opmode &= OP_MODE_MASK; | |
1677 | if (copy_to_user(argp, &opmode, sizeof(int))) | |
1678 | return -EFAULT; | |
3306ce3d | 1679 | } |
a8dea4ec | 1680 | return 0; |
037ad48b JS |
1681 | } |
1682 | ||
214efebb JS |
1683 | if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT && |
1684 | test_bit(TTY_IO_ERROR, &tty->flags)) | |
1685 | return -EIO; | |
1686 | ||
a8dea4ec JS |
1687 | switch (cmd) { |
1688 | case TCSBRK: /* SVID version: non-zero arg --> no break */ | |
1689 | retval = tty_check_change(tty); | |
1690 | if (retval) | |
1691 | return retval; | |
1692 | tty_wait_until_sent(tty, 0); | |
1693 | if (!arg) | |
1694 | mxser_send_break(info, HZ / 4); /* 1/4 second */ | |
1695 | return 0; | |
1696 | case TCSBRKP: /* support for POSIX tcsendbreak() */ | |
1697 | retval = tty_check_change(tty); | |
1698 | if (retval) | |
1699 | return retval; | |
1700 | tty_wait_until_sent(tty, 0); | |
1701 | mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4); | |
1702 | return 0; | |
1703 | case TIOCGSOFTCAR: | |
1704 | return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp); | |
1705 | case TIOCSSOFTCAR: | |
1706 | if (get_user(templ, (unsigned long __user *) argp)) | |
1707 | return -EFAULT; | |
1708 | arg = templ; | |
1709 | tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0)); | |
1710 | return 0; | |
1711 | case TIOCGSERIAL: | |
1712 | return mxser_get_serial_info(info, argp); | |
1713 | case TIOCSSERIAL: | |
1714 | return mxser_set_serial_info(info, argp); | |
1715 | case TIOCSERGETLSR: /* Get line status register */ | |
1716 | return mxser_get_lsr_info(info, argp); | |
1717 | /* | |
1718 | * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change | |
1719 | * - mask passed in arg for lines of interest | |
1720 | * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) | |
1721 | * Caller should use TIOCGICOUNT to see which one it was | |
1722 | */ | |
1723 | case TIOCMIWAIT: { | |
1724 | DECLARE_WAITQUEUE(wait, current); | |
1725 | int ret; | |
1726 | spin_lock_irqsave(&info->slock, flags); | |
1727 | cprev = info->icount; /* note the counters on entry */ | |
1728 | spin_unlock_irqrestore(&info->slock, flags); | |
037ad48b | 1729 | |
a8dea4ec JS |
1730 | add_wait_queue(&info->delta_msr_wait, &wait); |
1731 | while (1) { | |
1732 | spin_lock_irqsave(&info->slock, flags); | |
1733 | cnow = info->icount; /* atomic copy */ | |
1734 | spin_unlock_irqrestore(&info->slock, flags); | |
037ad48b | 1735 | |
a8dea4ec JS |
1736 | set_current_state(TASK_INTERRUPTIBLE); |
1737 | if (((arg & TIOCM_RNG) && | |
1738 | (cnow.rng != cprev.rng)) || | |
1739 | ((arg & TIOCM_DSR) && | |
1740 | (cnow.dsr != cprev.dsr)) || | |
1741 | ((arg & TIOCM_CD) && | |
1742 | (cnow.dcd != cprev.dcd)) || | |
1743 | ((arg & TIOCM_CTS) && | |
1744 | (cnow.cts != cprev.cts))) { | |
1745 | ret = 0; | |
1746 | break; | |
3306ce3d | 1747 | } |
a8dea4ec JS |
1748 | /* see if a signal did it */ |
1749 | if (signal_pending(current)) { | |
1750 | ret = -ERESTARTSYS; | |
1751 | break; | |
1752 | } | |
1753 | cprev = cnow; | |
037ad48b | 1754 | } |
a8dea4ec JS |
1755 | current->state = TASK_RUNNING; |
1756 | remove_wait_queue(&info->delta_msr_wait, &wait); | |
1757 | break; | |
037ad48b | 1758 | } |
a8dea4ec JS |
1759 | /* NOTREACHED */ |
1760 | /* | |
1761 | * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) | |
1762 | * Return: write counters to the user passed counter struct | |
1763 | * NB: both 1->0 and 0->1 transitions are counted except for | |
1764 | * RI where only 0->1 is counted. | |
1765 | */ | |
1766 | case TIOCGICOUNT: | |
1767 | spin_lock_irqsave(&info->slock, flags); | |
1768 | cnow = info->icount; | |
1769 | spin_unlock_irqrestore(&info->slock, flags); | |
1770 | p_cuser = argp; | |
a8dea4ec JS |
1771 | if (put_user(cnow.frame, &p_cuser->frame)) |
1772 | return -EFAULT; | |
1773 | if (put_user(cnow.brk, &p_cuser->brk)) | |
1774 | return -EFAULT; | |
1775 | if (put_user(cnow.overrun, &p_cuser->overrun)) | |
1776 | return -EFAULT; | |
1777 | if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun)) | |
1778 | return -EFAULT; | |
1779 | if (put_user(cnow.parity, &p_cuser->parity)) | |
1780 | return -EFAULT; | |
1781 | if (put_user(cnow.rx, &p_cuser->rx)) | |
1782 | return -EFAULT; | |
1783 | if (put_user(cnow.tx, &p_cuser->tx)) | |
1784 | return -EFAULT; | |
1785 | put_user(cnow.cts, &p_cuser->cts); | |
1786 | put_user(cnow.dsr, &p_cuser->dsr); | |
1787 | put_user(cnow.rng, &p_cuser->rng); | |
1788 | put_user(cnow.dcd, &p_cuser->dcd); | |
1789 | return 0; | |
1790 | case MOXA_HighSpeedOn: | |
1791 | return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); | |
1792 | case MOXA_SDS_RSTICOUNTER: | |
1793 | info->mon_data.rxcnt = 0; | |
1794 | info->mon_data.txcnt = 0; | |
1795 | return 0; | |
a8dea4ec JS |
1796 | case MOXA_ASPP_SETBAUD:{ |
1797 | long baud; | |
1798 | if (get_user(baud, (long __user *)argp)) | |
1799 | return -EFAULT; | |
1800 | mxser_set_baud(info, baud); | |
1801 | return 0; | |
1802 | } | |
1803 | case MOXA_ASPP_GETBAUD: | |
1804 | if (copy_to_user(argp, &info->realbaud, sizeof(long))) | |
1805 | return -EFAULT; | |
037ad48b | 1806 | |
a8dea4ec | 1807 | return 0; |
037ad48b | 1808 | |
a8dea4ec JS |
1809 | case MOXA_ASPP_OQUEUE:{ |
1810 | int len, lsr; | |
037ad48b | 1811 | |
a8dea4ec JS |
1812 | len = mxser_chars_in_buffer(tty); |
1813 | ||
1814 | lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT; | |
1815 | ||
1816 | len += (lsr ? 0 : 1); | |
1817 | ||
1818 | if (copy_to_user(argp, &len, sizeof(int))) | |
1819 | return -EFAULT; | |
1820 | ||
1821 | return 0; | |
037ad48b | 1822 | } |
a8dea4ec JS |
1823 | case MOXA_ASPP_MON: { |
1824 | int mcr, status; | |
037ad48b | 1825 | |
a8dea4ec JS |
1826 | status = mxser_get_msr(info->ioaddr, 1, tty->index); |
1827 | mxser_check_modem_status(info, status); | |
1828 | ||
1829 | mcr = inb(info->ioaddr + UART_MCR); | |
1830 | if (mcr & MOXA_MUST_MCR_XON_FLAG) | |
1831 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD; | |
1832 | else | |
1833 | info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD; | |
1834 | ||
1835 | if (mcr & MOXA_MUST_MCR_TX_XON) | |
1836 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT; | |
1837 | else | |
1838 | info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT; | |
1839 | ||
1840 | if (info->tty->hw_stopped) | |
1841 | info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD; | |
1842 | else | |
1843 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD; | |
1844 | ||
1845 | if (copy_to_user(argp, &info->mon_data, | |
1846 | sizeof(struct mxser_mon))) | |
1847 | return -EFAULT; | |
1848 | ||
1849 | return 0; | |
1850 | } | |
1851 | case MOXA_ASPP_LSTATUS: { | |
1852 | if (copy_to_user(argp, &info->err_shadow, | |
1853 | sizeof(unsigned char))) | |
1854 | return -EFAULT; | |
1855 | ||
1856 | info->err_shadow = 0; | |
1857 | return 0; | |
1858 | } | |
1859 | case MOXA_SET_BAUD_METHOD: { | |
1860 | int method; | |
1861 | ||
1862 | if (get_user(method, (int __user *)argp)) | |
1863 | return -EFAULT; | |
1864 | mxser_set_baud_method[tty->index] = method; | |
1865 | if (copy_to_user(argp, &method, sizeof(int))) | |
1866 | return -EFAULT; | |
1867 | ||
1868 | return 0; | |
1869 | } | |
1870 | default: | |
1871 | return -ENOIOCTLCMD; | |
1872 | } | |
1873 | return 0; | |
1874 | } | |
1875 | ||
1876 | static void mxser_stoprx(struct tty_struct *tty) | |
1877 | { | |
1878 | struct mxser_port *info = tty->driver_data; | |
037ad48b | 1879 | |
a8dea4ec JS |
1880 | info->ldisc_stop_rx = 1; |
1881 | if (I_IXOFF(tty)) { | |
55b307da | 1882 | if (info->board->chip_flag) { |
a8dea4ec JS |
1883 | info->IER &= ~MOXA_MUST_RECV_ISR; |
1884 | outb(info->IER, info->ioaddr + UART_IER); | |
925e9c1c | 1885 | } else { |
a8dea4ec JS |
1886 | info->x_char = STOP_CHAR(tty); |
1887 | outb(0, info->ioaddr + UART_IER); | |
1888 | info->IER |= UART_IER_THRI; | |
1889 | outb(info->IER, info->ioaddr + UART_IER); | |
037ad48b | 1890 | } |
a8dea4ec | 1891 | } |
037ad48b | 1892 | |
a8dea4ec JS |
1893 | if (info->tty->termios->c_cflag & CRTSCTS) { |
1894 | info->MCR &= ~UART_MCR_RTS; | |
1895 | outb(info->MCR, info->ioaddr + UART_MCR); | |
1896 | } | |
1897 | } | |
1898 | ||
1899 | /* | |
1900 | * This routine is called by the upper-layer tty layer to signal that | |
1901 | * incoming characters should be throttled. | |
1902 | */ | |
1903 | static void mxser_throttle(struct tty_struct *tty) | |
1904 | { | |
1905 | mxser_stoprx(tty); | |
1906 | } | |
1907 | ||
1908 | static void mxser_unthrottle(struct tty_struct *tty) | |
1909 | { | |
1910 | struct mxser_port *info = tty->driver_data; | |
1911 | ||
1912 | /* startrx */ | |
1913 | info->ldisc_stop_rx = 0; | |
1914 | if (I_IXOFF(tty)) { | |
1915 | if (info->x_char) | |
1916 | info->x_char = 0; | |
1917 | else { | |
a8dea4ec JS |
1918 | if (info->board->chip_flag) { |
1919 | info->IER |= MOXA_MUST_RECV_ISR; | |
1920 | outb(info->IER, info->ioaddr + UART_IER); | |
925e9c1c | 1921 | } else { |
a8dea4ec JS |
1922 | info->x_char = START_CHAR(tty); |
1923 | outb(0, info->ioaddr + UART_IER); | |
1924 | info->IER |= UART_IER_THRI; | |
1925 | outb(info->IER, info->ioaddr + UART_IER); | |
1926 | } | |
1927 | } | |
1928 | } | |
1929 | ||
1930 | if (info->tty->termios->c_cflag & CRTSCTS) { | |
1931 | info->MCR |= UART_MCR_RTS; | |
1932 | outb(info->MCR, info->ioaddr + UART_MCR); | |
037ad48b JS |
1933 | } |
1934 | } | |
1935 | ||
1936 | /* | |
1937 | * mxser_stop() and mxser_start() | |
1938 | * | |
1939 | * This routines are called before setting or resetting tty->stopped. | |
1940 | * They enable or disable transmitter interrupts, as necessary. | |
1941 | */ | |
1942 | static void mxser_stop(struct tty_struct *tty) | |
1943 | { | |
55b307da | 1944 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
1945 | unsigned long flags; |
1946 | ||
1947 | spin_lock_irqsave(&info->slock, flags); | |
1948 | if (info->IER & UART_IER_THRI) { | |
1949 | info->IER &= ~UART_IER_THRI; | |
55b307da | 1950 | outb(info->IER, info->ioaddr + UART_IER); |
037ad48b JS |
1951 | } |
1952 | spin_unlock_irqrestore(&info->slock, flags); | |
1953 | } | |
1954 | ||
1955 | static void mxser_start(struct tty_struct *tty) | |
1956 | { | |
55b307da | 1957 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
1958 | unsigned long flags; |
1959 | ||
1960 | spin_lock_irqsave(&info->slock, flags); | |
e079f495 | 1961 | if (info->xmit_cnt && info->xmit_buf) { |
55b307da | 1962 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
037ad48b | 1963 | info->IER |= UART_IER_THRI; |
55b307da | 1964 | outb(info->IER, info->ioaddr + UART_IER); |
037ad48b JS |
1965 | } |
1966 | spin_unlock_irqrestore(&info->slock, flags); | |
1967 | } | |
1968 | ||
a8dea4ec JS |
1969 | static void mxser_set_termios(struct tty_struct *tty, struct termios *old_termios) |
1970 | { | |
1971 | struct mxser_port *info = tty->driver_data; | |
1972 | unsigned long flags; | |
1973 | ||
1974 | if ((tty->termios->c_cflag != old_termios->c_cflag) || | |
1975 | (RELEVANT_IFLAG(tty->termios->c_iflag) != RELEVANT_IFLAG(old_termios->c_iflag))) { | |
1976 | ||
1977 | mxser_change_speed(info, old_termios); | |
1978 | ||
1979 | if ((old_termios->c_cflag & CRTSCTS) && | |
1980 | !(tty->termios->c_cflag & CRTSCTS)) { | |
1981 | tty->hw_stopped = 0; | |
1982 | mxser_start(tty); | |
1983 | } | |
1984 | } | |
1985 | ||
e079f495 | 1986 | /* Handle sw stopped */ |
a8dea4ec JS |
1987 | if ((old_termios->c_iflag & IXON) && |
1988 | !(tty->termios->c_iflag & IXON)) { | |
1989 | tty->stopped = 0; | |
1990 | ||
a8dea4ec JS |
1991 | if (info->board->chip_flag) { |
1992 | spin_lock_irqsave(&info->slock, flags); | |
1993 | DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
1994 | spin_unlock_irqrestore(&info->slock, flags); | |
1995 | } | |
a8dea4ec JS |
1996 | |
1997 | mxser_start(tty); | |
1998 | } | |
1999 | } | |
2000 | ||
037ad48b JS |
2001 | /* |
2002 | * mxser_wait_until_sent() --- wait until the transmitter is empty | |
2003 | */ | |
2004 | static void mxser_wait_until_sent(struct tty_struct *tty, int timeout) | |
2005 | { | |
55b307da | 2006 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
2007 | unsigned long orig_jiffies, char_time; |
2008 | int lsr; | |
2009 | ||
2010 | if (info->type == PORT_UNKNOWN) | |
2011 | return; | |
2012 | ||
2013 | if (info->xmit_fifo_size == 0) | |
2014 | return; /* Just in case.... */ | |
2015 | ||
2016 | orig_jiffies = jiffies; | |
2017 | /* | |
2018 | * Set the check interval to be 1/5 of the estimated time to | |
2019 | * send a single character, and make it at least 1. The check | |
2020 | * interval should also be less than the timeout. | |
2021 | * | |
2022 | * Note: we have to use pretty tight timings here to satisfy | |
2023 | * the NIST-PCTS. | |
2024 | */ | |
2025 | char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size; | |
2026 | char_time = char_time / 5; | |
2027 | if (char_time == 0) | |
2028 | char_time = 1; | |
2029 | if (timeout && timeout < char_time) | |
2030 | char_time = timeout; | |
2031 | /* | |
2032 | * If the transmitter hasn't cleared in twice the approximate | |
2033 | * amount of time to send the entire FIFO, it probably won't | |
2034 | * ever clear. This assumes the UART isn't doing flow | |
2035 | * control, which is currently the case. Hence, if it ever | |
2036 | * takes longer than info->timeout, this is probably due to a | |
2037 | * UART bug of some kind. So, we clamp the timeout parameter at | |
2038 | * 2*info->timeout. | |
2039 | */ | |
2040 | if (!timeout || timeout > 2 * info->timeout) | |
2041 | timeout = 2 * info->timeout; | |
2042 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT | |
2043 | printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...", | |
2044 | timeout, char_time); | |
2045 | printk("jiff=%lu...", jiffies); | |
2046 | #endif | |
55b307da | 2047 | while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) { |
037ad48b JS |
2048 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT |
2049 | printk("lsr = %d (jiff=%lu)...", lsr, jiffies); | |
2050 | #endif | |
2051 | schedule_timeout_interruptible(char_time); | |
2052 | if (signal_pending(current)) | |
2053 | break; | |
2054 | if (timeout && time_after(jiffies, orig_jiffies + timeout)) | |
2055 | break; | |
2056 | } | |
2057 | set_current_state(TASK_RUNNING); | |
2058 | ||
2059 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT | |
2060 | printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies); | |
a8dea4ec JS |
2061 | #endif |
2062 | } | |
037ad48b | 2063 | |
a8dea4ec JS |
2064 | /* |
2065 | * This routine is called by tty_hangup() when a hangup is signaled. | |
2066 | */ | |
2067 | void mxser_hangup(struct tty_struct *tty) | |
2068 | { | |
2069 | struct mxser_port *info = tty->driver_data; | |
037ad48b | 2070 | |
a8dea4ec JS |
2071 | mxser_flush_buffer(tty); |
2072 | mxser_shutdown(info); | |
2073 | info->event = 0; | |
2074 | info->count = 0; | |
2075 | info->flags &= ~ASYNC_NORMAL_ACTIVE; | |
2076 | info->tty = NULL; | |
2077 | wake_up_interruptible(&info->open_wait); | |
037ad48b JS |
2078 | } |
2079 | ||
a8dea4ec JS |
2080 | /* |
2081 | * mxser_rs_break() --- routine which turns the break handling on or off | |
2082 | */ | |
2083 | static void mxser_rs_break(struct tty_struct *tty, int break_state) | |
037ad48b | 2084 | { |
a8dea4ec | 2085 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
2086 | unsigned long flags; |
2087 | ||
a8dea4ec JS |
2088 | spin_lock_irqsave(&info->slock, flags); |
2089 | if (break_state == -1) | |
2090 | outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, | |
2091 | info->ioaddr + UART_LCR); | |
2092 | else | |
2093 | outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, | |
2094 | info->ioaddr + UART_LCR); | |
2095 | spin_unlock_irqrestore(&info->slock, flags); | |
2096 | } | |
037ad48b | 2097 | |
a8dea4ec JS |
2098 | static void mxser_receive_chars(struct mxser_port *port, int *status) |
2099 | { | |
2100 | struct tty_struct *tty = port->tty; | |
2101 | unsigned char ch, gdl; | |
2102 | int ignored = 0; | |
2103 | int cnt = 0; | |
2104 | int recv_room; | |
2105 | int max = 256; | |
2106 | unsigned long flags; | |
037ad48b | 2107 | |
a8dea4ec JS |
2108 | spin_lock_irqsave(&port->slock, flags); |
2109 | ||
2110 | recv_room = tty->receive_room; | |
e079f495 | 2111 | if ((recv_room == 0) && (!port->ldisc_stop_rx)) |
a8dea4ec | 2112 | mxser_stoprx(tty); |
037ad48b | 2113 | |
a8dea4ec | 2114 | if (port->board->chip_flag != MOXA_OTHER_UART) { |
037ad48b | 2115 | |
a8dea4ec JS |
2116 | if (*status & UART_LSR_SPECIAL) |
2117 | goto intr_old; | |
a8dea4ec JS |
2118 | if (port->board->chip_flag == MOXA_MUST_MU860_HWID && |
2119 | (*status & MOXA_MUST_LSR_RERR)) | |
2120 | goto intr_old; | |
a8dea4ec JS |
2121 | if (*status & MOXA_MUST_LSR_RERR) |
2122 | goto intr_old; | |
2123 | ||
2124 | gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER); | |
2125 | ||
a8dea4ec JS |
2126 | if (port->board->chip_flag == MOXA_MUST_MU150_HWID) |
2127 | gdl &= MOXA_MUST_GDL_MASK; | |
2128 | if (gdl >= recv_room) { | |
e079f495 | 2129 | if (!port->ldisc_stop_rx) |
a8dea4ec | 2130 | mxser_stoprx(tty); |
a8dea4ec JS |
2131 | } |
2132 | while (gdl--) { | |
2133 | ch = inb(port->ioaddr + UART_RX); | |
2134 | tty_insert_flip_char(tty, ch, 0); | |
2135 | cnt++; | |
2136 | } | |
2137 | goto end_intr; | |
037ad48b | 2138 | } |
e079f495 | 2139 | intr_old: |
037ad48b | 2140 | |
a8dea4ec JS |
2141 | do { |
2142 | if (max-- < 0) | |
2143 | break; | |
037ad48b | 2144 | |
a8dea4ec | 2145 | ch = inb(port->ioaddr + UART_RX); |
e079f495 | 2146 | if (port->board->chip_flag && (*status & UART_LSR_OE)) |
a8dea4ec JS |
2147 | outb(0x23, port->ioaddr + UART_FCR); |
2148 | *status &= port->read_status_mask; | |
a8dea4ec JS |
2149 | if (*status & port->ignore_status_mask) { |
2150 | if (++ignored > 100) | |
2151 | break; | |
2152 | } else { | |
2153 | char flag = 0; | |
2154 | if (*status & UART_LSR_SPECIAL) { | |
2155 | if (*status & UART_LSR_BI) { | |
2156 | flag = TTY_BREAK; | |
a8dea4ec | 2157 | port->icount.brk++; |
037ad48b | 2158 | |
a8dea4ec JS |
2159 | if (port->flags & ASYNC_SAK) |
2160 | do_SAK(tty); | |
2161 | } else if (*status & UART_LSR_PE) { | |
2162 | flag = TTY_PARITY; | |
a8dea4ec JS |
2163 | port->icount.parity++; |
2164 | } else if (*status & UART_LSR_FE) { | |
2165 | flag = TTY_FRAME; | |
a8dea4ec JS |
2166 | port->icount.frame++; |
2167 | } else if (*status & UART_LSR_OE) { | |
2168 | flag = TTY_OVERRUN; | |
a8dea4ec | 2169 | port->icount.overrun++; |
925e9c1c JS |
2170 | } |
2171 | } | |
a8dea4ec JS |
2172 | tty_insert_flip_char(tty, ch, flag); |
2173 | cnt++; | |
2174 | if (cnt >= recv_room) { | |
e079f495 | 2175 | if (!port->ldisc_stop_rx) |
a8dea4ec | 2176 | mxser_stoprx(tty); |
a8dea4ec JS |
2177 | break; |
2178 | } | |
037ad48b | 2179 | |
a8dea4ec | 2180 | } |
037ad48b | 2181 | |
a8dea4ec JS |
2182 | if (port->board->chip_flag) |
2183 | break; | |
037ad48b | 2184 | |
a8dea4ec | 2185 | *status = inb(port->ioaddr + UART_LSR); |
a8dea4ec | 2186 | } while (*status & UART_LSR_DR); |
037ad48b | 2187 | |
e079f495 | 2188 | end_intr: |
a8dea4ec JS |
2189 | mxvar_log.rxcnt[port->tty->index] += cnt; |
2190 | port->mon_data.rxcnt += cnt; | |
2191 | port->mon_data.up_rxcnt += cnt; | |
2192 | spin_unlock_irqrestore(&port->slock, flags); | |
2193 | ||
2194 | tty_flip_buffer_push(tty); | |
037ad48b JS |
2195 | } |
2196 | ||
a8dea4ec | 2197 | static void mxser_transmit_chars(struct mxser_port *port) |
037ad48b | 2198 | { |
a8dea4ec JS |
2199 | int count, cnt; |
2200 | unsigned long flags; | |
037ad48b | 2201 | |
a8dea4ec | 2202 | spin_lock_irqsave(&port->slock, flags); |
037ad48b | 2203 | |
a8dea4ec JS |
2204 | if (port->x_char) { |
2205 | outb(port->x_char, port->ioaddr + UART_TX); | |
2206 | port->x_char = 0; | |
2207 | mxvar_log.txcnt[port->tty->index]++; | |
2208 | port->mon_data.txcnt++; | |
2209 | port->mon_data.up_txcnt++; | |
a8dea4ec JS |
2210 | port->icount.tx++; |
2211 | goto unlock; | |
037ad48b JS |
2212 | } |
2213 | ||
a8dea4ec JS |
2214 | if (port->xmit_buf == 0) |
2215 | goto unlock; | |
037ad48b | 2216 | |
925e9c1c JS |
2217 | if ((port->xmit_cnt <= 0) || port->tty->stopped || |
2218 | (port->tty->hw_stopped && | |
a8dea4ec JS |
2219 | (port->type != PORT_16550A) && |
2220 | (!port->board->chip_flag))) { | |
2221 | port->IER &= ~UART_IER_THRI; | |
2222 | outb(port->IER, port->ioaddr + UART_IER); | |
2223 | goto unlock; | |
2224 | } | |
037ad48b | 2225 | |
a8dea4ec JS |
2226 | cnt = port->xmit_cnt; |
2227 | count = port->xmit_fifo_size; | |
2228 | do { | |
2229 | outb(port->xmit_buf[port->xmit_tail++], | |
2230 | port->ioaddr + UART_TX); | |
2231 | port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1); | |
2232 | if (--port->xmit_cnt <= 0) | |
2233 | break; | |
2234 | } while (--count > 0); | |
2235 | mxvar_log.txcnt[port->tty->index] += (cnt - port->xmit_cnt); | |
55b307da | 2236 | |
a8dea4ec JS |
2237 | port->mon_data.txcnt += (cnt - port->xmit_cnt); |
2238 | port->mon_data.up_txcnt += (cnt - port->xmit_cnt); | |
a8dea4ec | 2239 | port->icount.tx += (cnt - port->xmit_cnt); |
037ad48b | 2240 | |
a8dea4ec JS |
2241 | if (port->xmit_cnt < WAKEUP_CHARS) { |
2242 | set_bit(MXSER_EVENT_TXLOW, &port->event); | |
2243 | schedule_work(&port->tqueue); | |
2244 | } | |
2245 | if (port->xmit_cnt <= 0) { | |
2246 | port->IER &= ~UART_IER_THRI; | |
2247 | outb(port->IER, port->ioaddr + UART_IER); | |
2248 | } | |
2249 | unlock: | |
2250 | spin_unlock_irqrestore(&port->slock, flags); | |
037ad48b JS |
2251 | } |
2252 | ||
2253 | /* | |
a8dea4ec | 2254 | * This is the serial driver's generic interrupt routine |
037ad48b | 2255 | */ |
b1d1c8dd | 2256 | static irqreturn_t mxser_interrupt(int irq, void *dev_id) |
037ad48b | 2257 | { |
a8dea4ec JS |
2258 | int status, iir, i; |
2259 | struct mxser_board *brd = NULL; | |
2260 | struct mxser_port *port; | |
2261 | int max, irqbits, bits, msr; | |
2262 | int pass_counter = 0; | |
2263 | unsigned int int_cnt; | |
2264 | int handled = IRQ_NONE; | |
037ad48b | 2265 | |
a8dea4ec JS |
2266 | for (i = 0; i < MXSER_BOARDS; i++) |
2267 | if (dev_id == &mxser_boards[i]) { | |
2268 | brd = dev_id; | |
2269 | break; | |
2270 | } | |
037ad48b | 2271 | |
a8dea4ec JS |
2272 | if (i == MXSER_BOARDS) |
2273 | goto irq_stop; | |
2274 | if (brd == NULL) | |
2275 | goto irq_stop; | |
cd7ed64e | 2276 | max = brd->info->nports; |
a8dea4ec JS |
2277 | while (1) { |
2278 | irqbits = inb(brd->vector) & brd->vector_mask; | |
2279 | if (irqbits == brd->vector_mask) | |
2280 | break; | |
037ad48b | 2281 | |
a8dea4ec JS |
2282 | handled = IRQ_HANDLED; |
2283 | for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) { | |
2284 | if (irqbits == brd->vector_mask) | |
2285 | break; | |
2286 | if (bits & irqbits) | |
2287 | continue; | |
2288 | port = &brd->ports[i]; | |
037ad48b | 2289 | |
a8dea4ec JS |
2290 | int_cnt = 0; |
2291 | do { | |
a8dea4ec JS |
2292 | iir = inb(port->ioaddr + UART_IIR); |
2293 | if (iir & UART_IIR_NO_INT) | |
2294 | break; | |
2295 | iir &= MOXA_MUST_IIR_MASK; | |
2296 | if (!port->tty) { | |
2297 | status = inb(port->ioaddr + UART_LSR); | |
2298 | outb(0x27, port->ioaddr + UART_FCR); | |
2299 | inb(port->ioaddr + UART_MSR); | |
2300 | break; | |
2301 | } | |
037ad48b | 2302 | |
a8dea4ec JS |
2303 | status = inb(port->ioaddr + UART_LSR); |
2304 | ||
2305 | if (status & UART_LSR_PE) | |
2306 | port->err_shadow |= NPPI_NOTIFY_PARITY; | |
2307 | if (status & UART_LSR_FE) | |
2308 | port->err_shadow |= NPPI_NOTIFY_FRAMING; | |
2309 | if (status & UART_LSR_OE) | |
2310 | port->err_shadow |= | |
2311 | NPPI_NOTIFY_HW_OVERRUN; | |
2312 | if (status & UART_LSR_BI) | |
2313 | port->err_shadow |= NPPI_NOTIFY_BREAK; | |
2314 | ||
2315 | if (port->board->chip_flag) { | |
a8dea4ec JS |
2316 | if (iir == MOXA_MUST_IIR_GDA || |
2317 | iir == MOXA_MUST_IIR_RDA || | |
2318 | iir == MOXA_MUST_IIR_RTO || | |
2319 | iir == MOXA_MUST_IIR_LSR) | |
2320 | mxser_receive_chars(port, | |
2321 | &status); | |
2322 | ||
2323 | } else { | |
a8dea4ec JS |
2324 | status &= port->read_status_mask; |
2325 | if (status & UART_LSR_DR) | |
2326 | mxser_receive_chars(port, | |
2327 | &status); | |
2328 | } | |
2329 | msr = inb(port->ioaddr + UART_MSR); | |
2330 | if (msr & UART_MSR_ANY_DELTA) | |
2331 | mxser_check_modem_status(port, msr); | |
2332 | ||
a8dea4ec JS |
2333 | if (port->board->chip_flag) { |
2334 | if (iir == 0x02 && (status & | |
2335 | UART_LSR_THRE)) | |
2336 | mxser_transmit_chars(port); | |
2337 | } else { | |
a8dea4ec JS |
2338 | if (status & UART_LSR_THRE) |
2339 | mxser_transmit_chars(port); | |
2340 | } | |
2341 | } while (int_cnt++ < MXSER_ISR_PASS_LIMIT); | |
2342 | } | |
2343 | if (pass_counter++ > MXSER_ISR_PASS_LIMIT) | |
2344 | break; /* Prevent infinite loops */ | |
2345 | } | |
2346 | ||
e079f495 | 2347 | irq_stop: |
a8dea4ec | 2348 | return handled; |
037ad48b JS |
2349 | } |
2350 | ||
a8dea4ec JS |
2351 | static const struct tty_operations mxser_ops = { |
2352 | .open = mxser_open, | |
2353 | .close = mxser_close, | |
2354 | .write = mxser_write, | |
2355 | .put_char = mxser_put_char, | |
2356 | .flush_chars = mxser_flush_chars, | |
2357 | .write_room = mxser_write_room, | |
2358 | .chars_in_buffer = mxser_chars_in_buffer, | |
2359 | .flush_buffer = mxser_flush_buffer, | |
2360 | .ioctl = mxser_ioctl, | |
2361 | .throttle = mxser_throttle, | |
2362 | .unthrottle = mxser_unthrottle, | |
2363 | .set_termios = mxser_set_termios, | |
2364 | .stop = mxser_stop, | |
2365 | .start = mxser_start, | |
2366 | .hangup = mxser_hangup, | |
2367 | .break_ctl = mxser_rs_break, | |
2368 | .wait_until_sent = mxser_wait_until_sent, | |
2369 | .tiocmget = mxser_tiocmget, | |
2370 | .tiocmset = mxser_tiocmset, | |
2371 | }; | |
2372 | ||
2373 | /* | |
2374 | * The MOXA Smartio/Industio serial driver boot-time initialization code! | |
2375 | */ | |
2376 | ||
2094e757 JS |
2377 | static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev, |
2378 | unsigned int irq) | |
171d3a86 | 2379 | { |
171d3a86 JS |
2380 | if (irq) |
2381 | free_irq(brd->irq, brd); | |
2382 | if (pdev != NULL) { /* PCI */ | |
2383 | pci_release_region(pdev, 2); | |
2384 | pci_release_region(pdev, 3); | |
2385 | pci_dev_put(pdev); | |
2386 | } else { | |
cd7ed64e | 2387 | release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); |
171d3a86 JS |
2388 | release_region(brd->vector, 1); |
2389 | } | |
2390 | } | |
2391 | ||
2094e757 JS |
2392 | static int __devinit mxser_initbrd(struct mxser_board *brd, |
2393 | struct pci_dev *pdev) | |
037ad48b | 2394 | { |
a8dea4ec JS |
2395 | struct mxser_port *info; |
2396 | unsigned int i; | |
2397 | int retval; | |
2398 | ||
2399 | printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud); | |
2400 | ||
cd7ed64e | 2401 | for (i = 0; i < brd->info->nports; i++) { |
a8dea4ec JS |
2402 | info = &brd->ports[i]; |
2403 | info->board = brd; | |
2404 | info->stop_rx = 0; | |
2405 | info->ldisc_stop_rx = 0; | |
037ad48b | 2406 | |
a8dea4ec JS |
2407 | /* Enhance mode enabled here */ |
2408 | if (brd->chip_flag != MOXA_OTHER_UART) | |
2409 | ENABLE_MOXA_MUST_ENCHANCE_MODE(info->ioaddr); | |
037ad48b | 2410 | |
a8dea4ec JS |
2411 | info->flags = ASYNC_SHARE_IRQ; |
2412 | info->type = brd->uart_type; | |
037ad48b | 2413 | |
a8dea4ec | 2414 | process_txrx_fifo(info); |
037ad48b | 2415 | |
a8dea4ec JS |
2416 | info->custom_divisor = info->baud_base * 16; |
2417 | info->close_delay = 5 * HZ / 10; | |
2418 | info->closing_wait = 30 * HZ; | |
2419 | INIT_WORK(&info->tqueue, mxser_do_softint, info); | |
2420 | info->normal_termios = mxvar_sdriver->init_termios; | |
2421 | init_waitqueue_head(&info->open_wait); | |
2422 | init_waitqueue_head(&info->close_wait); | |
2423 | init_waitqueue_head(&info->delta_msr_wait); | |
2424 | memset(&info->mon_data, 0, sizeof(struct mxser_mon)); | |
2425 | info->err_shadow = 0; | |
2426 | spin_lock_init(&info->slock); | |
037ad48b | 2427 | |
a8dea4ec JS |
2428 | /* before set INT ISR, disable all int */ |
2429 | outb(inb(info->ioaddr + UART_IER) & 0xf0, | |
2430 | info->ioaddr + UART_IER); | |
2431 | } | |
2432 | /* | |
2433 | * Allocate the IRQ if necessary | |
2434 | */ | |
037ad48b | 2435 | |
a8dea4ec JS |
2436 | retval = request_irq(brd->irq, mxser_interrupt, |
2437 | (brd->ports[0].flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED : | |
2438 | IRQF_DISABLED, "mxser", brd); | |
2439 | if (retval) { | |
2440 | printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may " | |
2441 | "conflict with another device.\n", | |
cd7ed64e | 2442 | brd->info->name, brd->irq); |
171d3a86 | 2443 | /* We hold resources, we need to release them. */ |
2094e757 | 2444 | mxser_release_res(brd, pdev, 0); |
a8dea4ec JS |
2445 | return retval; |
2446 | } | |
037ad48b JS |
2447 | return 0; |
2448 | } | |
2449 | ||
943f2959 | 2450 | static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd) |
037ad48b JS |
2451 | { |
2452 | int id, i, bits; | |
2453 | unsigned short regs[16], irq; | |
2454 | unsigned char scratch, scratch2; | |
2455 | ||
55b307da | 2456 | brd->chip_flag = MOXA_OTHER_UART; |
037ad48b JS |
2457 | |
2458 | id = mxser_read_register(cap, regs); | |
cd7ed64e JS |
2459 | switch (id) { |
2460 | case C168_ASIC_ID: | |
2461 | brd->info = &mxser_cards[0]; | |
2462 | break; | |
2463 | case C104_ASIC_ID: | |
2464 | brd->info = &mxser_cards[1]; | |
2465 | break; | |
2466 | case CI104J_ASIC_ID: | |
2467 | brd->info = &mxser_cards[2]; | |
2468 | break; | |
2469 | case C102_ASIC_ID: | |
2470 | brd->info = &mxser_cards[5]; | |
2471 | break; | |
2472 | case CI132_ASIC_ID: | |
2473 | brd->info = &mxser_cards[6]; | |
2474 | break; | |
2475 | case CI134_ASIC_ID: | |
2476 | brd->info = &mxser_cards[7]; | |
2477 | break; | |
2478 | default: | |
037ad48b | 2479 | return 0; |
cd7ed64e | 2480 | } |
037ad48b JS |
2481 | |
2482 | irq = 0; | |
cd7ed64e JS |
2483 | /* some ISA cards have 2 ports, but we want to see them as 4-port (why?) |
2484 | Flag-hack checks if configuration should be read as 2-port here. */ | |
2485 | if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) { | |
037ad48b JS |
2486 | irq = regs[9] & 0xF000; |
2487 | irq = irq | (irq >> 4); | |
2488 | if (irq != (regs[9] & 0xFF00)) | |
2489 | return MXSER_ERR_IRQ_CONFLIT; | |
cd7ed64e | 2490 | } else if (brd->info->nports == 4) { |
037ad48b JS |
2491 | irq = regs[9] & 0xF000; |
2492 | irq = irq | (irq >> 4); | |
2493 | irq = irq | (irq >> 8); | |
2494 | if (irq != regs[9]) | |
2495 | return MXSER_ERR_IRQ_CONFLIT; | |
cd7ed64e | 2496 | } else if (brd->info->nports == 8) { |
037ad48b JS |
2497 | irq = regs[9] & 0xF000; |
2498 | irq = irq | (irq >> 4); | |
2499 | irq = irq | (irq >> 8); | |
2500 | if ((irq != regs[9]) || (irq != regs[10])) | |
2501 | return MXSER_ERR_IRQ_CONFLIT; | |
2502 | } | |
2503 | ||
a8dea4ec JS |
2504 | if (!irq) |
2505 | return MXSER_ERR_IRQ; | |
2506 | brd->irq = ((int)(irq & 0xF000) >> 12); | |
2507 | for (i = 0; i < 8; i++) | |
2508 | brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8; | |
2509 | if ((regs[12] & 0x80) == 0) | |
2510 | return MXSER_ERR_VECTOR; | |
2511 | brd->vector = (int)regs[11]; /* interrupt vector */ | |
2512 | if (id == 1) | |
2513 | brd->vector_mask = 0x00FF; | |
2514 | else | |
2515 | brd->vector_mask = 0x000F; | |
2516 | for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) { | |
2517 | if (regs[12] & bits) { | |
2518 | brd->ports[i].baud_base = 921600; | |
e079f495 | 2519 | brd->ports[i].max_baud = 921600; |
a8dea4ec JS |
2520 | } else { |
2521 | brd->ports[i].baud_base = 115200; | |
e079f495 | 2522 | brd->ports[i].max_baud = 115200; |
a8dea4ec JS |
2523 | } |
2524 | } | |
2525 | scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB); | |
2526 | outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR); | |
2527 | outb(0, cap + UART_EFR); /* EFR is the same as FCR */ | |
2528 | outb(scratch2, cap + UART_LCR); | |
2529 | outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR); | |
2530 | scratch = inb(cap + UART_IIR); | |
2531 | ||
2532 | if (scratch & 0xC0) | |
2533 | brd->uart_type = PORT_16550A; | |
2534 | else | |
2535 | brd->uart_type = PORT_16450; | |
cd7ed64e JS |
2536 | if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports, |
2537 | "mxser(IO)")) | |
a8dea4ec JS |
2538 | return MXSER_ERR_IOADDR; |
2539 | if (!request_region(brd->vector, 1, "mxser(vector)")) { | |
cd7ed64e | 2540 | release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); |
a8dea4ec JS |
2541 | return MXSER_ERR_VECTOR; |
2542 | } | |
cd7ed64e | 2543 | return brd->info->nports; |
a8dea4ec JS |
2544 | } |
2545 | ||
2094e757 JS |
2546 | static int __devinit mxser_probe(struct pci_dev *pdev, |
2547 | const struct pci_device_id *ent) | |
a8dea4ec | 2548 | { |
2094e757 | 2549 | struct mxser_board *brd; |
a8dea4ec JS |
2550 | unsigned int i, j; |
2551 | unsigned long ioaddress; | |
2094e757 JS |
2552 | int retval = -EINVAL; |
2553 | ||
2554 | for (i = 0; i < MXSER_BOARDS; i++) | |
2555 | if (mxser_boards[i].info == NULL) | |
2556 | break; | |
2557 | ||
2558 | if (i >= MXSER_BOARDS) { | |
2559 | printk(KERN_ERR "Too many Smartio/Industio family boards found " | |
2560 | "(maximum %d), board not configured\n", MXSER_BOARDS); | |
2561 | goto err; | |
2562 | } | |
2563 | ||
2564 | brd = &mxser_boards[i]; | |
2565 | brd->idx = i * MXSER_PORTS_PER_BOARD; | |
2566 | printk(KERN_INFO "Found MOXA %s board (BusNo=%d, DevNo=%d)\n", | |
2567 | mxser_cards[ent->driver_data].name, | |
2568 | pdev->bus->number, PCI_SLOT(pdev->devfn)); | |
2569 | ||
2570 | retval = pci_enable_device(pdev); | |
2571 | if (retval) { | |
2572 | printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n"); | |
2573 | goto err; | |
2574 | } | |
a8dea4ec JS |
2575 | |
2576 | /* io address */ | |
a8dea4ec JS |
2577 | ioaddress = pci_resource_start(pdev, 2); |
2578 | retval = pci_request_region(pdev, 2, "mxser(IO)"); | |
2579 | if (retval) | |
2580 | goto err; | |
2581 | ||
2094e757 | 2582 | brd->info = &mxser_cards[ent->driver_data]; |
cd7ed64e | 2583 | for (i = 0; i < brd->info->nports; i++) |
a8dea4ec JS |
2584 | brd->ports[i].ioaddr = ioaddress + 8 * i; |
2585 | ||
2586 | /* vector */ | |
2587 | ioaddress = pci_resource_start(pdev, 3); | |
2588 | retval = pci_request_region(pdev, 3, "mxser(vector)"); | |
2589 | if (retval) | |
2590 | goto err_relio; | |
2591 | brd->vector = ioaddress; | |
2592 | ||
2593 | /* irq */ | |
2594 | brd->irq = pdev->irq; | |
2595 | ||
2596 | brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr); | |
2597 | brd->uart_type = PORT_16550A; | |
2598 | brd->vector_mask = 0; | |
2599 | ||
cd7ed64e | 2600 | for (i = 0; i < brd->info->nports; i++) { |
a8dea4ec JS |
2601 | for (j = 0; j < UART_INFO_NUM; j++) { |
2602 | if (Gpci_uart_info[j].type == brd->chip_flag) { | |
2603 | brd->ports[i].max_baud = | |
2604 | Gpci_uart_info[j].max_baud; | |
2605 | ||
2606 | /* exception....CP-102 */ | |
cd7ed64e | 2607 | if (brd->info->flags & MXSER_HIGHBAUD) |
a8dea4ec JS |
2608 | brd->ports[i].max_baud = 921600; |
2609 | break; | |
2610 | } | |
2611 | } | |
2612 | } | |
2613 | ||
2614 | if (brd->chip_flag == MOXA_MUST_MU860_HWID) { | |
cd7ed64e | 2615 | for (i = 0; i < brd->info->nports; i++) { |
a8dea4ec JS |
2616 | if (i < 4) |
2617 | brd->ports[i].opmode_ioaddr = ioaddress + 4; | |
2618 | else | |
2619 | brd->ports[i].opmode_ioaddr = ioaddress + 0x0c; | |
2620 | } | |
2621 | outb(0, ioaddress + 4); /* default set to RS232 mode */ | |
2622 | outb(0, ioaddress + 0x0c); /* default set to RS232 mode */ | |
2623 | } | |
2624 | ||
cd7ed64e | 2625 | for (i = 0; i < brd->info->nports; i++) { |
a8dea4ec JS |
2626 | brd->vector_mask |= (1 << i); |
2627 | brd->ports[i].baud_base = 921600; | |
2628 | } | |
2094e757 JS |
2629 | |
2630 | /* mxser_initbrd will hook ISR. */ | |
2631 | if (mxser_initbrd(brd, pdev) < 0) | |
2632 | goto err_relvec; | |
2633 | ||
2634 | for (i = 0; i < brd->info->nports; i++) | |
2635 | tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev); | |
2636 | ||
2637 | pci_set_drvdata(pdev, brd); | |
2638 | ||
a8dea4ec | 2639 | return 0; |
2094e757 JS |
2640 | err_relvec: |
2641 | pci_release_region(pdev, 3); | |
a8dea4ec JS |
2642 | err_relio: |
2643 | pci_release_region(pdev, 2); | |
2094e757 | 2644 | brd->info = NULL; |
a8dea4ec JS |
2645 | err: |
2646 | return retval; | |
2647 | } | |
2648 | ||
2094e757 JS |
2649 | static void __devexit mxser_remove(struct pci_dev *pdev) |
2650 | { | |
2651 | struct mxser_board *brd = pci_get_drvdata(pdev); | |
2652 | unsigned int i; | |
2653 | ||
2654 | for (i = 0; i < brd->info->nports; i++) | |
2655 | tty_unregister_device(mxvar_sdriver, brd->idx + i); | |
2656 | ||
2657 | mxser_release_res(brd, pdev, 1); | |
2658 | } | |
2659 | ||
2660 | static struct pci_driver mxser_driver = { | |
2661 | .name = "mxser", | |
2662 | .id_table = mxser_pcibrds, | |
2663 | .probe = mxser_probe, | |
2664 | .remove = __devexit_p(mxser_remove) | |
2665 | }; | |
2666 | ||
a8dea4ec JS |
2667 | static int __init mxser_module_init(void) |
2668 | { | |
a8dea4ec | 2669 | struct mxser_board *brd; |
eae4436a JS |
2670 | unsigned long cap; |
2671 | unsigned int i, m, isaloop; | |
2094e757 | 2672 | int retval, b; |
a8dea4ec JS |
2673 | |
2674 | pr_debug("Loading module mxser ...\n"); | |
2675 | ||
2676 | mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1); | |
2677 | if (!mxvar_sdriver) | |
2678 | return -ENOMEM; | |
2679 | spin_lock_init(&gm_lock); | |
2680 | ||
a8dea4ec JS |
2681 | printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", |
2682 | MXSER_VERSION); | |
2683 | ||
2684 | /* Initialize the tty_driver structure */ | |
2685 | mxvar_sdriver->magic = TTY_DRIVER_MAGIC; | |
e930790d | 2686 | mxvar_sdriver->name = "ttyMI"; |
a8dea4ec JS |
2687 | mxvar_sdriver->major = ttymajor; |
2688 | mxvar_sdriver->minor_start = 0; | |
2689 | mxvar_sdriver->num = MXSER_PORTS + 1; | |
2690 | mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL; | |
2691 | mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL; | |
2692 | mxvar_sdriver->init_termios = tty_std_termios; | |
2693 | mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; | |
938ef180 | 2694 | mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV; |
a8dea4ec | 2695 | tty_set_operations(mxvar_sdriver, &mxser_ops); |
a8dea4ec | 2696 | |
938ef180 JS |
2697 | retval = tty_register_driver(mxvar_sdriver); |
2698 | if (retval) { | |
2699 | printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family " | |
2700 | "tty driver !\n"); | |
2701 | goto err_put; | |
2702 | } | |
2703 | ||
a8dea4ec JS |
2704 | mxvar_diagflag = 0; |
2705 | ||
2706 | m = 0; | |
2707 | /* Start finding ISA boards here */ | |
eae4436a JS |
2708 | for (isaloop = 0; isaloop < 2; isaloop++) |
2709 | for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) { | |
2710 | if (!isaloop) | |
2711 | cap = mxserBoardCAP[b]; /* predefined */ | |
2712 | else | |
2713 | cap = ioaddr[b]; /* module param */ | |
a8dea4ec | 2714 | |
eae4436a JS |
2715 | if (!cap) |
2716 | continue; | |
a8dea4ec | 2717 | |
eae4436a JS |
2718 | brd = &mxser_boards[m]; |
2719 | retval = mxser_get_ISA_conf(cap, brd); | |
2720 | ||
2721 | if (retval != 0) | |
2722 | printk(KERN_INFO "Found MOXA %s board " | |
2723 | "(CAP=0x%x)\n", | |
cd7ed64e | 2724 | brd->info->name, ioaddr[b]); |
eae4436a JS |
2725 | |
2726 | if (retval <= 0) { | |
2727 | if (retval == MXSER_ERR_IRQ) | |
2728 | printk(KERN_ERR "Invalid interrupt " | |
2729 | "number, board not " | |
2730 | "configured\n"); | |
2731 | else if (retval == MXSER_ERR_IRQ_CONFLIT) | |
2732 | printk(KERN_ERR "Invalid interrupt " | |
2733 | "number, board not " | |
2734 | "configured\n"); | |
2735 | else if (retval == MXSER_ERR_VECTOR) | |
2736 | printk(KERN_ERR "Invalid interrupt " | |
2737 | "vector, board not " | |
2738 | "configured\n"); | |
2739 | else if (retval == MXSER_ERR_IOADDR) | |
2740 | printk(KERN_ERR "Invalid I/O address, " | |
2741 | "board not configured\n"); | |
a8dea4ec | 2742 | |
2094e757 | 2743 | brd->info = NULL; |
eae4436a JS |
2744 | continue; |
2745 | } | |
a8dea4ec | 2746 | |
eae4436a | 2747 | /* mxser_initbrd will hook ISR. */ |
2094e757 JS |
2748 | if (mxser_initbrd(brd, NULL) < 0) { |
2749 | brd->info = NULL; | |
a8dea4ec JS |
2750 | continue; |
2751 | } | |
2094e757 JS |
2752 | |
2753 | brd->idx = m * MXSER_PORTS_PER_BOARD; | |
cd7ed64e | 2754 | for (i = 0; i < brd->info->nports; i++) |
2094e757 JS |
2755 | tty_register_device(mxvar_sdriver, brd->idx + i, |
2756 | NULL); | |
938ef180 | 2757 | |
a8dea4ec | 2758 | m++; |
a8dea4ec | 2759 | } |
037ad48b | 2760 | |
2094e757 JS |
2761 | retval = pci_register_driver(&mxser_driver); |
2762 | if (retval) { | |
2763 | printk(KERN_ERR "Can't register pci driver\n"); | |
2764 | if (!m) { | |
2765 | retval = -ENODEV; | |
2766 | goto err_unr; | |
2767 | } /* else: we have some ISA cards under control */ | |
037ad48b | 2768 | } |
a8dea4ec JS |
2769 | |
2770 | pr_debug("Done.\n"); | |
2771 | ||
938ef180 JS |
2772 | return 0; |
2773 | err_unr: | |
2774 | tty_unregister_driver(mxvar_sdriver); | |
2775 | err_put: | |
2776 | put_tty_driver(mxvar_sdriver); | |
a8dea4ec | 2777 | return retval; |
037ad48b JS |
2778 | } |
2779 | ||
a8dea4ec | 2780 | static void __exit mxser_module_exit(void) |
037ad48b | 2781 | { |
2094e757 | 2782 | unsigned int i, j; |
037ad48b | 2783 | |
a8dea4ec | 2784 | pr_debug("Unloading module mxser ...\n"); |
037ad48b | 2785 | |
2094e757 JS |
2786 | pci_unregister_driver(&mxser_driver); |
2787 | ||
2788 | for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */ | |
2789 | if (mxser_boards[i].info != NULL) | |
2790 | for (j = 0; j < mxser_boards[i].info->nports; j++) | |
2791 | tty_unregister_device(mxvar_sdriver, | |
2792 | mxser_boards[i].idx + j); | |
ead568c9 JS |
2793 | tty_unregister_driver(mxvar_sdriver); |
2794 | put_tty_driver(mxvar_sdriver); | |
037ad48b | 2795 | |
171d3a86 | 2796 | for (i = 0; i < MXSER_BOARDS; i++) |
cd7ed64e | 2797 | if (mxser_boards[i].info != NULL) |
2094e757 | 2798 | mxser_release_res(&mxser_boards[i], NULL, 1); |
037ad48b | 2799 | |
a8dea4ec | 2800 | pr_debug("Done.\n"); |
037ad48b JS |
2801 | } |
2802 | ||
2803 | module_init(mxser_module_init); | |
2804 | module_exit(mxser_module_exit); |