Commit | Line | Data |
---|---|---|
c1986ee9 HW |
1 | /* |
2 | * A driver for the PCMCIA Smartcard Reader "Omnikey CardMan Mobile 4000" | |
3 | * | |
4 | * cm4000_cs.c support.linux@omnikey.com | |
5 | * | |
6 | * Tue Oct 23 11:32:43 GMT 2001 herp - cleaned up header files | |
7 | * Sun Jan 20 10:11:15 MET 2002 herp - added modversion header files | |
8 | * Thu Nov 14 16:34:11 GMT 2002 mh - added PPS functionality | |
9 | * Tue Nov 19 16:36:27 GMT 2002 mh - added SUSPEND/RESUME functionailty | |
10 | * Wed Jul 28 12:55:01 CEST 2004 mh - kernel 2.6 adjustments | |
11 | * | |
12 | * current version: 2.4.0gm4 | |
13 | * | |
14 | * (C) 2000,2001,2002,2003,2004 Omnikey AG | |
15 | * | |
67bc6200 | 16 | * (C) 2005-2006 Harald Welte <laforge@gnumonks.org> |
c1986ee9 HW |
17 | * - Adhere to Kernel CodingStyle |
18 | * - Port to 2.6.13 "new" style PCMCIA | |
19 | * - Check for copy_{from,to}_user return values | |
20 | * - Use nonseekable_open() | |
67bc6200 | 21 | * - add class interface for udev device creation |
c1986ee9 HW |
22 | * |
23 | * All rights reserved. Licensed under dual BSD/GPL license. | |
24 | */ | |
25 | ||
c1986ee9 HW |
26 | #include <linux/kernel.h> |
27 | #include <linux/module.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/fs.h> | |
31 | #include <linux/delay.h> | |
884c3d75 | 32 | #include <linux/bitrev.h> |
4cf974c5 AC |
33 | #include <linux/smp_lock.h> |
34 | #include <linux/uaccess.h> | |
35 | #include <linux/io.h> | |
c1986ee9 HW |
36 | |
37 | #include <pcmcia/cs_types.h> | |
38 | #include <pcmcia/cs.h> | |
39 | #include <pcmcia/cistpl.h> | |
40 | #include <pcmcia/cisreg.h> | |
41 | #include <pcmcia/ciscode.h> | |
42 | #include <pcmcia/ds.h> | |
43 | ||
44 | #include <linux/cm4000_cs.h> | |
45 | ||
46 | /* #define ATR_CSUM */ | |
47 | ||
dd2e5a15 | 48 | #define reader_to_dev(x) (&x->p_dev->dev) |
cbf624f0 DB |
49 | |
50 | /* n (debug level) is ignored */ | |
51 | /* additional debug output may be enabled by re-compiling with | |
52 | * CM4000_DEBUG set */ | |
53 | /* #define CM4000_DEBUG */ | |
54 | #define DEBUGP(n, rdr, x, args...) do { \ | |
55 | dev_dbg(reader_to_dev(rdr), "%s:" x, \ | |
56 | __func__ , ## args); \ | |
c1986ee9 | 57 | } while (0) |
cbf624f0 | 58 | |
67bc6200 | 59 | static char *version = "cm4000_cs.c v2.4.0gm6 - All bugs added by Harald Welte"; |
c1986ee9 HW |
60 | |
61 | #define T_1SEC (HZ) | |
62 | #define T_10MSEC msecs_to_jiffies(10) | |
63 | #define T_20MSEC msecs_to_jiffies(20) | |
64 | #define T_40MSEC msecs_to_jiffies(40) | |
65 | #define T_50MSEC msecs_to_jiffies(50) | |
66 | #define T_100MSEC msecs_to_jiffies(100) | |
67 | #define T_500MSEC msecs_to_jiffies(500) | |
68 | ||
fba395ee | 69 | static void cm4000_release(struct pcmcia_device *link); |
c1986ee9 HW |
70 | |
71 | static int major; /* major number we get from the kernel */ | |
72 | ||
73 | /* note: the first state has to have number 0 always */ | |
74 | ||
75 | #define M_FETCH_ATR 0 | |
76 | #define M_TIMEOUT_WAIT 1 | |
77 | #define M_READ_ATR_LEN 2 | |
78 | #define M_READ_ATR 3 | |
79 | #define M_ATR_PRESENT 4 | |
80 | #define M_BAD_CARD 5 | |
81 | #define M_CARDOFF 6 | |
82 | ||
83 | #define LOCK_IO 0 | |
84 | #define LOCK_MONITOR 1 | |
85 | ||
86 | #define IS_AUTOPPS_ACT 6 | |
87 | #define IS_PROCBYTE_PRESENT 7 | |
88 | #define IS_INVREV 8 | |
89 | #define IS_ANY_T0 9 | |
90 | #define IS_ANY_T1 10 | |
91 | #define IS_ATR_PRESENT 11 | |
92 | #define IS_ATR_VALID 12 | |
93 | #define IS_CMM_ABSENT 13 | |
94 | #define IS_BAD_LENGTH 14 | |
95 | #define IS_BAD_CSUM 15 | |
96 | #define IS_BAD_CARD 16 | |
97 | ||
98 | #define REG_FLAGS0(x) (x + 0) | |
99 | #define REG_FLAGS1(x) (x + 1) | |
100 | #define REG_NUM_BYTES(x) (x + 2) | |
101 | #define REG_BUF_ADDR(x) (x + 3) | |
102 | #define REG_BUF_DATA(x) (x + 4) | |
103 | #define REG_NUM_SEND(x) (x + 5) | |
104 | #define REG_BAUDRATE(x) (x + 6) | |
105 | #define REG_STOPBITS(x) (x + 7) | |
106 | ||
107 | struct cm4000_dev { | |
fd238232 | 108 | struct pcmcia_device *p_dev; |
c1986ee9 HW |
109 | dev_node_t node; /* OS node (major,minor) */ |
110 | ||
111 | unsigned char atr[MAX_ATR]; | |
112 | unsigned char rbuf[512]; | |
113 | unsigned char sbuf[512]; | |
114 | ||
115 | wait_queue_head_t devq; /* when removing cardman must not be | |
116 | zeroed! */ | |
117 | ||
118 | wait_queue_head_t ioq; /* if IO is locked, wait on this Q */ | |
119 | wait_queue_head_t atrq; /* wait for ATR valid */ | |
120 | wait_queue_head_t readq; /* used by write to wake blk.read */ | |
121 | ||
122 | /* warning: do not move this fields. | |
123 | * initialising to zero depends on it - see ZERO_DEV below. */ | |
124 | unsigned char atr_csum; | |
125 | unsigned char atr_len_retry; | |
126 | unsigned short atr_len; | |
127 | unsigned short rlen; /* bytes avail. after write */ | |
128 | unsigned short rpos; /* latest read pos. write zeroes */ | |
129 | unsigned char procbyte; /* T=0 procedure byte */ | |
130 | unsigned char mstate; /* state of card monitor */ | |
131 | unsigned char cwarn; /* slow down warning */ | |
132 | unsigned char flags0; /* cardman IO-flags 0 */ | |
133 | unsigned char flags1; /* cardman IO-flags 1 */ | |
134 | unsigned int mdelay; /* variable monitor speeds, in jiffies */ | |
135 | ||
136 | unsigned int baudv; /* baud value for speed */ | |
137 | unsigned char ta1; | |
138 | unsigned char proto; /* T=0, T=1, ... */ | |
139 | unsigned long flags; /* lock+flags (MONITOR,IO,ATR) * for concurrent | |
140 | access */ | |
141 | ||
142 | unsigned char pts[4]; | |
143 | ||
144 | struct timer_list timer; /* used to keep monitor running */ | |
145 | int monitor_running; | |
146 | }; | |
147 | ||
148 | #define ZERO_DEV(dev) \ | |
149 | memset(&dev->atr_csum,0, \ | |
150 | sizeof(struct cm4000_dev) - \ | |
a2bcce8e | 151 | offsetof(struct cm4000_dev, atr_csum)) |
c1986ee9 | 152 | |
fba395ee | 153 | static struct pcmcia_device *dev_table[CM4000_MAX_DEV]; |
67bc6200 | 154 | static struct class *cmm_class; |
c1986ee9 HW |
155 | |
156 | /* This table doesn't use spaces after the comma between fields and thus | |
157 | * violates CodingStyle. However, I don't really think wrapping it around will | |
158 | * make it any clearer to read -HW */ | |
159 | static unsigned char fi_di_table[10][14] = { | |
160 | /*FI 00 01 02 03 04 05 06 07 08 09 10 11 12 13 */ | |
161 | /*DI */ | |
162 | /* 0 */ {0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11}, | |
163 | /* 1 */ {0x01,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x91,0x11,0x11,0x11,0x11}, | |
164 | /* 2 */ {0x02,0x12,0x22,0x32,0x11,0x11,0x11,0x11,0x11,0x92,0xA2,0xB2,0x11,0x11}, | |
165 | /* 3 */ {0x03,0x13,0x23,0x33,0x43,0x53,0x63,0x11,0x11,0x93,0xA3,0xB3,0xC3,0xD3}, | |
166 | /* 4 */ {0x04,0x14,0x24,0x34,0x44,0x54,0x64,0x11,0x11,0x94,0xA4,0xB4,0xC4,0xD4}, | |
167 | /* 5 */ {0x00,0x15,0x25,0x35,0x45,0x55,0x65,0x11,0x11,0x95,0xA5,0xB5,0xC5,0xD5}, | |
168 | /* 6 */ {0x06,0x16,0x26,0x36,0x46,0x56,0x66,0x11,0x11,0x96,0xA6,0xB6,0xC6,0xD6}, | |
169 | /* 7 */ {0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11}, | |
170 | /* 8 */ {0x08,0x11,0x28,0x38,0x48,0x58,0x68,0x11,0x11,0x98,0xA8,0xB8,0xC8,0xD8}, | |
171 | /* 9 */ {0x09,0x19,0x29,0x39,0x49,0x59,0x69,0x11,0x11,0x99,0xA9,0xB9,0xC9,0xD9} | |
172 | }; | |
173 | ||
cbf624f0 | 174 | #ifndef CM4000_DEBUG |
c1986ee9 HW |
175 | #define xoutb outb |
176 | #define xinb inb | |
177 | #else | |
178 | static inline void xoutb(unsigned char val, unsigned short port) | |
179 | { | |
cbf624f0 | 180 | pr_debug("outb(val=%.2x,port=%.4x)\n", val, port); |
c1986ee9 HW |
181 | outb(val, port); |
182 | } | |
183 | static inline unsigned char xinb(unsigned short port) | |
184 | { | |
185 | unsigned char val; | |
186 | ||
187 | val = inb(port); | |
cbf624f0 | 188 | pr_debug("%.2x=inb(%.4x)\n", val, port); |
c1986ee9 HW |
189 | |
190 | return val; | |
191 | } | |
192 | #endif | |
193 | ||
884c3d75 AM |
194 | static inline unsigned char invert_revert(unsigned char ch) |
195 | { | |
196 | return bitrev8(~ch); | |
197 | } | |
c1986ee9 HW |
198 | |
199 | static void str_invert_revert(unsigned char *b, int len) | |
200 | { | |
201 | int i; | |
202 | ||
203 | for (i = 0; i < len; i++) | |
884c3d75 | 204 | b[i] = invert_revert(b[i]); |
c1986ee9 HW |
205 | } |
206 | ||
207 | #define ATRLENCK(dev,pos) \ | |
208 | if (pos>=dev->atr_len || pos>=MAX_ATR) \ | |
209 | goto return_0; | |
210 | ||
211 | static unsigned int calc_baudv(unsigned char fidi) | |
212 | { | |
213 | unsigned int wcrcf, wbrcf, fi_rfu, di_rfu; | |
214 | ||
215 | fi_rfu = 372; | |
216 | di_rfu = 1; | |
217 | ||
218 | /* FI */ | |
219 | switch ((fidi >> 4) & 0x0F) { | |
220 | case 0x00: | |
221 | wcrcf = 372; | |
222 | break; | |
223 | case 0x01: | |
224 | wcrcf = 372; | |
225 | break; | |
226 | case 0x02: | |
227 | wcrcf = 558; | |
228 | break; | |
229 | case 0x03: | |
230 | wcrcf = 744; | |
231 | break; | |
232 | case 0x04: | |
233 | wcrcf = 1116; | |
234 | break; | |
235 | case 0x05: | |
236 | wcrcf = 1488; | |
237 | break; | |
238 | case 0x06: | |
239 | wcrcf = 1860; | |
240 | break; | |
241 | case 0x07: | |
242 | wcrcf = fi_rfu; | |
243 | break; | |
244 | case 0x08: | |
245 | wcrcf = fi_rfu; | |
246 | break; | |
247 | case 0x09: | |
248 | wcrcf = 512; | |
249 | break; | |
250 | case 0x0A: | |
251 | wcrcf = 768; | |
252 | break; | |
253 | case 0x0B: | |
254 | wcrcf = 1024; | |
255 | break; | |
256 | case 0x0C: | |
257 | wcrcf = 1536; | |
258 | break; | |
259 | case 0x0D: | |
260 | wcrcf = 2048; | |
261 | break; | |
262 | default: | |
263 | wcrcf = fi_rfu; | |
264 | break; | |
265 | } | |
266 | ||
267 | /* DI */ | |
268 | switch (fidi & 0x0F) { | |
269 | case 0x00: | |
270 | wbrcf = di_rfu; | |
271 | break; | |
272 | case 0x01: | |
273 | wbrcf = 1; | |
274 | break; | |
275 | case 0x02: | |
276 | wbrcf = 2; | |
277 | break; | |
278 | case 0x03: | |
279 | wbrcf = 4; | |
280 | break; | |
281 | case 0x04: | |
282 | wbrcf = 8; | |
283 | break; | |
284 | case 0x05: | |
285 | wbrcf = 16; | |
286 | break; | |
287 | case 0x06: | |
288 | wbrcf = 32; | |
289 | break; | |
290 | case 0x07: | |
291 | wbrcf = di_rfu; | |
292 | break; | |
293 | case 0x08: | |
294 | wbrcf = 12; | |
295 | break; | |
296 | case 0x09: | |
297 | wbrcf = 20; | |
298 | break; | |
299 | default: | |
300 | wbrcf = di_rfu; | |
301 | break; | |
302 | } | |
303 | ||
304 | return (wcrcf / wbrcf); | |
305 | } | |
306 | ||
ecb8a847 OJ |
307 | static unsigned short io_read_num_rec_bytes(unsigned int iobase, |
308 | unsigned short *s) | |
c1986ee9 HW |
309 | { |
310 | unsigned short tmp; | |
311 | ||
312 | tmp = *s = 0; | |
313 | do { | |
314 | *s = tmp; | |
315 | tmp = inb(REG_NUM_BYTES(iobase)) | | |
316 | (inb(REG_FLAGS0(iobase)) & 4 ? 0x100 : 0); | |
317 | } while (tmp != *s); | |
318 | ||
319 | return *s; | |
320 | } | |
321 | ||
322 | static int parse_atr(struct cm4000_dev *dev) | |
323 | { | |
324 | unsigned char any_t1, any_t0; | |
325 | unsigned char ch, ifno; | |
326 | int ix, done; | |
327 | ||
328 | DEBUGP(3, dev, "-> parse_atr: dev->atr_len = %i\n", dev->atr_len); | |
329 | ||
330 | if (dev->atr_len < 3) { | |
331 | DEBUGP(5, dev, "parse_atr: atr_len < 3\n"); | |
332 | return 0; | |
333 | } | |
334 | ||
335 | if (dev->atr[0] == 0x3f) | |
336 | set_bit(IS_INVREV, &dev->flags); | |
337 | else | |
338 | clear_bit(IS_INVREV, &dev->flags); | |
339 | ix = 1; | |
340 | ifno = 1; | |
341 | ch = dev->atr[1]; | |
342 | dev->proto = 0; /* XXX PROTO */ | |
343 | any_t1 = any_t0 = done = 0; | |
344 | dev->ta1 = 0x11; /* defaults to 9600 baud */ | |
345 | do { | |
346 | if (ifno == 1 && (ch & 0x10)) { | |
347 | /* read first interface byte and TA1 is present */ | |
348 | dev->ta1 = dev->atr[2]; | |
349 | DEBUGP(5, dev, "Card says FiDi is 0x%.2x\n", dev->ta1); | |
350 | ifno++; | |
351 | } else if ((ifno == 2) && (ch & 0x10)) { /* TA(2) */ | |
352 | dev->ta1 = 0x11; | |
353 | ifno++; | |
354 | } | |
355 | ||
356 | DEBUGP(5, dev, "Yi=%.2x\n", ch & 0xf0); | |
357 | ix += ((ch & 0x10) >> 4) /* no of int.face chars */ | |
358 | +((ch & 0x20) >> 5) | |
359 | + ((ch & 0x40) >> 6) | |
360 | + ((ch & 0x80) >> 7); | |
361 | /* ATRLENCK(dev,ix); */ | |
362 | if (ch & 0x80) { /* TDi */ | |
363 | ch = dev->atr[ix]; | |
364 | if ((ch & 0x0f)) { | |
365 | any_t1 = 1; | |
366 | DEBUGP(5, dev, "card is capable of T=1\n"); | |
367 | } else { | |
368 | any_t0 = 1; | |
369 | DEBUGP(5, dev, "card is capable of T=0\n"); | |
370 | } | |
371 | } else | |
372 | done = 1; | |
373 | } while (!done); | |
374 | ||
375 | DEBUGP(5, dev, "ix=%d noHist=%d any_t1=%d\n", | |
376 | ix, dev->atr[1] & 15, any_t1); | |
377 | if (ix + 1 + (dev->atr[1] & 0x0f) + any_t1 != dev->atr_len) { | |
378 | DEBUGP(5, dev, "length error\n"); | |
379 | return 0; | |
380 | } | |
381 | if (any_t0) | |
382 | set_bit(IS_ANY_T0, &dev->flags); | |
383 | ||
384 | if (any_t1) { /* compute csum */ | |
385 | dev->atr_csum = 0; | |
386 | #ifdef ATR_CSUM | |
387 | for (i = 1; i < dev->atr_len; i++) | |
388 | dev->atr_csum ^= dev->atr[i]; | |
389 | if (dev->atr_csum) { | |
390 | set_bit(IS_BAD_CSUM, &dev->flags); | |
391 | DEBUGP(5, dev, "bad checksum\n"); | |
392 | goto return_0; | |
393 | } | |
394 | #endif | |
395 | if (any_t0 == 0) | |
396 | dev->proto = 1; /* XXX PROTO */ | |
397 | set_bit(IS_ANY_T1, &dev->flags); | |
398 | } | |
399 | ||
400 | return 1; | |
401 | } | |
402 | ||
403 | struct card_fixup { | |
404 | char atr[12]; | |
405 | u_int8_t atr_len; | |
406 | u_int8_t stopbits; | |
407 | }; | |
408 | ||
409 | static struct card_fixup card_fixups[] = { | |
410 | { /* ACOS */ | |
411 | .atr = { 0x3b, 0xb3, 0x11, 0x00, 0x00, 0x41, 0x01 }, | |
412 | .atr_len = 7, | |
413 | .stopbits = 0x03, | |
414 | }, | |
415 | { /* Motorola */ | |
416 | .atr = {0x3b, 0x76, 0x13, 0x00, 0x00, 0x80, 0x62, 0x07, | |
417 | 0x41, 0x81, 0x81 }, | |
418 | .atr_len = 11, | |
419 | .stopbits = 0x04, | |
420 | }, | |
421 | }; | |
422 | ||
423 | static void set_cardparameter(struct cm4000_dev *dev) | |
424 | { | |
425 | int i; | |
ecb8a847 | 426 | unsigned int iobase = dev->p_dev->io.BasePort1; |
c1986ee9 HW |
427 | u_int8_t stopbits = 0x02; /* ISO default */ |
428 | ||
429 | DEBUGP(3, dev, "-> set_cardparameter\n"); | |
430 | ||
431 | dev->flags1 = dev->flags1 | (((dev->baudv - 1) & 0x0100) >> 8); | |
432 | xoutb(dev->flags1, REG_FLAGS1(iobase)); | |
433 | DEBUGP(5, dev, "flags1 = 0x%02x\n", dev->flags1); | |
434 | ||
435 | /* set baudrate */ | |
436 | xoutb((unsigned char)((dev->baudv - 1) & 0xFF), REG_BAUDRATE(iobase)); | |
437 | ||
438 | DEBUGP(5, dev, "baudv = %i -> write 0x%02x\n", dev->baudv, | |
439 | ((dev->baudv - 1) & 0xFF)); | |
440 | ||
441 | /* set stopbits */ | |
442 | for (i = 0; i < ARRAY_SIZE(card_fixups); i++) { | |
443 | if (!memcmp(dev->atr, card_fixups[i].atr, | |
444 | card_fixups[i].atr_len)) | |
445 | stopbits = card_fixups[i].stopbits; | |
446 | } | |
447 | xoutb(stopbits, REG_STOPBITS(iobase)); | |
448 | ||
449 | DEBUGP(3, dev, "<- set_cardparameter\n"); | |
450 | } | |
451 | ||
452 | static int set_protocol(struct cm4000_dev *dev, struct ptsreq *ptsreq) | |
453 | { | |
454 | ||
455 | unsigned long tmp, i; | |
456 | unsigned short num_bytes_read; | |
457 | unsigned char pts_reply[4]; | |
458 | ssize_t rc; | |
ecb8a847 | 459 | unsigned int iobase = dev->p_dev->io.BasePort1; |
c1986ee9 HW |
460 | |
461 | rc = 0; | |
462 | ||
463 | DEBUGP(3, dev, "-> set_protocol\n"); | |
464 | DEBUGP(5, dev, "ptsreq->Protocol = 0x%.8x, ptsreq->Flags=0x%.8x, " | |
465 | "ptsreq->pts1=0x%.2x, ptsreq->pts2=0x%.2x, " | |
466 | "ptsreq->pts3=0x%.2x\n", (unsigned int)ptsreq->protocol, | |
467 | (unsigned int)ptsreq->flags, ptsreq->pts1, ptsreq->pts2, | |
468 | ptsreq->pts3); | |
469 | ||
470 | /* Fill PTS structure */ | |
471 | dev->pts[0] = 0xff; | |
472 | dev->pts[1] = 0x00; | |
473 | tmp = ptsreq->protocol; | |
474 | while ((tmp = (tmp >> 1)) > 0) | |
475 | dev->pts[1]++; | |
476 | dev->proto = dev->pts[1]; /* Set new protocol */ | |
477 | dev->pts[1] = (0x01 << 4) | (dev->pts[1]); | |
478 | ||
479 | /* Correct Fi/Di according to CM4000 Fi/Di table */ | |
480 | DEBUGP(5, dev, "Ta(1) from ATR is 0x%.2x\n", dev->ta1); | |
481 | /* set Fi/Di according to ATR TA(1) */ | |
482 | dev->pts[2] = fi_di_table[dev->ta1 & 0x0F][(dev->ta1 >> 4) & 0x0F]; | |
483 | ||
484 | /* Calculate PCK character */ | |
485 | dev->pts[3] = dev->pts[0] ^ dev->pts[1] ^ dev->pts[2]; | |
486 | ||
487 | DEBUGP(5, dev, "pts0=%.2x, pts1=%.2x, pts2=%.2x, pts3=%.2x\n", | |
488 | dev->pts[0], dev->pts[1], dev->pts[2], dev->pts[3]); | |
489 | ||
490 | /* check card convention */ | |
491 | if (test_bit(IS_INVREV, &dev->flags)) | |
492 | str_invert_revert(dev->pts, 4); | |
493 | ||
494 | /* reset SM */ | |
495 | xoutb(0x80, REG_FLAGS0(iobase)); | |
496 | ||
497 | /* Enable access to the message buffer */ | |
498 | DEBUGP(5, dev, "Enable access to the messages buffer\n"); | |
499 | dev->flags1 = 0x20 /* T_Active */ | |
500 | | (test_bit(IS_INVREV, &dev->flags) ? 0x02 : 0x00) /* inv parity */ | |
501 | | ((dev->baudv >> 8) & 0x01); /* MSB-baud */ | |
502 | xoutb(dev->flags1, REG_FLAGS1(iobase)); | |
503 | ||
504 | DEBUGP(5, dev, "Enable message buffer -> flags1 = 0x%.2x\n", | |
505 | dev->flags1); | |
506 | ||
507 | /* write challenge to the buffer */ | |
508 | DEBUGP(5, dev, "Write challenge to buffer: "); | |
509 | for (i = 0; i < 4; i++) { | |
510 | xoutb(i, REG_BUF_ADDR(iobase)); | |
511 | xoutb(dev->pts[i], REG_BUF_DATA(iobase)); /* buf data */ | |
cbf624f0 DB |
512 | #ifdef CM4000_DEBUG |
513 | pr_debug("0x%.2x ", dev->pts[i]); | |
c1986ee9 | 514 | } |
cbf624f0 | 515 | pr_debug("\n"); |
c1986ee9 HW |
516 | #else |
517 | } | |
518 | #endif | |
519 | ||
520 | /* set number of bytes to write */ | |
521 | DEBUGP(5, dev, "Set number of bytes to write\n"); | |
522 | xoutb(0x04, REG_NUM_SEND(iobase)); | |
523 | ||
524 | /* Trigger CARDMAN CONTROLLER */ | |
525 | xoutb(0x50, REG_FLAGS0(iobase)); | |
526 | ||
527 | /* Monitor progress */ | |
528 | /* wait for xmit done */ | |
529 | DEBUGP(5, dev, "Waiting for NumRecBytes getting valid\n"); | |
530 | ||
531 | for (i = 0; i < 100; i++) { | |
532 | if (inb(REG_FLAGS0(iobase)) & 0x08) { | |
533 | DEBUGP(5, dev, "NumRecBytes is valid\n"); | |
534 | break; | |
535 | } | |
536 | mdelay(10); | |
537 | } | |
538 | if (i == 100) { | |
539 | DEBUGP(5, dev, "Timeout waiting for NumRecBytes getting " | |
540 | "valid\n"); | |
541 | rc = -EIO; | |
542 | goto exit_setprotocol; | |
543 | } | |
544 | ||
545 | DEBUGP(5, dev, "Reading NumRecBytes\n"); | |
546 | for (i = 0; i < 100; i++) { | |
547 | io_read_num_rec_bytes(iobase, &num_bytes_read); | |
548 | if (num_bytes_read >= 4) { | |
549 | DEBUGP(2, dev, "NumRecBytes = %i\n", num_bytes_read); | |
550 | break; | |
551 | } | |
552 | mdelay(10); | |
553 | } | |
554 | ||
555 | /* check whether it is a short PTS reply? */ | |
556 | if (num_bytes_read == 3) | |
557 | i = 0; | |
558 | ||
559 | if (i == 100) { | |
560 | DEBUGP(5, dev, "Timeout reading num_bytes_read\n"); | |
561 | rc = -EIO; | |
562 | goto exit_setprotocol; | |
563 | } | |
564 | ||
565 | DEBUGP(5, dev, "Reset the CARDMAN CONTROLLER\n"); | |
566 | xoutb(0x80, REG_FLAGS0(iobase)); | |
567 | ||
568 | /* Read PPS reply */ | |
569 | DEBUGP(5, dev, "Read PPS reply\n"); | |
570 | for (i = 0; i < num_bytes_read; i++) { | |
571 | xoutb(i, REG_BUF_ADDR(iobase)); | |
572 | pts_reply[i] = inb(REG_BUF_DATA(iobase)); | |
573 | } | |
574 | ||
cbf624f0 | 575 | #ifdef CM4000_DEBUG |
c1986ee9 HW |
576 | DEBUGP(2, dev, "PTSreply: "); |
577 | for (i = 0; i < num_bytes_read; i++) { | |
cbf624f0 | 578 | pr_debug("0x%.2x ", pts_reply[i]); |
c1986ee9 | 579 | } |
cbf624f0 DB |
580 | pr_debug("\n"); |
581 | #endif /* CM4000_DEBUG */ | |
c1986ee9 HW |
582 | |
583 | DEBUGP(5, dev, "Clear Tactive in Flags1\n"); | |
584 | xoutb(0x20, REG_FLAGS1(iobase)); | |
585 | ||
586 | /* Compare ptsreq and ptsreply */ | |
587 | if ((dev->pts[0] == pts_reply[0]) && | |
588 | (dev->pts[1] == pts_reply[1]) && | |
589 | (dev->pts[2] == pts_reply[2]) && (dev->pts[3] == pts_reply[3])) { | |
590 | /* setcardparameter according to PPS */ | |
591 | dev->baudv = calc_baudv(dev->pts[2]); | |
592 | set_cardparameter(dev); | |
593 | } else if ((dev->pts[0] == pts_reply[0]) && | |
594 | ((dev->pts[1] & 0xef) == pts_reply[1]) && | |
595 | ((pts_reply[0] ^ pts_reply[1]) == pts_reply[2])) { | |
596 | /* short PTS reply, set card parameter to default values */ | |
597 | dev->baudv = calc_baudv(0x11); | |
598 | set_cardparameter(dev); | |
599 | } else | |
600 | rc = -EIO; | |
601 | ||
602 | exit_setprotocol: | |
603 | DEBUGP(3, dev, "<- set_protocol\n"); | |
604 | return rc; | |
605 | } | |
606 | ||
ecb8a847 | 607 | static int io_detect_cm4000(unsigned int iobase, struct cm4000_dev *dev) |
c1986ee9 HW |
608 | { |
609 | ||
610 | /* note: statemachine is assumed to be reset */ | |
611 | if (inb(REG_FLAGS0(iobase)) & 8) { | |
612 | clear_bit(IS_ATR_VALID, &dev->flags); | |
613 | set_bit(IS_CMM_ABSENT, &dev->flags); | |
614 | return 0; /* detect CMM = 1 -> failure */ | |
615 | } | |
616 | /* xoutb(0x40, REG_FLAGS1(iobase)); detectCMM */ | |
617 | xoutb(dev->flags1 | 0x40, REG_FLAGS1(iobase)); | |
618 | if ((inb(REG_FLAGS0(iobase)) & 8) == 0) { | |
619 | clear_bit(IS_ATR_VALID, &dev->flags); | |
620 | set_bit(IS_CMM_ABSENT, &dev->flags); | |
621 | return 0; /* detect CMM=0 -> failure */ | |
622 | } | |
623 | /* clear detectCMM again by restoring original flags1 */ | |
624 | xoutb(dev->flags1, REG_FLAGS1(iobase)); | |
625 | return 1; | |
626 | } | |
627 | ||
628 | static void terminate_monitor(struct cm4000_dev *dev) | |
629 | { | |
630 | ||
631 | /* tell the monitor to stop and wait until | |
632 | * it terminates. | |
633 | */ | |
634 | DEBUGP(3, dev, "-> terminate_monitor\n"); | |
635 | wait_event_interruptible(dev->devq, | |
636 | test_and_set_bit(LOCK_MONITOR, | |
637 | (void *)&dev->flags)); | |
638 | ||
639 | /* now, LOCK_MONITOR has been set. | |
640 | * allow a last cycle in the monitor. | |
641 | * the monitor will indicate that it has | |
642 | * finished by clearing this bit. | |
643 | */ | |
644 | DEBUGP(5, dev, "Now allow last cycle of monitor!\n"); | |
645 | while (test_bit(LOCK_MONITOR, (void *)&dev->flags)) | |
646 | msleep(25); | |
647 | ||
648 | DEBUGP(5, dev, "Delete timer\n"); | |
649 | del_timer_sync(&dev->timer); | |
cbf624f0 | 650 | #ifdef CM4000_DEBUG |
c1986ee9 HW |
651 | dev->monitor_running = 0; |
652 | #endif | |
653 | ||
654 | DEBUGP(3, dev, "<- terminate_monitor\n"); | |
655 | } | |
656 | ||
657 | /* | |
658 | * monitor the card every 50msec. as a side-effect, retrieve the | |
659 | * atr once a card is inserted. another side-effect of retrieving the | |
660 | * atr is that the card will be powered on, so there is no need to | |
661 | * power on the card explictely from the application: the driver | |
662 | * is already doing that for you. | |
663 | */ | |
664 | ||
665 | static void monitor_card(unsigned long p) | |
666 | { | |
667 | struct cm4000_dev *dev = (struct cm4000_dev *) p; | |
ecb8a847 | 668 | unsigned int iobase = dev->p_dev->io.BasePort1; |
c1986ee9 HW |
669 | unsigned short s; |
670 | struct ptsreq ptsreq; | |
671 | int i, atrc; | |
672 | ||
673 | DEBUGP(7, dev, "-> monitor_card\n"); | |
674 | ||
675 | /* if someone has set the lock for us: we're done! */ | |
676 | if (test_and_set_bit(LOCK_MONITOR, &dev->flags)) { | |
677 | DEBUGP(4, dev, "About to stop monitor\n"); | |
678 | /* no */ | |
679 | dev->rlen = | |
680 | dev->rpos = | |
681 | dev->atr_csum = dev->atr_len_retry = dev->cwarn = 0; | |
682 | dev->mstate = M_FETCH_ATR; | |
683 | clear_bit(LOCK_MONITOR, &dev->flags); | |
684 | /* close et al. are sleeping on devq, so wake it */ | |
685 | wake_up_interruptible(&dev->devq); | |
686 | DEBUGP(2, dev, "<- monitor_card (we are done now)\n"); | |
687 | return; | |
688 | } | |
689 | ||
690 | /* try to lock io: if it is already locked, just add another timer */ | |
691 | if (test_and_set_bit(LOCK_IO, (void *)&dev->flags)) { | |
692 | DEBUGP(4, dev, "Couldn't get IO lock\n"); | |
693 | goto return_with_timer; | |
694 | } | |
695 | ||
696 | /* is a card/a reader inserted at all ? */ | |
697 | dev->flags0 = xinb(REG_FLAGS0(iobase)); | |
698 | DEBUGP(7, dev, "dev->flags0 = 0x%2x\n", dev->flags0); | |
699 | DEBUGP(7, dev, "smartcard present: %s\n", | |
700 | dev->flags0 & 1 ? "yes" : "no"); | |
701 | DEBUGP(7, dev, "cardman present: %s\n", | |
702 | dev->flags0 == 0xff ? "no" : "yes"); | |
703 | ||
704 | if ((dev->flags0 & 1) == 0 /* no smartcard inserted */ | |
705 | || dev->flags0 == 0xff) { /* no cardman inserted */ | |
706 | /* no */ | |
707 | dev->rlen = | |
708 | dev->rpos = | |
709 | dev->atr_csum = dev->atr_len_retry = dev->cwarn = 0; | |
710 | dev->mstate = M_FETCH_ATR; | |
711 | ||
712 | dev->flags &= 0x000000ff; /* only keep IO and MONITOR locks */ | |
713 | ||
714 | if (dev->flags0 == 0xff) { | |
715 | DEBUGP(4, dev, "set IS_CMM_ABSENT bit\n"); | |
716 | set_bit(IS_CMM_ABSENT, &dev->flags); | |
717 | } else if (test_bit(IS_CMM_ABSENT, &dev->flags)) { | |
718 | DEBUGP(4, dev, "clear IS_CMM_ABSENT bit " | |
719 | "(card is removed)\n"); | |
720 | clear_bit(IS_CMM_ABSENT, &dev->flags); | |
721 | } | |
722 | ||
723 | goto release_io; | |
724 | } else if ((dev->flags0 & 1) && test_bit(IS_CMM_ABSENT, &dev->flags)) { | |
725 | /* cardman and card present but cardman was absent before | |
726 | * (after suspend with inserted card) */ | |
727 | DEBUGP(4, dev, "clear IS_CMM_ABSENT bit (card is inserted)\n"); | |
728 | clear_bit(IS_CMM_ABSENT, &dev->flags); | |
729 | } | |
730 | ||
731 | if (test_bit(IS_ATR_VALID, &dev->flags) == 1) { | |
732 | DEBUGP(7, dev, "believe ATR is already valid (do nothing)\n"); | |
733 | goto release_io; | |
734 | } | |
735 | ||
736 | switch (dev->mstate) { | |
737 | unsigned char flags0; | |
738 | case M_CARDOFF: | |
739 | DEBUGP(4, dev, "M_CARDOFF\n"); | |
740 | flags0 = inb(REG_FLAGS0(iobase)); | |
741 | if (flags0 & 0x02) { | |
742 | /* wait until Flags0 indicate power is off */ | |
743 | dev->mdelay = T_10MSEC; | |
744 | } else { | |
745 | /* Flags0 indicate power off and no card inserted now; | |
746 | * Reset CARDMAN CONTROLLER */ | |
747 | xoutb(0x80, REG_FLAGS0(iobase)); | |
748 | ||
749 | /* prepare for fetching ATR again: after card off ATR | |
750 | * is read again automatically */ | |
751 | dev->rlen = | |
752 | dev->rpos = | |
753 | dev->atr_csum = | |
754 | dev->atr_len_retry = dev->cwarn = 0; | |
755 | dev->mstate = M_FETCH_ATR; | |
756 | ||
757 | /* minimal gap between CARDOFF and read ATR is 50msec */ | |
758 | dev->mdelay = T_50MSEC; | |
759 | } | |
760 | break; | |
761 | case M_FETCH_ATR: | |
762 | DEBUGP(4, dev, "M_FETCH_ATR\n"); | |
763 | xoutb(0x80, REG_FLAGS0(iobase)); | |
764 | DEBUGP(4, dev, "Reset BAUDV to 9600\n"); | |
765 | dev->baudv = 0x173; /* 9600 */ | |
766 | xoutb(0x02, REG_STOPBITS(iobase)); /* stopbits=2 */ | |
767 | xoutb(0x73, REG_BAUDRATE(iobase)); /* baud value */ | |
768 | xoutb(0x21, REG_FLAGS1(iobase)); /* T_Active=1, baud | |
769 | value */ | |
770 | /* warm start vs. power on: */ | |
771 | xoutb(dev->flags0 & 2 ? 0x46 : 0x44, REG_FLAGS0(iobase)); | |
772 | dev->mdelay = T_40MSEC; | |
773 | dev->mstate = M_TIMEOUT_WAIT; | |
774 | break; | |
775 | case M_TIMEOUT_WAIT: | |
776 | DEBUGP(4, dev, "M_TIMEOUT_WAIT\n"); | |
777 | /* numRecBytes */ | |
778 | io_read_num_rec_bytes(iobase, &dev->atr_len); | |
779 | dev->mdelay = T_10MSEC; | |
780 | dev->mstate = M_READ_ATR_LEN; | |
781 | break; | |
782 | case M_READ_ATR_LEN: | |
783 | DEBUGP(4, dev, "M_READ_ATR_LEN\n"); | |
784 | /* infinite loop possible, since there is no timeout */ | |
785 | ||
786 | #define MAX_ATR_LEN_RETRY 100 | |
787 | ||
788 | if (dev->atr_len == io_read_num_rec_bytes(iobase, &s)) { | |
789 | if (dev->atr_len_retry++ >= MAX_ATR_LEN_RETRY) { /* + XX msec */ | |
790 | dev->mdelay = T_10MSEC; | |
791 | dev->mstate = M_READ_ATR; | |
792 | } | |
793 | } else { | |
794 | dev->atr_len = s; | |
795 | dev->atr_len_retry = 0; /* set new timeout */ | |
796 | } | |
797 | ||
798 | DEBUGP(4, dev, "Current ATR_LEN = %i\n", dev->atr_len); | |
799 | break; | |
800 | case M_READ_ATR: | |
801 | DEBUGP(4, dev, "M_READ_ATR\n"); | |
802 | xoutb(0x80, REG_FLAGS0(iobase)); /* reset SM */ | |
803 | for (i = 0; i < dev->atr_len; i++) { | |
804 | xoutb(i, REG_BUF_ADDR(iobase)); | |
805 | dev->atr[i] = inb(REG_BUF_DATA(iobase)); | |
806 | } | |
807 | /* Deactivate T_Active flags */ | |
808 | DEBUGP(4, dev, "Deactivate T_Active flags\n"); | |
809 | dev->flags1 = 0x01; | |
810 | xoutb(dev->flags1, REG_FLAGS1(iobase)); | |
811 | ||
812 | /* atr is present (which doesnt mean it's valid) */ | |
813 | set_bit(IS_ATR_PRESENT, &dev->flags); | |
814 | if (dev->atr[0] == 0x03) | |
815 | str_invert_revert(dev->atr, dev->atr_len); | |
816 | atrc = parse_atr(dev); | |
817 | if (atrc == 0) { /* atr invalid */ | |
818 | dev->mdelay = 0; | |
819 | dev->mstate = M_BAD_CARD; | |
820 | } else { | |
821 | dev->mdelay = T_50MSEC; | |
822 | dev->mstate = M_ATR_PRESENT; | |
823 | set_bit(IS_ATR_VALID, &dev->flags); | |
824 | } | |
825 | ||
826 | if (test_bit(IS_ATR_VALID, &dev->flags) == 1) { | |
827 | DEBUGP(4, dev, "monitor_card: ATR valid\n"); | |
828 | /* if ta1 == 0x11, no PPS necessary (default values) */ | |
829 | /* do not do PPS with multi protocol cards */ | |
830 | if ((test_bit(IS_AUTOPPS_ACT, &dev->flags) == 0) && | |
831 | (dev->ta1 != 0x11) && | |
832 | !(test_bit(IS_ANY_T0, &dev->flags) && | |
833 | test_bit(IS_ANY_T1, &dev->flags))) { | |
834 | DEBUGP(4, dev, "Perform AUTOPPS\n"); | |
835 | set_bit(IS_AUTOPPS_ACT, &dev->flags); | |
836 | ptsreq.protocol = ptsreq.protocol = | |
837 | (0x01 << dev->proto); | |
838 | ptsreq.flags = 0x01; | |
839 | ptsreq.pts1 = 0x00; | |
840 | ptsreq.pts2 = 0x00; | |
841 | ptsreq.pts3 = 0x00; | |
842 | if (set_protocol(dev, &ptsreq) == 0) { | |
843 | DEBUGP(4, dev, "AUTOPPS ret SUCC\n"); | |
844 | clear_bit(IS_AUTOPPS_ACT, &dev->flags); | |
845 | wake_up_interruptible(&dev->atrq); | |
846 | } else { | |
847 | DEBUGP(4, dev, "AUTOPPS failed: " | |
848 | "repower using defaults\n"); | |
849 | /* prepare for repowering */ | |
850 | clear_bit(IS_ATR_PRESENT, &dev->flags); | |
851 | clear_bit(IS_ATR_VALID, &dev->flags); | |
852 | dev->rlen = | |
853 | dev->rpos = | |
854 | dev->atr_csum = | |
855 | dev->atr_len_retry = dev->cwarn = 0; | |
856 | dev->mstate = M_FETCH_ATR; | |
857 | ||
858 | dev->mdelay = T_50MSEC; | |
859 | } | |
860 | } else { | |
861 | /* for cards which use slightly different | |
862 | * params (extra guard time) */ | |
863 | set_cardparameter(dev); | |
864 | if (test_bit(IS_AUTOPPS_ACT, &dev->flags) == 1) | |
865 | DEBUGP(4, dev, "AUTOPPS already active " | |
866 | "2nd try:use default values\n"); | |
867 | if (dev->ta1 == 0x11) | |
868 | DEBUGP(4, dev, "No AUTOPPS necessary " | |
869 | "TA(1)==0x11\n"); | |
870 | if (test_bit(IS_ANY_T0, &dev->flags) | |
871 | && test_bit(IS_ANY_T1, &dev->flags)) | |
872 | DEBUGP(4, dev, "Do NOT perform AUTOPPS " | |
873 | "with multiprotocol cards\n"); | |
874 | clear_bit(IS_AUTOPPS_ACT, &dev->flags); | |
875 | wake_up_interruptible(&dev->atrq); | |
876 | } | |
877 | } else { | |
878 | DEBUGP(4, dev, "ATR invalid\n"); | |
879 | wake_up_interruptible(&dev->atrq); | |
880 | } | |
881 | break; | |
882 | case M_BAD_CARD: | |
883 | DEBUGP(4, dev, "M_BAD_CARD\n"); | |
884 | /* slow down warning, but prompt immediately after insertion */ | |
885 | if (dev->cwarn == 0 || dev->cwarn == 10) { | |
886 | set_bit(IS_BAD_CARD, &dev->flags); | |
887 | printk(KERN_WARNING MODULE_NAME ": device %s: ", | |
888 | dev->node.dev_name); | |
889 | if (test_bit(IS_BAD_CSUM, &dev->flags)) { | |
890 | DEBUGP(4, dev, "ATR checksum (0x%.2x, should " | |
891 | "be zero) failed\n", dev->atr_csum); | |
892 | } | |
cbf624f0 | 893 | #ifdef CM4000_DEBUG |
c1986ee9 HW |
894 | else if (test_bit(IS_BAD_LENGTH, &dev->flags)) { |
895 | DEBUGP(4, dev, "ATR length error\n"); | |
896 | } else { | |
897 | DEBUGP(4, dev, "card damaged or wrong way " | |
898 | "inserted\n"); | |
899 | } | |
900 | #endif | |
901 | dev->cwarn = 0; | |
902 | wake_up_interruptible(&dev->atrq); /* wake open */ | |
903 | } | |
904 | dev->cwarn++; | |
905 | dev->mdelay = T_100MSEC; | |
906 | dev->mstate = M_FETCH_ATR; | |
907 | break; | |
908 | default: | |
909 | DEBUGP(7, dev, "Unknown action\n"); | |
910 | break; /* nothing */ | |
911 | } | |
912 | ||
913 | release_io: | |
914 | DEBUGP(7, dev, "release_io\n"); | |
915 | clear_bit(LOCK_IO, &dev->flags); | |
916 | wake_up_interruptible(&dev->ioq); /* whoever needs IO */ | |
917 | ||
918 | return_with_timer: | |
919 | DEBUGP(7, dev, "<- monitor_card (returns with timer)\n"); | |
40565f19 | 920 | mod_timer(&dev->timer, jiffies + dev->mdelay); |
c1986ee9 HW |
921 | clear_bit(LOCK_MONITOR, &dev->flags); |
922 | } | |
923 | ||
924 | /* Interface to userland (file_operations) */ | |
925 | ||
926 | static ssize_t cmm_read(struct file *filp, __user char *buf, size_t count, | |
927 | loff_t *ppos) | |
928 | { | |
929 | struct cm4000_dev *dev = filp->private_data; | |
ecb8a847 | 930 | unsigned int iobase = dev->p_dev->io.BasePort1; |
c1986ee9 HW |
931 | ssize_t rc; |
932 | int i, j, k; | |
933 | ||
934 | DEBUGP(2, dev, "-> cmm_read(%s,%d)\n", current->comm, current->pid); | |
935 | ||
936 | if (count == 0) /* according to manpage */ | |
937 | return 0; | |
938 | ||
e2d40963 | 939 | if (!pcmcia_dev_present(dev->p_dev) || /* device removed */ |
c1986ee9 HW |
940 | test_bit(IS_CMM_ABSENT, &dev->flags)) |
941 | return -ENODEV; | |
942 | ||
943 | if (test_bit(IS_BAD_CSUM, &dev->flags)) | |
944 | return -EIO; | |
945 | ||
946 | /* also see the note about this in cmm_write */ | |
947 | if (wait_event_interruptible | |
948 | (dev->atrq, | |
949 | ((filp->f_flags & O_NONBLOCK) | |
950 | || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags) != 0)))) { | |
951 | if (filp->f_flags & O_NONBLOCK) | |
952 | return -EAGAIN; | |
953 | return -ERESTARTSYS; | |
954 | } | |
955 | ||
956 | if (test_bit(IS_ATR_VALID, &dev->flags) == 0) | |
957 | return -EIO; | |
958 | ||
959 | /* this one implements blocking IO */ | |
960 | if (wait_event_interruptible | |
961 | (dev->readq, | |
962 | ((filp->f_flags & O_NONBLOCK) || (dev->rpos < dev->rlen)))) { | |
963 | if (filp->f_flags & O_NONBLOCK) | |
964 | return -EAGAIN; | |
965 | return -ERESTARTSYS; | |
966 | } | |
967 | ||
968 | /* lock io */ | |
969 | if (wait_event_interruptible | |
970 | (dev->ioq, | |
971 | ((filp->f_flags & O_NONBLOCK) | |
972 | || (test_and_set_bit(LOCK_IO, (void *)&dev->flags) == 0)))) { | |
973 | if (filp->f_flags & O_NONBLOCK) | |
974 | return -EAGAIN; | |
975 | return -ERESTARTSYS; | |
976 | } | |
977 | ||
978 | rc = 0; | |
979 | dev->flags0 = inb(REG_FLAGS0(iobase)); | |
980 | if ((dev->flags0 & 1) == 0 /* no smartcard inserted */ | |
981 | || dev->flags0 == 0xff) { /* no cardman inserted */ | |
982 | clear_bit(IS_ATR_VALID, &dev->flags); | |
983 | if (dev->flags0 & 1) { | |
984 | set_bit(IS_CMM_ABSENT, &dev->flags); | |
985 | rc = -ENODEV; | |
986 | } | |
987 | rc = -EIO; | |
988 | goto release_io; | |
989 | } | |
990 | ||
991 | DEBUGP(4, dev, "begin read answer\n"); | |
992 | j = min(count, (size_t)(dev->rlen - dev->rpos)); | |
993 | k = dev->rpos; | |
994 | if (k + j > 255) | |
995 | j = 256 - k; | |
996 | DEBUGP(4, dev, "read1 j=%d\n", j); | |
997 | for (i = 0; i < j; i++) { | |
998 | xoutb(k++, REG_BUF_ADDR(iobase)); | |
999 | dev->rbuf[i] = xinb(REG_BUF_DATA(iobase)); | |
1000 | } | |
1001 | j = min(count, (size_t)(dev->rlen - dev->rpos)); | |
1002 | if (k + j > 255) { | |
1003 | DEBUGP(4, dev, "read2 j=%d\n", j); | |
1004 | dev->flags1 |= 0x10; /* MSB buf addr set */ | |
1005 | xoutb(dev->flags1, REG_FLAGS1(iobase)); | |
1006 | for (; i < j; i++) { | |
1007 | xoutb(k++, REG_BUF_ADDR(iobase)); | |
1008 | dev->rbuf[i] = xinb(REG_BUF_DATA(iobase)); | |
1009 | } | |
1010 | } | |
1011 | ||
470967dc | 1012 | if (dev->proto == 0 && count > dev->rlen - dev->rpos && i) { |
c1986ee9 HW |
1013 | DEBUGP(4, dev, "T=0 and count > buffer\n"); |
1014 | dev->rbuf[i] = dev->rbuf[i - 1]; | |
1015 | dev->rbuf[i - 1] = dev->procbyte; | |
1016 | j++; | |
1017 | } | |
1018 | count = j; | |
1019 | ||
1020 | dev->rpos = dev->rlen + 1; | |
1021 | ||
1022 | /* Clear T1Active */ | |
1023 | DEBUGP(4, dev, "Clear T1Active\n"); | |
1024 | dev->flags1 &= 0xdf; | |
1025 | xoutb(dev->flags1, REG_FLAGS1(iobase)); | |
1026 | ||
1027 | xoutb(0, REG_FLAGS1(iobase)); /* clear detectCMM */ | |
1028 | /* last check before exit */ | |
07a71415 DC |
1029 | if (!io_detect_cm4000(iobase, dev)) { |
1030 | rc = -ENODEV; | |
1031 | goto release_io; | |
1032 | } | |
c1986ee9 HW |
1033 | |
1034 | if (test_bit(IS_INVREV, &dev->flags) && count > 0) | |
1035 | str_invert_revert(dev->rbuf, count); | |
1036 | ||
1037 | if (copy_to_user(buf, dev->rbuf, count)) | |
07a71415 | 1038 | rc = -EFAULT; |
c1986ee9 HW |
1039 | |
1040 | release_io: | |
1041 | clear_bit(LOCK_IO, &dev->flags); | |
1042 | wake_up_interruptible(&dev->ioq); | |
1043 | ||
1044 | DEBUGP(2, dev, "<- cmm_read returns: rc = %Zi\n", | |
1045 | (rc < 0 ? rc : count)); | |
1046 | return rc < 0 ? rc : count; | |
1047 | } | |
1048 | ||
1049 | static ssize_t cmm_write(struct file *filp, const char __user *buf, | |
1050 | size_t count, loff_t *ppos) | |
1051 | { | |
c6be9c5a | 1052 | struct cm4000_dev *dev = filp->private_data; |
ecb8a847 | 1053 | unsigned int iobase = dev->p_dev->io.BasePort1; |
c1986ee9 HW |
1054 | unsigned short s; |
1055 | unsigned char tmp; | |
1056 | unsigned char infolen; | |
1057 | unsigned char sendT0; | |
1058 | unsigned short nsend; | |
1059 | unsigned short nr; | |
1060 | ssize_t rc; | |
1061 | int i; | |
1062 | ||
1063 | DEBUGP(2, dev, "-> cmm_write(%s,%d)\n", current->comm, current->pid); | |
1064 | ||
1065 | if (count == 0) /* according to manpage */ | |
1066 | return 0; | |
1067 | ||
1068 | if (dev->proto == 0 && count < 4) { | |
1069 | /* T0 must have at least 4 bytes */ | |
1070 | DEBUGP(4, dev, "T0 short write\n"); | |
1071 | return -EIO; | |
1072 | } | |
1073 | ||
1074 | nr = count & 0x1ff; /* max bytes to write */ | |
1075 | ||
1076 | sendT0 = dev->proto ? 0 : nr > 5 ? 0x08 : 0; | |
1077 | ||
e2d40963 | 1078 | if (!pcmcia_dev_present(dev->p_dev) || /* device removed */ |
c1986ee9 HW |
1079 | test_bit(IS_CMM_ABSENT, &dev->flags)) |
1080 | return -ENODEV; | |
1081 | ||
1082 | if (test_bit(IS_BAD_CSUM, &dev->flags)) { | |
1083 | DEBUGP(4, dev, "bad csum\n"); | |
1084 | return -EIO; | |
1085 | } | |
1086 | ||
1087 | /* | |
1088 | * wait for atr to become valid. | |
1089 | * note: it is important to lock this code. if we dont, the monitor | |
59c51591 | 1090 | * could be run between test_bit and the call to sleep on the |
c1986ee9 HW |
1091 | * atr-queue. if *then* the monitor detects atr valid, it will wake up |
1092 | * any process on the atr-queue, *but* since we have been interrupted, | |
1093 | * we do not yet sleep on this queue. this would result in a missed | |
1094 | * wake_up and the calling process would sleep forever (until | |
1095 | * interrupted). also, do *not* restore_flags before sleep_on, because | |
1096 | * this could result in the same situation! | |
1097 | */ | |
1098 | if (wait_event_interruptible | |
1099 | (dev->atrq, | |
1100 | ((filp->f_flags & O_NONBLOCK) | |
1101 | || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags) != 0)))) { | |
1102 | if (filp->f_flags & O_NONBLOCK) | |
1103 | return -EAGAIN; | |
1104 | return -ERESTARTSYS; | |
1105 | } | |
1106 | ||
1107 | if (test_bit(IS_ATR_VALID, &dev->flags) == 0) { /* invalid atr */ | |
1108 | DEBUGP(4, dev, "invalid ATR\n"); | |
1109 | return -EIO; | |
1110 | } | |
1111 | ||
1112 | /* lock io */ | |
1113 | if (wait_event_interruptible | |
1114 | (dev->ioq, | |
1115 | ((filp->f_flags & O_NONBLOCK) | |
1116 | || (test_and_set_bit(LOCK_IO, (void *)&dev->flags) == 0)))) { | |
1117 | if (filp->f_flags & O_NONBLOCK) | |
1118 | return -EAGAIN; | |
1119 | return -ERESTARTSYS; | |
1120 | } | |
1121 | ||
1122 | if (copy_from_user(dev->sbuf, buf, ((count > 512) ? 512 : count))) | |
1123 | return -EFAULT; | |
1124 | ||
1125 | rc = 0; | |
1126 | dev->flags0 = inb(REG_FLAGS0(iobase)); | |
1127 | if ((dev->flags0 & 1) == 0 /* no smartcard inserted */ | |
1128 | || dev->flags0 == 0xff) { /* no cardman inserted */ | |
1129 | clear_bit(IS_ATR_VALID, &dev->flags); | |
1130 | if (dev->flags0 & 1) { | |
1131 | set_bit(IS_CMM_ABSENT, &dev->flags); | |
1132 | rc = -ENODEV; | |
1133 | } else { | |
1134 | DEBUGP(4, dev, "IO error\n"); | |
1135 | rc = -EIO; | |
1136 | } | |
1137 | goto release_io; | |
1138 | } | |
1139 | ||
1140 | xoutb(0x80, REG_FLAGS0(iobase)); /* reset SM */ | |
1141 | ||
1142 | if (!io_detect_cm4000(iobase, dev)) { | |
1143 | rc = -ENODEV; | |
1144 | goto release_io; | |
1145 | } | |
1146 | ||
1147 | /* reflect T=0 send/read mode in flags1 */ | |
1148 | dev->flags1 |= (sendT0); | |
1149 | ||
1150 | set_cardparameter(dev); | |
1151 | ||
1152 | /* dummy read, reset flag procedure received */ | |
1153 | tmp = inb(REG_FLAGS1(iobase)); | |
1154 | ||
1155 | dev->flags1 = 0x20 /* T_Active */ | |
1156 | | (sendT0) | |
1157 | | (test_bit(IS_INVREV, &dev->flags) ? 2 : 0)/* inverse parity */ | |
1158 | | (((dev->baudv - 1) & 0x0100) >> 8); /* MSB-Baud */ | |
1159 | DEBUGP(1, dev, "set dev->flags1 = 0x%.2x\n", dev->flags1); | |
1160 | xoutb(dev->flags1, REG_FLAGS1(iobase)); | |
1161 | ||
1162 | /* xmit data */ | |
1163 | DEBUGP(4, dev, "Xmit data\n"); | |
1164 | for (i = 0; i < nr; i++) { | |
1165 | if (i >= 256) { | |
1166 | dev->flags1 = 0x20 /* T_Active */ | |
1167 | | (sendT0) /* SendT0 */ | |
1168 | /* inverse parity: */ | |
1169 | | (test_bit(IS_INVREV, &dev->flags) ? 2 : 0) | |
1170 | | (((dev->baudv - 1) & 0x0100) >> 8) /* MSB-Baud */ | |
1171 | | 0x10; /* set address high */ | |
1172 | DEBUGP(4, dev, "dev->flags = 0x%.2x - set address " | |
1173 | "high\n", dev->flags1); | |
1174 | xoutb(dev->flags1, REG_FLAGS1(iobase)); | |
1175 | } | |
1176 | if (test_bit(IS_INVREV, &dev->flags)) { | |
1177 | DEBUGP(4, dev, "Apply inverse convention for 0x%.2x " | |
1178 | "-> 0x%.2x\n", (unsigned char)dev->sbuf[i], | |
1179 | invert_revert(dev->sbuf[i])); | |
1180 | xoutb(i, REG_BUF_ADDR(iobase)); | |
1181 | xoutb(invert_revert(dev->sbuf[i]), | |
1182 | REG_BUF_DATA(iobase)); | |
1183 | } else { | |
1184 | xoutb(i, REG_BUF_ADDR(iobase)); | |
1185 | xoutb(dev->sbuf[i], REG_BUF_DATA(iobase)); | |
1186 | } | |
1187 | } | |
1188 | DEBUGP(4, dev, "Xmit done\n"); | |
1189 | ||
1190 | if (dev->proto == 0) { | |
1191 | /* T=0 proto: 0 byte reply */ | |
1192 | if (nr == 4) { | |
1193 | DEBUGP(4, dev, "T=0 assumes 0 byte reply\n"); | |
1194 | xoutb(i, REG_BUF_ADDR(iobase)); | |
1195 | if (test_bit(IS_INVREV, &dev->flags)) | |
1196 | xoutb(0xff, REG_BUF_DATA(iobase)); | |
1197 | else | |
1198 | xoutb(0x00, REG_BUF_DATA(iobase)); | |
1199 | } | |
1200 | ||
1201 | /* numSendBytes */ | |
1202 | if (sendT0) | |
1203 | nsend = nr; | |
1204 | else { | |
1205 | if (nr == 4) | |
1206 | nsend = 5; | |
1207 | else { | |
1208 | nsend = 5 + (unsigned char)dev->sbuf[4]; | |
1209 | if (dev->sbuf[4] == 0) | |
1210 | nsend += 0x100; | |
1211 | } | |
1212 | } | |
1213 | } else | |
1214 | nsend = nr; | |
1215 | ||
1216 | /* T0: output procedure byte */ | |
1217 | if (test_bit(IS_INVREV, &dev->flags)) { | |
1218 | DEBUGP(4, dev, "T=0 set Procedure byte (inverse-reverse) " | |
1219 | "0x%.2x\n", invert_revert(dev->sbuf[1])); | |
1220 | xoutb(invert_revert(dev->sbuf[1]), REG_NUM_BYTES(iobase)); | |
1221 | } else { | |
1222 | DEBUGP(4, dev, "T=0 set Procedure byte 0x%.2x\n", dev->sbuf[1]); | |
1223 | xoutb(dev->sbuf[1], REG_NUM_BYTES(iobase)); | |
1224 | } | |
1225 | ||
1226 | DEBUGP(1, dev, "set NumSendBytes = 0x%.2x\n", | |
1227 | (unsigned char)(nsend & 0xff)); | |
1228 | xoutb((unsigned char)(nsend & 0xff), REG_NUM_SEND(iobase)); | |
1229 | ||
1230 | DEBUGP(1, dev, "Trigger CARDMAN CONTROLLER (0x%.2x)\n", | |
1231 | 0x40 /* SM_Active */ | |
1232 | | (dev->flags0 & 2 ? 0 : 4) /* power on if needed */ | |
1233 | |(dev->proto ? 0x10 : 0x08) /* T=1/T=0 */ | |
1234 | |(nsend & 0x100) >> 8 /* MSB numSendBytes */ ); | |
1235 | xoutb(0x40 /* SM_Active */ | |
1236 | | (dev->flags0 & 2 ? 0 : 4) /* power on if needed */ | |
1237 | |(dev->proto ? 0x10 : 0x08) /* T=1/T=0 */ | |
1238 | |(nsend & 0x100) >> 8, /* MSB numSendBytes */ | |
1239 | REG_FLAGS0(iobase)); | |
1240 | ||
1241 | /* wait for xmit done */ | |
1242 | if (dev->proto == 1) { | |
1243 | DEBUGP(4, dev, "Wait for xmit done\n"); | |
1244 | for (i = 0; i < 1000; i++) { | |
1245 | if (inb(REG_FLAGS0(iobase)) & 0x08) | |
1246 | break; | |
1247 | msleep_interruptible(10); | |
1248 | } | |
1249 | if (i == 1000) { | |
1250 | DEBUGP(4, dev, "timeout waiting for xmit done\n"); | |
1251 | rc = -EIO; | |
1252 | goto release_io; | |
1253 | } | |
1254 | } | |
1255 | ||
1256 | /* T=1: wait for infoLen */ | |
1257 | ||
1258 | infolen = 0; | |
1259 | if (dev->proto) { | |
1260 | /* wait until infoLen is valid */ | |
1261 | for (i = 0; i < 6000; i++) { /* max waiting time of 1 min */ | |
1262 | io_read_num_rec_bytes(iobase, &s); | |
1263 | if (s >= 3) { | |
1264 | infolen = inb(REG_FLAGS1(iobase)); | |
1265 | DEBUGP(4, dev, "infolen=%d\n", infolen); | |
1266 | break; | |
1267 | } | |
1268 | msleep_interruptible(10); | |
1269 | } | |
1270 | if (i == 6000) { | |
1271 | DEBUGP(4, dev, "timeout waiting for infoLen\n"); | |
1272 | rc = -EIO; | |
1273 | goto release_io; | |
1274 | } | |
1275 | } else | |
1276 | clear_bit(IS_PROCBYTE_PRESENT, &dev->flags); | |
1277 | ||
1278 | /* numRecBytes | bit9 of numRecytes */ | |
1279 | io_read_num_rec_bytes(iobase, &dev->rlen); | |
1280 | for (i = 0; i < 600; i++) { /* max waiting time of 2 sec */ | |
1281 | if (dev->proto) { | |
1282 | if (dev->rlen >= infolen + 4) | |
1283 | break; | |
1284 | } | |
1285 | msleep_interruptible(10); | |
1286 | /* numRecBytes | bit9 of numRecytes */ | |
1287 | io_read_num_rec_bytes(iobase, &s); | |
1288 | if (s > dev->rlen) { | |
1289 | DEBUGP(1, dev, "NumRecBytes inc (reset timeout)\n"); | |
1290 | i = 0; /* reset timeout */ | |
1291 | dev->rlen = s; | |
1292 | } | |
1293 | /* T=0: we are done when numRecBytes doesn't | |
1294 | * increment any more and NoProcedureByte | |
1295 | * is set and numRecBytes == bytes sent + 6 | |
1296 | * (header bytes + data + 1 for sw2) | |
1297 | * except when the card replies an error | |
1298 | * which means, no data will be sent back. | |
1299 | */ | |
1300 | else if (dev->proto == 0) { | |
1301 | if ((inb(REG_BUF_ADDR(iobase)) & 0x80)) { | |
1302 | /* no procedure byte received since last read */ | |
1303 | DEBUGP(1, dev, "NoProcedure byte set\n"); | |
1304 | /* i=0; */ | |
1305 | } else { | |
1306 | /* procedure byte received since last read */ | |
1307 | DEBUGP(1, dev, "NoProcedure byte unset " | |
1308 | "(reset timeout)\n"); | |
1309 | dev->procbyte = inb(REG_FLAGS1(iobase)); | |
1310 | DEBUGP(1, dev, "Read procedure byte 0x%.2x\n", | |
1311 | dev->procbyte); | |
1312 | i = 0; /* resettimeout */ | |
1313 | } | |
1314 | if (inb(REG_FLAGS0(iobase)) & 0x08) { | |
1315 | DEBUGP(1, dev, "T0Done flag (read reply)\n"); | |
1316 | break; | |
1317 | } | |
1318 | } | |
1319 | if (dev->proto) | |
1320 | infolen = inb(REG_FLAGS1(iobase)); | |
1321 | } | |
1322 | if (i == 600) { | |
1323 | DEBUGP(1, dev, "timeout waiting for numRecBytes\n"); | |
1324 | rc = -EIO; | |
1325 | goto release_io; | |
1326 | } else { | |
1327 | if (dev->proto == 0) { | |
1328 | DEBUGP(1, dev, "Wait for T0Done bit to be set\n"); | |
1329 | for (i = 0; i < 1000; i++) { | |
1330 | if (inb(REG_FLAGS0(iobase)) & 0x08) | |
1331 | break; | |
1332 | msleep_interruptible(10); | |
1333 | } | |
1334 | if (i == 1000) { | |
1335 | DEBUGP(1, dev, "timeout waiting for T0Done\n"); | |
1336 | rc = -EIO; | |
1337 | goto release_io; | |
1338 | } | |
1339 | ||
1340 | dev->procbyte = inb(REG_FLAGS1(iobase)); | |
1341 | DEBUGP(4, dev, "Read procedure byte 0x%.2x\n", | |
1342 | dev->procbyte); | |
1343 | ||
1344 | io_read_num_rec_bytes(iobase, &dev->rlen); | |
1345 | DEBUGP(4, dev, "Read NumRecBytes = %i\n", dev->rlen); | |
1346 | ||
1347 | } | |
1348 | } | |
1349 | /* T=1: read offset=zero, T=0: read offset=after challenge */ | |
1350 | dev->rpos = dev->proto ? 0 : nr == 4 ? 5 : nr > dev->rlen ? 5 : nr; | |
1351 | DEBUGP(4, dev, "dev->rlen = %i, dev->rpos = %i, nr = %i\n", | |
1352 | dev->rlen, dev->rpos, nr); | |
1353 | ||
1354 | release_io: | |
1355 | DEBUGP(4, dev, "Reset SM\n"); | |
1356 | xoutb(0x80, REG_FLAGS0(iobase)); /* reset SM */ | |
1357 | ||
1358 | if (rc < 0) { | |
1359 | DEBUGP(4, dev, "Write failed but clear T_Active\n"); | |
1360 | dev->flags1 &= 0xdf; | |
1361 | xoutb(dev->flags1, REG_FLAGS1(iobase)); | |
1362 | } | |
1363 | ||
1364 | clear_bit(LOCK_IO, &dev->flags); | |
1365 | wake_up_interruptible(&dev->ioq); | |
1366 | wake_up_interruptible(&dev->readq); /* tell read we have data */ | |
1367 | ||
1368 | /* ITSEC E2: clear write buffer */ | |
1369 | memset((char *)dev->sbuf, 0, 512); | |
1370 | ||
1371 | /* return error or actually written bytes */ | |
1372 | DEBUGP(2, dev, "<- cmm_write\n"); | |
1373 | return rc < 0 ? rc : nr; | |
1374 | } | |
1375 | ||
1376 | static void start_monitor(struct cm4000_dev *dev) | |
1377 | { | |
1378 | DEBUGP(3, dev, "-> start_monitor\n"); | |
1379 | if (!dev->monitor_running) { | |
1380 | DEBUGP(5, dev, "create, init and add timer\n"); | |
40565f19 | 1381 | setup_timer(&dev->timer, monitor_card, (unsigned long)dev); |
c1986ee9 | 1382 | dev->monitor_running = 1; |
40565f19 | 1383 | mod_timer(&dev->timer, jiffies); |
c1986ee9 HW |
1384 | } else |
1385 | DEBUGP(5, dev, "monitor already running\n"); | |
1386 | DEBUGP(3, dev, "<- start_monitor\n"); | |
1387 | } | |
1388 | ||
1389 | static void stop_monitor(struct cm4000_dev *dev) | |
1390 | { | |
1391 | DEBUGP(3, dev, "-> stop_monitor\n"); | |
1392 | if (dev->monitor_running) { | |
1393 | DEBUGP(5, dev, "stopping monitor\n"); | |
1394 | terminate_monitor(dev); | |
1395 | /* reset monitor SM */ | |
1396 | clear_bit(IS_ATR_VALID, &dev->flags); | |
1397 | clear_bit(IS_ATR_PRESENT, &dev->flags); | |
1398 | } else | |
1399 | DEBUGP(5, dev, "monitor already stopped\n"); | |
1400 | DEBUGP(3, dev, "<- stop_monitor\n"); | |
1401 | } | |
1402 | ||
4cf974c5 | 1403 | static long cmm_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) |
c1986ee9 HW |
1404 | { |
1405 | struct cm4000_dev *dev = filp->private_data; | |
ecb8a847 | 1406 | unsigned int iobase = dev->p_dev->io.BasePort1; |
4cf974c5 | 1407 | struct inode *inode = filp->f_path.dentry->d_inode; |
fba395ee | 1408 | struct pcmcia_device *link; |
c1986ee9 HW |
1409 | int size; |
1410 | int rc; | |
c4aa02eb | 1411 | void __user *argp = (void __user *)arg; |
cbf624f0 | 1412 | #ifdef CM4000_DEBUG |
c1986ee9 HW |
1413 | char *ioctl_names[CM_IOC_MAXNR + 1] = { |
1414 | [_IOC_NR(CM_IOCGSTATUS)] "CM_IOCGSTATUS", | |
1415 | [_IOC_NR(CM_IOCGATR)] "CM_IOCGATR", | |
1416 | [_IOC_NR(CM_IOCARDOFF)] "CM_IOCARDOFF", | |
1417 | [_IOC_NR(CM_IOCSPTS)] "CM_IOCSPTS", | |
1418 | [_IOC_NR(CM_IOSDBGLVL)] "CM4000_DBGLVL", | |
1419 | }; | |
c1986ee9 HW |
1420 | DEBUGP(3, dev, "cmm_ioctl(device=%d.%d) %s\n", imajor(inode), |
1421 | iminor(inode), ioctl_names[_IOC_NR(cmd)]); | |
cbf624f0 | 1422 | #endif |
c1986ee9 | 1423 | |
4cf974c5 AC |
1424 | lock_kernel(); |
1425 | rc = -ENODEV; | |
c1986ee9 | 1426 | link = dev_table[iminor(inode)]; |
9940ec36 | 1427 | if (!pcmcia_dev_present(link)) { |
c1986ee9 | 1428 | DEBUGP(4, dev, "DEV_OK false\n"); |
4cf974c5 | 1429 | goto out; |
c1986ee9 HW |
1430 | } |
1431 | ||
1432 | if (test_bit(IS_CMM_ABSENT, &dev->flags)) { | |
1433 | DEBUGP(4, dev, "CMM_ABSENT flag set\n"); | |
4cf974c5 | 1434 | goto out; |
c1986ee9 | 1435 | } |
d93c768e | 1436 | rc = -EINVAL; |
c1986ee9 HW |
1437 | |
1438 | if (_IOC_TYPE(cmd) != CM_IOC_MAGIC) { | |
1439 | DEBUGP(4, dev, "ioctype mismatch\n"); | |
4cf974c5 | 1440 | goto out; |
c1986ee9 HW |
1441 | } |
1442 | if (_IOC_NR(cmd) > CM_IOC_MAXNR) { | |
1443 | DEBUGP(4, dev, "iocnr mismatch\n"); | |
4cf974c5 | 1444 | goto out; |
c1986ee9 HW |
1445 | } |
1446 | size = _IOC_SIZE(cmd); | |
4cf974c5 | 1447 | rc = -EFAULT; |
c1986ee9 HW |
1448 | DEBUGP(4, dev, "iocdir=%.4x iocr=%.4x iocw=%.4x iocsize=%d cmd=%.4x\n", |
1449 | _IOC_DIR(cmd), _IOC_READ, _IOC_WRITE, size, cmd); | |
1450 | ||
1451 | if (_IOC_DIR(cmd) & _IOC_READ) { | |
c4aa02eb | 1452 | if (!access_ok(VERIFY_WRITE, argp, size)) |
4cf974c5 | 1453 | goto out; |
c1986ee9 HW |
1454 | } |
1455 | if (_IOC_DIR(cmd) & _IOC_WRITE) { | |
c4aa02eb | 1456 | if (!access_ok(VERIFY_READ, argp, size)) |
4cf974c5 | 1457 | goto out; |
c1986ee9 | 1458 | } |
4cf974c5 | 1459 | rc = 0; |
c1986ee9 HW |
1460 | |
1461 | switch (cmd) { | |
1462 | case CM_IOCGSTATUS: | |
1463 | DEBUGP(4, dev, " ... in CM_IOCGSTATUS\n"); | |
1464 | { | |
1465 | int status; | |
1466 | ||
1467 | /* clear other bits, but leave inserted & powered as | |
1468 | * they are */ | |
1469 | status = dev->flags0 & 3; | |
1470 | if (test_bit(IS_ATR_PRESENT, &dev->flags)) | |
1471 | status |= CM_ATR_PRESENT; | |
1472 | if (test_bit(IS_ATR_VALID, &dev->flags)) | |
1473 | status |= CM_ATR_VALID; | |
1474 | if (test_bit(IS_CMM_ABSENT, &dev->flags)) | |
1475 | status |= CM_NO_READER; | |
1476 | if (test_bit(IS_BAD_CARD, &dev->flags)) | |
1477 | status |= CM_BAD_CARD; | |
c4aa02eb | 1478 | if (copy_to_user(argp, &status, sizeof(int))) |
4cf974c5 | 1479 | rc = -EFAULT; |
c1986ee9 | 1480 | } |
4cf974c5 | 1481 | break; |
c1986ee9 HW |
1482 | case CM_IOCGATR: |
1483 | DEBUGP(4, dev, "... in CM_IOCGATR\n"); | |
1484 | { | |
c4aa02eb | 1485 | struct atreq __user *atreq = argp; |
c1986ee9 HW |
1486 | int tmp; |
1487 | /* allow nonblocking io and being interrupted */ | |
1488 | if (wait_event_interruptible | |
1489 | (dev->atrq, | |
1490 | ((filp->f_flags & O_NONBLOCK) | |
1491 | || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags) | |
1492 | != 0)))) { | |
1493 | if (filp->f_flags & O_NONBLOCK) | |
4cf974c5 AC |
1494 | rc = -EAGAIN; |
1495 | else | |
1496 | rc = -ERESTARTSYS; | |
1497 | break; | |
c1986ee9 HW |
1498 | } |
1499 | ||
4cf974c5 | 1500 | rc = -EFAULT; |
c1986ee9 HW |
1501 | if (test_bit(IS_ATR_VALID, &dev->flags) == 0) { |
1502 | tmp = -1; | |
1503 | if (copy_to_user(&(atreq->atr_len), &tmp, | |
1504 | sizeof(int))) | |
4cf974c5 | 1505 | break; |
c1986ee9 HW |
1506 | } else { |
1507 | if (copy_to_user(atreq->atr, dev->atr, | |
1508 | dev->atr_len)) | |
4cf974c5 | 1509 | break; |
c1986ee9 HW |
1510 | |
1511 | tmp = dev->atr_len; | |
1512 | if (copy_to_user(&(atreq->atr_len), &tmp, sizeof(int))) | |
4cf974c5 | 1513 | break; |
c1986ee9 | 1514 | } |
4cf974c5 AC |
1515 | rc = 0; |
1516 | break; | |
c1986ee9 HW |
1517 | } |
1518 | case CM_IOCARDOFF: | |
1519 | ||
cbf624f0 | 1520 | #ifdef CM4000_DEBUG |
c1986ee9 HW |
1521 | DEBUGP(4, dev, "... in CM_IOCARDOFF\n"); |
1522 | if (dev->flags0 & 0x01) { | |
1523 | DEBUGP(4, dev, " Card inserted\n"); | |
1524 | } else { | |
1525 | DEBUGP(2, dev, " No card inserted\n"); | |
1526 | } | |
1527 | if (dev->flags0 & 0x02) { | |
1528 | DEBUGP(4, dev, " Card powered\n"); | |
1529 | } else { | |
1530 | DEBUGP(2, dev, " Card not powered\n"); | |
1531 | } | |
1532 | #endif | |
1533 | ||
1534 | /* is a card inserted and powered? */ | |
1535 | if ((dev->flags0 & 0x01) && (dev->flags0 & 0x02)) { | |
1536 | ||
1537 | /* get IO lock */ | |
1538 | if (wait_event_interruptible | |
1539 | (dev->ioq, | |
1540 | ((filp->f_flags & O_NONBLOCK) | |
1541 | || (test_and_set_bit(LOCK_IO, (void *)&dev->flags) | |
1542 | == 0)))) { | |
1543 | if (filp->f_flags & O_NONBLOCK) | |
4cf974c5 AC |
1544 | rc = -EAGAIN; |
1545 | else | |
1546 | rc = -ERESTARTSYS; | |
1547 | break; | |
c1986ee9 HW |
1548 | } |
1549 | /* Set Flags0 = 0x42 */ | |
1550 | DEBUGP(4, dev, "Set Flags0=0x42 \n"); | |
1551 | xoutb(0x42, REG_FLAGS0(iobase)); | |
1552 | clear_bit(IS_ATR_PRESENT, &dev->flags); | |
1553 | clear_bit(IS_ATR_VALID, &dev->flags); | |
1554 | dev->mstate = M_CARDOFF; | |
1555 | clear_bit(LOCK_IO, &dev->flags); | |
1556 | if (wait_event_interruptible | |
1557 | (dev->atrq, | |
1558 | ((filp->f_flags & O_NONBLOCK) | |
1559 | || (test_bit(IS_ATR_VALID, (void *)&dev->flags) != | |
1560 | 0)))) { | |
1561 | if (filp->f_flags & O_NONBLOCK) | |
4cf974c5 AC |
1562 | rc = -EAGAIN; |
1563 | else | |
1564 | rc = -ERESTARTSYS; | |
1565 | break; | |
c1986ee9 HW |
1566 | } |
1567 | } | |
1568 | /* release lock */ | |
1569 | clear_bit(LOCK_IO, &dev->flags); | |
1570 | wake_up_interruptible(&dev->ioq); | |
1571 | ||
69ae59d7 JS |
1572 | rc = 0; |
1573 | break; | |
c1986ee9 HW |
1574 | case CM_IOCSPTS: |
1575 | { | |
1576 | struct ptsreq krnptsreq; | |
1577 | ||
c4aa02eb | 1578 | if (copy_from_user(&krnptsreq, argp, |
4cf974c5 AC |
1579 | sizeof(struct ptsreq))) { |
1580 | rc = -EFAULT; | |
1581 | break; | |
1582 | } | |
c1986ee9 HW |
1583 | |
1584 | rc = 0; | |
1585 | DEBUGP(4, dev, "... in CM_IOCSPTS\n"); | |
1586 | /* wait for ATR to get valid */ | |
1587 | if (wait_event_interruptible | |
1588 | (dev->atrq, | |
1589 | ((filp->f_flags & O_NONBLOCK) | |
1590 | || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags) | |
1591 | != 0)))) { | |
1592 | if (filp->f_flags & O_NONBLOCK) | |
4cf974c5 AC |
1593 | rc = -EAGAIN; |
1594 | else | |
1595 | rc = -ERESTARTSYS; | |
1596 | break; | |
c1986ee9 HW |
1597 | } |
1598 | /* get IO lock */ | |
1599 | if (wait_event_interruptible | |
1600 | (dev->ioq, | |
1601 | ((filp->f_flags & O_NONBLOCK) | |
1602 | || (test_and_set_bit(LOCK_IO, (void *)&dev->flags) | |
1603 | == 0)))) { | |
1604 | if (filp->f_flags & O_NONBLOCK) | |
4cf974c5 AC |
1605 | rc = -EAGAIN; |
1606 | else | |
1607 | rc = -ERESTARTSYS; | |
1608 | break; | |
c1986ee9 HW |
1609 | } |
1610 | ||
1611 | if ((rc = set_protocol(dev, &krnptsreq)) != 0) { | |
1612 | /* auto power_on again */ | |
1613 | dev->mstate = M_FETCH_ATR; | |
1614 | clear_bit(IS_ATR_VALID, &dev->flags); | |
1615 | } | |
1616 | /* release lock */ | |
1617 | clear_bit(LOCK_IO, &dev->flags); | |
1618 | wake_up_interruptible(&dev->ioq); | |
1619 | ||
1620 | } | |
4cf974c5 | 1621 | break; |
cbf624f0 DB |
1622 | #ifdef CM4000_DEBUG |
1623 | case CM_IOSDBGLVL: | |
1624 | rc = -ENOTTY; | |
4cf974c5 | 1625 | break; |
c1986ee9 HW |
1626 | #endif |
1627 | default: | |
1628 | DEBUGP(4, dev, "... in default (unknown IOCTL code)\n"); | |
4cf974c5 | 1629 | rc = -ENOTTY; |
c1986ee9 | 1630 | } |
4cf974c5 AC |
1631 | out: |
1632 | unlock_kernel(); | |
1633 | return rc; | |
c1986ee9 HW |
1634 | } |
1635 | ||
1636 | static int cmm_open(struct inode *inode, struct file *filp) | |
1637 | { | |
1638 | struct cm4000_dev *dev; | |
fba395ee | 1639 | struct pcmcia_device *link; |
925796e0 | 1640 | int minor = iminor(inode); |
8b5332f6 | 1641 | int ret; |
c1986ee9 HW |
1642 | |
1643 | if (minor >= CM4000_MAX_DEV) | |
1644 | return -ENODEV; | |
1645 | ||
8b5332f6 | 1646 | lock_kernel(); |
c1986ee9 | 1647 | link = dev_table[minor]; |
8b5332f6 JC |
1648 | if (link == NULL || !pcmcia_dev_present(link)) { |
1649 | ret = -ENODEV; | |
1650 | goto out; | |
1651 | } | |
c1986ee9 | 1652 | |
8b5332f6 JC |
1653 | if (link->open) { |
1654 | ret = -EBUSY; | |
1655 | goto out; | |
1656 | } | |
c1986ee9 HW |
1657 | |
1658 | dev = link->priv; | |
1659 | filp->private_data = dev; | |
1660 | ||
1661 | DEBUGP(2, dev, "-> cmm_open(device=%d.%d process=%s,%d)\n", | |
1662 | imajor(inode), minor, current->comm, current->pid); | |
1663 | ||
1664 | /* init device variables, they may be "polluted" after close | |
1665 | * or, the device may never have been closed (i.e. open failed) | |
1666 | */ | |
1667 | ||
1668 | ZERO_DEV(dev); | |
1669 | ||
1670 | /* opening will always block since the | |
1671 | * monitor will be started by open, which | |
1672 | * means we have to wait for ATR becoming | |
1673 | * vaild = block until valid (or card | |
1674 | * inserted) | |
1675 | */ | |
8b5332f6 JC |
1676 | if (filp->f_flags & O_NONBLOCK) { |
1677 | ret = -EAGAIN; | |
1678 | goto out; | |
1679 | } | |
c1986ee9 HW |
1680 | |
1681 | dev->mdelay = T_50MSEC; | |
1682 | ||
1683 | /* start monitoring the cardstatus */ | |
1684 | start_monitor(dev); | |
1685 | ||
1686 | link->open = 1; /* only one open per device */ | |
c1986ee9 HW |
1687 | |
1688 | DEBUGP(2, dev, "<- cmm_open\n"); | |
8b5332f6 JC |
1689 | ret = nonseekable_open(inode, filp); |
1690 | out: | |
1691 | unlock_kernel(); | |
1692 | return ret; | |
c1986ee9 HW |
1693 | } |
1694 | ||
1695 | static int cmm_close(struct inode *inode, struct file *filp) | |
1696 | { | |
1697 | struct cm4000_dev *dev; | |
fba395ee | 1698 | struct pcmcia_device *link; |
c1986ee9 HW |
1699 | int minor = iminor(inode); |
1700 | ||
1701 | if (minor >= CM4000_MAX_DEV) | |
1702 | return -ENODEV; | |
1703 | ||
1704 | link = dev_table[minor]; | |
1705 | if (link == NULL) | |
1706 | return -ENODEV; | |
1707 | ||
1708 | dev = link->priv; | |
1709 | ||
1710 | DEBUGP(2, dev, "-> cmm_close(maj/min=%d.%d)\n", | |
1711 | imajor(inode), minor); | |
1712 | ||
1713 | stop_monitor(dev); | |
1714 | ||
1715 | ZERO_DEV(dev); | |
1716 | ||
1717 | link->open = 0; /* only one open per device */ | |
1718 | wake_up(&dev->devq); /* socket removed? */ | |
1719 | ||
1720 | DEBUGP(2, dev, "cmm_close\n"); | |
1721 | return 0; | |
1722 | } | |
1723 | ||
fba395ee | 1724 | static void cmm_cm4000_release(struct pcmcia_device * link) |
c1986ee9 HW |
1725 | { |
1726 | struct cm4000_dev *dev = link->priv; | |
1727 | ||
1728 | /* dont terminate the monitor, rather rely on | |
1729 | * close doing that for us. | |
1730 | */ | |
1731 | DEBUGP(3, dev, "-> cmm_cm4000_release\n"); | |
1732 | while (link->open) { | |
1733 | printk(KERN_INFO MODULE_NAME ": delaying release until " | |
1734 | "process has terminated\n"); | |
1735 | /* note: don't interrupt us: | |
1736 | * close the applications which own | |
1737 | * the devices _first_ ! | |
1738 | */ | |
1739 | wait_event(dev->devq, (link->open == 0)); | |
1740 | } | |
1741 | /* dev->devq=NULL; this cannot be zeroed earlier */ | |
1742 | DEBUGP(3, dev, "<- cmm_cm4000_release\n"); | |
1743 | return; | |
1744 | } | |
1745 | ||
1746 | /*==== Interface to PCMCIA Layer =======================================*/ | |
1747 | ||
84e2d340 DB |
1748 | static int cm4000_config_check(struct pcmcia_device *p_dev, |
1749 | cistpl_cftable_entry_t *cfg, | |
8e2fc39d | 1750 | cistpl_cftable_entry_t *dflt, |
ad913c11 | 1751 | unsigned int vcc, |
84e2d340 DB |
1752 | void *priv_data) |
1753 | { | |
84e2d340 DB |
1754 | if (!cfg->io.nwin) |
1755 | return -ENODEV; | |
1756 | ||
1757 | /* Get the IOaddr */ | |
1758 | p_dev->io.BasePort1 = cfg->io.win[0].base; | |
1759 | p_dev->io.NumPorts1 = cfg->io.win[0].len; | |
1760 | p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO; | |
1761 | if (!(cfg->io.flags & CISTPL_IO_8BIT)) | |
1762 | p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_16; | |
1763 | if (!(cfg->io.flags & CISTPL_IO_16BIT)) | |
1764 | p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_8; | |
1765 | p_dev->io.IOAddrLines = cfg->io.flags & CISTPL_IO_LINES_MASK; | |
1766 | ||
1767 | return pcmcia_request_io(p_dev, &p_dev->io); | |
1768 | } | |
1769 | ||
15b99ac1 | 1770 | static int cm4000_config(struct pcmcia_device * link, int devno) |
c1986ee9 | 1771 | { |
c1986ee9 | 1772 | struct cm4000_dev *dev; |
c1986ee9 HW |
1773 | |
1774 | /* read the config-tuples */ | |
84e2d340 | 1775 | if (pcmcia_loop_config(link, cm4000_config_check, NULL)) |
c1986ee9 HW |
1776 | goto cs_release; |
1777 | ||
1778 | link->conf.IntType = 00000002; | |
1779 | ||
84e2d340 | 1780 | if (pcmcia_request_configuration(link, &link->conf)) |
c1986ee9 | 1781 | goto cs_release; |
c1986ee9 HW |
1782 | |
1783 | dev = link->priv; | |
1784 | sprintf(dev->node.dev_name, DEVICE_NAME "%d", devno); | |
1785 | dev->node.major = major; | |
1786 | dev->node.minor = devno; | |
1787 | dev->node.next = NULL; | |
fd238232 | 1788 | link->dev_node = &dev->node; |
c1986ee9 | 1789 | |
15b99ac1 | 1790 | return 0; |
c1986ee9 | 1791 | |
c1986ee9 HW |
1792 | cs_release: |
1793 | cm4000_release(link); | |
15b99ac1 | 1794 | return -ENODEV; |
c1986ee9 HW |
1795 | } |
1796 | ||
fba395ee | 1797 | static int cm4000_suspend(struct pcmcia_device *link) |
98e4c28b | 1798 | { |
98e4c28b DB |
1799 | struct cm4000_dev *dev; |
1800 | ||
1801 | dev = link->priv; | |
98e4c28b DB |
1802 | stop_monitor(dev); |
1803 | ||
1804 | return 0; | |
1805 | } | |
1806 | ||
fba395ee | 1807 | static int cm4000_resume(struct pcmcia_device *link) |
98e4c28b | 1808 | { |
98e4c28b DB |
1809 | struct cm4000_dev *dev; |
1810 | ||
1811 | dev = link->priv; | |
98e4c28b DB |
1812 | if (link->open) |
1813 | start_monitor(dev); | |
1814 | ||
1815 | return 0; | |
1816 | } | |
1817 | ||
fba395ee | 1818 | static void cm4000_release(struct pcmcia_device *link) |
c1986ee9 | 1819 | { |
925796e0 | 1820 | cmm_cm4000_release(link); /* delay release until device closed */ |
fba395ee | 1821 | pcmcia_disable_device(link); |
c1986ee9 HW |
1822 | } |
1823 | ||
15b99ac1 | 1824 | static int cm4000_probe(struct pcmcia_device *link) |
c1986ee9 HW |
1825 | { |
1826 | struct cm4000_dev *dev; | |
15b99ac1 | 1827 | int i, ret; |
c1986ee9 HW |
1828 | |
1829 | for (i = 0; i < CM4000_MAX_DEV; i++) | |
1830 | if (dev_table[i] == NULL) | |
1831 | break; | |
1832 | ||
1833 | if (i == CM4000_MAX_DEV) { | |
1834 | printk(KERN_NOTICE MODULE_NAME ": all devices in use\n"); | |
f8cfa618 | 1835 | return -ENODEV; |
c1986ee9 HW |
1836 | } |
1837 | ||
1838 | /* create a new cm4000_cs device */ | |
1839 | dev = kzalloc(sizeof(struct cm4000_dev), GFP_KERNEL); | |
1840 | if (dev == NULL) | |
f8cfa618 | 1841 | return -ENOMEM; |
c1986ee9 | 1842 | |
fba395ee | 1843 | dev->p_dev = link; |
c1986ee9 HW |
1844 | link->priv = dev; |
1845 | link->conf.IntType = INT_MEMORY_AND_IO; | |
1846 | dev_table[i] = link; | |
1847 | ||
c1986ee9 HW |
1848 | init_waitqueue_head(&dev->devq); |
1849 | init_waitqueue_head(&dev->ioq); | |
1850 | init_waitqueue_head(&dev->atrq); | |
1851 | init_waitqueue_head(&dev->readq); | |
1852 | ||
15b99ac1 | 1853 | ret = cm4000_config(link, i); |
54493c10 AM |
1854 | if (ret) { |
1855 | dev_table[i] = NULL; | |
1856 | kfree(dev); | |
15b99ac1 | 1857 | return ret; |
54493c10 | 1858 | } |
f8cfa618 | 1859 | |
03457cd4 | 1860 | device_create(cmm_class, NULL, MKDEV(major, i), NULL, "cmm%d", i); |
67bc6200 | 1861 | |
f8cfa618 | 1862 | return 0; |
c1986ee9 HW |
1863 | } |
1864 | ||
fba395ee | 1865 | static void cm4000_detach(struct pcmcia_device *link) |
c1986ee9 HW |
1866 | { |
1867 | struct cm4000_dev *dev = link->priv; | |
cc3b4866 | 1868 | int devno; |
c1986ee9 | 1869 | |
cc3b4866 DB |
1870 | /* find device */ |
1871 | for (devno = 0; devno < CM4000_MAX_DEV; devno++) | |
1872 | if (dev_table[devno] == link) | |
1873 | break; | |
1874 | if (devno == CM4000_MAX_DEV) | |
1875 | return; | |
c1986ee9 | 1876 | |
cc3b4866 | 1877 | stop_monitor(dev); |
c1986ee9 | 1878 | |
e2d40963 | 1879 | cm4000_release(link); |
c1986ee9 HW |
1880 | |
1881 | dev_table[devno] = NULL; | |
54493c10 | 1882 | kfree(dev); |
c1986ee9 | 1883 | |
07c015e7 | 1884 | device_destroy(cmm_class, MKDEV(major, devno)); |
67bc6200 | 1885 | |
c1986ee9 HW |
1886 | return; |
1887 | } | |
1888 | ||
62322d25 | 1889 | static const struct file_operations cm4000_fops = { |
c1986ee9 HW |
1890 | .owner = THIS_MODULE, |
1891 | .read = cmm_read, | |
1892 | .write = cmm_write, | |
4cf974c5 | 1893 | .unlocked_ioctl = cmm_ioctl, |
c1986ee9 HW |
1894 | .open = cmm_open, |
1895 | .release= cmm_close, | |
1896 | }; | |
1897 | ||
1898 | static struct pcmcia_device_id cm4000_ids[] = { | |
1899 | PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0002), | |
1900 | PCMCIA_DEVICE_PROD_ID12("CardMan", "4000", 0x2FB368CA, 0xA2BD8C39), | |
1901 | PCMCIA_DEVICE_NULL, | |
1902 | }; | |
1903 | MODULE_DEVICE_TABLE(pcmcia, cm4000_ids); | |
1904 | ||
1905 | static struct pcmcia_driver cm4000_driver = { | |
1906 | .owner = THIS_MODULE, | |
1907 | .drv = { | |
1908 | .name = "cm4000_cs", | |
1909 | }, | |
15b99ac1 | 1910 | .probe = cm4000_probe, |
cc3b4866 | 1911 | .remove = cm4000_detach, |
98e4c28b DB |
1912 | .suspend = cm4000_suspend, |
1913 | .resume = cm4000_resume, | |
c1986ee9 HW |
1914 | .id_table = cm4000_ids, |
1915 | }; | |
1916 | ||
1917 | static int __init cmm_init(void) | |
1918 | { | |
67bc6200 HW |
1919 | int rc; |
1920 | ||
c1986ee9 | 1921 | printk(KERN_INFO "%s\n", version); |
67bc6200 HW |
1922 | |
1923 | cmm_class = class_create(THIS_MODULE, "cardman_4000"); | |
5eb5fc97 AM |
1924 | if (IS_ERR(cmm_class)) |
1925 | return PTR_ERR(cmm_class); | |
67bc6200 | 1926 | |
c1986ee9 HW |
1927 | major = register_chrdev(0, DEVICE_NAME, &cm4000_fops); |
1928 | if (major < 0) { | |
1929 | printk(KERN_WARNING MODULE_NAME | |
1930 | ": could not get major number\n"); | |
54493c10 | 1931 | class_destroy(cmm_class); |
5eb5fc97 | 1932 | return major; |
c1986ee9 HW |
1933 | } |
1934 | ||
7fc5b1e3 HW |
1935 | rc = pcmcia_register_driver(&cm4000_driver); |
1936 | if (rc < 0) { | |
1937 | unregister_chrdev(major, DEVICE_NAME); | |
54493c10 | 1938 | class_destroy(cmm_class); |
7fc5b1e3 HW |
1939 | return rc; |
1940 | } | |
1941 | ||
c1986ee9 HW |
1942 | return 0; |
1943 | } | |
1944 | ||
1945 | static void __exit cmm_exit(void) | |
1946 | { | |
c1986ee9 HW |
1947 | printk(KERN_INFO MODULE_NAME ": unloading\n"); |
1948 | pcmcia_unregister_driver(&cm4000_driver); | |
c1986ee9 | 1949 | unregister_chrdev(major, DEVICE_NAME); |
67bc6200 | 1950 | class_destroy(cmm_class); |
c1986ee9 HW |
1951 | }; |
1952 | ||
1953 | module_init(cmm_init); | |
1954 | module_exit(cmm_exit); | |
1955 | MODULE_LICENSE("Dual BSD/GPL"); |