Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Copyright (C) 2004 IBM Corporation | |
afb5abc2 | 3 | * Copyright (C) 2014 Intel Corporation |
1da177e4 LT |
4 | * |
5 | * Authors: | |
6 | * Leendert van Doorn <leendert@watson.ibm.com> | |
7 | * Dave Safford <safford@watson.ibm.com> | |
8 | * Reiner Sailer <sailer@watson.ibm.com> | |
9 | * Kylene Hall <kjhall@us.ibm.com> | |
10 | * | |
8e81cc13 | 11 | * Maintained by: <tpmdd-devel@lists.sourceforge.net> |
1da177e4 LT |
12 | * |
13 | * Device driver for TCG/TCPA TPM (trusted platform module). | |
0a418269 | 14 | * Specifications at www.trustedcomputinggroup.org |
1da177e4 LT |
15 | * |
16 | * This program is free software; you can redistribute it and/or | |
17 | * modify it under the terms of the GNU General Public License as | |
18 | * published by the Free Software Foundation, version 2 of the | |
19 | * License. | |
0a418269 | 20 | * |
1da177e4 LT |
21 | * Note, the TPM chip is not interrupt driven (only polling) |
22 | * and can have very long timeouts (minutes!). Hence the unusual | |
700d8bdc | 23 | * calls to msleep. |
1da177e4 LT |
24 | * |
25 | */ | |
26 | ||
1da177e4 | 27 | #include <linux/poll.h> |
5a0e3ad6 | 28 | #include <linux/slab.h> |
d081d470 | 29 | #include <linux/mutex.h> |
1da177e4 | 30 | #include <linux/spinlock.h> |
fd048866 | 31 | #include <linux/freezer.h> |
d081d470 | 32 | |
1da177e4 | 33 | #include "tpm.h" |
e5dcd87f | 34 | #include "tpm_eventlog.h" |
1da177e4 | 35 | |
9e18ee19 | 36 | #define TPM_MAX_ORDINAL 243 |
07b133e6 PH |
37 | #define TSC_MAX_ORDINAL 12 |
38 | #define TPM_PROTECTED_COMMAND 0x00 | |
39 | #define TPM_CONNECTION_COMMAND 0x40 | |
9e18ee19 | 40 | |
9b3056cc DT |
41 | /* |
42 | * Bug workaround - some TPM's don't flush the most | |
43 | * recently changed pcr on suspend, so force the flush | |
44 | * with an extend to the selected _unused_ non-volatile pcr. | |
45 | */ | |
46 | static int tpm_suspend_pcr; | |
47 | module_param_named(suspend_pcr, tpm_suspend_pcr, uint, 0644); | |
48 | MODULE_PARM_DESC(suspend_pcr, | |
49 | "PCR to use for dummy writes to faciltate flush on suspend."); | |
50 | ||
9e18ee19 KJH |
51 | /* |
52 | * Array with one entry per ordinal defining the maximum amount | |
53 | * of time the chip could take to return the result. The ordinal | |
54 | * designation of short, medium or long is defined in a table in | |
55 | * TCG Specification TPM Main Part 2 TPM Structures Section 17. The | |
56 | * values of the SHORT, MEDIUM, and LONG durations are retrieved | |
57 | * from the chip during initialization with a call to tpm_get_timeouts. | |
58 | */ | |
9e18ee19 KJH |
59 | static const u8 tpm_ordinal_duration[TPM_MAX_ORDINAL] = { |
60 | TPM_UNDEFINED, /* 0 */ | |
61 | TPM_UNDEFINED, | |
62 | TPM_UNDEFINED, | |
63 | TPM_UNDEFINED, | |
64 | TPM_UNDEFINED, | |
65 | TPM_UNDEFINED, /* 5 */ | |
66 | TPM_UNDEFINED, | |
67 | TPM_UNDEFINED, | |
68 | TPM_UNDEFINED, | |
69 | TPM_UNDEFINED, | |
70 | TPM_SHORT, /* 10 */ | |
71 | TPM_SHORT, | |
72 | TPM_MEDIUM, | |
73 | TPM_LONG, | |
74 | TPM_LONG, | |
75 | TPM_MEDIUM, /* 15 */ | |
76 | TPM_SHORT, | |
77 | TPM_SHORT, | |
78 | TPM_MEDIUM, | |
79 | TPM_LONG, | |
80 | TPM_SHORT, /* 20 */ | |
81 | TPM_SHORT, | |
82 | TPM_MEDIUM, | |
83 | TPM_MEDIUM, | |
84 | TPM_MEDIUM, | |
85 | TPM_SHORT, /* 25 */ | |
86 | TPM_SHORT, | |
87 | TPM_MEDIUM, | |
88 | TPM_SHORT, | |
89 | TPM_SHORT, | |
90 | TPM_MEDIUM, /* 30 */ | |
91 | TPM_LONG, | |
92 | TPM_MEDIUM, | |
93 | TPM_SHORT, | |
94 | TPM_SHORT, | |
95 | TPM_SHORT, /* 35 */ | |
96 | TPM_MEDIUM, | |
97 | TPM_MEDIUM, | |
98 | TPM_UNDEFINED, | |
99 | TPM_UNDEFINED, | |
100 | TPM_MEDIUM, /* 40 */ | |
101 | TPM_LONG, | |
102 | TPM_MEDIUM, | |
103 | TPM_SHORT, | |
104 | TPM_SHORT, | |
105 | TPM_SHORT, /* 45 */ | |
106 | TPM_SHORT, | |
107 | TPM_SHORT, | |
108 | TPM_SHORT, | |
109 | TPM_LONG, | |
110 | TPM_MEDIUM, /* 50 */ | |
111 | TPM_MEDIUM, | |
112 | TPM_UNDEFINED, | |
113 | TPM_UNDEFINED, | |
114 | TPM_UNDEFINED, | |
115 | TPM_UNDEFINED, /* 55 */ | |
116 | TPM_UNDEFINED, | |
117 | TPM_UNDEFINED, | |
118 | TPM_UNDEFINED, | |
119 | TPM_UNDEFINED, | |
120 | TPM_MEDIUM, /* 60 */ | |
121 | TPM_MEDIUM, | |
122 | TPM_MEDIUM, | |
123 | TPM_SHORT, | |
124 | TPM_SHORT, | |
125 | TPM_MEDIUM, /* 65 */ | |
126 | TPM_UNDEFINED, | |
127 | TPM_UNDEFINED, | |
128 | TPM_UNDEFINED, | |
129 | TPM_UNDEFINED, | |
130 | TPM_SHORT, /* 70 */ | |
131 | TPM_SHORT, | |
132 | TPM_UNDEFINED, | |
133 | TPM_UNDEFINED, | |
134 | TPM_UNDEFINED, | |
135 | TPM_UNDEFINED, /* 75 */ | |
136 | TPM_UNDEFINED, | |
137 | TPM_UNDEFINED, | |
138 | TPM_UNDEFINED, | |
139 | TPM_UNDEFINED, | |
140 | TPM_LONG, /* 80 */ | |
141 | TPM_UNDEFINED, | |
142 | TPM_MEDIUM, | |
143 | TPM_LONG, | |
144 | TPM_SHORT, | |
145 | TPM_UNDEFINED, /* 85 */ | |
146 | TPM_UNDEFINED, | |
147 | TPM_UNDEFINED, | |
148 | TPM_UNDEFINED, | |
149 | TPM_UNDEFINED, | |
150 | TPM_SHORT, /* 90 */ | |
151 | TPM_SHORT, | |
152 | TPM_SHORT, | |
153 | TPM_SHORT, | |
154 | TPM_SHORT, | |
155 | TPM_UNDEFINED, /* 95 */ | |
156 | TPM_UNDEFINED, | |
157 | TPM_UNDEFINED, | |
158 | TPM_UNDEFINED, | |
159 | TPM_UNDEFINED, | |
160 | TPM_MEDIUM, /* 100 */ | |
161 | TPM_SHORT, | |
162 | TPM_SHORT, | |
163 | TPM_UNDEFINED, | |
164 | TPM_UNDEFINED, | |
165 | TPM_UNDEFINED, /* 105 */ | |
166 | TPM_UNDEFINED, | |
167 | TPM_UNDEFINED, | |
168 | TPM_UNDEFINED, | |
169 | TPM_UNDEFINED, | |
170 | TPM_SHORT, /* 110 */ | |
171 | TPM_SHORT, | |
172 | TPM_SHORT, | |
173 | TPM_SHORT, | |
174 | TPM_SHORT, | |
175 | TPM_SHORT, /* 115 */ | |
176 | TPM_SHORT, | |
177 | TPM_SHORT, | |
178 | TPM_UNDEFINED, | |
179 | TPM_UNDEFINED, | |
180 | TPM_LONG, /* 120 */ | |
181 | TPM_LONG, | |
182 | TPM_MEDIUM, | |
183 | TPM_UNDEFINED, | |
184 | TPM_SHORT, | |
185 | TPM_SHORT, /* 125 */ | |
186 | TPM_SHORT, | |
187 | TPM_LONG, | |
188 | TPM_SHORT, | |
189 | TPM_SHORT, | |
190 | TPM_SHORT, /* 130 */ | |
191 | TPM_MEDIUM, | |
192 | TPM_UNDEFINED, | |
193 | TPM_SHORT, | |
194 | TPM_MEDIUM, | |
195 | TPM_UNDEFINED, /* 135 */ | |
196 | TPM_UNDEFINED, | |
197 | TPM_UNDEFINED, | |
198 | TPM_UNDEFINED, | |
199 | TPM_UNDEFINED, | |
200 | TPM_SHORT, /* 140 */ | |
201 | TPM_SHORT, | |
202 | TPM_UNDEFINED, | |
203 | TPM_UNDEFINED, | |
204 | TPM_UNDEFINED, | |
205 | TPM_UNDEFINED, /* 145 */ | |
206 | TPM_UNDEFINED, | |
207 | TPM_UNDEFINED, | |
208 | TPM_UNDEFINED, | |
209 | TPM_UNDEFINED, | |
210 | TPM_SHORT, /* 150 */ | |
211 | TPM_MEDIUM, | |
212 | TPM_MEDIUM, | |
213 | TPM_SHORT, | |
214 | TPM_SHORT, | |
215 | TPM_UNDEFINED, /* 155 */ | |
216 | TPM_UNDEFINED, | |
217 | TPM_UNDEFINED, | |
218 | TPM_UNDEFINED, | |
219 | TPM_UNDEFINED, | |
220 | TPM_SHORT, /* 160 */ | |
221 | TPM_SHORT, | |
222 | TPM_SHORT, | |
223 | TPM_SHORT, | |
224 | TPM_UNDEFINED, | |
225 | TPM_UNDEFINED, /* 165 */ | |
226 | TPM_UNDEFINED, | |
227 | TPM_UNDEFINED, | |
228 | TPM_UNDEFINED, | |
229 | TPM_UNDEFINED, | |
230 | TPM_LONG, /* 170 */ | |
231 | TPM_UNDEFINED, | |
232 | TPM_UNDEFINED, | |
233 | TPM_UNDEFINED, | |
234 | TPM_UNDEFINED, | |
235 | TPM_UNDEFINED, /* 175 */ | |
236 | TPM_UNDEFINED, | |
237 | TPM_UNDEFINED, | |
238 | TPM_UNDEFINED, | |
239 | TPM_UNDEFINED, | |
240 | TPM_MEDIUM, /* 180 */ | |
241 | TPM_SHORT, | |
242 | TPM_MEDIUM, | |
243 | TPM_MEDIUM, | |
244 | TPM_MEDIUM, | |
245 | TPM_MEDIUM, /* 185 */ | |
246 | TPM_SHORT, | |
247 | TPM_UNDEFINED, | |
248 | TPM_UNDEFINED, | |
249 | TPM_UNDEFINED, | |
250 | TPM_UNDEFINED, /* 190 */ | |
251 | TPM_UNDEFINED, | |
252 | TPM_UNDEFINED, | |
253 | TPM_UNDEFINED, | |
254 | TPM_UNDEFINED, | |
255 | TPM_UNDEFINED, /* 195 */ | |
256 | TPM_UNDEFINED, | |
257 | TPM_UNDEFINED, | |
258 | TPM_UNDEFINED, | |
259 | TPM_UNDEFINED, | |
260 | TPM_SHORT, /* 200 */ | |
261 | TPM_UNDEFINED, | |
262 | TPM_UNDEFINED, | |
263 | TPM_UNDEFINED, | |
264 | TPM_SHORT, | |
265 | TPM_SHORT, /* 205 */ | |
266 | TPM_SHORT, | |
267 | TPM_SHORT, | |
268 | TPM_SHORT, | |
269 | TPM_SHORT, | |
270 | TPM_MEDIUM, /* 210 */ | |
271 | TPM_UNDEFINED, | |
272 | TPM_MEDIUM, | |
273 | TPM_MEDIUM, | |
274 | TPM_MEDIUM, | |
275 | TPM_UNDEFINED, /* 215 */ | |
276 | TPM_MEDIUM, | |
277 | TPM_UNDEFINED, | |
278 | TPM_UNDEFINED, | |
279 | TPM_SHORT, | |
280 | TPM_SHORT, /* 220 */ | |
281 | TPM_SHORT, | |
282 | TPM_SHORT, | |
283 | TPM_SHORT, | |
284 | TPM_SHORT, | |
285 | TPM_UNDEFINED, /* 225 */ | |
286 | TPM_UNDEFINED, | |
287 | TPM_UNDEFINED, | |
288 | TPM_UNDEFINED, | |
289 | TPM_UNDEFINED, | |
290 | TPM_SHORT, /* 230 */ | |
291 | TPM_LONG, | |
292 | TPM_MEDIUM, | |
293 | TPM_UNDEFINED, | |
294 | TPM_UNDEFINED, | |
295 | TPM_UNDEFINED, /* 235 */ | |
296 | TPM_UNDEFINED, | |
297 | TPM_UNDEFINED, | |
298 | TPM_UNDEFINED, | |
299 | TPM_UNDEFINED, | |
300 | TPM_SHORT, /* 240 */ | |
301 | TPM_UNDEFINED, | |
302 | TPM_MEDIUM, | |
303 | }; | |
304 | ||
9e18ee19 KJH |
305 | /* |
306 | * Returns max number of jiffies to wait | |
307 | */ | |
308 | unsigned long tpm_calc_ordinal_duration(struct tpm_chip *chip, | |
309 | u32 ordinal) | |
310 | { | |
311 | int duration_idx = TPM_UNDEFINED; | |
312 | int duration = 0; | |
07b133e6 | 313 | u8 category = (ordinal >> 24) & 0xFF; |
9e18ee19 | 314 | |
07b133e6 PH |
315 | if ((category == TPM_PROTECTED_COMMAND && ordinal < TPM_MAX_ORDINAL) || |
316 | (category == TPM_CONNECTION_COMMAND && ordinal < TSC_MAX_ORDINAL)) | |
9e18ee19 | 317 | duration_idx = tpm_ordinal_duration[ordinal]; |
9e18ee19 | 318 | |
8d1dc20e | 319 | if (duration_idx != TPM_UNDEFINED) |
36b20020 | 320 | duration = chip->vendor.duration[duration_idx]; |
8d1dc20e | 321 | if (duration <= 0) |
9e18ee19 | 322 | return 2 * 60 * HZ; |
8d1dc20e LT |
323 | else |
324 | return duration; | |
9e18ee19 KJH |
325 | } |
326 | EXPORT_SYMBOL_GPL(tpm_calc_ordinal_duration); | |
327 | ||
1da177e4 LT |
328 | /* |
329 | * Internal kernel interface to transmit TPM commands | |
330 | */ | |
afdba32e JG |
331 | ssize_t tpm_transmit(struct tpm_chip *chip, const char *buf, |
332 | size_t bufsiz) | |
1da177e4 | 333 | { |
d9e5b6bf | 334 | ssize_t rc; |
9e18ee19 | 335 | u32 count, ordinal; |
700d8bdc | 336 | unsigned long stop; |
1da177e4 | 337 | |
6b07d30a PH |
338 | if (bufsiz > TPM_BUFSIZE) |
339 | bufsiz = TPM_BUFSIZE; | |
340 | ||
81179bb6 | 341 | count = be32_to_cpu(*((__be32 *) (buf + 2))); |
9e18ee19 | 342 | ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); |
1da177e4 LT |
343 | if (count == 0) |
344 | return -ENODATA; | |
345 | if (count > bufsiz) { | |
71ed848f | 346 | dev_err(chip->pdev, |
0a418269 | 347 | "invalid count value %x %zx\n", count, bufsiz); |
1da177e4 LT |
348 | return -E2BIG; |
349 | } | |
350 | ||
d081d470 | 351 | mutex_lock(&chip->tpm_mutex); |
1da177e4 | 352 | |
5f82e9f0 | 353 | rc = chip->ops->send(chip, (u8 *) buf, count); |
0a418269 | 354 | if (rc < 0) { |
71ed848f | 355 | dev_err(chip->pdev, |
d9e5b6bf KH |
356 | "tpm_transmit: tpm_send: error %zd\n", rc); |
357 | goto out; | |
1da177e4 LT |
358 | } |
359 | ||
27084efe LD |
360 | if (chip->vendor.irq) |
361 | goto out_recv; | |
362 | ||
7a1d7e6d JS |
363 | if (chip->flags & TPM_CHIP_FLAG_TPM2) |
364 | stop = jiffies + tpm2_calc_ordinal_duration(chip, ordinal); | |
365 | else | |
366 | stop = jiffies + tpm_calc_ordinal_duration(chip, ordinal); | |
1da177e4 | 367 | do { |
5f82e9f0 JG |
368 | u8 status = chip->ops->status(chip); |
369 | if ((status & chip->ops->req_complete_mask) == | |
370 | chip->ops->req_complete_val) | |
1da177e4 | 371 | goto out_recv; |
d9e5b6bf | 372 | |
5f82e9f0 | 373 | if (chip->ops->req_canceled(chip, status)) { |
71ed848f | 374 | dev_err(chip->pdev, "Operation Canceled\n"); |
d9e5b6bf KH |
375 | rc = -ECANCELED; |
376 | goto out; | |
377 | } | |
378 | ||
379 | msleep(TPM_TIMEOUT); /* CHECK */ | |
1da177e4 | 380 | rmb(); |
700d8bdc | 381 | } while (time_before(jiffies, stop)); |
1da177e4 | 382 | |
5f82e9f0 | 383 | chip->ops->cancel(chip); |
71ed848f | 384 | dev_err(chip->pdev, "Operation Timed out\n"); |
d9e5b6bf KH |
385 | rc = -ETIME; |
386 | goto out; | |
1da177e4 LT |
387 | |
388 | out_recv: | |
5f82e9f0 | 389 | rc = chip->ops->recv(chip, (u8 *) buf, bufsiz); |
d9e5b6bf | 390 | if (rc < 0) |
71ed848f | 391 | dev_err(chip->pdev, |
d9e5b6bf KH |
392 | "tpm_transmit: tpm_recv: error %zd\n", rc); |
393 | out: | |
d081d470 | 394 | mutex_unlock(&chip->tpm_mutex); |
d9e5b6bf | 395 | return rc; |
1da177e4 LT |
396 | } |
397 | ||
398 | #define TPM_DIGEST_SIZE 20 | |
beed53a1 | 399 | #define TPM_RET_CODE_IDX 6 |
beed53a1 | 400 | |
87155b73 JS |
401 | ssize_t tpm_transmit_cmd(struct tpm_chip *chip, void *cmd, |
402 | int len, const char *desc) | |
beed53a1 | 403 | { |
87155b73 | 404 | struct tpm_output_header *header; |
beed53a1 KJH |
405 | int err; |
406 | ||
0a418269 | 407 | len = tpm_transmit(chip, (u8 *) cmd, len); |
beed53a1 KJH |
408 | if (len < 0) |
409 | return len; | |
b9e3238a RA |
410 | else if (len < TPM_HEADER_SIZE) |
411 | return -EFAULT; | |
412 | ||
87155b73 JS |
413 | header = cmd; |
414 | ||
415 | err = be32_to_cpu(header->return_code); | |
c584af19 | 416 | if (err != 0 && desc) |
71ed848f JS |
417 | dev_err(chip->pdev, "A TPM error (%d) occurred %s\n", err, |
418 | desc); | |
b9e3238a RA |
419 | |
420 | return err; | |
beed53a1 KJH |
421 | } |
422 | ||
08837438 | 423 | #define TPM_INTERNAL_RESULT_SIZE 200 |
08837438 | 424 | #define TPM_ORD_GET_CAP cpu_to_be32(101) |
41ab999c | 425 | #define TPM_ORD_GET_RANDOM cpu_to_be32(70) |
08837438 RA |
426 | |
427 | static const struct tpm_input_header tpm_getcap_header = { | |
428 | .tag = TPM_TAG_RQU_COMMAND, | |
429 | .length = cpu_to_be32(22), | |
430 | .ordinal = TPM_ORD_GET_CAP | |
431 | }; | |
432 | ||
433 | ssize_t tpm_getcap(struct device *dev, __be32 subcap_id, cap_t *cap, | |
434 | const char *desc) | |
435 | { | |
436 | struct tpm_cmd_t tpm_cmd; | |
437 | int rc; | |
438 | struct tpm_chip *chip = dev_get_drvdata(dev); | |
439 | ||
440 | tpm_cmd.header.in = tpm_getcap_header; | |
441 | if (subcap_id == CAP_VERSION_1_1 || subcap_id == CAP_VERSION_1_2) { | |
442 | tpm_cmd.params.getcap_in.cap = subcap_id; | |
443 | /*subcap field not necessary */ | |
444 | tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(0); | |
445 | tpm_cmd.header.in.length -= cpu_to_be32(sizeof(__be32)); | |
446 | } else { | |
447 | if (subcap_id == TPM_CAP_FLAG_PERM || | |
448 | subcap_id == TPM_CAP_FLAG_VOL) | |
449 | tpm_cmd.params.getcap_in.cap = TPM_CAP_FLAG; | |
450 | else | |
451 | tpm_cmd.params.getcap_in.cap = TPM_CAP_PROP; | |
452 | tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4); | |
453 | tpm_cmd.params.getcap_in.subcap = subcap_id; | |
454 | } | |
87155b73 | 455 | rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, desc); |
08837438 RA |
456 | if (!rc) |
457 | *cap = tpm_cmd.params.getcap_out.cap; | |
458 | return rc; | |
459 | } | |
460 | ||
08e96e48 KJH |
461 | void tpm_gen_interrupt(struct tpm_chip *chip) |
462 | { | |
08837438 | 463 | struct tpm_cmd_t tpm_cmd; |
08e96e48 KJH |
464 | ssize_t rc; |
465 | ||
08837438 RA |
466 | tpm_cmd.header.in = tpm_getcap_header; |
467 | tpm_cmd.params.getcap_in.cap = TPM_CAP_PROP; | |
468 | tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4); | |
469 | tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_TIMEOUT; | |
08e96e48 | 470 | |
87155b73 JS |
471 | rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, |
472 | "attempting to determine the timeouts"); | |
08e96e48 KJH |
473 | } |
474 | EXPORT_SYMBOL_GPL(tpm_gen_interrupt); | |
475 | ||
c584af19 JG |
476 | #define TPM_ORD_STARTUP cpu_to_be32(153) |
477 | #define TPM_ST_CLEAR cpu_to_be16(1) | |
478 | #define TPM_ST_STATE cpu_to_be16(2) | |
479 | #define TPM_ST_DEACTIVATED cpu_to_be16(3) | |
480 | static const struct tpm_input_header tpm_startup_header = { | |
481 | .tag = TPM_TAG_RQU_COMMAND, | |
482 | .length = cpu_to_be32(12), | |
483 | .ordinal = TPM_ORD_STARTUP | |
484 | }; | |
485 | ||
486 | static int tpm_startup(struct tpm_chip *chip, __be16 startup_type) | |
487 | { | |
488 | struct tpm_cmd_t start_cmd; | |
489 | start_cmd.header.in = tpm_startup_header; | |
7a1d7e6d | 490 | |
c584af19 | 491 | start_cmd.params.startup_in.startup_type = startup_type; |
87155b73 JS |
492 | return tpm_transmit_cmd(chip, &start_cmd, TPM_INTERNAL_RESULT_SIZE, |
493 | "attempting to start the TPM"); | |
c584af19 JG |
494 | } |
495 | ||
2b30a90f | 496 | int tpm_get_timeouts(struct tpm_chip *chip) |
08e96e48 | 497 | { |
08837438 | 498 | struct tpm_cmd_t tpm_cmd; |
8e54caf4 JG |
499 | unsigned long new_timeout[4]; |
500 | unsigned long old_timeout[4]; | |
08837438 | 501 | struct duration_t *duration_cap; |
08e96e48 | 502 | ssize_t rc; |
08e96e48 | 503 | |
08837438 RA |
504 | tpm_cmd.header.in = tpm_getcap_header; |
505 | tpm_cmd.params.getcap_in.cap = TPM_CAP_PROP; | |
506 | tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4); | |
507 | tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_TIMEOUT; | |
87155b73 | 508 | rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, NULL); |
08e96e48 | 509 | |
c584af19 JG |
510 | if (rc == TPM_ERR_INVALID_POSTINIT) { |
511 | /* The TPM is not started, we are the first to talk to it. | |
512 | Execute a startup command. */ | |
71ed848f | 513 | dev_info(chip->pdev, "Issuing TPM_STARTUP"); |
c584af19 JG |
514 | if (tpm_startup(chip, TPM_ST_CLEAR)) |
515 | return rc; | |
516 | ||
517 | tpm_cmd.header.in = tpm_getcap_header; | |
518 | tpm_cmd.params.getcap_in.cap = TPM_CAP_PROP; | |
519 | tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4); | |
520 | tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_TIMEOUT; | |
87155b73 | 521 | rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, |
c584af19 JG |
522 | NULL); |
523 | } | |
524 | if (rc) { | |
71ed848f | 525 | dev_err(chip->pdev, |
c584af19 JG |
526 | "A TPM error (%zd) occurred attempting to determine the timeouts\n", |
527 | rc); | |
08e96e48 | 528 | goto duration; |
c584af19 | 529 | } |
08e96e48 | 530 | |
829bf067 SB |
531 | if (be32_to_cpu(tpm_cmd.header.out.return_code) != 0 || |
532 | be32_to_cpu(tpm_cmd.header.out.length) | |
533 | != sizeof(tpm_cmd.header.out) + sizeof(u32) + 4 * sizeof(u32)) | |
2b30a90f | 534 | return -EINVAL; |
08e96e48 | 535 | |
8e54caf4 JG |
536 | old_timeout[0] = be32_to_cpu(tpm_cmd.params.getcap_out.cap.timeout.a); |
537 | old_timeout[1] = be32_to_cpu(tpm_cmd.params.getcap_out.cap.timeout.b); | |
538 | old_timeout[2] = be32_to_cpu(tpm_cmd.params.getcap_out.cap.timeout.c); | |
539 | old_timeout[3] = be32_to_cpu(tpm_cmd.params.getcap_out.cap.timeout.d); | |
540 | memcpy(new_timeout, old_timeout, sizeof(new_timeout)); | |
541 | ||
542 | /* | |
543 | * Provide ability for vendor overrides of timeout values in case | |
544 | * of misreporting. | |
545 | */ | |
546 | if (chip->ops->update_timeouts != NULL) | |
547 | chip->vendor.timeout_adjusted = | |
548 | chip->ops->update_timeouts(chip, new_timeout); | |
549 | ||
550 | if (!chip->vendor.timeout_adjusted) { | |
551 | /* Don't overwrite default if value is 0 */ | |
552 | if (new_timeout[0] != 0 && new_timeout[0] < 1000) { | |
553 | int i; | |
554 | ||
555 | /* timeouts in msec rather usec */ | |
556 | for (i = 0; i != ARRAY_SIZE(new_timeout); i++) | |
557 | new_timeout[i] *= 1000; | |
558 | chip->vendor.timeout_adjusted = true; | |
559 | } | |
560 | } | |
561 | ||
562 | /* Report adjusted timeouts */ | |
563 | if (chip->vendor.timeout_adjusted) { | |
71ed848f | 564 | dev_info(chip->pdev, |
8e54caf4 JG |
565 | HW_ERR "Adjusting reported timeouts: A %lu->%luus B %lu->%luus C %lu->%luus D %lu->%luus\n", |
566 | old_timeout[0], new_timeout[0], | |
567 | old_timeout[1], new_timeout[1], | |
568 | old_timeout[2], new_timeout[2], | |
569 | old_timeout[3], new_timeout[3]); | |
e3e1a1e1 | 570 | } |
8e54caf4 JG |
571 | |
572 | chip->vendor.timeout_a = usecs_to_jiffies(new_timeout[0]); | |
573 | chip->vendor.timeout_b = usecs_to_jiffies(new_timeout[1]); | |
574 | chip->vendor.timeout_c = usecs_to_jiffies(new_timeout[2]); | |
575 | chip->vendor.timeout_d = usecs_to_jiffies(new_timeout[3]); | |
08e96e48 KJH |
576 | |
577 | duration: | |
08837438 RA |
578 | tpm_cmd.header.in = tpm_getcap_header; |
579 | tpm_cmd.params.getcap_in.cap = TPM_CAP_PROP; | |
580 | tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4); | |
581 | tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_DURATION; | |
08e96e48 | 582 | |
87155b73 JS |
583 | rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, |
584 | "attempting to determine the durations"); | |
08e96e48 | 585 | if (rc) |
2b30a90f | 586 | return rc; |
08e96e48 | 587 | |
979b1406 SB |
588 | if (be32_to_cpu(tpm_cmd.header.out.return_code) != 0 || |
589 | be32_to_cpu(tpm_cmd.header.out.length) | |
590 | != sizeof(tpm_cmd.header.out) + sizeof(u32) + 3 * sizeof(u32)) | |
2b30a90f | 591 | return -EINVAL; |
979b1406 | 592 | |
08837438 | 593 | duration_cap = &tpm_cmd.params.getcap_out.cap.duration; |
08e96e48 | 594 | chip->vendor.duration[TPM_SHORT] = |
08837438 | 595 | usecs_to_jiffies(be32_to_cpu(duration_cap->tpm_short)); |
e934acca SB |
596 | chip->vendor.duration[TPM_MEDIUM] = |
597 | usecs_to_jiffies(be32_to_cpu(duration_cap->tpm_medium)); | |
598 | chip->vendor.duration[TPM_LONG] = | |
599 | usecs_to_jiffies(be32_to_cpu(duration_cap->tpm_long)); | |
600 | ||
292cf4a8 VK |
601 | /* The Broadcom BCM0102 chipset in a Dell Latitude D820 gets the above |
602 | * value wrong and apparently reports msecs rather than usecs. So we | |
603 | * fix up the resulting too-small TPM_SHORT value to make things work. | |
e934acca | 604 | * We also scale the TPM_MEDIUM and -_LONG values by 1000. |
292cf4a8 | 605 | */ |
e934acca | 606 | if (chip->vendor.duration[TPM_SHORT] < (HZ / 100)) { |
292cf4a8 | 607 | chip->vendor.duration[TPM_SHORT] = HZ; |
e934acca SB |
608 | chip->vendor.duration[TPM_MEDIUM] *= 1000; |
609 | chip->vendor.duration[TPM_LONG] *= 1000; | |
04ab2293 | 610 | chip->vendor.duration_adjusted = true; |
71ed848f | 611 | dev_info(chip->pdev, "Adjusting TPM timeout parameters."); |
e934acca | 612 | } |
2b30a90f | 613 | return 0; |
08e96e48 KJH |
614 | } |
615 | EXPORT_SYMBOL_GPL(tpm_get_timeouts); | |
616 | ||
d97c6ade SB |
617 | #define TPM_ORD_CONTINUE_SELFTEST 83 |
618 | #define CONTINUE_SELFTEST_RESULT_SIZE 10 | |
619 | ||
620 | static struct tpm_input_header continue_selftest_header = { | |
621 | .tag = TPM_TAG_RQU_COMMAND, | |
622 | .length = cpu_to_be32(10), | |
623 | .ordinal = cpu_to_be32(TPM_ORD_CONTINUE_SELFTEST), | |
624 | }; | |
625 | ||
626 | /** | |
627 | * tpm_continue_selftest -- run TPM's selftest | |
628 | * @chip: TPM chip to use | |
629 | * | |
630 | * Returns 0 on success, < 0 in case of fatal error or a value > 0 representing | |
631 | * a TPM error code. | |
632 | */ | |
68d6e671 | 633 | static int tpm_continue_selftest(struct tpm_chip *chip) |
08e96e48 | 634 | { |
d97c6ade SB |
635 | int rc; |
636 | struct tpm_cmd_t cmd; | |
08e96e48 | 637 | |
d97c6ade | 638 | cmd.header.in = continue_selftest_header; |
87155b73 JS |
639 | rc = tpm_transmit_cmd(chip, &cmd, CONTINUE_SELFTEST_RESULT_SIZE, |
640 | "continue selftest"); | |
d97c6ade | 641 | return rc; |
08e96e48 | 642 | } |
08e96e48 | 643 | |
659aaf2b RA |
644 | #define TPM_ORDINAL_PCRREAD cpu_to_be32(21) |
645 | #define READ_PCR_RESULT_SIZE 30 | |
646 | static struct tpm_input_header pcrread_header = { | |
647 | .tag = TPM_TAG_RQU_COMMAND, | |
648 | .length = cpu_to_be32(14), | |
649 | .ordinal = TPM_ORDINAL_PCRREAD | |
1da177e4 LT |
650 | }; |
651 | ||
000a07b0 | 652 | int tpm_pcr_read_dev(struct tpm_chip *chip, int pcr_idx, u8 *res_buf) |
659aaf2b RA |
653 | { |
654 | int rc; | |
655 | struct tpm_cmd_t cmd; | |
656 | ||
657 | cmd.header.in = pcrread_header; | |
658 | cmd.params.pcrread_in.pcr_idx = cpu_to_be32(pcr_idx); | |
87155b73 JS |
659 | rc = tpm_transmit_cmd(chip, &cmd, READ_PCR_RESULT_SIZE, |
660 | "attempting to read a pcr value"); | |
659aaf2b RA |
661 | |
662 | if (rc == 0) | |
663 | memcpy(res_buf, cmd.params.pcrread_out.pcr_result, | |
664 | TPM_DIGEST_SIZE); | |
665 | return rc; | |
666 | } | |
667 | ||
668 | /** | |
669 | * tpm_pcr_read - read a pcr value | |
0a418269 | 670 | * @chip_num: tpm idx # or ANY |
659aaf2b | 671 | * @pcr_idx: pcr idx to retrieve |
0a418269 PH |
672 | * @res_buf: TPM_PCR value |
673 | * size of res_buf is 20 bytes (or NULL if you don't care) | |
659aaf2b RA |
674 | * |
675 | * The TPM driver should be built-in, but for whatever reason it | |
676 | * isn't, protect against the chip disappearing, by incrementing | |
677 | * the module usage count. | |
678 | */ | |
679 | int tpm_pcr_read(u32 chip_num, int pcr_idx, u8 *res_buf) | |
680 | { | |
681 | struct tpm_chip *chip; | |
682 | int rc; | |
683 | ||
684 | chip = tpm_chip_find_get(chip_num); | |
685 | if (chip == NULL) | |
686 | return -ENODEV; | |
7a1d7e6d JS |
687 | if (chip->flags & TPM_CHIP_FLAG_TPM2) |
688 | rc = tpm2_pcr_read(chip, pcr_idx, res_buf); | |
689 | else | |
690 | rc = tpm_pcr_read_dev(chip, pcr_idx, res_buf); | |
a0e39349 | 691 | tpm_chip_put(chip); |
659aaf2b RA |
692 | return rc; |
693 | } | |
694 | EXPORT_SYMBOL_GPL(tpm_pcr_read); | |
695 | ||
696 | /** | |
697 | * tpm_pcr_extend - extend pcr value with hash | |
0a418269 | 698 | * @chip_num: tpm idx # or AN& |
659aaf2b | 699 | * @pcr_idx: pcr idx to extend |
0a418269 | 700 | * @hash: hash value used to extend pcr value |
659aaf2b RA |
701 | * |
702 | * The TPM driver should be built-in, but for whatever reason it | |
703 | * isn't, protect against the chip disappearing, by incrementing | |
704 | * the module usage count. | |
705 | */ | |
706 | #define TPM_ORD_PCR_EXTEND cpu_to_be32(20) | |
0afd9056 | 707 | #define EXTEND_PCR_RESULT_SIZE 34 |
659aaf2b RA |
708 | static struct tpm_input_header pcrextend_header = { |
709 | .tag = TPM_TAG_RQU_COMMAND, | |
710 | .length = cpu_to_be32(34), | |
711 | .ordinal = TPM_ORD_PCR_EXTEND | |
712 | }; | |
713 | ||
714 | int tpm_pcr_extend(u32 chip_num, int pcr_idx, const u8 *hash) | |
715 | { | |
716 | struct tpm_cmd_t cmd; | |
717 | int rc; | |
718 | struct tpm_chip *chip; | |
719 | ||
720 | chip = tpm_chip_find_get(chip_num); | |
721 | if (chip == NULL) | |
722 | return -ENODEV; | |
723 | ||
7a1d7e6d JS |
724 | if (chip->flags & TPM_CHIP_FLAG_TPM2) { |
725 | rc = tpm2_pcr_extend(chip, pcr_idx, hash); | |
726 | tpm_chip_put(chip); | |
727 | return rc; | |
728 | } | |
729 | ||
659aaf2b | 730 | cmd.header.in = pcrextend_header; |
659aaf2b RA |
731 | cmd.params.pcrextend_in.pcr_idx = cpu_to_be32(pcr_idx); |
732 | memcpy(cmd.params.pcrextend_in.hash, hash, TPM_DIGEST_SIZE); | |
87155b73 JS |
733 | rc = tpm_transmit_cmd(chip, &cmd, EXTEND_PCR_RESULT_SIZE, |
734 | "attempting extend a PCR value"); | |
659aaf2b | 735 | |
a0e39349 | 736 | tpm_chip_put(chip); |
659aaf2b RA |
737 | return rc; |
738 | } | |
739 | EXPORT_SYMBOL_GPL(tpm_pcr_extend); | |
740 | ||
68d6e671 SB |
741 | /** |
742 | * tpm_do_selftest - have the TPM continue its selftest and wait until it | |
743 | * can receive further commands | |
744 | * @chip: TPM chip to use | |
745 | * | |
746 | * Returns 0 on success, < 0 in case of fatal error or a value > 0 representing | |
747 | * a TPM error code. | |
748 | */ | |
749 | int tpm_do_selftest(struct tpm_chip *chip) | |
750 | { | |
751 | int rc; | |
68d6e671 | 752 | unsigned int loops; |
4643826a | 753 | unsigned int delay_msec = 100; |
68d6e671 | 754 | unsigned long duration; |
24ebe667 | 755 | struct tpm_cmd_t cmd; |
68d6e671 | 756 | |
0a418269 | 757 | duration = tpm_calc_ordinal_duration(chip, TPM_ORD_CONTINUE_SELFTEST); |
68d6e671 SB |
758 | |
759 | loops = jiffies_to_msecs(duration) / delay_msec; | |
760 | ||
761 | rc = tpm_continue_selftest(chip); | |
762 | /* This may fail if there was no TPM driver during a suspend/resume | |
763 | * cycle; some may return 10 (BAD_ORDINAL), others 28 (FAILEDSELFTEST) | |
764 | */ | |
765 | if (rc) | |
766 | return rc; | |
767 | ||
768 | do { | |
24ebe667 RA |
769 | /* Attempt to read a PCR value */ |
770 | cmd.header.in = pcrread_header; | |
771 | cmd.params.pcrread_in.pcr_idx = cpu_to_be32(0); | |
772 | rc = tpm_transmit(chip, (u8 *) &cmd, READ_PCR_RESULT_SIZE); | |
4643826a JG |
773 | /* Some buggy TPMs will not respond to tpm_tis_ready() for |
774 | * around 300ms while the self test is ongoing, keep trying | |
775 | * until the self test duration expires. */ | |
776 | if (rc == -ETIME) { | |
71ed848f | 777 | dev_info(chip->pdev, HW_ERR "TPM command timed out during continue self test"); |
4643826a JG |
778 | msleep(delay_msec); |
779 | continue; | |
780 | } | |
24ebe667 RA |
781 | |
782 | if (rc < TPM_HEADER_SIZE) | |
783 | return -EFAULT; | |
784 | ||
785 | rc = be32_to_cpu(cmd.header.out.return_code); | |
be405411 | 786 | if (rc == TPM_ERR_DISABLED || rc == TPM_ERR_DEACTIVATED) { |
71ed848f | 787 | dev_info(chip->pdev, |
be405411 SB |
788 | "TPM is disabled/deactivated (0x%X)\n", rc); |
789 | /* TPM is disabled and/or deactivated; driver can | |
790 | * proceed and TPM does handle commands for | |
791 | * suspend/resume correctly | |
792 | */ | |
793 | return 0; | |
794 | } | |
68d6e671 SB |
795 | if (rc != TPM_WARN_DOING_SELFTEST) |
796 | return rc; | |
797 | msleep(delay_msec); | |
798 | } while (--loops > 0); | |
799 | ||
800 | return rc; | |
801 | } | |
802 | EXPORT_SYMBOL_GPL(tpm_do_selftest); | |
803 | ||
c749ba91 MZ |
804 | int tpm_send(u32 chip_num, void *cmd, size_t buflen) |
805 | { | |
806 | struct tpm_chip *chip; | |
807 | int rc; | |
808 | ||
809 | chip = tpm_chip_find_get(chip_num); | |
810 | if (chip == NULL) | |
811 | return -ENODEV; | |
812 | ||
87155b73 | 813 | rc = tpm_transmit_cmd(chip, cmd, buflen, "attempting tpm_cmd"); |
c749ba91 MZ |
814 | |
815 | tpm_chip_put(chip); | |
816 | return rc; | |
817 | } | |
818 | EXPORT_SYMBOL_GPL(tpm_send); | |
819 | ||
0a418269 PH |
820 | static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask, |
821 | bool check_cancel, bool *canceled) | |
78f09cc2 | 822 | { |
5f82e9f0 | 823 | u8 status = chip->ops->status(chip); |
78f09cc2 SB |
824 | |
825 | *canceled = false; | |
826 | if ((status & mask) == mask) | |
827 | return true; | |
5f82e9f0 | 828 | if (check_cancel && chip->ops->req_canceled(chip, status)) { |
78f09cc2 SB |
829 | *canceled = true; |
830 | return true; | |
831 | } | |
832 | return false; | |
833 | } | |
834 | ||
fd048866 | 835 | int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout, |
78f09cc2 | 836 | wait_queue_head_t *queue, bool check_cancel) |
fd048866 RA |
837 | { |
838 | unsigned long stop; | |
839 | long rc; | |
840 | u8 status; | |
78f09cc2 | 841 | bool canceled = false; |
fd048866 RA |
842 | |
843 | /* check current status */ | |
5f82e9f0 | 844 | status = chip->ops->status(chip); |
fd048866 RA |
845 | if ((status & mask) == mask) |
846 | return 0; | |
847 | ||
848 | stop = jiffies + timeout; | |
849 | ||
850 | if (chip->vendor.irq) { | |
851 | again: | |
852 | timeout = stop - jiffies; | |
853 | if ((long)timeout <= 0) | |
854 | return -ETIME; | |
855 | rc = wait_event_interruptible_timeout(*queue, | |
78f09cc2 SB |
856 | wait_for_tpm_stat_cond(chip, mask, check_cancel, |
857 | &canceled), | |
858 | timeout); | |
859 | if (rc > 0) { | |
860 | if (canceled) | |
861 | return -ECANCELED; | |
fd048866 | 862 | return 0; |
78f09cc2 | 863 | } |
fd048866 RA |
864 | if (rc == -ERESTARTSYS && freezing(current)) { |
865 | clear_thread_flag(TIF_SIGPENDING); | |
866 | goto again; | |
867 | } | |
868 | } else { | |
869 | do { | |
870 | msleep(TPM_TIMEOUT); | |
5f82e9f0 | 871 | status = chip->ops->status(chip); |
fd048866 RA |
872 | if ((status & mask) == mask) |
873 | return 0; | |
874 | } while (time_before(jiffies, stop)); | |
875 | } | |
876 | return -ETIME; | |
877 | } | |
878 | EXPORT_SYMBOL_GPL(wait_for_tpm_stat); | |
1da177e4 | 879 | |
225a9be2 RA |
880 | #define TPM_ORD_SAVESTATE cpu_to_be32(152) |
881 | #define SAVESTATE_RESULT_SIZE 10 | |
882 | ||
883 | static struct tpm_input_header savestate_header = { | |
884 | .tag = TPM_TAG_RQU_COMMAND, | |
885 | .length = cpu_to_be32(10), | |
886 | .ordinal = TPM_ORD_SAVESTATE | |
887 | }; | |
888 | ||
1da177e4 LT |
889 | /* |
890 | * We are about to suspend. Save the TPM state | |
891 | * so that it can be restored. | |
892 | */ | |
035e2ce8 | 893 | int tpm_pm_suspend(struct device *dev) |
1da177e4 | 894 | { |
ce2c87d4 | 895 | struct tpm_chip *chip = dev_get_drvdata(dev); |
225a9be2 | 896 | struct tpm_cmd_t cmd; |
32d33b29 | 897 | int rc, try; |
225a9be2 RA |
898 | |
899 | u8 dummy_hash[TPM_DIGEST_SIZE] = { 0 }; | |
2490c681 | 900 | |
1da177e4 LT |
901 | if (chip == NULL) |
902 | return -ENODEV; | |
903 | ||
74d6b3ce JS |
904 | if (chip->flags & TPM_CHIP_FLAG_TPM2) { |
905 | tpm2_shutdown(chip, TPM2_SU_STATE); | |
906 | return 0; | |
907 | } | |
30fc8d13 | 908 | |
225a9be2 RA |
909 | /* for buggy tpm, flush pcrs with extend to selected dummy */ |
910 | if (tpm_suspend_pcr) { | |
911 | cmd.header.in = pcrextend_header; | |
912 | cmd.params.pcrextend_in.pcr_idx = cpu_to_be32(tpm_suspend_pcr); | |
913 | memcpy(cmd.params.pcrextend_in.hash, dummy_hash, | |
914 | TPM_DIGEST_SIZE); | |
87155b73 JS |
915 | rc = tpm_transmit_cmd(chip, &cmd, EXTEND_PCR_RESULT_SIZE, |
916 | "extending dummy pcr before suspend"); | |
225a9be2 RA |
917 | } |
918 | ||
919 | /* now do the actual savestate */ | |
32d33b29 DL |
920 | for (try = 0; try < TPM_RETRY; try++) { |
921 | cmd.header.in = savestate_header; | |
87155b73 | 922 | rc = tpm_transmit_cmd(chip, &cmd, SAVESTATE_RESULT_SIZE, NULL); |
32d33b29 DL |
923 | |
924 | /* | |
925 | * If the TPM indicates that it is too busy to respond to | |
926 | * this command then retry before giving up. It can take | |
927 | * several seconds for this TPM to be ready. | |
928 | * | |
929 | * This can happen if the TPM has already been sent the | |
930 | * SaveState command before the driver has loaded. TCG 1.2 | |
931 | * specification states that any communication after SaveState | |
932 | * may cause the TPM to invalidate previously saved state. | |
933 | */ | |
934 | if (rc != TPM_WARN_RETRY) | |
935 | break; | |
936 | msleep(TPM_TIMEOUT_RETRY); | |
937 | } | |
938 | ||
939 | if (rc) | |
71ed848f | 940 | dev_err(chip->pdev, |
32d33b29 DL |
941 | "Error (%d) sending savestate before suspend\n", rc); |
942 | else if (try > 0) | |
71ed848f | 943 | dev_warn(chip->pdev, "TPM savestate took %dms\n", |
32d33b29 DL |
944 | try * TPM_TIMEOUT_RETRY); |
945 | ||
225a9be2 | 946 | return rc; |
1da177e4 | 947 | } |
1da177e4 LT |
948 | EXPORT_SYMBOL_GPL(tpm_pm_suspend); |
949 | ||
950 | /* | |
951 | * Resume from a power safe. The BIOS already restored | |
952 | * the TPM state. | |
953 | */ | |
ce2c87d4 | 954 | int tpm_pm_resume(struct device *dev) |
1da177e4 | 955 | { |
ce2c87d4 | 956 | struct tpm_chip *chip = dev_get_drvdata(dev); |
1da177e4 LT |
957 | |
958 | if (chip == NULL) | |
959 | return -ENODEV; | |
960 | ||
1da177e4 LT |
961 | return 0; |
962 | } | |
1da177e4 LT |
963 | EXPORT_SYMBOL_GPL(tpm_pm_resume); |
964 | ||
41ab999c KY |
965 | #define TPM_GETRANDOM_RESULT_SIZE 18 |
966 | static struct tpm_input_header tpm_getrandom_header = { | |
967 | .tag = TPM_TAG_RQU_COMMAND, | |
968 | .length = cpu_to_be32(14), | |
969 | .ordinal = TPM_ORD_GET_RANDOM | |
970 | }; | |
971 | ||
972 | /** | |
973 | * tpm_get_random() - Get random bytes from the tpm's RNG | |
974 | * @chip_num: A specific chip number for the request or TPM_ANY_NUM | |
975 | * @out: destination buffer for the random bytes | |
976 | * @max: the max number of bytes to write to @out | |
977 | * | |
978 | * Returns < 0 on error and the number of bytes read on success | |
979 | */ | |
980 | int tpm_get_random(u32 chip_num, u8 *out, size_t max) | |
981 | { | |
982 | struct tpm_chip *chip; | |
983 | struct tpm_cmd_t tpm_cmd; | |
984 | u32 recd, num_bytes = min_t(u32, max, TPM_MAX_RNG_DATA); | |
985 | int err, total = 0, retries = 5; | |
986 | u8 *dest = out; | |
987 | ||
3e14d83e JS |
988 | if (!out || !num_bytes || max > TPM_MAX_RNG_DATA) |
989 | return -EINVAL; | |
990 | ||
41ab999c KY |
991 | chip = tpm_chip_find_get(chip_num); |
992 | if (chip == NULL) | |
993 | return -ENODEV; | |
994 | ||
7a1d7e6d JS |
995 | if (chip->flags & TPM_CHIP_FLAG_TPM2) { |
996 | err = tpm2_get_random(chip, out, max); | |
997 | tpm_chip_put(chip); | |
998 | return err; | |
999 | } | |
1000 | ||
41ab999c KY |
1001 | do { |
1002 | tpm_cmd.header.in = tpm_getrandom_header; | |
1003 | tpm_cmd.params.getrandom_in.num_bytes = cpu_to_be32(num_bytes); | |
1004 | ||
87155b73 | 1005 | err = tpm_transmit_cmd(chip, &tpm_cmd, |
41ab999c KY |
1006 | TPM_GETRANDOM_RESULT_SIZE + num_bytes, |
1007 | "attempting get random"); | |
1008 | if (err) | |
1009 | break; | |
1010 | ||
1011 | recd = be32_to_cpu(tpm_cmd.params.getrandom_out.rng_data_len); | |
1012 | memcpy(dest, tpm_cmd.params.getrandom_out.rng_data, recd); | |
1013 | ||
1014 | dest += recd; | |
1015 | total += recd; | |
1016 | num_bytes -= recd; | |
1017 | } while (retries-- && total < max); | |
1018 | ||
3e14d83e | 1019 | tpm_chip_put(chip); |
41ab999c KY |
1020 | return total ? total : -EIO; |
1021 | } | |
1022 | EXPORT_SYMBOL_GPL(tpm_get_random); | |
1023 | ||
313d21ee JS |
1024 | static int __init tpm_init(void) |
1025 | { | |
1026 | int rc; | |
1027 | ||
1028 | tpm_class = class_create(THIS_MODULE, "tpm"); | |
1029 | if (IS_ERR(tpm_class)) { | |
1030 | pr_err("couldn't create tpm class\n"); | |
1031 | return PTR_ERR(tpm_class); | |
1032 | } | |
1033 | ||
1034 | rc = alloc_chrdev_region(&tpm_devt, 0, TPM_NUM_DEVICES, "tpm"); | |
1035 | if (rc < 0) { | |
1036 | pr_err("tpm: failed to allocate char dev region\n"); | |
1037 | class_destroy(tpm_class); | |
1038 | return rc; | |
1039 | } | |
1040 | ||
1041 | return 0; | |
1042 | } | |
1043 | ||
1044 | static void __exit tpm_exit(void) | |
1045 | { | |
1046 | class_destroy(tpm_class); | |
1047 | unregister_chrdev_region(tpm_devt, TPM_NUM_DEVICES); | |
1048 | } | |
1049 | ||
1050 | subsys_initcall(tpm_init); | |
1051 | module_exit(tpm_exit); | |
1052 | ||
1da177e4 LT |
1053 | MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); |
1054 | MODULE_DESCRIPTION("TPM Driver"); | |
1055 | MODULE_VERSION("2.0"); | |
1056 | MODULE_LICENSE("GPL"); |