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ad5ea3cc KJH |
1 | /* |
2 | * Copyright (C) 2005 IBM Corporation | |
3 | * | |
4 | * Authors: | |
5 | * Kylene Hall <kjhall@us.ibm.com> | |
6 | * | |
7 | * Maintained by: <tpmdd_devel@lists.sourceforge.net> | |
8 | * | |
9 | * Device driver for TCG/TCPA TPM (trusted platform module). | |
10 | * Specifications at www.trustedcomputinggroup.org | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License as | |
14 | * published by the Free Software Foundation, version 2 of the | |
15 | * License. | |
16 | * | |
17 | * These difference are required on power because the device must be | |
18 | * discovered through the device tree and iomap must be used to get | |
19 | * around the need for holes in the io_page_mask. This does not happen | |
20 | * automatically because the tpm is not a normal pci device and lives | |
21 | * under the root node. | |
22 | * | |
23 | */ | |
24 | ||
25 | #ifdef CONFIG_PPC64 | |
26 | #define atmel_getb(chip, offset) readb(chip->vendor->iobase + offset); | |
27 | #define atmel_putb(val, chip, offset) writeb(val, chip->vendor->iobase + offset) | |
28 | #define atmel_request_region request_mem_region | |
29 | #define atmel_release_region release_mem_region | |
90612b30 | 30 | |
e0dd03ca | 31 | static inline void atmel_put_base_addr(void __iomem *iobase) |
ad5ea3cc | 32 | { |
e0dd03ca | 33 | iounmap(iobase); |
ad5ea3cc KJH |
34 | } |
35 | ||
e0dd03ca | 36 | static void __iomem * atmel_get_base_addr(unsigned long *base, int *region_size) |
ad5ea3cc KJH |
37 | { |
38 | struct device_node *dn; | |
39 | unsigned long address, size; | |
40 | unsigned int *reg; | |
41 | int reglen; | |
42 | int naddrc; | |
43 | int nsizec; | |
44 | ||
45 | dn = of_find_node_by_name(NULL, "tpm"); | |
46 | ||
47 | if (!dn) | |
90612b30 | 48 | return NULL; |
ad5ea3cc KJH |
49 | |
50 | if (!device_is_compatible(dn, "AT97SC3201")) { | |
51 | of_node_put(dn); | |
90612b30 | 52 | return NULL; |
ad5ea3cc KJH |
53 | } |
54 | ||
55 | reg = (unsigned int *) get_property(dn, "reg", ®len); | |
56 | naddrc = prom_n_addr_cells(dn); | |
57 | nsizec = prom_n_size_cells(dn); | |
58 | ||
59 | of_node_put(dn); | |
60 | ||
61 | ||
62 | if (naddrc == 2) | |
63 | address = ((unsigned long) reg[0] << 32) | reg[1]; | |
64 | else | |
65 | address = reg[0]; | |
66 | ||
67 | if (nsizec == 2) | |
68 | size = | |
69 | ((unsigned long) reg[naddrc] << 32) | reg[naddrc + 1]; | |
70 | else | |
71 | size = reg[naddrc]; | |
72 | ||
e0dd03ca KJH |
73 | *base = address; |
74 | *region_size = size; | |
75 | return ioremap(*base, *region_size); | |
ad5ea3cc KJH |
76 | } |
77 | #else | |
78 | #define atmel_getb(chip, offset) inb(chip->vendor->base + offset) | |
79 | #define atmel_putb(val, chip, offset) outb(val, chip->vendor->base + offset) | |
80 | #define atmel_request_region request_region | |
81 | #define atmel_release_region release_region | |
82 | /* Atmel definitions */ | |
83 | enum tpm_atmel_addr { | |
84 | TPM_ATMEL_BASE_ADDR_LO = 0x08, | |
85 | TPM_ATMEL_BASE_ADDR_HI = 0x09 | |
86 | }; | |
87 | ||
88 | /* Verify this is a 1.1 Atmel TPM */ | |
89 | static int atmel_verify_tpm11(void) | |
90 | { | |
91 | ||
92 | /* verify that it is an Atmel part */ | |
93 | if (tpm_read_index(TPM_ADDR, 4) != 'A' || | |
94 | tpm_read_index(TPM_ADDR, 5) != 'T' || | |
95 | tpm_read_index(TPM_ADDR, 6) != 'M' || | |
96 | tpm_read_index(TPM_ADDR, 7) != 'L') | |
97 | return 1; | |
98 | ||
99 | /* query chip for its version number */ | |
100 | if (tpm_read_index(TPM_ADDR, 0x00) != 1 || | |
101 | tpm_read_index(TPM_ADDR, 0x01) != 1) | |
102 | return 1; | |
103 | ||
104 | /* This is an atmel supported part */ | |
105 | return 0; | |
106 | } | |
107 | ||
e0dd03ca | 108 | static inline void atmel_put_base_addr(void __iomem *iobase) |
ad5ea3cc KJH |
109 | { |
110 | } | |
111 | ||
112 | /* Determine where to talk to device */ | |
e0dd03ca | 113 | static void __iomem * atmel_get_base_addr(unsigned long *base, int *region_size) |
ad5ea3cc KJH |
114 | { |
115 | int lo, hi; | |
116 | ||
117 | if (atmel_verify_tpm11() != 0) | |
90612b30 | 118 | return NULL; |
ad5ea3cc KJH |
119 | |
120 | lo = tpm_read_index(TPM_ADDR, TPM_ATMEL_BASE_ADDR_LO); | |
121 | hi = tpm_read_index(TPM_ADDR, TPM_ATMEL_BASE_ADDR_HI); | |
122 | ||
e0dd03ca KJH |
123 | *base = (hi << 8) | lo; |
124 | *region_size = 2; | |
ad5ea3cc | 125 | |
e0dd03ca | 126 | return ioport_map(*base, *region_size); |
ad5ea3cc KJH |
127 | } |
128 | #endif |