Merge branch 'for-linus-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mason...
[deliverable/linux.git] / drivers / char / tpm / tpm_tis.c
CommitLineData
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1/*
2 * Copyright (C) 2005, 2006 IBM Corporation
399235dc 3 * Copyright (C) 2014, 2015 Intel Corporation
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4 *
5 * Authors:
6 * Leendert van Doorn <leendert@watson.ibm.com>
7 * Kylene Hall <kjhall@us.ibm.com>
8 *
8e81cc13
KY
9 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
10 *
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11 * Device driver for TCG/TCPA TPM (trusted platform module).
12 * Specifications at www.trustedcomputinggroup.org
13 *
14 * This device driver implements the TPM interface as defined in
15 * the TCG TPM Interface Spec version 1.2, revision 1.0.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation, version 2 of the
20 * License.
21 */
57135568
KJH
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/moduleparam.h>
27084efe 25#include <linux/pnp.h>
5a0e3ad6 26#include <linux/slab.h>
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LD
27#include <linux/interrupt.h>
28#include <linux/wait.h>
3f0d3d01 29#include <linux/acpi.h>
20b87bbf 30#include <linux/freezer.h>
399235dc 31#include <acpi/actbl2.h>
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LD
32#include "tpm.h"
33
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LD
34enum tis_access {
35 TPM_ACCESS_VALID = 0x80,
36 TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
37 TPM_ACCESS_REQUEST_PENDING = 0x04,
38 TPM_ACCESS_REQUEST_USE = 0x02,
39};
40
41enum tis_status {
42 TPM_STS_VALID = 0x80,
43 TPM_STS_COMMAND_READY = 0x40,
44 TPM_STS_GO = 0x20,
45 TPM_STS_DATA_AVAIL = 0x10,
46 TPM_STS_DATA_EXPECT = 0x08,
47};
48
49enum tis_int_flags {
50 TPM_GLOBAL_INT_ENABLE = 0x80000000,
51 TPM_INTF_BURST_COUNT_STATIC = 0x100,
52 TPM_INTF_CMD_READY_INT = 0x080,
53 TPM_INTF_INT_EDGE_FALLING = 0x040,
54 TPM_INTF_INT_EDGE_RISING = 0x020,
55 TPM_INTF_INT_LEVEL_LOW = 0x010,
56 TPM_INTF_INT_LEVEL_HIGH = 0x008,
57 TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
58 TPM_INTF_STS_VALID_INT = 0x002,
59 TPM_INTF_DATA_AVAIL_INT = 0x001,
60};
61
36b20020 62enum tis_defaults {
2a7362f5 63 TIS_MEM_BASE = 0xFED40000,
b09d5300 64 TIS_MEM_LEN = 0x5000,
cb535425
KJH
65 TIS_SHORT_TIMEOUT = 750, /* ms */
66 TIS_LONG_TIMEOUT = 2000, /* 2 sec */
36b20020
KJH
67};
68
399235dc
JS
69struct tpm_info {
70 unsigned long start;
71 unsigned long len;
72 unsigned int irq;
73};
74
75static struct tpm_info tis_default_info = {
76 .start = TIS_MEM_BASE,
77 .len = TIS_MEM_LEN,
78 .irq = 0,
79};
aec04cbd
JS
80
81/* Some timeout values are needed before it is known whether the chip is
82 * TPM 1.0 or TPM 2.0.
83 */
84#define TIS_TIMEOUT_A_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_A)
85#define TIS_TIMEOUT_B_MAX max(TIS_LONG_TIMEOUT, TPM2_TIMEOUT_B)
86#define TIS_TIMEOUT_C_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_C)
87#define TIS_TIMEOUT_D_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_D)
88
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89#define TPM_ACCESS(l) (0x0000 | ((l) << 12))
90#define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
91#define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
92#define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
93#define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
94#define TPM_STS(l) (0x0018 | ((l) << 12))
aec04cbd 95#define TPM_STS3(l) (0x001b | ((l) << 12))
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96#define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
97
98#define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
99#define TPM_RID(l) (0x0F04 | ((l) << 12))
100
448e9c55
SD
101struct priv_data {
102 bool irq_tested;
103};
104
1560ffe6 105#if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
399235dc 106static int has_hid(struct acpi_device *dev, const char *hid)
3f0d3d01 107{
3f0d3d01
MG
108 struct acpi_hardware_id *id;
109
399235dc
JS
110 list_for_each_entry(id, &dev->pnp.ids, list)
111 if (!strcmp(hid, id->id))
3f0d3d01 112 return 1;
3f0d3d01
MG
113
114 return 0;
115}
399235dc
JS
116
117static inline int is_itpm(struct acpi_device *dev)
118{
119 return has_hid(dev, "INTC0102");
120}
121
122static inline int is_fifo(struct acpi_device *dev)
123{
124 struct acpi_table_tpm2 *tbl;
125 acpi_status st;
126
127 /* TPM 1.2 FIFO */
128 if (!has_hid(dev, "MSFT0101"))
129 return 1;
130
131 st = acpi_get_table(ACPI_SIG_TPM2, 1,
132 (struct acpi_table_header **) &tbl);
133 if (ACPI_FAILURE(st)) {
134 dev_err(&dev->dev, "failed to get TPM2 ACPI table\n");
135 return 0;
136 }
137
138 if (le32_to_cpu(tbl->start_method) != TPM2_START_FIFO)
139 return 0;
140
141 /* TPM 2.0 FIFO */
142 return 1;
143}
1560ffe6 144#else
399235dc 145static inline int is_itpm(struct acpi_device *dev)
1560ffe6
RD
146{
147 return 0;
148}
399235dc
JS
149
150static inline int is_fifo(struct acpi_device *dev)
151{
152 return 1;
153}
3f0d3d01
MG
154#endif
155
7240b983
JG
156/* Before we attempt to access the TPM we must see that the valid bit is set.
157 * The specification says that this bit is 0 at reset and remains 0 until the
158 * 'TPM has gone through its self test and initialization and has established
159 * correct values in the other bits.' */
160static int wait_startup(struct tpm_chip *chip, int l)
161{
162 unsigned long stop = jiffies + chip->vendor.timeout_a;
163 do {
164 if (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
165 TPM_ACCESS_VALID)
166 return 0;
167 msleep(TPM_TIMEOUT);
168 } while (time_before(jiffies, stop));
169 return -1;
170}
171
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172static int check_locality(struct tpm_chip *chip, int l)
173{
174 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
175 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
176 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
177 return chip->vendor.locality = l;
178
179 return -1;
180}
181
182static void release_locality(struct tpm_chip *chip, int l, int force)
183{
184 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
185 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
186 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
187 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
188 chip->vendor.iobase + TPM_ACCESS(l));
189}
190
191static int request_locality(struct tpm_chip *chip, int l)
192{
20b87bbf 193 unsigned long stop, timeout;
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LD
194 long rc;
195
196 if (check_locality(chip, l) >= 0)
197 return l;
198
199 iowrite8(TPM_ACCESS_REQUEST_USE,
200 chip->vendor.iobase + TPM_ACCESS(l));
201
20b87bbf
SB
202 stop = jiffies + chip->vendor.timeout_a;
203
27084efe 204 if (chip->vendor.irq) {
20b87bbf
SB
205again:
206 timeout = stop - jiffies;
207 if ((long)timeout <= 0)
208 return -1;
36b20020 209 rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
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210 (check_locality
211 (chip, l) >= 0),
20b87bbf 212 timeout);
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213 if (rc > 0)
214 return l;
20b87bbf
SB
215 if (rc == -ERESTARTSYS && freezing(current)) {
216 clear_thread_flag(TIF_SIGPENDING);
217 goto again;
218 }
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219 } else {
220 /* wait for burstcount */
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221 do {
222 if (check_locality(chip, l) >= 0)
223 return l;
224 msleep(TPM_TIMEOUT);
225 }
226 while (time_before(jiffies, stop));
227 }
228 return -1;
229}
230
231static u8 tpm_tis_status(struct tpm_chip *chip)
232{
233 return ioread8(chip->vendor.iobase +
234 TPM_STS(chip->vendor.locality));
235}
236
237static void tpm_tis_ready(struct tpm_chip *chip)
238{
239 /* this causes the current command to be aborted */
240 iowrite8(TPM_STS_COMMAND_READY,
241 chip->vendor.iobase + TPM_STS(chip->vendor.locality));
242}
243
244static int get_burstcount(struct tpm_chip *chip)
245{
246 unsigned long stop;
247 int burstcnt;
248
249 /* wait for burstcount */
250 /* which timeout value, spec has 2 answers (c & d) */
36b20020 251 stop = jiffies + chip->vendor.timeout_d;
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LD
252 do {
253 burstcnt = ioread8(chip->vendor.iobase +
254 TPM_STS(chip->vendor.locality) + 1);
255 burstcnt += ioread8(chip->vendor.iobase +
256 TPM_STS(chip->vendor.locality) +
257 2) << 8;
258 if (burstcnt)
259 return burstcnt;
260 msleep(TPM_TIMEOUT);
261 } while (time_before(jiffies, stop));
262 return -EBUSY;
263}
264
cb535425 265static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
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LD
266{
267 int size = 0, burstcnt;
268 while (size < count &&
fd048866
RA
269 wait_for_tpm_stat(chip,
270 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
271 chip->vendor.timeout_c,
78f09cc2 272 &chip->vendor.read_queue, true)
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LD
273 == 0) {
274 burstcnt = get_burstcount(chip);
275 for (; burstcnt > 0 && size < count; burstcnt--)
276 buf[size++] = ioread8(chip->vendor.iobase +
277 TPM_DATA_FIFO(chip->vendor.
278 locality));
279 }
280 return size;
281}
282
cb535425 283static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
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LD
284{
285 int size = 0;
286 int expected, status;
287
288 if (count < TPM_HEADER_SIZE) {
289 size = -EIO;
290 goto out;
291 }
292
293 /* read first 10 bytes, including tag, paramsize, and result */
294 if ((size =
295 recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
71ed848f 296 dev_err(chip->pdev, "Unable to read header\n");
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LD
297 goto out;
298 }
299
300 expected = be32_to_cpu(*(__be32 *) (buf + 2));
301 if (expected > count) {
302 size = -EIO;
303 goto out;
304 }
305
306 if ((size +=
307 recv_data(chip, &buf[TPM_HEADER_SIZE],
308 expected - TPM_HEADER_SIZE)) < expected) {
71ed848f 309 dev_err(chip->pdev, "Unable to read remainder of result\n");
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310 size = -ETIME;
311 goto out;
312 }
313
fd048866 314 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
78f09cc2 315 &chip->vendor.int_queue, false);
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LD
316 status = tpm_tis_status(chip);
317 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
71ed848f 318 dev_err(chip->pdev, "Error left over data\n");
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LD
319 size = -EIO;
320 goto out;
321 }
322
323out:
324 tpm_tis_ready(chip);
325 release_locality(chip, chip->vendor.locality, 0);
326 return size;
327}
328
90ab5ee9 329static bool itpm;
3507d612
RA
330module_param(itpm, bool, 0444);
331MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
332
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333/*
334 * If interrupts are used (signaled by an irq set in the vendor structure)
335 * tpm.c can skip polling for the data to be available as the interrupt is
336 * waited for here
337 */
9519de3f 338static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
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LD
339{
340 int rc, status, burstcnt;
341 size_t count = 0;
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LD
342
343 if (request_locality(chip, 0) < 0)
344 return -EBUSY;
345
346 status = tpm_tis_status(chip);
347 if ((status & TPM_STS_COMMAND_READY) == 0) {
348 tpm_tis_ready(chip);
fd048866 349 if (wait_for_tpm_stat
27084efe 350 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
78f09cc2 351 &chip->vendor.int_queue, false) < 0) {
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LD
352 rc = -ETIME;
353 goto out_err;
354 }
355 }
356
357 while (count < len - 1) {
358 burstcnt = get_burstcount(chip);
359 for (; burstcnt > 0 && count < len - 1; burstcnt--) {
360 iowrite8(buf[count], chip->vendor.iobase +
361 TPM_DATA_FIFO(chip->vendor.locality));
362 count++;
363 }
364
fd048866 365 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
78f09cc2 366 &chip->vendor.int_queue, false);
27084efe 367 status = tpm_tis_status(chip);
3507d612 368 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
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LD
369 rc = -EIO;
370 goto out_err;
371 }
372 }
373
374 /* write last byte */
375 iowrite8(buf[count],
9519de3f 376 chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality));
fd048866 377 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
78f09cc2 378 &chip->vendor.int_queue, false);
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LD
379 status = tpm_tis_status(chip);
380 if ((status & TPM_STS_DATA_EXPECT) != 0) {
381 rc = -EIO;
382 goto out_err;
383 }
384
9519de3f
SB
385 return 0;
386
387out_err:
388 tpm_tis_ready(chip);
389 release_locality(chip, chip->vendor.locality, 0);
390 return rc;
391}
392
448e9c55
SD
393static void disable_interrupts(struct tpm_chip *chip)
394{
395 u32 intmask;
396
397 intmask =
398 ioread32(chip->vendor.iobase +
399 TPM_INT_ENABLE(chip->vendor.locality));
400 intmask &= ~TPM_GLOBAL_INT_ENABLE;
401 iowrite32(intmask,
402 chip->vendor.iobase +
403 TPM_INT_ENABLE(chip->vendor.locality));
727f28b8 404 devm_free_irq(chip->pdev, chip->vendor.irq, chip);
448e9c55
SD
405 chip->vendor.irq = 0;
406}
407
9519de3f
SB
408/*
409 * If interrupts are used (signaled by an irq set in the vendor structure)
410 * tpm.c can skip polling for the data to be available as the interrupt is
411 * waited for here
412 */
448e9c55 413static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
9519de3f
SB
414{
415 int rc;
416 u32 ordinal;
aec04cbd 417 unsigned long dur;
9519de3f
SB
418
419 rc = tpm_tis_send_data(chip, buf, len);
420 if (rc < 0)
421 return rc;
422
27084efe
LD
423 /* go and do it */
424 iowrite8(TPM_STS_GO,
425 chip->vendor.iobase + TPM_STS(chip->vendor.locality));
426
427 if (chip->vendor.irq) {
428 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
aec04cbd
JS
429
430 if (chip->flags & TPM_CHIP_FLAG_TPM2)
431 dur = tpm2_calc_ordinal_duration(chip, ordinal);
432 else
433 dur = tpm_calc_ordinal_duration(chip, ordinal);
434
fd048866 435 if (wait_for_tpm_stat
aec04cbd 436 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
78f09cc2 437 &chip->vendor.read_queue, false) < 0) {
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LD
438 rc = -ETIME;
439 goto out_err;
440 }
441 }
442 return len;
443out_err:
444 tpm_tis_ready(chip);
445 release_locality(chip, chip->vendor.locality, 0);
446 return rc;
447}
448
448e9c55
SD
449static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
450{
451 int rc, irq;
452 struct priv_data *priv = chip->vendor.priv;
453
454 if (!chip->vendor.irq || priv->irq_tested)
455 return tpm_tis_send_main(chip, buf, len);
456
457 /* Verify receipt of the expected IRQ */
458 irq = chip->vendor.irq;
459 chip->vendor.irq = 0;
460 rc = tpm_tis_send_main(chip, buf, len);
461 chip->vendor.irq = irq;
462 if (!priv->irq_tested)
463 msleep(1);
e3837e74 464 if (!priv->irq_tested)
448e9c55 465 disable_interrupts(chip);
448e9c55
SD
466 priv->irq_tested = true;
467 return rc;
468}
469
8e54caf4
JG
470struct tis_vendor_timeout_override {
471 u32 did_vid;
472 unsigned long timeout_us[4];
473};
474
475static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
476 /* Atmel 3204 */
477 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
478 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
479};
480
481static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
482 unsigned long *timeout_cap)
483{
484 int i;
485 u32 did_vid;
486
487 did_vid = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
488
489 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
490 if (vendor_timeout_overrides[i].did_vid != did_vid)
491 continue;
492 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
493 sizeof(vendor_timeout_overrides[i].timeout_us));
494 return true;
495 }
496
497 return false;
498}
499
9519de3f
SB
500/*
501 * Early probing for iTPM with STS_DATA_EXPECT flaw.
502 * Try sending command without itpm flag set and if that
503 * fails, repeat with itpm flag set.
504 */
505static int probe_itpm(struct tpm_chip *chip)
506{
507 int rc = 0;
508 u8 cmd_getticks[] = {
509 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
510 0x00, 0x00, 0x00, 0xf1
511 };
512 size_t len = sizeof(cmd_getticks);
968de8e2 513 bool rem_itpm = itpm;
4e401fb0
SB
514 u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0));
515
516 /* probe only iTPMS */
517 if (vendor != TPM_VID_INTEL)
518 return 0;
9519de3f 519
73249695 520 itpm = false;
9519de3f
SB
521
522 rc = tpm_tis_send_data(chip, cmd_getticks, len);
523 if (rc == 0)
524 goto out;
525
526 tpm_tis_ready(chip);
527 release_locality(chip, chip->vendor.locality, 0);
528
73249695 529 itpm = true;
9519de3f
SB
530
531 rc = tpm_tis_send_data(chip, cmd_getticks, len);
532 if (rc == 0) {
71ed848f 533 dev_info(chip->pdev, "Detected an iTPM.\n");
9519de3f
SB
534 rc = 1;
535 } else
536 rc = -EFAULT;
537
538out:
539 itpm = rem_itpm;
540 tpm_tis_ready(chip);
541 release_locality(chip, chip->vendor.locality, 0);
542
543 return rc;
544}
545
1f866057
SB
546static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
547{
548 switch (chip->vendor.manufacturer_id) {
549 case TPM_VID_WINBOND:
550 return ((status == TPM_STS_VALID) ||
551 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
552 case TPM_VID_STM:
553 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
554 default:
555 return (status == TPM_STS_COMMAND_READY);
556 }
557}
558
01ad1fa7 559static const struct tpm_class_ops tpm_tis = {
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LD
560 .status = tpm_tis_status,
561 .recv = tpm_tis_recv,
562 .send = tpm_tis_send,
563 .cancel = tpm_tis_ready,
8e54caf4 564 .update_timeouts = tpm_tis_update_timeouts,
27084efe
LD
565 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
566 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
1f866057 567 .req_canceled = tpm_tis_req_canceled,
27084efe
LD
568};
569
a6f97b29 570static irqreturn_t tis_int_handler(int dummy, void *dev_id)
27084efe 571{
06efcad0 572 struct tpm_chip *chip = dev_id;
27084efe
LD
573 u32 interrupt;
574 int i;
575
576 interrupt = ioread32(chip->vendor.iobase +
577 TPM_INT_STATUS(chip->vendor.locality));
578
579 if (interrupt == 0)
580 return IRQ_NONE;
581
448e9c55 582 ((struct priv_data *)chip->vendor.priv)->irq_tested = true;
27084efe
LD
583 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
584 wake_up_interruptible(&chip->vendor.read_queue);
585 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
586 for (i = 0; i < 5; i++)
587 if (check_locality(chip, i) >= 0)
588 break;
589 if (interrupt &
590 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
591 TPM_INTF_CMD_READY_INT))
592 wake_up_interruptible(&chip->vendor.int_queue);
593
594 /* Clear interrupts handled with TPM_EOI */
595 iowrite32(interrupt,
596 chip->vendor.iobase +
597 TPM_INT_STATUS(chip->vendor.locality));
cab091ea 598 ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
27084efe
LD
599 return IRQ_HANDLED;
600}
601
e3837e74
JG
602/* Register the IRQ and issue a command that will cause an interrupt. If an
603 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
604 * everything and leave in polling mode. Returns 0 on success.
605 */
b8ba1e74
JG
606static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
607 int flags, int irq)
e3837e74
JG
608{
609 struct priv_data *priv = chip->vendor.priv;
610 u8 original_int_vec;
611
b8ba1e74 612 if (devm_request_irq(chip->pdev, irq, tis_int_handler, flags,
e3837e74
JG
613 chip->devname, chip) != 0) {
614 dev_info(chip->pdev, "Unable to request irq: %d for probe\n",
615 irq);
616 return -1;
617 }
618 chip->vendor.irq = irq;
619
620 original_int_vec = ioread8(chip->vendor.iobase +
621 TPM_INT_VECTOR(chip->vendor.locality));
622 iowrite8(irq,
623 chip->vendor.iobase + TPM_INT_VECTOR(chip->vendor.locality));
624
625 /* Clear all existing */
626 iowrite32(ioread32(chip->vendor.iobase +
627 TPM_INT_STATUS(chip->vendor.locality)),
628 chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
629
630 /* Turn on */
631 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
632 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
633
634 priv->irq_tested = false;
635
636 /* Generate an interrupt by having the core call through to
637 * tpm_tis_send
638 */
639 if (chip->flags & TPM_CHIP_FLAG_TPM2)
640 tpm2_gen_interrupt(chip);
641 else
642 tpm_gen_interrupt(chip);
643
644 /* tpm_tis_send will either confirm the interrupt is working or it
645 * will call disable_irq which undoes all of the above.
646 */
647 if (!chip->vendor.irq) {
648 iowrite8(original_int_vec,
649 chip->vendor.iobase +
650 TPM_INT_VECTOR(chip->vendor.locality));
651 return 1;
652 }
653
654 return 0;
655}
656
657/* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
658 * do not have ACPI/etc. We typically expect the interrupt to be declared if
659 * present.
660 */
661static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
662{
663 u8 original_int_vec;
664 int i;
665
666 original_int_vec = ioread8(chip->vendor.iobase +
667 TPM_INT_VECTOR(chip->vendor.locality));
668
669 if (!original_int_vec) {
b8ba1e74
JG
670 if (IS_ENABLED(CONFIG_X86))
671 for (i = 3; i <= 15; i++)
672 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
673 i))
674 return;
675 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
676 original_int_vec))
e3837e74
JG
677 return;
678}
679
73249695 680static bool interrupts = true;
57135568
KJH
681module_param(interrupts, bool, 0444);
682MODULE_PARM_DESC(interrupts, "Enable interrupts");
683
afb5abc2
JS
684static void tpm_tis_remove(struct tpm_chip *chip)
685{
74d6b3ce
JS
686 if (chip->flags & TPM_CHIP_FLAG_TPM2)
687 tpm2_shutdown(chip, TPM2_SU_CLEAR);
688
afb5abc2
JS
689 iowrite32(~TPM_GLOBAL_INT_ENABLE &
690 ioread32(chip->vendor.iobase +
691 TPM_INT_ENABLE(chip->vendor.
692 locality)),
693 chip->vendor.iobase +
694 TPM_INT_ENABLE(chip->vendor.locality));
695 release_locality(chip, chip->vendor.locality, 1);
696}
697
399235dc
JS
698static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
699 acpi_handle acpi_dev_handle)
27084efe
LD
700{
701 u32 vendor, intfcaps, intmask;
e3837e74 702 int rc, probe;
27084efe 703 struct tpm_chip *chip;
448e9c55 704 struct priv_data *priv;
27084efe 705
448e9c55
SD
706 priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
707 if (priv == NULL)
708 return -ENOMEM;
afb5abc2
JS
709
710 chip = tpmm_chip_alloc(dev, &tpm_tis);
711 if (IS_ERR(chip))
712 return PTR_ERR(chip);
713
448e9c55 714 chip->vendor.priv = priv;
aec04cbd 715#ifdef CONFIG_ACPI
0dc55365 716 chip->acpi_dev_handle = acpi_dev_handle;
aec04cbd 717#endif
27084efe 718
399235dc 719 chip->vendor.iobase = devm_ioremap(dev, tpm_info->start, tpm_info->len);
afb5abc2
JS
720 if (!chip->vendor.iobase)
721 return -EIO;
27084efe 722
aec04cbd
JS
723 /* Maximum timeouts */
724 chip->vendor.timeout_a = TIS_TIMEOUT_A_MAX;
725 chip->vendor.timeout_b = TIS_TIMEOUT_B_MAX;
726 chip->vendor.timeout_c = TIS_TIMEOUT_C_MAX;
727 chip->vendor.timeout_d = TIS_TIMEOUT_D_MAX;
ec579358 728
7240b983
JG
729 if (wait_startup(chip, 0) != 0) {
730 rc = -ENODEV;
731 goto out_err;
732 }
733
036bb38f
JG
734 /* Take control of the TPM's interrupt hardware and shut it off */
735 intmask = ioread32(chip->vendor.iobase +
736 TPM_INT_ENABLE(chip->vendor.locality));
737 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
738 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
739 intmask &= ~TPM_GLOBAL_INT_ENABLE;
740 iowrite32(intmask,
741 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
742
05a462af
MS
743 if (request_locality(chip, 0) != 0) {
744 rc = -ENODEV;
745 goto out_err;
746 }
747
4d5f2051
JS
748 rc = tpm2_probe(chip);
749 if (rc)
750 goto out_err;
aec04cbd 751
27084efe 752 vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
3e3a5e90 753 chip->vendor.manufacturer_id = vendor;
27084efe 754
aec04cbd
JS
755 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
756 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
27084efe
LD
757 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
758
9519de3f 759 if (!itpm) {
968de8e2
SB
760 probe = probe_itpm(chip);
761 if (probe < 0) {
9519de3f
SB
762 rc = -ENODEV;
763 goto out_err;
764 }
73249695 765 itpm = !!probe;
9519de3f
SB
766 }
767
3507d612
RA
768 if (itpm)
769 dev_info(dev, "Intel iTPM workaround enabled\n");
770
771
27084efe
LD
772 /* Figure out the capabilities */
773 intfcaps =
774 ioread32(chip->vendor.iobase +
775 TPM_INTF_CAPS(chip->vendor.locality));
9e323d3e 776 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
27084efe
LD
777 intfcaps);
778 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
9e323d3e 779 dev_dbg(dev, "\tBurst Count Static\n");
27084efe 780 if (intfcaps & TPM_INTF_CMD_READY_INT)
9e323d3e 781 dev_dbg(dev, "\tCommand Ready Int Support\n");
27084efe 782 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
9e323d3e 783 dev_dbg(dev, "\tInterrupt Edge Falling\n");
27084efe 784 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
9e323d3e 785 dev_dbg(dev, "\tInterrupt Edge Rising\n");
27084efe 786 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
9e323d3e 787 dev_dbg(dev, "\tInterrupt Level Low\n");
27084efe 788 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
9e323d3e 789 dev_dbg(dev, "\tInterrupt Level High\n");
27084efe 790 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
9e323d3e 791 dev_dbg(dev, "\tLocality Change Int Support\n");
27084efe 792 if (intfcaps & TPM_INTF_STS_VALID_INT)
9e323d3e 793 dev_dbg(dev, "\tSts Valid Int Support\n");
27084efe 794 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
9e323d3e 795 dev_dbg(dev, "\tData Avail Int Support\n");
27084efe 796
25112048
JG
797 /* Very early on issue a command to the TPM in polling mode to make
798 * sure it works. May as well use that command to set the proper
799 * timeouts for the driver.
800 */
801 if (tpm_get_timeouts(chip)) {
802 dev_err(dev, "Could not get TPM timeouts and durations\n");
803 rc = -ENODEV;
804 goto out_err;
805 }
806
27084efe
LD
807 /* INTERRUPT Setup */
808 init_waitqueue_head(&chip->vendor.read_queue);
809 init_waitqueue_head(&chip->vendor.int_queue);
e3837e74
JG
810 if (interrupts) {
811 if (tpm_info->irq) {
b8ba1e74
JG
812 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
813 tpm_info->irq);
e3837e74
JG
814 if (!chip->vendor.irq)
815 dev_err(chip->pdev, FW_BUG
816 "TPM interrupt not working, polling instead\n");
817 } else
818 tpm_tis_probe_irq(chip, intmask);
25112048 819 }
aec04cbd 820
25112048 821 if (chip->flags & TPM_CHIP_FLAG_TPM2) {
aec04cbd
JS
822 rc = tpm2_do_selftest(chip);
823 if (rc == TPM2_RC_INITIALIZE) {
824 dev_warn(dev, "Firmware has not started TPM\n");
825 rc = tpm2_startup(chip, TPM2_SU_CLEAR);
826 if (!rc)
827 rc = tpm2_do_selftest(chip);
828 }
448e9c55 829
aec04cbd
JS
830 if (rc) {
831 dev_err(dev, "TPM self test failed\n");
832 if (rc > 0)
833 rc = -ENODEV;
834 goto out_err;
835 }
836 } else {
aec04cbd
JS
837 if (tpm_do_selftest(chip)) {
838 dev_err(dev, "TPM self test failed\n");
839 rc = -ENODEV;
840 goto out_err;
841 }
448e9c55
SD
842 }
843
afb5abc2 844 return tpm_chip_register(chip);
27084efe 845out_err:
afb5abc2 846 tpm_tis_remove(chip);
27084efe
LD
847 return rc;
848}
96854310 849
19b94d2d 850#ifdef CONFIG_PM_SLEEP
96854310
SB
851static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
852{
853 u32 intmask;
854
855 /* reenable interrupts that device may have lost or
856 BIOS/firmware may have disabled */
857 iowrite8(chip->vendor.irq, chip->vendor.iobase +
858 TPM_INT_VECTOR(chip->vendor.locality));
859
860 intmask =
861 ioread32(chip->vendor.iobase +
862 TPM_INT_ENABLE(chip->vendor.locality));
863
864 intmask |= TPM_INTF_CMD_READY_INT
865 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
866 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
867
868 iowrite32(intmask,
869 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
870}
96854310 871
a2fa3fb0
SK
872static int tpm_tis_resume(struct device *dev)
873{
874 struct tpm_chip *chip = dev_get_drvdata(dev);
74d6b3ce 875 int ret;
a2fa3fb0
SK
876
877 if (chip->vendor.irq)
878 tpm_tis_reenable_interrupts(chip);
879
74d6b3ce
JS
880 ret = tpm_pm_resume(dev);
881 if (ret)
882 return ret;
aec04cbd 883
74d6b3ce
JS
884 /* TPM 1.2 requires self-test on resume. This function actually returns
885 * an error code but for unknown reason it isn't handled.
886 */
887 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
888 tpm_do_selftest(chip);
a2fa3fb0 889
74d6b3ce 890 return 0;
a2fa3fb0
SK
891}
892#endif
893
894static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume);
895
7f2ab000 896#ifdef CONFIG_PNP
afc6d369 897static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
9e323d3e
KJH
898 const struct pnp_device_id *pnp_id)
899{
399235dc 900 struct tpm_info tpm_info = tis_default_info;
0dc55365 901 acpi_handle acpi_dev_handle = NULL;
7917ff9a 902
399235dc
JS
903 tpm_info.start = pnp_mem_start(pnp_dev, 0);
904 tpm_info.len = pnp_mem_len(pnp_dev, 0);
9e323d3e 905
7917ff9a 906 if (pnp_irq_valid(pnp_dev, 0))
399235dc 907 tpm_info.irq = pnp_irq(pnp_dev, 0);
7917ff9a 908 else
73249695 909 interrupts = false;
7917ff9a 910
961be7ef 911#ifdef CONFIG_ACPI
399235dc
JS
912 if (pnp_acpi_device(pnp_dev)) {
913 if (is_itpm(pnp_acpi_device(pnp_dev)))
914 itpm = true;
915
0dc55365 916 acpi_dev_handle = pnp_acpi_device(pnp_dev)->handle;
399235dc 917 }
961be7ef 918#endif
0dc55365 919
399235dc 920 return tpm_tis_init(&pnp_dev->dev, &tpm_info, acpi_dev_handle);
9e323d3e
KJH
921}
922
0bbed20e 923static struct pnp_device_id tpm_pnp_tbl[] = {
27084efe 924 {"PNP0C31", 0}, /* TPM */
93e1b7d4
KJH
925 {"ATM1200", 0}, /* Atmel */
926 {"IFX0102", 0}, /* Infineon */
927 {"BCM0101", 0}, /* Broadcom */
061991ec 928 {"BCM0102", 0}, /* Broadcom */
93e1b7d4 929 {"NSC1200", 0}, /* National */
fb0e7e11 930 {"ICO0102", 0}, /* Intel */
93e1b7d4
KJH
931 /* Add new here */
932 {"", 0}, /* User Specified */
933 {"", 0} /* Terminator */
27084efe 934};
31bde71c 935MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
27084efe 936
39af33fc 937static void tpm_tis_pnp_remove(struct pnp_dev *dev)
253115b7
RA
938{
939 struct tpm_chip *chip = pnp_get_drvdata(dev);
399235dc 940
afb5abc2
JS
941 tpm_chip_unregister(chip);
942 tpm_tis_remove(chip);
253115b7
RA
943}
944
27084efe
LD
945static struct pnp_driver tis_pnp_driver = {
946 .name = "tpm_tis",
947 .id_table = tpm_pnp_tbl,
948 .probe = tpm_tis_pnp_init,
253115b7 949 .remove = tpm_tis_pnp_remove,
a2fa3fb0
SK
950 .driver = {
951 .pm = &tpm_tis_pm,
952 },
27084efe
LD
953};
954
93e1b7d4
KJH
955#define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
956module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
957 sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
958MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
7f2ab000 959#endif
7a192ec3 960
399235dc
JS
961#ifdef CONFIG_ACPI
962static int tpm_check_resource(struct acpi_resource *ares, void *data)
963{
964 struct tpm_info *tpm_info = (struct tpm_info *) data;
965 struct resource res;
966
967 if (acpi_dev_resource_interrupt(ares, 0, &res)) {
968 tpm_info->irq = res.start;
969 } else if (acpi_dev_resource_memory(ares, &res)) {
970 tpm_info->start = res.start;
971 tpm_info->len = resource_size(&res);
972 }
973
974 return 1;
975}
976
977static int tpm_tis_acpi_init(struct acpi_device *acpi_dev)
978{
979 struct list_head resources;
980 struct tpm_info tpm_info = tis_default_info;
981 int ret;
982
983 if (!is_fifo(acpi_dev))
984 return -ENODEV;
985
986 INIT_LIST_HEAD(&resources);
987 ret = acpi_dev_get_resources(acpi_dev, &resources, tpm_check_resource,
988 &tpm_info);
989 if (ret < 0)
990 return ret;
991
992 acpi_dev_free_resource_list(&resources);
993
994 if (!tpm_info.irq)
995 interrupts = false;
996
997 if (is_itpm(acpi_dev))
998 itpm = true;
999
1000 return tpm_tis_init(&acpi_dev->dev, &tpm_info, acpi_dev->handle);
1001}
1002
1003static int tpm_tis_acpi_remove(struct acpi_device *dev)
1004{
1005 struct tpm_chip *chip = dev_get_drvdata(&dev->dev);
1006
1007 tpm_chip_unregister(chip);
1008 tpm_tis_remove(chip);
1009
1010 return 0;
1011}
1012
1013static struct acpi_device_id tpm_acpi_tbl[] = {
1014 {"MSFT0101", 0}, /* TPM 2.0 */
1015 /* Add new here */
1016 {"", 0}, /* User Specified */
1017 {"", 0} /* Terminator */
1018};
1019MODULE_DEVICE_TABLE(acpi, tpm_acpi_tbl);
1020
1021static struct acpi_driver tis_acpi_driver = {
1022 .name = "tpm_tis",
1023 .ids = tpm_acpi_tbl,
1024 .ops = {
1025 .add = tpm_tis_acpi_init,
1026 .remove = tpm_tis_acpi_remove,
1027 },
1028 .drv = {
1029 .pm = &tpm_tis_pm,
1030 },
1031};
1032#endif
1033
7a192ec3
ML
1034static struct platform_driver tis_drv = {
1035 .driver = {
afb5abc2 1036 .name = "tpm_tis",
b633f050 1037 .pm = &tpm_tis_pm,
7a192ec3 1038 },
9e323d3e
KJH
1039};
1040
1041static struct platform_device *pdev;
1042
90ab5ee9 1043static bool force;
9e323d3e
KJH
1044module_param(force, bool, 0444);
1045MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
27084efe
LD
1046static int __init init_tis(void)
1047{
9e323d3e 1048 int rc;
7f2ab000 1049#ifdef CONFIG_PNP
399235dc
JS
1050 if (!force) {
1051 rc = pnp_register_driver(&tis_pnp_driver);
1052 if (rc)
1053 return rc;
1054 }
1055#endif
1056#ifdef CONFIG_ACPI
1057 if (!force) {
1058 rc = acpi_bus_register_driver(&tis_acpi_driver);
1059 if (rc) {
1060#ifdef CONFIG_PNP
1061 pnp_unregister_driver(&tis_pnp_driver);
7f2ab000 1062#endif
399235dc
JS
1063 return rc;
1064 }
1065 }
1066#endif
1067 if (!force)
1068 return 0;
9e323d3e 1069
7f2ab000
RA
1070 rc = platform_driver_register(&tis_drv);
1071 if (rc < 0)
9e323d3e 1072 return rc;
4fba3c3b
WY
1073 pdev = platform_device_register_simple("tpm_tis", -1, NULL, 0);
1074 if (IS_ERR(pdev)) {
1075 rc = PTR_ERR(pdev);
1076 goto err_dev;
9e323d3e 1077 }
399235dc 1078 rc = tpm_tis_init(&pdev->dev, &tis_default_info, NULL);
4fba3c3b
WY
1079 if (rc)
1080 goto err_init;
1081 return 0;
1082err_init:
1083 platform_device_unregister(pdev);
1084err_dev:
1085 platform_driver_unregister(&tis_drv);
7f2ab000 1086 return rc;
27084efe
LD
1087}
1088
1089static void __exit cleanup_tis(void)
1090{
27084efe 1091 struct tpm_chip *chip;
399235dc 1092#if defined(CONFIG_PNP) || defined(CONFIG_ACPI)
7f2ab000 1093 if (!force) {
399235dc
JS
1094#ifdef CONFIG_ACPI
1095 acpi_bus_unregister_driver(&tis_acpi_driver);
1096#endif
1097#ifdef CONFIG_PNP
9e323d3e 1098 pnp_unregister_driver(&tis_pnp_driver);
399235dc 1099#endif
7f2ab000
RA
1100 return;
1101 }
1102#endif
afb5abc2
JS
1103 chip = dev_get_drvdata(&pdev->dev);
1104 tpm_chip_unregister(chip);
1105 tpm_tis_remove(chip);
7f2ab000
RA
1106 platform_device_unregister(pdev);
1107 platform_driver_unregister(&tis_drv);
27084efe
LD
1108}
1109
1110module_init(init_tis);
1111module_exit(cleanup_tis);
1112MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
1113MODULE_DESCRIPTION("TPM Driver");
1114MODULE_VERSION("2.0");
1115MODULE_LICENSE("GPL");
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