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ef141a0b SN |
1 | /***************************************************************************** |
2 | * | |
3 | * Author: Xilinx, Inc. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License as published by the | |
7 | * Free Software Foundation; either version 2 of the License, or (at your | |
8 | * option) any later version. | |
9 | * | |
10 | * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" | |
11 | * AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND | |
12 | * SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, | |
13 | * OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, | |
14 | * APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION | |
15 | * THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, | |
16 | * AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE | |
17 | * FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY | |
18 | * WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE | |
19 | * IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR | |
20 | * REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF | |
21 | * INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS | |
22 | * FOR A PARTICULAR PURPOSE. | |
23 | * | |
ef141a0b SN |
24 | * (c) Copyright 2002 Xilinx Inc., Systems Engineering Group |
25 | * (c) Copyright 2004 Xilinx Inc., Systems Engineering Group | |
26 | * (c) Copyright 2007-2008 Xilinx Inc. | |
27 | * All rights reserved. | |
28 | * | |
29 | * You should have received a copy of the GNU General Public License along | |
30 | * with this program; if not, write to the Free Software Foundation, Inc., | |
31 | * 675 Mass Ave, Cambridge, MA 02139, USA. | |
32 | * | |
33 | *****************************************************************************/ | |
34 | ||
35 | /* | |
ac646734 | 36 | * This is the code behind /dev/icap* -- it allows a user-space |
ef141a0b SN |
37 | * application to use the Xilinx ICAP subsystem. |
38 | * | |
39 | * The following operations are possible: | |
40 | * | |
41 | * open open the port and initialize for access. | |
42 | * release release port | |
43 | * write Write a bitstream to the configuration processor. | |
44 | * read Read a data stream from the configuration processor. | |
45 | * | |
46 | * After being opened, the port is initialized and accessed to avoid a | |
47 | * corrupted first read which may occur with some hardware. The port | |
48 | * is left in a desynched state, requiring that a synch sequence be | |
49 | * transmitted before any valid configuration data. A user will have | |
50 | * exclusive access to the device while it remains open, and the state | |
51 | * of the ICAP cannot be guaranteed after the device is closed. Note | |
52 | * that a complete reset of the core and the state of the ICAP cannot | |
53 | * be performed on many versions of the cores, hence users of this | |
54 | * device should avoid making inconsistent accesses to the device. In | |
55 | * particular, accessing the read interface, without first generating | |
56 | * a write containing a readback packet can leave the ICAP in an | |
57 | * inaccessible state. | |
58 | * | |
59 | * Note that in order to use the read interface, it is first necessary | |
60 | * to write a request packet to the write interface. i.e., it is not | |
61 | * possible to simply readback the bitstream (or any configuration | |
62 | * bits) from a device without specifically requesting them first. | |
63 | * The code to craft such packets is intended to be part of the | |
64 | * user-space application code that uses this device. The simplest | |
65 | * way to use this interface is simply: | |
66 | * | |
ac646734 | 67 | * cp foo.bit /dev/icap0 |
ef141a0b SN |
68 | * |
69 | * Note that unless foo.bit is an appropriately constructed partial | |
25985edc | 70 | * bitstream, this has a high likelihood of overwriting the design |
ef141a0b SN |
71 | * currently programmed in the FPGA. |
72 | */ | |
73 | ||
ef141a0b SN |
74 | #include <linux/module.h> |
75 | #include <linux/kernel.h> | |
76 | #include <linux/types.h> | |
77 | #include <linux/ioport.h> | |
78 | #include <linux/interrupt.h> | |
79 | #include <linux/fcntl.h> | |
80 | #include <linux/init.h> | |
81 | #include <linux/poll.h> | |
82 | #include <linux/proc_fs.h> | |
f62f2fdd | 83 | #include <linux/mutex.h> |
ef141a0b | 84 | #include <linux/sysctl.h> |
ef141a0b SN |
85 | #include <linux/fs.h> |
86 | #include <linux/cdev.h> | |
87 | #include <linux/platform_device.h> | |
5a0e3ad6 | 88 | #include <linux/slab.h> |
ef141a0b SN |
89 | |
90 | #include <asm/io.h> | |
91 | #include <asm/uaccess.h> | |
ef141a0b SN |
92 | |
93 | #ifdef CONFIG_OF | |
94 | /* For open firmware. */ | |
f1ca09b2 | 95 | #include <linux/of_address.h> |
ef141a0b SN |
96 | #include <linux/of_device.h> |
97 | #include <linux/of_platform.h> | |
98 | #endif | |
99 | ||
100 | #include "xilinx_hwicap.h" | |
101 | #include "buffer_icap.h" | |
102 | #include "fifo_icap.h" | |
103 | ||
ac646734 | 104 | #define DRIVER_NAME "icap" |
ef141a0b SN |
105 | |
106 | #define HWICAP_REGS (0x10000) | |
107 | ||
ac646734 SN |
108 | #define XHWICAP_MAJOR 259 |
109 | #define XHWICAP_MINOR 0 | |
ef141a0b SN |
110 | #define HWICAP_DEVICES 1 |
111 | ||
ef141a0b | 112 | /* An array, which is set to true when the device is registered. */ |
613655fa | 113 | static DEFINE_MUTEX(hwicap_mutex); |
ef141a0b | 114 | static bool probed_devices[HWICAP_DEVICES]; |
f62f2fdd | 115 | static struct mutex icap_sem; |
ef141a0b SN |
116 | |
117 | static struct class *icap_class; | |
118 | ||
119 | #define UNIMPLEMENTED 0xFFFF | |
120 | ||
121 | static const struct config_registers v2_config_registers = { | |
122 | .CRC = 0, | |
123 | .FAR = 1, | |
124 | .FDRI = 2, | |
125 | .FDRO = 3, | |
126 | .CMD = 4, | |
127 | .CTL = 5, | |
128 | .MASK = 6, | |
129 | .STAT = 7, | |
130 | .LOUT = 8, | |
131 | .COR = 9, | |
132 | .MFWR = 10, | |
133 | .FLR = 11, | |
134 | .KEY = 12, | |
135 | .CBC = 13, | |
136 | .IDCODE = 14, | |
137 | .AXSS = UNIMPLEMENTED, | |
138 | .C0R_1 = UNIMPLEMENTED, | |
139 | .CSOB = UNIMPLEMENTED, | |
140 | .WBSTAR = UNIMPLEMENTED, | |
141 | .TIMER = UNIMPLEMENTED, | |
142 | .BOOTSTS = UNIMPLEMENTED, | |
143 | .CTL_1 = UNIMPLEMENTED, | |
144 | }; | |
145 | ||
146 | static const struct config_registers v4_config_registers = { | |
147 | .CRC = 0, | |
148 | .FAR = 1, | |
149 | .FDRI = 2, | |
150 | .FDRO = 3, | |
151 | .CMD = 4, | |
152 | .CTL = 5, | |
153 | .MASK = 6, | |
154 | .STAT = 7, | |
155 | .LOUT = 8, | |
156 | .COR = 9, | |
157 | .MFWR = 10, | |
158 | .FLR = UNIMPLEMENTED, | |
159 | .KEY = UNIMPLEMENTED, | |
160 | .CBC = 11, | |
161 | .IDCODE = 12, | |
162 | .AXSS = 13, | |
163 | .C0R_1 = UNIMPLEMENTED, | |
164 | .CSOB = UNIMPLEMENTED, | |
165 | .WBSTAR = UNIMPLEMENTED, | |
166 | .TIMER = UNIMPLEMENTED, | |
167 | .BOOTSTS = UNIMPLEMENTED, | |
168 | .CTL_1 = UNIMPLEMENTED, | |
169 | }; | |
73eb94a0 | 170 | |
ef141a0b SN |
171 | static const struct config_registers v5_config_registers = { |
172 | .CRC = 0, | |
173 | .FAR = 1, | |
174 | .FDRI = 2, | |
175 | .FDRO = 3, | |
176 | .CMD = 4, | |
177 | .CTL = 5, | |
178 | .MASK = 6, | |
179 | .STAT = 7, | |
180 | .LOUT = 8, | |
181 | .COR = 9, | |
182 | .MFWR = 10, | |
183 | .FLR = UNIMPLEMENTED, | |
184 | .KEY = UNIMPLEMENTED, | |
185 | .CBC = 11, | |
186 | .IDCODE = 12, | |
187 | .AXSS = 13, | |
188 | .C0R_1 = 14, | |
189 | .CSOB = 15, | |
190 | .WBSTAR = 16, | |
191 | .TIMER = 17, | |
192 | .BOOTSTS = 18, | |
193 | .CTL_1 = 19, | |
194 | }; | |
195 | ||
73eb94a0 DB |
196 | static const struct config_registers v6_config_registers = { |
197 | .CRC = 0, | |
198 | .FAR = 1, | |
199 | .FDRI = 2, | |
200 | .FDRO = 3, | |
201 | .CMD = 4, | |
202 | .CTL = 5, | |
203 | .MASK = 6, | |
204 | .STAT = 7, | |
205 | .LOUT = 8, | |
206 | .COR = 9, | |
207 | .MFWR = 10, | |
208 | .FLR = UNIMPLEMENTED, | |
209 | .KEY = UNIMPLEMENTED, | |
210 | .CBC = 11, | |
211 | .IDCODE = 12, | |
212 | .AXSS = 13, | |
213 | .C0R_1 = 14, | |
214 | .CSOB = 15, | |
215 | .WBSTAR = 16, | |
216 | .TIMER = 17, | |
217 | .BOOTSTS = 22, | |
218 | .CTL_1 = 24, | |
219 | }; | |
220 | ||
ef141a0b | 221 | /** |
f62f2fdd SN |
222 | * hwicap_command_desync - Send a DESYNC command to the ICAP port. |
223 | * @drvdata: a pointer to the drvdata. | |
ef141a0b SN |
224 | * |
225 | * This command desynchronizes the ICAP After this command, a | |
226 | * bitstream containing a NULL packet, followed by a SYNCH packet is | |
227 | * required before the ICAP will recognize commands. | |
228 | */ | |
f62f2fdd | 229 | static int hwicap_command_desync(struct hwicap_drvdata *drvdata) |
ef141a0b SN |
230 | { |
231 | u32 buffer[4]; | |
232 | u32 index = 0; | |
233 | ||
234 | /* | |
235 | * Create the data to be written to the ICAP. | |
236 | */ | |
237 | buffer[index++] = hwicap_type_1_write(drvdata->config_regs->CMD) | 1; | |
238 | buffer[index++] = XHI_CMD_DESYNCH; | |
239 | buffer[index++] = XHI_NOOP_PACKET; | |
240 | buffer[index++] = XHI_NOOP_PACKET; | |
241 | ||
242 | /* | |
243 | * Write the data to the FIFO and intiate the transfer of data present | |
244 | * in the FIFO to the ICAP device. | |
245 | */ | |
246 | return drvdata->config->set_configuration(drvdata, | |
247 | &buffer[0], index); | |
248 | } | |
249 | ||
250 | /** | |
f62f2fdd SN |
251 | * hwicap_get_configuration_register - Query a configuration register. |
252 | * @drvdata: a pointer to the drvdata. | |
253 | * @reg: a constant which represents the configuration | |
ef141a0b SN |
254 | * register value to be returned. |
255 | * Examples: XHI_IDCODE, XHI_FLR. | |
f62f2fdd | 256 | * @reg_data: returns the value of the register. |
ef141a0b SN |
257 | * |
258 | * Sends a query packet to the ICAP and then receives the response. | |
259 | * The icap is left in Synched state. | |
260 | */ | |
f62f2fdd SN |
261 | static int hwicap_get_configuration_register(struct hwicap_drvdata *drvdata, |
262 | u32 reg, u32 *reg_data) | |
ef141a0b SN |
263 | { |
264 | int status; | |
265 | u32 buffer[6]; | |
266 | u32 index = 0; | |
267 | ||
268 | /* | |
269 | * Create the data to be written to the ICAP. | |
270 | */ | |
271 | buffer[index++] = XHI_DUMMY_PACKET; | |
4c58f8fe | 272 | buffer[index++] = XHI_NOOP_PACKET; |
ef141a0b SN |
273 | buffer[index++] = XHI_SYNC_PACKET; |
274 | buffer[index++] = XHI_NOOP_PACKET; | |
4c58f8fe SN |
275 | buffer[index++] = XHI_NOOP_PACKET; |
276 | ||
277 | /* | |
278 | * Write the data to the FIFO and initiate the transfer of data present | |
279 | * in the FIFO to the ICAP device. | |
280 | */ | |
281 | status = drvdata->config->set_configuration(drvdata, | |
282 | &buffer[0], index); | |
283 | if (status) | |
284 | return status; | |
285 | ||
286 | /* If the syncword was not found, then we need to start over. */ | |
287 | status = drvdata->config->get_status(drvdata); | |
288 | if ((status & XHI_SR_DALIGN_MASK) != XHI_SR_DALIGN_MASK) | |
289 | return -EIO; | |
290 | ||
291 | index = 0; | |
ef141a0b SN |
292 | buffer[index++] = hwicap_type_1_read(reg) | 1; |
293 | buffer[index++] = XHI_NOOP_PACKET; | |
294 | buffer[index++] = XHI_NOOP_PACKET; | |
295 | ||
296 | /* | |
297 | * Write the data to the FIFO and intiate the transfer of data present | |
298 | * in the FIFO to the ICAP device. | |
299 | */ | |
300 | status = drvdata->config->set_configuration(drvdata, | |
301 | &buffer[0], index); | |
302 | if (status) | |
303 | return status; | |
304 | ||
305 | /* | |
306 | * Read the configuration register | |
307 | */ | |
f62f2fdd | 308 | status = drvdata->config->get_configuration(drvdata, reg_data, 1); |
ef141a0b SN |
309 | if (status) |
310 | return status; | |
311 | ||
312 | return 0; | |
313 | } | |
314 | ||
f62f2fdd | 315 | static int hwicap_initialize_hwicap(struct hwicap_drvdata *drvdata) |
ef141a0b SN |
316 | { |
317 | int status; | |
318 | u32 idcode; | |
319 | ||
320 | dev_dbg(drvdata->dev, "initializing\n"); | |
321 | ||
322 | /* Abort any current transaction, to make sure we have the | |
323 | * ICAP in a good state. */ | |
324 | dev_dbg(drvdata->dev, "Reset...\n"); | |
325 | drvdata->config->reset(drvdata); | |
326 | ||
327 | dev_dbg(drvdata->dev, "Desync...\n"); | |
328 | status = hwicap_command_desync(drvdata); | |
329 | if (status) | |
330 | return status; | |
331 | ||
332 | /* Attempt to read the IDCODE from ICAP. This | |
333 | * may not be returned correctly, due to the design of the | |
334 | * hardware. | |
335 | */ | |
336 | dev_dbg(drvdata->dev, "Reading IDCODE...\n"); | |
337 | status = hwicap_get_configuration_register( | |
338 | drvdata, drvdata->config_regs->IDCODE, &idcode); | |
339 | dev_dbg(drvdata->dev, "IDCODE = %x\n", idcode); | |
340 | if (status) | |
341 | return status; | |
342 | ||
343 | dev_dbg(drvdata->dev, "Desync...\n"); | |
344 | status = hwicap_command_desync(drvdata); | |
345 | if (status) | |
346 | return status; | |
347 | ||
348 | return 0; | |
349 | } | |
350 | ||
351 | static ssize_t | |
f62f2fdd | 352 | hwicap_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) |
ef141a0b SN |
353 | { |
354 | struct hwicap_drvdata *drvdata = file->private_data; | |
355 | ssize_t bytes_to_read = 0; | |
356 | u32 *kbuf; | |
357 | u32 words; | |
358 | u32 bytes_remaining; | |
359 | int status; | |
360 | ||
f62f2fdd SN |
361 | status = mutex_lock_interruptible(&drvdata->sem); |
362 | if (status) | |
363 | return status; | |
ef141a0b SN |
364 | |
365 | if (drvdata->read_buffer_in_use) { | |
366 | /* If there are leftover bytes in the buffer, just */ | |
367 | /* return them and don't try to read more from the */ | |
368 | /* ICAP device. */ | |
369 | bytes_to_read = | |
370 | (count < drvdata->read_buffer_in_use) ? count : | |
371 | drvdata->read_buffer_in_use; | |
372 | ||
373 | /* Return the data currently in the read buffer. */ | |
374 | if (copy_to_user(buf, drvdata->read_buffer, bytes_to_read)) { | |
375 | status = -EFAULT; | |
376 | goto error; | |
377 | } | |
378 | drvdata->read_buffer_in_use -= bytes_to_read; | |
f62f2fdd SN |
379 | memmove(drvdata->read_buffer, |
380 | drvdata->read_buffer + bytes_to_read, | |
381 | 4 - bytes_to_read); | |
ef141a0b SN |
382 | } else { |
383 | /* Get new data from the ICAP, and return was was requested. */ | |
384 | kbuf = (u32 *) get_zeroed_page(GFP_KERNEL); | |
385 | if (!kbuf) { | |
386 | status = -ENOMEM; | |
387 | goto error; | |
388 | } | |
389 | ||
390 | /* The ICAP device is only able to read complete */ | |
391 | /* words. If a number of bytes that do not correspond */ | |
392 | /* to complete words is requested, then we read enough */ | |
393 | /* words to get the required number of bytes, and then */ | |
394 | /* save the remaining bytes for the next read. */ | |
395 | ||
396 | /* Determine the number of words to read, rounding up */ | |
397 | /* if necessary. */ | |
398 | words = ((count + 3) >> 2); | |
399 | bytes_to_read = words << 2; | |
400 | ||
401 | if (bytes_to_read > PAGE_SIZE) | |
402 | bytes_to_read = PAGE_SIZE; | |
403 | ||
404 | /* Ensure we only read a complete number of words. */ | |
405 | bytes_remaining = bytes_to_read & 3; | |
406 | bytes_to_read &= ~3; | |
407 | words = bytes_to_read >> 2; | |
408 | ||
409 | status = drvdata->config->get_configuration(drvdata, | |
410 | kbuf, words); | |
411 | ||
412 | /* If we didn't read correctly, then bail out. */ | |
413 | if (status) { | |
414 | free_page((unsigned long)kbuf); | |
415 | goto error; | |
416 | } | |
417 | ||
418 | /* If we fail to return the data to the user, then bail out. */ | |
419 | if (copy_to_user(buf, kbuf, bytes_to_read)) { | |
420 | free_page((unsigned long)kbuf); | |
421 | status = -EFAULT; | |
422 | goto error; | |
423 | } | |
f62f2fdd SN |
424 | memcpy(drvdata->read_buffer, |
425 | kbuf, | |
426 | bytes_remaining); | |
ef141a0b SN |
427 | drvdata->read_buffer_in_use = bytes_remaining; |
428 | free_page((unsigned long)kbuf); | |
429 | } | |
430 | status = bytes_to_read; | |
431 | error: | |
f62f2fdd | 432 | mutex_unlock(&drvdata->sem); |
ef141a0b SN |
433 | return status; |
434 | } | |
435 | ||
436 | static ssize_t | |
f62f2fdd | 437 | hwicap_write(struct file *file, const char __user *buf, |
ef141a0b SN |
438 | size_t count, loff_t *ppos) |
439 | { | |
440 | struct hwicap_drvdata *drvdata = file->private_data; | |
441 | ssize_t written = 0; | |
442 | ssize_t left = count; | |
443 | u32 *kbuf; | |
444 | ssize_t len; | |
445 | ssize_t status; | |
446 | ||
f62f2fdd SN |
447 | status = mutex_lock_interruptible(&drvdata->sem); |
448 | if (status) | |
449 | return status; | |
ef141a0b SN |
450 | |
451 | left += drvdata->write_buffer_in_use; | |
452 | ||
453 | /* Only write multiples of 4 bytes. */ | |
454 | if (left < 4) { | |
455 | status = 0; | |
456 | goto error; | |
457 | } | |
458 | ||
459 | kbuf = (u32 *) __get_free_page(GFP_KERNEL); | |
460 | if (!kbuf) { | |
461 | status = -ENOMEM; | |
462 | goto error; | |
463 | } | |
464 | ||
465 | while (left > 3) { | |
466 | /* only write multiples of 4 bytes, so there might */ | |
467 | /* be as many as 3 bytes left (at the end). */ | |
468 | len = left; | |
469 | ||
470 | if (len > PAGE_SIZE) | |
471 | len = PAGE_SIZE; | |
472 | len &= ~3; | |
473 | ||
474 | if (drvdata->write_buffer_in_use) { | |
475 | memcpy(kbuf, drvdata->write_buffer, | |
476 | drvdata->write_buffer_in_use); | |
477 | if (copy_from_user( | |
f62f2fdd | 478 | (((char *)kbuf) + drvdata->write_buffer_in_use), |
ef141a0b SN |
479 | buf + written, |
480 | len - (drvdata->write_buffer_in_use))) { | |
481 | free_page((unsigned long)kbuf); | |
482 | status = -EFAULT; | |
483 | goto error; | |
484 | } | |
485 | } else { | |
486 | if (copy_from_user(kbuf, buf + written, len)) { | |
487 | free_page((unsigned long)kbuf); | |
488 | status = -EFAULT; | |
489 | goto error; | |
490 | } | |
491 | } | |
492 | ||
493 | status = drvdata->config->set_configuration(drvdata, | |
494 | kbuf, len >> 2); | |
495 | ||
496 | if (status) { | |
497 | free_page((unsigned long)kbuf); | |
498 | status = -EFAULT; | |
499 | goto error; | |
500 | } | |
501 | if (drvdata->write_buffer_in_use) { | |
502 | len -= drvdata->write_buffer_in_use; | |
503 | left -= drvdata->write_buffer_in_use; | |
504 | drvdata->write_buffer_in_use = 0; | |
505 | } | |
506 | written += len; | |
507 | left -= len; | |
508 | } | |
509 | if ((left > 0) && (left < 4)) { | |
510 | if (!copy_from_user(drvdata->write_buffer, | |
511 | buf + written, left)) { | |
512 | drvdata->write_buffer_in_use = left; | |
513 | written += left; | |
514 | left = 0; | |
515 | } | |
516 | } | |
517 | ||
518 | free_page((unsigned long)kbuf); | |
519 | status = written; | |
520 | error: | |
f62f2fdd | 521 | mutex_unlock(&drvdata->sem); |
ef141a0b SN |
522 | return status; |
523 | } | |
524 | ||
525 | static int hwicap_open(struct inode *inode, struct file *file) | |
526 | { | |
527 | struct hwicap_drvdata *drvdata; | |
528 | int status; | |
529 | ||
613655fa | 530 | mutex_lock(&hwicap_mutex); |
ef141a0b SN |
531 | drvdata = container_of(inode->i_cdev, struct hwicap_drvdata, cdev); |
532 | ||
f62f2fdd SN |
533 | status = mutex_lock_interruptible(&drvdata->sem); |
534 | if (status) | |
f4943db1 | 535 | goto out; |
ef141a0b SN |
536 | |
537 | if (drvdata->is_open) { | |
538 | status = -EBUSY; | |
539 | goto error; | |
540 | } | |
541 | ||
542 | status = hwicap_initialize_hwicap(drvdata); | |
543 | if (status) { | |
544 | dev_err(drvdata->dev, "Failed to open file"); | |
545 | goto error; | |
546 | } | |
547 | ||
548 | file->private_data = drvdata; | |
549 | drvdata->write_buffer_in_use = 0; | |
550 | drvdata->read_buffer_in_use = 0; | |
551 | drvdata->is_open = 1; | |
552 | ||
553 | error: | |
f62f2fdd | 554 | mutex_unlock(&drvdata->sem); |
f4943db1 | 555 | out: |
613655fa | 556 | mutex_unlock(&hwicap_mutex); |
ef141a0b SN |
557 | return status; |
558 | } | |
559 | ||
560 | static int hwicap_release(struct inode *inode, struct file *file) | |
561 | { | |
562 | struct hwicap_drvdata *drvdata = file->private_data; | |
563 | int i; | |
564 | int status = 0; | |
565 | ||
f62f2fdd | 566 | mutex_lock(&drvdata->sem); |
ef141a0b SN |
567 | |
568 | if (drvdata->write_buffer_in_use) { | |
569 | /* Flush write buffer. */ | |
570 | for (i = drvdata->write_buffer_in_use; i < 4; i++) | |
571 | drvdata->write_buffer[i] = 0; | |
572 | ||
573 | status = drvdata->config->set_configuration(drvdata, | |
574 | (u32 *) drvdata->write_buffer, 1); | |
575 | if (status) | |
576 | goto error; | |
577 | } | |
578 | ||
579 | status = hwicap_command_desync(drvdata); | |
580 | if (status) | |
581 | goto error; | |
582 | ||
583 | error: | |
584 | drvdata->is_open = 0; | |
f62f2fdd | 585 | mutex_unlock(&drvdata->sem); |
ef141a0b SN |
586 | return status; |
587 | } | |
588 | ||
828c0950 | 589 | static const struct file_operations hwicap_fops = { |
ef141a0b SN |
590 | .owner = THIS_MODULE, |
591 | .write = hwicap_write, | |
592 | .read = hwicap_read, | |
593 | .open = hwicap_open, | |
594 | .release = hwicap_release, | |
6038f373 | 595 | .llseek = noop_llseek, |
ef141a0b SN |
596 | }; |
597 | ||
2223cbec | 598 | static int hwicap_setup(struct device *dev, int id, |
ef141a0b SN |
599 | const struct resource *regs_res, |
600 | const struct hwicap_driver_config *config, | |
601 | const struct config_registers *config_regs) | |
602 | { | |
603 | dev_t devt; | |
604 | struct hwicap_drvdata *drvdata = NULL; | |
605 | int retval = 0; | |
606 | ||
607 | dev_info(dev, "Xilinx icap port driver\n"); | |
608 | ||
f62f2fdd SN |
609 | mutex_lock(&icap_sem); |
610 | ||
ef141a0b SN |
611 | if (id < 0) { |
612 | for (id = 0; id < HWICAP_DEVICES; id++) | |
613 | if (!probed_devices[id]) | |
614 | break; | |
615 | } | |
616 | if (id < 0 || id >= HWICAP_DEVICES) { | |
f62f2fdd | 617 | mutex_unlock(&icap_sem); |
ef141a0b SN |
618 | dev_err(dev, "%s%i too large\n", DRIVER_NAME, id); |
619 | return -EINVAL; | |
620 | } | |
621 | if (probed_devices[id]) { | |
f62f2fdd | 622 | mutex_unlock(&icap_sem); |
ef141a0b SN |
623 | dev_err(dev, "cannot assign to %s%i; it is already in use\n", |
624 | DRIVER_NAME, id); | |
625 | return -EBUSY; | |
626 | } | |
627 | ||
628 | probed_devices[id] = 1; | |
f62f2fdd | 629 | mutex_unlock(&icap_sem); |
ef141a0b | 630 | |
ac646734 | 631 | devt = MKDEV(XHWICAP_MAJOR, XHWICAP_MINOR + id); |
ef141a0b | 632 | |
f62f2fdd | 633 | drvdata = kzalloc(sizeof(struct hwicap_drvdata), GFP_KERNEL); |
ef141a0b SN |
634 | if (!drvdata) { |
635 | dev_err(dev, "Couldn't allocate device private record\n"); | |
f62f2fdd SN |
636 | retval = -ENOMEM; |
637 | goto failed0; | |
ef141a0b | 638 | } |
ef141a0b SN |
639 | dev_set_drvdata(dev, (void *)drvdata); |
640 | ||
641 | if (!regs_res) { | |
642 | dev_err(dev, "Couldn't get registers resource\n"); | |
643 | retval = -EFAULT; | |
644 | goto failed1; | |
645 | } | |
646 | ||
647 | drvdata->mem_start = regs_res->start; | |
648 | drvdata->mem_end = regs_res->end; | |
28f65c11 | 649 | drvdata->mem_size = resource_size(regs_res); |
ef141a0b SN |
650 | |
651 | if (!request_mem_region(drvdata->mem_start, | |
652 | drvdata->mem_size, DRIVER_NAME)) { | |
b17b8181 | 653 | dev_err(dev, "Couldn't lock memory region at %Lx\n", |
a1080968 | 654 | (unsigned long long) regs_res->start); |
ef141a0b SN |
655 | retval = -EBUSY; |
656 | goto failed1; | |
657 | } | |
658 | ||
659 | drvdata->devt = devt; | |
660 | drvdata->dev = dev; | |
661 | drvdata->base_address = ioremap(drvdata->mem_start, drvdata->mem_size); | |
662 | if (!drvdata->base_address) { | |
663 | dev_err(dev, "ioremap() failed\n"); | |
8a26af30 | 664 | retval = -ENOMEM; |
ef141a0b SN |
665 | goto failed2; |
666 | } | |
667 | ||
668 | drvdata->config = config; | |
669 | drvdata->config_regs = config_regs; | |
670 | ||
f62f2fdd | 671 | mutex_init(&drvdata->sem); |
ef141a0b SN |
672 | drvdata->is_open = 0; |
673 | ||
a1080968 GL |
674 | dev_info(dev, "ioremap %llx to %p with size %llx\n", |
675 | (unsigned long long) drvdata->mem_start, | |
676 | drvdata->base_address, | |
677 | (unsigned long long) drvdata->mem_size); | |
ef141a0b SN |
678 | |
679 | cdev_init(&drvdata->cdev, &hwicap_fops); | |
680 | drvdata->cdev.owner = THIS_MODULE; | |
681 | retval = cdev_add(&drvdata->cdev, devt, 1); | |
682 | if (retval) { | |
683 | dev_err(dev, "cdev_add() failed\n"); | |
684 | goto failed3; | |
685 | } | |
47aa5793 | 686 | |
03457cd4 | 687 | device_create(icap_class, dev, devt, NULL, "%s%d", DRIVER_NAME, id); |
ef141a0b SN |
688 | return 0; /* success */ |
689 | ||
690 | failed3: | |
691 | iounmap(drvdata->base_address); | |
692 | ||
693 | failed2: | |
694 | release_mem_region(regs_res->start, drvdata->mem_size); | |
695 | ||
696 | failed1: | |
697 | kfree(drvdata); | |
698 | ||
f62f2fdd SN |
699 | failed0: |
700 | mutex_lock(&icap_sem); | |
701 | probed_devices[id] = 0; | |
702 | mutex_unlock(&icap_sem); | |
703 | ||
ef141a0b SN |
704 | return retval; |
705 | } | |
706 | ||
707 | static struct hwicap_driver_config buffer_icap_config = { | |
708 | .get_configuration = buffer_icap_get_configuration, | |
709 | .set_configuration = buffer_icap_set_configuration, | |
6b06fdba | 710 | .get_status = buffer_icap_get_status, |
ef141a0b SN |
711 | .reset = buffer_icap_reset, |
712 | }; | |
713 | ||
714 | static struct hwicap_driver_config fifo_icap_config = { | |
715 | .get_configuration = fifo_icap_get_configuration, | |
716 | .set_configuration = fifo_icap_set_configuration, | |
6b06fdba | 717 | .get_status = fifo_icap_get_status, |
ef141a0b SN |
718 | .reset = fifo_icap_reset, |
719 | }; | |
720 | ||
39af33fc | 721 | static int hwicap_remove(struct device *dev) |
ef141a0b SN |
722 | { |
723 | struct hwicap_drvdata *drvdata; | |
724 | ||
20055477 | 725 | drvdata = dev_get_drvdata(dev); |
ef141a0b SN |
726 | |
727 | if (!drvdata) | |
728 | return 0; | |
729 | ||
f62f2fdd | 730 | device_destroy(icap_class, drvdata->devt); |
ef141a0b SN |
731 | cdev_del(&drvdata->cdev); |
732 | iounmap(drvdata->base_address); | |
733 | release_mem_region(drvdata->mem_start, drvdata->mem_size); | |
734 | kfree(drvdata); | |
ef141a0b | 735 | |
f62f2fdd | 736 | mutex_lock(&icap_sem); |
ac646734 | 737 | probed_devices[MINOR(dev->devt)-XHWICAP_MINOR] = 0; |
f62f2fdd | 738 | mutex_unlock(&icap_sem); |
ef141a0b SN |
739 | return 0; /* success */ |
740 | } | |
741 | ||
55f19d56 | 742 | #ifdef CONFIG_OF |
2223cbec | 743 | static int hwicap_of_probe(struct platform_device *op, |
b1608d69 | 744 | const struct hwicap_driver_config *config) |
ef141a0b | 745 | { |
55f19d56 GL |
746 | struct resource res; |
747 | const unsigned int *id; | |
ef141a0b | 748 | const char *family; |
55f19d56 | 749 | int rc; |
55f19d56 | 750 | const struct config_registers *regs; |
ef141a0b | 751 | |
55f19d56 GL |
752 | |
753 | rc = of_address_to_resource(op->dev.of_node, 0, &res); | |
754 | if (rc) { | |
755 | dev_err(&op->dev, "invalid address\n"); | |
756 | return rc; | |
757 | } | |
758 | ||
759 | id = of_get_property(op->dev.of_node, "port-number", NULL); | |
ef141a0b SN |
760 | |
761 | /* It's most likely that we're using V4, if the family is not | |
762 | specified */ | |
763 | regs = &v4_config_registers; | |
55f19d56 | 764 | family = of_get_property(op->dev.of_node, "xlnx,family", NULL); |
ef141a0b SN |
765 | |
766 | if (family) { | |
767 | if (!strcmp(family, "virtex2p")) { | |
768 | regs = &v2_config_registers; | |
769 | } else if (!strcmp(family, "virtex4")) { | |
770 | regs = &v4_config_registers; | |
771 | } else if (!strcmp(family, "virtex5")) { | |
772 | regs = &v5_config_registers; | |
73eb94a0 DB |
773 | } else if (!strcmp(family, "virtex6")) { |
774 | regs = &v6_config_registers; | |
ef141a0b SN |
775 | } |
776 | } | |
55f19d56 GL |
777 | return hwicap_setup(&op->dev, id ? *id : -1, &res, config, |
778 | regs); | |
ef141a0b | 779 | } |
55f19d56 | 780 | #else |
b1608d69 GL |
781 | static inline int hwicap_of_probe(struct platform_device *op, |
782 | const struct hwicap_driver_config *config) | |
ef141a0b | 783 | { |
55f19d56 | 784 | return -EINVAL; |
ef141a0b | 785 | } |
55f19d56 | 786 | #endif /* CONFIG_OF */ |
ef141a0b | 787 | |
aa89ed9e | 788 | static const struct of_device_id hwicap_of_match[]; |
2223cbec | 789 | static int hwicap_drv_probe(struct platform_device *pdev) |
ef141a0b | 790 | { |
b1608d69 | 791 | const struct of_device_id *match; |
55f19d56 | 792 | struct resource *res; |
ef141a0b | 793 | const struct config_registers *regs; |
55f19d56 | 794 | const char *family; |
ef141a0b | 795 | |
b1608d69 GL |
796 | match = of_match_device(hwicap_of_match, &pdev->dev); |
797 | if (match) | |
798 | return hwicap_of_probe(pdev, match->data); | |
ef141a0b | 799 | |
55f19d56 GL |
800 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
801 | if (!res) | |
802 | return -ENODEV; | |
ef141a0b SN |
803 | |
804 | /* It's most likely that we're using V4, if the family is not | |
805 | specified */ | |
806 | regs = &v4_config_registers; | |
55f19d56 | 807 | family = pdev->dev.platform_data; |
ef141a0b SN |
808 | |
809 | if (family) { | |
810 | if (!strcmp(family, "virtex2p")) { | |
811 | regs = &v2_config_registers; | |
812 | } else if (!strcmp(family, "virtex4")) { | |
813 | regs = &v4_config_registers; | |
814 | } else if (!strcmp(family, "virtex5")) { | |
815 | regs = &v5_config_registers; | |
73eb94a0 DB |
816 | } else if (!strcmp(family, "virtex6")) { |
817 | regs = &v6_config_registers; | |
ef141a0b SN |
818 | } |
819 | } | |
55f19d56 GL |
820 | |
821 | return hwicap_setup(&pdev->dev, pdev->id, res, | |
822 | &buffer_icap_config, regs); | |
ef141a0b SN |
823 | } |
824 | ||
39af33fc | 825 | static int hwicap_drv_remove(struct platform_device *pdev) |
ef141a0b | 826 | { |
55f19d56 | 827 | return hwicap_remove(&pdev->dev); |
ef141a0b SN |
828 | } |
829 | ||
55f19d56 GL |
830 | #ifdef CONFIG_OF |
831 | /* Match table for device tree binding */ | |
aa89ed9e | 832 | static const struct of_device_id hwicap_of_match[] = { |
ef141a0b SN |
833 | { .compatible = "xlnx,opb-hwicap-1.00.b", .data = &buffer_icap_config}, |
834 | { .compatible = "xlnx,xps-hwicap-1.00.a", .data = &fifo_icap_config}, | |
835 | {}, | |
836 | }; | |
837 | MODULE_DEVICE_TABLE(of, hwicap_of_match); | |
55f19d56 GL |
838 | #else |
839 | #define hwicap_of_match NULL | |
840 | #endif | |
ef141a0b | 841 | |
55f19d56 GL |
842 | static struct platform_driver hwicap_platform_driver = { |
843 | .probe = hwicap_drv_probe, | |
844 | .remove = hwicap_drv_remove, | |
ef141a0b | 845 | .driver = { |
55f19d56 | 846 | .name = DRIVER_NAME, |
4018294b | 847 | .of_match_table = hwicap_of_match, |
ef141a0b SN |
848 | }, |
849 | }; | |
850 | ||
f62f2fdd | 851 | static int __init hwicap_module_init(void) |
ef141a0b SN |
852 | { |
853 | dev_t devt; | |
854 | int retval; | |
855 | ||
856 | icap_class = class_create(THIS_MODULE, "xilinx_config"); | |
f62f2fdd | 857 | mutex_init(&icap_sem); |
ef141a0b | 858 | |
ac646734 SN |
859 | devt = MKDEV(XHWICAP_MAJOR, XHWICAP_MINOR); |
860 | retval = register_chrdev_region(devt, | |
861 | HWICAP_DEVICES, | |
862 | DRIVER_NAME); | |
863 | if (retval < 0) | |
864 | return retval; | |
ef141a0b SN |
865 | |
866 | retval = platform_driver_register(&hwicap_platform_driver); | |
ef141a0b | 867 | if (retval) |
55f19d56 | 868 | goto failed; |
ef141a0b SN |
869 | |
870 | return retval; | |
871 | ||
55f19d56 | 872 | failed: |
ef141a0b SN |
873 | unregister_chrdev_region(devt, HWICAP_DEVICES); |
874 | ||
875 | return retval; | |
876 | } | |
877 | ||
f62f2fdd | 878 | static void __exit hwicap_module_cleanup(void) |
ef141a0b | 879 | { |
ac646734 | 880 | dev_t devt = MKDEV(XHWICAP_MAJOR, XHWICAP_MINOR); |
ef141a0b SN |
881 | |
882 | class_destroy(icap_class); | |
883 | ||
884 | platform_driver_unregister(&hwicap_platform_driver); | |
885 | ||
ef141a0b SN |
886 | unregister_chrdev_region(devt, HWICAP_DEVICES); |
887 | } | |
888 | ||
889 | module_init(hwicap_module_init); | |
890 | module_exit(hwicap_module_cleanup); | |
891 | ||
892 | MODULE_AUTHOR("Xilinx, Inc; Xilinx Research Labs Group"); | |
893 | MODULE_DESCRIPTION("Xilinx ICAP Port Driver"); | |
894 | MODULE_LICENSE("GPL"); |