Commit | Line | Data |
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b2476490 MT |
1 | /* |
2 | * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> | |
3 | * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * Standard functionality for the common clock API. See Documentation/clk.txt | |
10 | */ | |
11 | ||
b09d6d99 | 12 | #include <linux/clk-provider.h> |
86be408b | 13 | #include <linux/clk/clk-conf.h> |
b2476490 MT |
14 | #include <linux/module.h> |
15 | #include <linux/mutex.h> | |
16 | #include <linux/spinlock.h> | |
17 | #include <linux/err.h> | |
18 | #include <linux/list.h> | |
19 | #include <linux/slab.h> | |
766e6a4e | 20 | #include <linux/of.h> |
46c8773a | 21 | #include <linux/device.h> |
f2f6c255 | 22 | #include <linux/init.h> |
533ddeb1 | 23 | #include <linux/sched.h> |
b2476490 | 24 | |
d6782c26 SN |
25 | #include "clk.h" |
26 | ||
b2476490 MT |
27 | static DEFINE_SPINLOCK(enable_lock); |
28 | static DEFINE_MUTEX(prepare_lock); | |
29 | ||
533ddeb1 MT |
30 | static struct task_struct *prepare_owner; |
31 | static struct task_struct *enable_owner; | |
32 | ||
33 | static int prepare_refcnt; | |
34 | static int enable_refcnt; | |
35 | ||
b2476490 MT |
36 | static HLIST_HEAD(clk_root_list); |
37 | static HLIST_HEAD(clk_orphan_list); | |
38 | static LIST_HEAD(clk_notifier_list); | |
39 | ||
b09d6d99 MT |
40 | /*** private data structures ***/ |
41 | ||
42 | struct clk_core { | |
43 | const char *name; | |
44 | const struct clk_ops *ops; | |
45 | struct clk_hw *hw; | |
46 | struct module *owner; | |
47 | struct clk_core *parent; | |
48 | const char **parent_names; | |
49 | struct clk_core **parents; | |
50 | u8 num_parents; | |
51 | u8 new_parent_index; | |
52 | unsigned long rate; | |
1c8e6004 | 53 | unsigned long req_rate; |
b09d6d99 MT |
54 | unsigned long new_rate; |
55 | struct clk_core *new_parent; | |
56 | struct clk_core *new_child; | |
57 | unsigned long flags; | |
58 | unsigned int enable_count; | |
59 | unsigned int prepare_count; | |
60 | unsigned long accuracy; | |
61 | int phase; | |
62 | struct hlist_head children; | |
63 | struct hlist_node child_node; | |
64 | struct hlist_node debug_node; | |
1c8e6004 | 65 | struct hlist_head clks; |
b09d6d99 MT |
66 | unsigned int notifier_count; |
67 | #ifdef CONFIG_DEBUG_FS | |
68 | struct dentry *dentry; | |
69 | #endif | |
70 | struct kref ref; | |
71 | }; | |
72 | ||
dfc202ea SB |
73 | #define CREATE_TRACE_POINTS |
74 | #include <trace/events/clk.h> | |
75 | ||
b09d6d99 MT |
76 | struct clk { |
77 | struct clk_core *core; | |
78 | const char *dev_id; | |
79 | const char *con_id; | |
1c8e6004 TV |
80 | unsigned long min_rate; |
81 | unsigned long max_rate; | |
50595f8b | 82 | struct hlist_node clks_node; |
b09d6d99 MT |
83 | }; |
84 | ||
eab89f69 MT |
85 | /*** locking ***/ |
86 | static void clk_prepare_lock(void) | |
87 | { | |
533ddeb1 MT |
88 | if (!mutex_trylock(&prepare_lock)) { |
89 | if (prepare_owner == current) { | |
90 | prepare_refcnt++; | |
91 | return; | |
92 | } | |
93 | mutex_lock(&prepare_lock); | |
94 | } | |
95 | WARN_ON_ONCE(prepare_owner != NULL); | |
96 | WARN_ON_ONCE(prepare_refcnt != 0); | |
97 | prepare_owner = current; | |
98 | prepare_refcnt = 1; | |
eab89f69 MT |
99 | } |
100 | ||
101 | static void clk_prepare_unlock(void) | |
102 | { | |
533ddeb1 MT |
103 | WARN_ON_ONCE(prepare_owner != current); |
104 | WARN_ON_ONCE(prepare_refcnt == 0); | |
105 | ||
106 | if (--prepare_refcnt) | |
107 | return; | |
108 | prepare_owner = NULL; | |
eab89f69 MT |
109 | mutex_unlock(&prepare_lock); |
110 | } | |
111 | ||
112 | static unsigned long clk_enable_lock(void) | |
113 | { | |
114 | unsigned long flags; | |
533ddeb1 MT |
115 | |
116 | if (!spin_trylock_irqsave(&enable_lock, flags)) { | |
117 | if (enable_owner == current) { | |
118 | enable_refcnt++; | |
119 | return flags; | |
120 | } | |
121 | spin_lock_irqsave(&enable_lock, flags); | |
122 | } | |
123 | WARN_ON_ONCE(enable_owner != NULL); | |
124 | WARN_ON_ONCE(enable_refcnt != 0); | |
125 | enable_owner = current; | |
126 | enable_refcnt = 1; | |
eab89f69 MT |
127 | return flags; |
128 | } | |
129 | ||
130 | static void clk_enable_unlock(unsigned long flags) | |
131 | { | |
533ddeb1 MT |
132 | WARN_ON_ONCE(enable_owner != current); |
133 | WARN_ON_ONCE(enable_refcnt == 0); | |
134 | ||
135 | if (--enable_refcnt) | |
136 | return; | |
137 | enable_owner = NULL; | |
eab89f69 MT |
138 | spin_unlock_irqrestore(&enable_lock, flags); |
139 | } | |
140 | ||
4dff95dc SB |
141 | static bool clk_core_is_prepared(struct clk_core *core) |
142 | { | |
143 | /* | |
144 | * .is_prepared is optional for clocks that can prepare | |
145 | * fall back to software usage counter if it is missing | |
146 | */ | |
147 | if (!core->ops->is_prepared) | |
148 | return core->prepare_count; | |
b2476490 | 149 | |
4dff95dc SB |
150 | return core->ops->is_prepared(core->hw); |
151 | } | |
b2476490 | 152 | |
4dff95dc SB |
153 | static bool clk_core_is_enabled(struct clk_core *core) |
154 | { | |
155 | /* | |
156 | * .is_enabled is only mandatory for clocks that gate | |
157 | * fall back to software usage counter if .is_enabled is missing | |
158 | */ | |
159 | if (!core->ops->is_enabled) | |
160 | return core->enable_count; | |
6b44c854 | 161 | |
4dff95dc SB |
162 | return core->ops->is_enabled(core->hw); |
163 | } | |
6b44c854 | 164 | |
4dff95dc | 165 | static void clk_unprepare_unused_subtree(struct clk_core *core) |
1af599df | 166 | { |
4dff95dc SB |
167 | struct clk_core *child; |
168 | ||
169 | lockdep_assert_held(&prepare_lock); | |
170 | ||
171 | hlist_for_each_entry(child, &core->children, child_node) | |
172 | clk_unprepare_unused_subtree(child); | |
173 | ||
174 | if (core->prepare_count) | |
1af599df PG |
175 | return; |
176 | ||
4dff95dc SB |
177 | if (core->flags & CLK_IGNORE_UNUSED) |
178 | return; | |
179 | ||
180 | if (clk_core_is_prepared(core)) { | |
181 | trace_clk_unprepare(core); | |
182 | if (core->ops->unprepare_unused) | |
183 | core->ops->unprepare_unused(core->hw); | |
184 | else if (core->ops->unprepare) | |
185 | core->ops->unprepare(core->hw); | |
186 | trace_clk_unprepare_complete(core); | |
187 | } | |
1af599df PG |
188 | } |
189 | ||
4dff95dc | 190 | static void clk_disable_unused_subtree(struct clk_core *core) |
1af599df | 191 | { |
035a61c3 | 192 | struct clk_core *child; |
4dff95dc | 193 | unsigned long flags; |
1af599df | 194 | |
4dff95dc | 195 | lockdep_assert_held(&prepare_lock); |
1af599df | 196 | |
4dff95dc SB |
197 | hlist_for_each_entry(child, &core->children, child_node) |
198 | clk_disable_unused_subtree(child); | |
1af599df | 199 | |
4dff95dc SB |
200 | flags = clk_enable_lock(); |
201 | ||
202 | if (core->enable_count) | |
203 | goto unlock_out; | |
204 | ||
205 | if (core->flags & CLK_IGNORE_UNUSED) | |
206 | goto unlock_out; | |
207 | ||
208 | /* | |
209 | * some gate clocks have special needs during the disable-unused | |
210 | * sequence. call .disable_unused if available, otherwise fall | |
211 | * back to .disable | |
212 | */ | |
213 | if (clk_core_is_enabled(core)) { | |
214 | trace_clk_disable(core); | |
215 | if (core->ops->disable_unused) | |
216 | core->ops->disable_unused(core->hw); | |
217 | else if (core->ops->disable) | |
218 | core->ops->disable(core->hw); | |
219 | trace_clk_disable_complete(core); | |
220 | } | |
221 | ||
222 | unlock_out: | |
223 | clk_enable_unlock(flags); | |
1af599df PG |
224 | } |
225 | ||
4dff95dc SB |
226 | static bool clk_ignore_unused; |
227 | static int __init clk_ignore_unused_setup(char *__unused) | |
1af599df | 228 | { |
4dff95dc SB |
229 | clk_ignore_unused = true; |
230 | return 1; | |
231 | } | |
232 | __setup("clk_ignore_unused", clk_ignore_unused_setup); | |
1af599df | 233 | |
4dff95dc SB |
234 | static int clk_disable_unused(void) |
235 | { | |
236 | struct clk_core *core; | |
237 | ||
238 | if (clk_ignore_unused) { | |
239 | pr_warn("clk: Not disabling unused clocks\n"); | |
240 | return 0; | |
241 | } | |
1af599df | 242 | |
eab89f69 | 243 | clk_prepare_lock(); |
1af599df | 244 | |
4dff95dc SB |
245 | hlist_for_each_entry(core, &clk_root_list, child_node) |
246 | clk_disable_unused_subtree(core); | |
247 | ||
248 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
249 | clk_disable_unused_subtree(core); | |
250 | ||
251 | hlist_for_each_entry(core, &clk_root_list, child_node) | |
252 | clk_unprepare_unused_subtree(core); | |
253 | ||
254 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
255 | clk_unprepare_unused_subtree(core); | |
1af599df | 256 | |
eab89f69 | 257 | clk_prepare_unlock(); |
1af599df PG |
258 | |
259 | return 0; | |
260 | } | |
4dff95dc | 261 | late_initcall_sync(clk_disable_unused); |
1af599df | 262 | |
4dff95dc | 263 | /*** helper functions ***/ |
1af599df | 264 | |
4dff95dc | 265 | const char *__clk_get_name(struct clk *clk) |
1af599df | 266 | { |
4dff95dc | 267 | return !clk ? NULL : clk->core->name; |
1af599df | 268 | } |
4dff95dc | 269 | EXPORT_SYMBOL_GPL(__clk_get_name); |
1af599df | 270 | |
4dff95dc SB |
271 | struct clk_hw *__clk_get_hw(struct clk *clk) |
272 | { | |
273 | return !clk ? NULL : clk->core->hw; | |
274 | } | |
275 | EXPORT_SYMBOL_GPL(__clk_get_hw); | |
1af599df | 276 | |
4dff95dc | 277 | u8 __clk_get_num_parents(struct clk *clk) |
bddca894 | 278 | { |
4dff95dc SB |
279 | return !clk ? 0 : clk->core->num_parents; |
280 | } | |
281 | EXPORT_SYMBOL_GPL(__clk_get_num_parents); | |
bddca894 | 282 | |
4dff95dc SB |
283 | struct clk *__clk_get_parent(struct clk *clk) |
284 | { | |
285 | if (!clk) | |
286 | return NULL; | |
287 | ||
288 | /* TODO: Create a per-user clk and change callers to call clk_put */ | |
289 | return !clk->core->parent ? NULL : clk->core->parent->hw->clk; | |
bddca894 | 290 | } |
4dff95dc | 291 | EXPORT_SYMBOL_GPL(__clk_get_parent); |
bddca894 | 292 | |
4dff95dc SB |
293 | static struct clk_core *__clk_lookup_subtree(const char *name, |
294 | struct clk_core *core) | |
bddca894 | 295 | { |
035a61c3 | 296 | struct clk_core *child; |
4dff95dc | 297 | struct clk_core *ret; |
bddca894 | 298 | |
4dff95dc SB |
299 | if (!strcmp(core->name, name)) |
300 | return core; | |
bddca894 | 301 | |
4dff95dc SB |
302 | hlist_for_each_entry(child, &core->children, child_node) { |
303 | ret = __clk_lookup_subtree(name, child); | |
304 | if (ret) | |
305 | return ret; | |
bddca894 PG |
306 | } |
307 | ||
4dff95dc | 308 | return NULL; |
bddca894 PG |
309 | } |
310 | ||
4dff95dc | 311 | static struct clk_core *clk_core_lookup(const char *name) |
bddca894 | 312 | { |
4dff95dc SB |
313 | struct clk_core *root_clk; |
314 | struct clk_core *ret; | |
bddca894 | 315 | |
4dff95dc SB |
316 | if (!name) |
317 | return NULL; | |
bddca894 | 318 | |
4dff95dc SB |
319 | /* search the 'proper' clk tree first */ |
320 | hlist_for_each_entry(root_clk, &clk_root_list, child_node) { | |
321 | ret = __clk_lookup_subtree(name, root_clk); | |
322 | if (ret) | |
323 | return ret; | |
bddca894 PG |
324 | } |
325 | ||
4dff95dc SB |
326 | /* if not found, then search the orphan tree */ |
327 | hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) { | |
328 | ret = __clk_lookup_subtree(name, root_clk); | |
329 | if (ret) | |
330 | return ret; | |
331 | } | |
bddca894 | 332 | |
4dff95dc | 333 | return NULL; |
bddca894 PG |
334 | } |
335 | ||
4dff95dc SB |
336 | static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core, |
337 | u8 index) | |
bddca894 | 338 | { |
4dff95dc SB |
339 | if (!core || index >= core->num_parents) |
340 | return NULL; | |
341 | else if (!core->parents) | |
342 | return clk_core_lookup(core->parent_names[index]); | |
343 | else if (!core->parents[index]) | |
344 | return core->parents[index] = | |
345 | clk_core_lookup(core->parent_names[index]); | |
346 | else | |
347 | return core->parents[index]; | |
bddca894 PG |
348 | } |
349 | ||
4dff95dc | 350 | struct clk *clk_get_parent_by_index(struct clk *clk, u8 index) |
b2476490 | 351 | { |
4dff95dc | 352 | struct clk_core *parent; |
b2476490 | 353 | |
4dff95dc SB |
354 | if (!clk) |
355 | return NULL; | |
b2476490 | 356 | |
4dff95dc | 357 | parent = clk_core_get_parent_by_index(clk->core, index); |
5279fc40 | 358 | |
4dff95dc SB |
359 | return !parent ? NULL : parent->hw->clk; |
360 | } | |
361 | EXPORT_SYMBOL_GPL(clk_get_parent_by_index); | |
e59c5371 | 362 | |
4dff95dc SB |
363 | unsigned int __clk_get_enable_count(struct clk *clk) |
364 | { | |
365 | return !clk ? 0 : clk->core->enable_count; | |
366 | } | |
b2476490 | 367 | |
4dff95dc SB |
368 | static unsigned long clk_core_get_rate_nolock(struct clk_core *core) |
369 | { | |
370 | unsigned long ret; | |
b2476490 | 371 | |
4dff95dc SB |
372 | if (!core) { |
373 | ret = 0; | |
374 | goto out; | |
375 | } | |
b2476490 | 376 | |
4dff95dc | 377 | ret = core->rate; |
b2476490 | 378 | |
4dff95dc SB |
379 | if (core->flags & CLK_IS_ROOT) |
380 | goto out; | |
c646cbf1 | 381 | |
4dff95dc SB |
382 | if (!core->parent) |
383 | ret = 0; | |
b2476490 | 384 | |
b2476490 MT |
385 | out: |
386 | return ret; | |
387 | } | |
388 | ||
4dff95dc | 389 | unsigned long __clk_get_rate(struct clk *clk) |
b2476490 | 390 | { |
4dff95dc SB |
391 | if (!clk) |
392 | return 0; | |
6314b679 | 393 | |
4dff95dc SB |
394 | return clk_core_get_rate_nolock(clk->core); |
395 | } | |
396 | EXPORT_SYMBOL_GPL(__clk_get_rate); | |
b2476490 | 397 | |
4dff95dc SB |
398 | static unsigned long __clk_get_accuracy(struct clk_core *core) |
399 | { | |
400 | if (!core) | |
401 | return 0; | |
b2476490 | 402 | |
4dff95dc | 403 | return core->accuracy; |
b2476490 MT |
404 | } |
405 | ||
4dff95dc | 406 | unsigned long __clk_get_flags(struct clk *clk) |
fcb0ee6a | 407 | { |
4dff95dc | 408 | return !clk ? 0 : clk->core->flags; |
fcb0ee6a | 409 | } |
4dff95dc | 410 | EXPORT_SYMBOL_GPL(__clk_get_flags); |
fcb0ee6a | 411 | |
4dff95dc | 412 | bool __clk_is_prepared(struct clk *clk) |
fb2b3c9f | 413 | { |
4dff95dc SB |
414 | if (!clk) |
415 | return false; | |
fb2b3c9f | 416 | |
4dff95dc | 417 | return clk_core_is_prepared(clk->core); |
fb2b3c9f | 418 | } |
fb2b3c9f | 419 | |
4dff95dc | 420 | bool __clk_is_enabled(struct clk *clk) |
b2476490 | 421 | { |
4dff95dc SB |
422 | if (!clk) |
423 | return false; | |
b2476490 | 424 | |
4dff95dc SB |
425 | return clk_core_is_enabled(clk->core); |
426 | } | |
427 | EXPORT_SYMBOL_GPL(__clk_is_enabled); | |
b2476490 | 428 | |
4dff95dc SB |
429 | static bool mux_is_better_rate(unsigned long rate, unsigned long now, |
430 | unsigned long best, unsigned long flags) | |
431 | { | |
432 | if (flags & CLK_MUX_ROUND_CLOSEST) | |
433 | return abs(now - rate) < abs(best - rate); | |
1af599df | 434 | |
4dff95dc SB |
435 | return now <= rate && now > best; |
436 | } | |
bddca894 | 437 | |
4dff95dc SB |
438 | static long |
439 | clk_mux_determine_rate_flags(struct clk_hw *hw, unsigned long rate, | |
440 | unsigned long min_rate, | |
441 | unsigned long max_rate, | |
442 | unsigned long *best_parent_rate, | |
443 | struct clk_hw **best_parent_p, | |
444 | unsigned long flags) | |
445 | { | |
446 | struct clk_core *core = hw->core, *parent, *best_parent = NULL; | |
447 | int i, num_parents; | |
448 | unsigned long parent_rate, best = 0; | |
b2476490 | 449 | |
4dff95dc SB |
450 | /* if NO_REPARENT flag set, pass through to current parent */ |
451 | if (core->flags & CLK_SET_RATE_NO_REPARENT) { | |
452 | parent = core->parent; | |
453 | if (core->flags & CLK_SET_RATE_PARENT) | |
454 | best = __clk_determine_rate(parent ? parent->hw : NULL, | |
455 | rate, min_rate, max_rate); | |
456 | else if (parent) | |
457 | best = clk_core_get_rate_nolock(parent); | |
458 | else | |
459 | best = clk_core_get_rate_nolock(core); | |
460 | goto out; | |
461 | } | |
b2476490 | 462 | |
4dff95dc SB |
463 | /* find the parent that can provide the fastest rate <= rate */ |
464 | num_parents = core->num_parents; | |
465 | for (i = 0; i < num_parents; i++) { | |
466 | parent = clk_core_get_parent_by_index(core, i); | |
467 | if (!parent) | |
468 | continue; | |
469 | if (core->flags & CLK_SET_RATE_PARENT) | |
470 | parent_rate = __clk_determine_rate(parent->hw, rate, | |
471 | min_rate, | |
472 | max_rate); | |
473 | else | |
474 | parent_rate = clk_core_get_rate_nolock(parent); | |
475 | if (mux_is_better_rate(rate, parent_rate, best, flags)) { | |
476 | best_parent = parent; | |
477 | best = parent_rate; | |
478 | } | |
479 | } | |
b2476490 | 480 | |
4dff95dc SB |
481 | out: |
482 | if (best_parent) | |
483 | *best_parent_p = best_parent->hw; | |
484 | *best_parent_rate = best; | |
b2476490 | 485 | |
4dff95dc | 486 | return best; |
b33d212f | 487 | } |
4dff95dc SB |
488 | |
489 | struct clk *__clk_lookup(const char *name) | |
fcb0ee6a | 490 | { |
4dff95dc SB |
491 | struct clk_core *core = clk_core_lookup(name); |
492 | ||
493 | return !core ? NULL : core->hw->clk; | |
fcb0ee6a | 494 | } |
b2476490 | 495 | |
4dff95dc SB |
496 | static void clk_core_get_boundaries(struct clk_core *core, |
497 | unsigned long *min_rate, | |
498 | unsigned long *max_rate) | |
1c155b3d | 499 | { |
4dff95dc | 500 | struct clk *clk_user; |
1c155b3d | 501 | |
4dff95dc SB |
502 | *min_rate = 0; |
503 | *max_rate = ULONG_MAX; | |
496eadf8 | 504 | |
4dff95dc SB |
505 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
506 | *min_rate = max(*min_rate, clk_user->min_rate); | |
1c155b3d | 507 | |
4dff95dc SB |
508 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
509 | *max_rate = min(*max_rate, clk_user->max_rate); | |
510 | } | |
1c155b3d | 511 | |
4dff95dc SB |
512 | /* |
513 | * Helper for finding best parent to provide a given frequency. This can be used | |
514 | * directly as a determine_rate callback (e.g. for a mux), or from a more | |
515 | * complex clock that may combine a mux with other operations. | |
516 | */ | |
517 | long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate, | |
518 | unsigned long min_rate, | |
519 | unsigned long max_rate, | |
520 | unsigned long *best_parent_rate, | |
521 | struct clk_hw **best_parent_p) | |
522 | { | |
523 | return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate, | |
524 | best_parent_rate, | |
525 | best_parent_p, 0); | |
1c155b3d | 526 | } |
4dff95dc | 527 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); |
1c155b3d | 528 | |
4dff95dc SB |
529 | long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate, |
530 | unsigned long min_rate, | |
531 | unsigned long max_rate, | |
532 | unsigned long *best_parent_rate, | |
533 | struct clk_hw **best_parent_p) | |
b2476490 | 534 | { |
4dff95dc SB |
535 | return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate, |
536 | best_parent_rate, | |
537 | best_parent_p, | |
538 | CLK_MUX_ROUND_CLOSEST); | |
539 | } | |
540 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); | |
b2476490 | 541 | |
4dff95dc | 542 | /*** clk api ***/ |
496eadf8 | 543 | |
4dff95dc SB |
544 | static void clk_core_unprepare(struct clk_core *core) |
545 | { | |
546 | if (!core) | |
547 | return; | |
b2476490 | 548 | |
4dff95dc SB |
549 | if (WARN_ON(core->prepare_count == 0)) |
550 | return; | |
b2476490 | 551 | |
4dff95dc SB |
552 | if (--core->prepare_count > 0) |
553 | return; | |
b2476490 | 554 | |
4dff95dc | 555 | WARN_ON(core->enable_count > 0); |
b2476490 | 556 | |
4dff95dc | 557 | trace_clk_unprepare(core); |
b2476490 | 558 | |
4dff95dc SB |
559 | if (core->ops->unprepare) |
560 | core->ops->unprepare(core->hw); | |
561 | ||
562 | trace_clk_unprepare_complete(core); | |
563 | clk_core_unprepare(core->parent); | |
b2476490 MT |
564 | } |
565 | ||
4dff95dc SB |
566 | /** |
567 | * clk_unprepare - undo preparation of a clock source | |
568 | * @clk: the clk being unprepared | |
569 | * | |
570 | * clk_unprepare may sleep, which differentiates it from clk_disable. In a | |
571 | * simple case, clk_unprepare can be used instead of clk_disable to gate a clk | |
572 | * if the operation may sleep. One example is a clk which is accessed over | |
573 | * I2c. In the complex case a clk gate operation may require a fast and a slow | |
574 | * part. It is this reason that clk_unprepare and clk_disable are not mutually | |
575 | * exclusive. In fact clk_disable must be called before clk_unprepare. | |
576 | */ | |
577 | void clk_unprepare(struct clk *clk) | |
1e435256 | 578 | { |
4dff95dc SB |
579 | if (IS_ERR_OR_NULL(clk)) |
580 | return; | |
581 | ||
582 | clk_prepare_lock(); | |
583 | clk_core_unprepare(clk->core); | |
584 | clk_prepare_unlock(); | |
1e435256 | 585 | } |
4dff95dc | 586 | EXPORT_SYMBOL_GPL(clk_unprepare); |
1e435256 | 587 | |
4dff95dc | 588 | static int clk_core_prepare(struct clk_core *core) |
b2476490 | 589 | { |
4dff95dc | 590 | int ret = 0; |
b2476490 | 591 | |
4dff95dc | 592 | if (!core) |
1e435256 | 593 | return 0; |
1e435256 | 594 | |
4dff95dc SB |
595 | if (core->prepare_count == 0) { |
596 | ret = clk_core_prepare(core->parent); | |
597 | if (ret) | |
598 | return ret; | |
b2476490 | 599 | |
4dff95dc | 600 | trace_clk_prepare(core); |
b2476490 | 601 | |
4dff95dc SB |
602 | if (core->ops->prepare) |
603 | ret = core->ops->prepare(core->hw); | |
b2476490 | 604 | |
4dff95dc | 605 | trace_clk_prepare_complete(core); |
1c155b3d | 606 | |
4dff95dc SB |
607 | if (ret) { |
608 | clk_core_unprepare(core->parent); | |
609 | return ret; | |
610 | } | |
611 | } | |
1c155b3d | 612 | |
4dff95dc | 613 | core->prepare_count++; |
b2476490 MT |
614 | |
615 | return 0; | |
616 | } | |
b2476490 | 617 | |
4dff95dc SB |
618 | /** |
619 | * clk_prepare - prepare a clock source | |
620 | * @clk: the clk being prepared | |
621 | * | |
622 | * clk_prepare may sleep, which differentiates it from clk_enable. In a simple | |
623 | * case, clk_prepare can be used instead of clk_enable to ungate a clk if the | |
624 | * operation may sleep. One example is a clk which is accessed over I2c. In | |
625 | * the complex case a clk ungate operation may require a fast and a slow part. | |
626 | * It is this reason that clk_prepare and clk_enable are not mutually | |
627 | * exclusive. In fact clk_prepare must be called before clk_enable. | |
628 | * Returns 0 on success, -EERROR otherwise. | |
629 | */ | |
630 | int clk_prepare(struct clk *clk) | |
b2476490 | 631 | { |
4dff95dc | 632 | int ret; |
b2476490 | 633 | |
4dff95dc SB |
634 | if (!clk) |
635 | return 0; | |
b2476490 | 636 | |
4dff95dc SB |
637 | clk_prepare_lock(); |
638 | ret = clk_core_prepare(clk->core); | |
639 | clk_prepare_unlock(); | |
640 | ||
641 | return ret; | |
b2476490 | 642 | } |
4dff95dc | 643 | EXPORT_SYMBOL_GPL(clk_prepare); |
b2476490 | 644 | |
4dff95dc | 645 | static void clk_core_disable(struct clk_core *core) |
b2476490 | 646 | { |
4dff95dc SB |
647 | if (!core) |
648 | return; | |
035a61c3 | 649 | |
4dff95dc SB |
650 | if (WARN_ON(core->enable_count == 0)) |
651 | return; | |
b2476490 | 652 | |
4dff95dc SB |
653 | if (--core->enable_count > 0) |
654 | return; | |
035a61c3 | 655 | |
4dff95dc | 656 | trace_clk_disable(core); |
035a61c3 | 657 | |
4dff95dc SB |
658 | if (core->ops->disable) |
659 | core->ops->disable(core->hw); | |
035a61c3 | 660 | |
4dff95dc | 661 | trace_clk_disable_complete(core); |
035a61c3 | 662 | |
4dff95dc | 663 | clk_core_disable(core->parent); |
035a61c3 | 664 | } |
7ef3dcc8 | 665 | |
4dff95dc SB |
666 | /** |
667 | * clk_disable - gate a clock | |
668 | * @clk: the clk being gated | |
669 | * | |
670 | * clk_disable must not sleep, which differentiates it from clk_unprepare. In | |
671 | * a simple case, clk_disable can be used instead of clk_unprepare to gate a | |
672 | * clk if the operation is fast and will never sleep. One example is a | |
673 | * SoC-internal clk which is controlled via simple register writes. In the | |
674 | * complex case a clk gate operation may require a fast and a slow part. It is | |
675 | * this reason that clk_unprepare and clk_disable are not mutually exclusive. | |
676 | * In fact clk_disable must be called before clk_unprepare. | |
677 | */ | |
678 | void clk_disable(struct clk *clk) | |
b2476490 | 679 | { |
4dff95dc SB |
680 | unsigned long flags; |
681 | ||
682 | if (IS_ERR_OR_NULL(clk)) | |
683 | return; | |
684 | ||
685 | flags = clk_enable_lock(); | |
686 | clk_core_disable(clk->core); | |
687 | clk_enable_unlock(flags); | |
b2476490 | 688 | } |
4dff95dc | 689 | EXPORT_SYMBOL_GPL(clk_disable); |
b2476490 | 690 | |
4dff95dc | 691 | static int clk_core_enable(struct clk_core *core) |
b2476490 | 692 | { |
4dff95dc | 693 | int ret = 0; |
b2476490 | 694 | |
4dff95dc SB |
695 | if (!core) |
696 | return 0; | |
b2476490 | 697 | |
4dff95dc SB |
698 | if (WARN_ON(core->prepare_count == 0)) |
699 | return -ESHUTDOWN; | |
b2476490 | 700 | |
4dff95dc SB |
701 | if (core->enable_count == 0) { |
702 | ret = clk_core_enable(core->parent); | |
b2476490 | 703 | |
4dff95dc SB |
704 | if (ret) |
705 | return ret; | |
b2476490 | 706 | |
4dff95dc | 707 | trace_clk_enable(core); |
035a61c3 | 708 | |
4dff95dc SB |
709 | if (core->ops->enable) |
710 | ret = core->ops->enable(core->hw); | |
035a61c3 | 711 | |
4dff95dc SB |
712 | trace_clk_enable_complete(core); |
713 | ||
714 | if (ret) { | |
715 | clk_core_disable(core->parent); | |
716 | return ret; | |
717 | } | |
718 | } | |
719 | ||
720 | core->enable_count++; | |
721 | return 0; | |
035a61c3 | 722 | } |
b2476490 | 723 | |
4dff95dc SB |
724 | /** |
725 | * clk_enable - ungate a clock | |
726 | * @clk: the clk being ungated | |
727 | * | |
728 | * clk_enable must not sleep, which differentiates it from clk_prepare. In a | |
729 | * simple case, clk_enable can be used instead of clk_prepare to ungate a clk | |
730 | * if the operation will never sleep. One example is a SoC-internal clk which | |
731 | * is controlled via simple register writes. In the complex case a clk ungate | |
732 | * operation may require a fast and a slow part. It is this reason that | |
733 | * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare | |
734 | * must be called before clk_enable. Returns 0 on success, -EERROR | |
735 | * otherwise. | |
736 | */ | |
737 | int clk_enable(struct clk *clk) | |
5279fc40 | 738 | { |
4dff95dc SB |
739 | unsigned long flags; |
740 | int ret; | |
741 | ||
742 | if (!clk) | |
5279fc40 BB |
743 | return 0; |
744 | ||
4dff95dc SB |
745 | flags = clk_enable_lock(); |
746 | ret = clk_core_enable(clk->core); | |
747 | clk_enable_unlock(flags); | |
5279fc40 | 748 | |
4dff95dc | 749 | return ret; |
b2476490 | 750 | } |
4dff95dc | 751 | EXPORT_SYMBOL_GPL(clk_enable); |
b2476490 | 752 | |
4dff95dc SB |
753 | static unsigned long clk_core_round_rate_nolock(struct clk_core *core, |
754 | unsigned long rate, | |
755 | unsigned long min_rate, | |
756 | unsigned long max_rate) | |
3d6ee287 | 757 | { |
4dff95dc SB |
758 | unsigned long parent_rate = 0; |
759 | struct clk_core *parent; | |
760 | struct clk_hw *parent_hw; | |
761 | ||
762 | lockdep_assert_held(&prepare_lock); | |
3d6ee287 | 763 | |
d6968fca | 764 | if (!core) |
4dff95dc | 765 | return 0; |
3d6ee287 | 766 | |
4dff95dc SB |
767 | parent = core->parent; |
768 | if (parent) | |
769 | parent_rate = parent->rate; | |
3d6ee287 | 770 | |
4dff95dc SB |
771 | if (core->ops->determine_rate) { |
772 | parent_hw = parent ? parent->hw : NULL; | |
773 | return core->ops->determine_rate(core->hw, rate, | |
774 | min_rate, max_rate, | |
775 | &parent_rate, &parent_hw); | |
776 | } else if (core->ops->round_rate) | |
777 | return core->ops->round_rate(core->hw, rate, &parent_rate); | |
778 | else if (core->flags & CLK_SET_RATE_PARENT) | |
779 | return clk_core_round_rate_nolock(core->parent, rate, min_rate, | |
780 | max_rate); | |
781 | else | |
782 | return core->rate; | |
3d6ee287 UH |
783 | } |
784 | ||
4dff95dc SB |
785 | /** |
786 | * __clk_determine_rate - get the closest rate actually supported by a clock | |
787 | * @hw: determine the rate of this clock | |
788 | * @rate: target rate | |
789 | * @min_rate: returned rate must be greater than this rate | |
790 | * @max_rate: returned rate must be less than this rate | |
791 | * | |
6e5ab41b | 792 | * Useful for clk_ops such as .set_rate and .determine_rate. |
4dff95dc SB |
793 | */ |
794 | unsigned long __clk_determine_rate(struct clk_hw *hw, | |
795 | unsigned long rate, | |
796 | unsigned long min_rate, | |
797 | unsigned long max_rate) | |
035a61c3 | 798 | { |
4dff95dc SB |
799 | if (!hw) |
800 | return 0; | |
035a61c3 | 801 | |
4dff95dc | 802 | return clk_core_round_rate_nolock(hw->core, rate, min_rate, max_rate); |
035a61c3 | 803 | } |
4dff95dc | 804 | EXPORT_SYMBOL_GPL(__clk_determine_rate); |
035a61c3 | 805 | |
4dff95dc SB |
806 | /** |
807 | * __clk_round_rate - round the given rate for a clk | |
808 | * @clk: round the rate of this clock | |
809 | * @rate: the rate which is to be rounded | |
810 | * | |
6e5ab41b | 811 | * Useful for clk_ops such as .set_rate |
4dff95dc SB |
812 | */ |
813 | unsigned long __clk_round_rate(struct clk *clk, unsigned long rate) | |
b2476490 | 814 | { |
4dff95dc SB |
815 | unsigned long min_rate; |
816 | unsigned long max_rate; | |
b2476490 | 817 | |
4dff95dc SB |
818 | if (!clk) |
819 | return 0; | |
b2476490 | 820 | |
4dff95dc | 821 | clk_core_get_boundaries(clk->core, &min_rate, &max_rate); |
b2476490 | 822 | |
4dff95dc | 823 | return clk_core_round_rate_nolock(clk->core, rate, min_rate, max_rate); |
b2476490 | 824 | } |
4dff95dc | 825 | EXPORT_SYMBOL_GPL(__clk_round_rate); |
035a61c3 | 826 | |
4dff95dc SB |
827 | /** |
828 | * clk_round_rate - round the given rate for a clk | |
829 | * @clk: the clk for which we are rounding a rate | |
830 | * @rate: the rate which is to be rounded | |
831 | * | |
832 | * Takes in a rate as input and rounds it to a rate that the clk can actually | |
833 | * use which is then returned. If clk doesn't support round_rate operation | |
834 | * then the parent rate is returned. | |
835 | */ | |
836 | long clk_round_rate(struct clk *clk, unsigned long rate) | |
035a61c3 | 837 | { |
4dff95dc SB |
838 | unsigned long ret; |
839 | ||
035a61c3 | 840 | if (!clk) |
4dff95dc | 841 | return 0; |
035a61c3 | 842 | |
4dff95dc SB |
843 | clk_prepare_lock(); |
844 | ret = __clk_round_rate(clk, rate); | |
845 | clk_prepare_unlock(); | |
846 | ||
847 | return ret; | |
035a61c3 | 848 | } |
4dff95dc | 849 | EXPORT_SYMBOL_GPL(clk_round_rate); |
b2476490 | 850 | |
4dff95dc SB |
851 | /** |
852 | * __clk_notify - call clk notifier chain | |
853 | * @core: clk that is changing rate | |
854 | * @msg: clk notifier type (see include/linux/clk.h) | |
855 | * @old_rate: old clk rate | |
856 | * @new_rate: new clk rate | |
857 | * | |
858 | * Triggers a notifier call chain on the clk rate-change notification | |
859 | * for 'clk'. Passes a pointer to the struct clk and the previous | |
860 | * and current rates to the notifier callback. Intended to be called by | |
861 | * internal clock code only. Returns NOTIFY_DONE from the last driver | |
862 | * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if | |
863 | * a driver returns that. | |
864 | */ | |
865 | static int __clk_notify(struct clk_core *core, unsigned long msg, | |
866 | unsigned long old_rate, unsigned long new_rate) | |
b2476490 | 867 | { |
4dff95dc SB |
868 | struct clk_notifier *cn; |
869 | struct clk_notifier_data cnd; | |
870 | int ret = NOTIFY_DONE; | |
b2476490 | 871 | |
4dff95dc SB |
872 | cnd.old_rate = old_rate; |
873 | cnd.new_rate = new_rate; | |
b2476490 | 874 | |
4dff95dc SB |
875 | list_for_each_entry(cn, &clk_notifier_list, node) { |
876 | if (cn->clk->core == core) { | |
877 | cnd.clk = cn->clk; | |
878 | ret = srcu_notifier_call_chain(&cn->notifier_head, msg, | |
879 | &cnd); | |
880 | } | |
b2476490 MT |
881 | } |
882 | ||
4dff95dc | 883 | return ret; |
b2476490 MT |
884 | } |
885 | ||
4dff95dc SB |
886 | /** |
887 | * __clk_recalc_accuracies | |
888 | * @core: first clk in the subtree | |
889 | * | |
890 | * Walks the subtree of clks starting with clk and recalculates accuracies as | |
891 | * it goes. Note that if a clk does not implement the .recalc_accuracy | |
6e5ab41b | 892 | * callback then it is assumed that the clock will take on the accuracy of its |
4dff95dc | 893 | * parent. |
4dff95dc SB |
894 | */ |
895 | static void __clk_recalc_accuracies(struct clk_core *core) | |
b2476490 | 896 | { |
4dff95dc SB |
897 | unsigned long parent_accuracy = 0; |
898 | struct clk_core *child; | |
b2476490 | 899 | |
4dff95dc | 900 | lockdep_assert_held(&prepare_lock); |
b2476490 | 901 | |
4dff95dc SB |
902 | if (core->parent) |
903 | parent_accuracy = core->parent->accuracy; | |
b2476490 | 904 | |
4dff95dc SB |
905 | if (core->ops->recalc_accuracy) |
906 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
907 | parent_accuracy); | |
908 | else | |
909 | core->accuracy = parent_accuracy; | |
b2476490 | 910 | |
4dff95dc SB |
911 | hlist_for_each_entry(child, &core->children, child_node) |
912 | __clk_recalc_accuracies(child); | |
b2476490 MT |
913 | } |
914 | ||
4dff95dc | 915 | static long clk_core_get_accuracy(struct clk_core *core) |
e366fdd7 | 916 | { |
4dff95dc | 917 | unsigned long accuracy; |
15a02c1f | 918 | |
4dff95dc SB |
919 | clk_prepare_lock(); |
920 | if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE)) | |
921 | __clk_recalc_accuracies(core); | |
15a02c1f | 922 | |
4dff95dc SB |
923 | accuracy = __clk_get_accuracy(core); |
924 | clk_prepare_unlock(); | |
e366fdd7 | 925 | |
4dff95dc | 926 | return accuracy; |
e366fdd7 | 927 | } |
15a02c1f | 928 | |
4dff95dc SB |
929 | /** |
930 | * clk_get_accuracy - return the accuracy of clk | |
931 | * @clk: the clk whose accuracy is being returned | |
932 | * | |
933 | * Simply returns the cached accuracy of the clk, unless | |
934 | * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be | |
935 | * issued. | |
936 | * If clk is NULL then returns 0. | |
937 | */ | |
938 | long clk_get_accuracy(struct clk *clk) | |
035a61c3 | 939 | { |
4dff95dc SB |
940 | if (!clk) |
941 | return 0; | |
035a61c3 | 942 | |
4dff95dc | 943 | return clk_core_get_accuracy(clk->core); |
035a61c3 | 944 | } |
4dff95dc | 945 | EXPORT_SYMBOL_GPL(clk_get_accuracy); |
035a61c3 | 946 | |
4dff95dc SB |
947 | static unsigned long clk_recalc(struct clk_core *core, |
948 | unsigned long parent_rate) | |
1c8e6004 | 949 | { |
4dff95dc SB |
950 | if (core->ops->recalc_rate) |
951 | return core->ops->recalc_rate(core->hw, parent_rate); | |
952 | return parent_rate; | |
1c8e6004 TV |
953 | } |
954 | ||
4dff95dc SB |
955 | /** |
956 | * __clk_recalc_rates | |
957 | * @core: first clk in the subtree | |
958 | * @msg: notification type (see include/linux/clk.h) | |
959 | * | |
960 | * Walks the subtree of clks starting with clk and recalculates rates as it | |
961 | * goes. Note that if a clk does not implement the .recalc_rate callback then | |
962 | * it is assumed that the clock will take on the rate of its parent. | |
963 | * | |
964 | * clk_recalc_rates also propagates the POST_RATE_CHANGE notification, | |
965 | * if necessary. | |
15a02c1f | 966 | */ |
4dff95dc | 967 | static void __clk_recalc_rates(struct clk_core *core, unsigned long msg) |
15a02c1f | 968 | { |
4dff95dc SB |
969 | unsigned long old_rate; |
970 | unsigned long parent_rate = 0; | |
971 | struct clk_core *child; | |
e366fdd7 | 972 | |
4dff95dc | 973 | lockdep_assert_held(&prepare_lock); |
15a02c1f | 974 | |
4dff95dc | 975 | old_rate = core->rate; |
b2476490 | 976 | |
4dff95dc SB |
977 | if (core->parent) |
978 | parent_rate = core->parent->rate; | |
b2476490 | 979 | |
4dff95dc | 980 | core->rate = clk_recalc(core, parent_rate); |
b2476490 | 981 | |
4dff95dc SB |
982 | /* |
983 | * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE | |
984 | * & ABORT_RATE_CHANGE notifiers | |
985 | */ | |
986 | if (core->notifier_count && msg) | |
987 | __clk_notify(core, msg, old_rate, core->rate); | |
b2476490 | 988 | |
4dff95dc SB |
989 | hlist_for_each_entry(child, &core->children, child_node) |
990 | __clk_recalc_rates(child, msg); | |
991 | } | |
b2476490 | 992 | |
4dff95dc SB |
993 | static unsigned long clk_core_get_rate(struct clk_core *core) |
994 | { | |
995 | unsigned long rate; | |
dfc202ea | 996 | |
4dff95dc | 997 | clk_prepare_lock(); |
b2476490 | 998 | |
4dff95dc SB |
999 | if (core && (core->flags & CLK_GET_RATE_NOCACHE)) |
1000 | __clk_recalc_rates(core, 0); | |
1001 | ||
1002 | rate = clk_core_get_rate_nolock(core); | |
1003 | clk_prepare_unlock(); | |
1004 | ||
1005 | return rate; | |
b2476490 MT |
1006 | } |
1007 | ||
1008 | /** | |
4dff95dc SB |
1009 | * clk_get_rate - return the rate of clk |
1010 | * @clk: the clk whose rate is being returned | |
b2476490 | 1011 | * |
4dff95dc SB |
1012 | * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag |
1013 | * is set, which means a recalc_rate will be issued. | |
1014 | * If clk is NULL then returns 0. | |
b2476490 | 1015 | */ |
4dff95dc | 1016 | unsigned long clk_get_rate(struct clk *clk) |
b2476490 | 1017 | { |
4dff95dc SB |
1018 | if (!clk) |
1019 | return 0; | |
63589e92 | 1020 | |
4dff95dc | 1021 | return clk_core_get_rate(clk->core); |
b2476490 | 1022 | } |
4dff95dc | 1023 | EXPORT_SYMBOL_GPL(clk_get_rate); |
b2476490 | 1024 | |
4dff95dc SB |
1025 | static int clk_fetch_parent_index(struct clk_core *core, |
1026 | struct clk_core *parent) | |
b2476490 | 1027 | { |
4dff95dc | 1028 | int i; |
b2476490 | 1029 | |
4dff95dc SB |
1030 | if (!core->parents) { |
1031 | core->parents = kcalloc(core->num_parents, | |
1032 | sizeof(struct clk *), GFP_KERNEL); | |
1033 | if (!core->parents) | |
1034 | return -ENOMEM; | |
1035 | } | |
dfc202ea | 1036 | |
4dff95dc SB |
1037 | /* |
1038 | * find index of new parent clock using cached parent ptrs, | |
1039 | * or if not yet cached, use string name comparison and cache | |
1040 | * them now to avoid future calls to clk_core_lookup. | |
1041 | */ | |
1042 | for (i = 0; i < core->num_parents; i++) { | |
1043 | if (core->parents[i] == parent) | |
1044 | return i; | |
dfc202ea | 1045 | |
4dff95dc SB |
1046 | if (core->parents[i]) |
1047 | continue; | |
dfc202ea | 1048 | |
4dff95dc SB |
1049 | if (!strcmp(core->parent_names[i], parent->name)) { |
1050 | core->parents[i] = clk_core_lookup(parent->name); | |
1051 | return i; | |
b2476490 MT |
1052 | } |
1053 | } | |
1054 | ||
4dff95dc | 1055 | return -EINVAL; |
b2476490 MT |
1056 | } |
1057 | ||
4dff95dc | 1058 | static void clk_reparent(struct clk_core *core, struct clk_core *new_parent) |
b2476490 | 1059 | { |
4dff95dc | 1060 | hlist_del(&core->child_node); |
035a61c3 | 1061 | |
4dff95dc SB |
1062 | if (new_parent) { |
1063 | /* avoid duplicate POST_RATE_CHANGE notifications */ | |
1064 | if (new_parent->new_child == core) | |
1065 | new_parent->new_child = NULL; | |
b2476490 | 1066 | |
4dff95dc SB |
1067 | hlist_add_head(&core->child_node, &new_parent->children); |
1068 | } else { | |
1069 | hlist_add_head(&core->child_node, &clk_orphan_list); | |
1070 | } | |
dfc202ea | 1071 | |
4dff95dc | 1072 | core->parent = new_parent; |
035a61c3 TV |
1073 | } |
1074 | ||
4dff95dc SB |
1075 | static struct clk_core *__clk_set_parent_before(struct clk_core *core, |
1076 | struct clk_core *parent) | |
b2476490 MT |
1077 | { |
1078 | unsigned long flags; | |
4dff95dc | 1079 | struct clk_core *old_parent = core->parent; |
b2476490 | 1080 | |
4dff95dc SB |
1081 | /* |
1082 | * Migrate prepare state between parents and prevent race with | |
1083 | * clk_enable(). | |
1084 | * | |
1085 | * If the clock is not prepared, then a race with | |
1086 | * clk_enable/disable() is impossible since we already have the | |
1087 | * prepare lock (future calls to clk_enable() need to be preceded by | |
1088 | * a clk_prepare()). | |
1089 | * | |
1090 | * If the clock is prepared, migrate the prepared state to the new | |
1091 | * parent and also protect against a race with clk_enable() by | |
1092 | * forcing the clock and the new parent on. This ensures that all | |
1093 | * future calls to clk_enable() are practically NOPs with respect to | |
1094 | * hardware and software states. | |
1095 | * | |
1096 | * See also: Comment for clk_set_parent() below. | |
1097 | */ | |
1098 | if (core->prepare_count) { | |
1099 | clk_core_prepare(parent); | |
d2a5d46b | 1100 | flags = clk_enable_lock(); |
4dff95dc SB |
1101 | clk_core_enable(parent); |
1102 | clk_core_enable(core); | |
d2a5d46b | 1103 | clk_enable_unlock(flags); |
4dff95dc | 1104 | } |
63589e92 | 1105 | |
4dff95dc | 1106 | /* update the clk tree topology */ |
eab89f69 | 1107 | flags = clk_enable_lock(); |
4dff95dc | 1108 | clk_reparent(core, parent); |
eab89f69 | 1109 | clk_enable_unlock(flags); |
4dff95dc SB |
1110 | |
1111 | return old_parent; | |
b2476490 | 1112 | } |
b2476490 | 1113 | |
4dff95dc SB |
1114 | static void __clk_set_parent_after(struct clk_core *core, |
1115 | struct clk_core *parent, | |
1116 | struct clk_core *old_parent) | |
b2476490 | 1117 | { |
d2a5d46b DA |
1118 | unsigned long flags; |
1119 | ||
4dff95dc SB |
1120 | /* |
1121 | * Finish the migration of prepare state and undo the changes done | |
1122 | * for preventing a race with clk_enable(). | |
1123 | */ | |
1124 | if (core->prepare_count) { | |
d2a5d46b | 1125 | flags = clk_enable_lock(); |
4dff95dc SB |
1126 | clk_core_disable(core); |
1127 | clk_core_disable(old_parent); | |
d2a5d46b | 1128 | clk_enable_unlock(flags); |
4dff95dc SB |
1129 | clk_core_unprepare(old_parent); |
1130 | } | |
1131 | } | |
b2476490 | 1132 | |
4dff95dc SB |
1133 | static int __clk_set_parent(struct clk_core *core, struct clk_core *parent, |
1134 | u8 p_index) | |
1135 | { | |
1136 | unsigned long flags; | |
1137 | int ret = 0; | |
1138 | struct clk_core *old_parent; | |
b2476490 | 1139 | |
4dff95dc | 1140 | old_parent = __clk_set_parent_before(core, parent); |
b2476490 | 1141 | |
4dff95dc | 1142 | trace_clk_set_parent(core, parent); |
b2476490 | 1143 | |
4dff95dc SB |
1144 | /* change clock input source */ |
1145 | if (parent && core->ops->set_parent) | |
1146 | ret = core->ops->set_parent(core->hw, p_index); | |
dfc202ea | 1147 | |
4dff95dc | 1148 | trace_clk_set_parent_complete(core, parent); |
dfc202ea | 1149 | |
4dff95dc SB |
1150 | if (ret) { |
1151 | flags = clk_enable_lock(); | |
1152 | clk_reparent(core, old_parent); | |
1153 | clk_enable_unlock(flags); | |
dfc202ea | 1154 | |
4dff95dc | 1155 | if (core->prepare_count) { |
d2a5d46b | 1156 | flags = clk_enable_lock(); |
4dff95dc SB |
1157 | clk_core_disable(core); |
1158 | clk_core_disable(parent); | |
d2a5d46b | 1159 | clk_enable_unlock(flags); |
4dff95dc | 1160 | clk_core_unprepare(parent); |
b2476490 | 1161 | } |
4dff95dc | 1162 | return ret; |
b2476490 MT |
1163 | } |
1164 | ||
4dff95dc SB |
1165 | __clk_set_parent_after(core, parent, old_parent); |
1166 | ||
b2476490 MT |
1167 | return 0; |
1168 | } | |
1169 | ||
1170 | /** | |
4dff95dc SB |
1171 | * __clk_speculate_rates |
1172 | * @core: first clk in the subtree | |
1173 | * @parent_rate: the "future" rate of clk's parent | |
b2476490 | 1174 | * |
4dff95dc SB |
1175 | * Walks the subtree of clks starting with clk, speculating rates as it |
1176 | * goes and firing off PRE_RATE_CHANGE notifications as necessary. | |
1177 | * | |
1178 | * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending | |
1179 | * pre-rate change notifications and returns early if no clks in the | |
1180 | * subtree have subscribed to the notifications. Note that if a clk does not | |
1181 | * implement the .recalc_rate callback then it is assumed that the clock will | |
1182 | * take on the rate of its parent. | |
b2476490 | 1183 | */ |
4dff95dc SB |
1184 | static int __clk_speculate_rates(struct clk_core *core, |
1185 | unsigned long parent_rate) | |
b2476490 | 1186 | { |
4dff95dc SB |
1187 | struct clk_core *child; |
1188 | unsigned long new_rate; | |
1189 | int ret = NOTIFY_DONE; | |
b2476490 | 1190 | |
4dff95dc | 1191 | lockdep_assert_held(&prepare_lock); |
864e160a | 1192 | |
4dff95dc SB |
1193 | new_rate = clk_recalc(core, parent_rate); |
1194 | ||
1195 | /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */ | |
1196 | if (core->notifier_count) | |
1197 | ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate); | |
1198 | ||
1199 | if (ret & NOTIFY_STOP_MASK) { | |
1200 | pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", | |
1201 | __func__, core->name, ret); | |
1202 | goto out; | |
1203 | } | |
1204 | ||
1205 | hlist_for_each_entry(child, &core->children, child_node) { | |
1206 | ret = __clk_speculate_rates(child, new_rate); | |
1207 | if (ret & NOTIFY_STOP_MASK) | |
1208 | break; | |
1209 | } | |
b2476490 | 1210 | |
4dff95dc | 1211 | out: |
b2476490 MT |
1212 | return ret; |
1213 | } | |
b2476490 | 1214 | |
4dff95dc SB |
1215 | static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate, |
1216 | struct clk_core *new_parent, u8 p_index) | |
b2476490 | 1217 | { |
4dff95dc | 1218 | struct clk_core *child; |
b2476490 | 1219 | |
4dff95dc SB |
1220 | core->new_rate = new_rate; |
1221 | core->new_parent = new_parent; | |
1222 | core->new_parent_index = p_index; | |
1223 | /* include clk in new parent's PRE_RATE_CHANGE notifications */ | |
1224 | core->new_child = NULL; | |
1225 | if (new_parent && new_parent != core->parent) | |
1226 | new_parent->new_child = core; | |
496eadf8 | 1227 | |
4dff95dc SB |
1228 | hlist_for_each_entry(child, &core->children, child_node) { |
1229 | child->new_rate = clk_recalc(child, new_rate); | |
1230 | clk_calc_subtree(child, child->new_rate, NULL, 0); | |
1231 | } | |
1232 | } | |
b2476490 | 1233 | |
4dff95dc SB |
1234 | /* |
1235 | * calculate the new rates returning the topmost clock that has to be | |
1236 | * changed. | |
1237 | */ | |
1238 | static struct clk_core *clk_calc_new_rates(struct clk_core *core, | |
1239 | unsigned long rate) | |
1240 | { | |
1241 | struct clk_core *top = core; | |
1242 | struct clk_core *old_parent, *parent; | |
1243 | struct clk_hw *parent_hw; | |
1244 | unsigned long best_parent_rate = 0; | |
1245 | unsigned long new_rate; | |
1246 | unsigned long min_rate; | |
1247 | unsigned long max_rate; | |
1248 | int p_index = 0; | |
1249 | long ret; | |
1250 | ||
1251 | /* sanity */ | |
1252 | if (IS_ERR_OR_NULL(core)) | |
1253 | return NULL; | |
1254 | ||
1255 | /* save parent rate, if it exists */ | |
1256 | parent = old_parent = core->parent; | |
71472c0c | 1257 | if (parent) |
4dff95dc | 1258 | best_parent_rate = parent->rate; |
71472c0c | 1259 | |
4dff95dc SB |
1260 | clk_core_get_boundaries(core, &min_rate, &max_rate); |
1261 | ||
1262 | /* find the closest rate and parent clk/rate */ | |
d6968fca | 1263 | if (core->ops->determine_rate) { |
646cafc6 | 1264 | parent_hw = parent ? parent->hw : NULL; |
4dff95dc SB |
1265 | ret = core->ops->determine_rate(core->hw, rate, |
1266 | min_rate, | |
1267 | max_rate, | |
1268 | &best_parent_rate, | |
1269 | &parent_hw); | |
1270 | if (ret < 0) | |
1271 | return NULL; | |
1c8e6004 | 1272 | |
4dff95dc SB |
1273 | new_rate = ret; |
1274 | parent = parent_hw ? parent_hw->core : NULL; | |
1275 | } else if (core->ops->round_rate) { | |
1276 | ret = core->ops->round_rate(core->hw, rate, | |
1277 | &best_parent_rate); | |
1278 | if (ret < 0) | |
1279 | return NULL; | |
035a61c3 | 1280 | |
4dff95dc SB |
1281 | new_rate = ret; |
1282 | if (new_rate < min_rate || new_rate > max_rate) | |
1283 | return NULL; | |
1284 | } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) { | |
1285 | /* pass-through clock without adjustable parent */ | |
1286 | core->new_rate = core->rate; | |
1287 | return NULL; | |
1288 | } else { | |
1289 | /* pass-through clock with adjustable parent */ | |
1290 | top = clk_calc_new_rates(parent, rate); | |
1291 | new_rate = parent->new_rate; | |
1292 | goto out; | |
1293 | } | |
1c8e6004 | 1294 | |
4dff95dc SB |
1295 | /* some clocks must be gated to change parent */ |
1296 | if (parent != old_parent && | |
1297 | (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1298 | pr_debug("%s: %s not gated but wants to reparent\n", | |
1299 | __func__, core->name); | |
1300 | return NULL; | |
1301 | } | |
b2476490 | 1302 | |
4dff95dc SB |
1303 | /* try finding the new parent index */ |
1304 | if (parent && core->num_parents > 1) { | |
1305 | p_index = clk_fetch_parent_index(core, parent); | |
1306 | if (p_index < 0) { | |
1307 | pr_debug("%s: clk %s can not be parent of clk %s\n", | |
1308 | __func__, parent->name, core->name); | |
1309 | return NULL; | |
1310 | } | |
1311 | } | |
b2476490 | 1312 | |
4dff95dc SB |
1313 | if ((core->flags & CLK_SET_RATE_PARENT) && parent && |
1314 | best_parent_rate != parent->rate) | |
1315 | top = clk_calc_new_rates(parent, best_parent_rate); | |
035a61c3 | 1316 | |
4dff95dc SB |
1317 | out: |
1318 | clk_calc_subtree(core, new_rate, parent, p_index); | |
b2476490 | 1319 | |
4dff95dc | 1320 | return top; |
b2476490 | 1321 | } |
b2476490 | 1322 | |
4dff95dc SB |
1323 | /* |
1324 | * Notify about rate changes in a subtree. Always walk down the whole tree | |
1325 | * so that in case of an error we can walk down the whole tree again and | |
1326 | * abort the change. | |
b2476490 | 1327 | */ |
4dff95dc SB |
1328 | static struct clk_core *clk_propagate_rate_change(struct clk_core *core, |
1329 | unsigned long event) | |
b2476490 | 1330 | { |
4dff95dc | 1331 | struct clk_core *child, *tmp_clk, *fail_clk = NULL; |
b2476490 MT |
1332 | int ret = NOTIFY_DONE; |
1333 | ||
4dff95dc SB |
1334 | if (core->rate == core->new_rate) |
1335 | return NULL; | |
b2476490 | 1336 | |
4dff95dc SB |
1337 | if (core->notifier_count) { |
1338 | ret = __clk_notify(core, event, core->rate, core->new_rate); | |
1339 | if (ret & NOTIFY_STOP_MASK) | |
1340 | fail_clk = core; | |
b2476490 MT |
1341 | } |
1342 | ||
4dff95dc SB |
1343 | hlist_for_each_entry(child, &core->children, child_node) { |
1344 | /* Skip children who will be reparented to another clock */ | |
1345 | if (child->new_parent && child->new_parent != core) | |
1346 | continue; | |
1347 | tmp_clk = clk_propagate_rate_change(child, event); | |
1348 | if (tmp_clk) | |
1349 | fail_clk = tmp_clk; | |
1350 | } | |
5279fc40 | 1351 | |
4dff95dc SB |
1352 | /* handle the new child who might not be in core->children yet */ |
1353 | if (core->new_child) { | |
1354 | tmp_clk = clk_propagate_rate_change(core->new_child, event); | |
1355 | if (tmp_clk) | |
1356 | fail_clk = tmp_clk; | |
1357 | } | |
5279fc40 | 1358 | |
4dff95dc | 1359 | return fail_clk; |
5279fc40 BB |
1360 | } |
1361 | ||
4dff95dc SB |
1362 | /* |
1363 | * walk down a subtree and set the new rates notifying the rate | |
1364 | * change on the way | |
1365 | */ | |
1366 | static void clk_change_rate(struct clk_core *core) | |
035a61c3 | 1367 | { |
4dff95dc SB |
1368 | struct clk_core *child; |
1369 | struct hlist_node *tmp; | |
1370 | unsigned long old_rate; | |
1371 | unsigned long best_parent_rate = 0; | |
1372 | bool skip_set_rate = false; | |
1373 | struct clk_core *old_parent; | |
035a61c3 | 1374 | |
4dff95dc | 1375 | old_rate = core->rate; |
035a61c3 | 1376 | |
4dff95dc SB |
1377 | if (core->new_parent) |
1378 | best_parent_rate = core->new_parent->rate; | |
1379 | else if (core->parent) | |
1380 | best_parent_rate = core->parent->rate; | |
035a61c3 | 1381 | |
4dff95dc SB |
1382 | if (core->new_parent && core->new_parent != core->parent) { |
1383 | old_parent = __clk_set_parent_before(core, core->new_parent); | |
1384 | trace_clk_set_parent(core, core->new_parent); | |
5279fc40 | 1385 | |
4dff95dc SB |
1386 | if (core->ops->set_rate_and_parent) { |
1387 | skip_set_rate = true; | |
1388 | core->ops->set_rate_and_parent(core->hw, core->new_rate, | |
1389 | best_parent_rate, | |
1390 | core->new_parent_index); | |
1391 | } else if (core->ops->set_parent) { | |
1392 | core->ops->set_parent(core->hw, core->new_parent_index); | |
1393 | } | |
5279fc40 | 1394 | |
4dff95dc SB |
1395 | trace_clk_set_parent_complete(core, core->new_parent); |
1396 | __clk_set_parent_after(core, core->new_parent, old_parent); | |
1397 | } | |
8f2c2db1 | 1398 | |
4dff95dc | 1399 | trace_clk_set_rate(core, core->new_rate); |
b2476490 | 1400 | |
4dff95dc SB |
1401 | if (!skip_set_rate && core->ops->set_rate) |
1402 | core->ops->set_rate(core->hw, core->new_rate, best_parent_rate); | |
496eadf8 | 1403 | |
4dff95dc | 1404 | trace_clk_set_rate_complete(core, core->new_rate); |
b2476490 | 1405 | |
4dff95dc | 1406 | core->rate = clk_recalc(core, best_parent_rate); |
b2476490 | 1407 | |
4dff95dc SB |
1408 | if (core->notifier_count && old_rate != core->rate) |
1409 | __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); | |
b2476490 MT |
1410 | |
1411 | /* | |
4dff95dc SB |
1412 | * Use safe iteration, as change_rate can actually swap parents |
1413 | * for certain clock types. | |
b2476490 | 1414 | */ |
4dff95dc SB |
1415 | hlist_for_each_entry_safe(child, tmp, &core->children, child_node) { |
1416 | /* Skip children who will be reparented to another clock */ | |
1417 | if (child->new_parent && child->new_parent != core) | |
1418 | continue; | |
1419 | clk_change_rate(child); | |
1420 | } | |
b2476490 | 1421 | |
4dff95dc SB |
1422 | /* handle the new child who might not be in core->children yet */ |
1423 | if (core->new_child) | |
1424 | clk_change_rate(core->new_child); | |
b2476490 MT |
1425 | } |
1426 | ||
4dff95dc SB |
1427 | static int clk_core_set_rate_nolock(struct clk_core *core, |
1428 | unsigned long req_rate) | |
a093bde2 | 1429 | { |
4dff95dc SB |
1430 | struct clk_core *top, *fail_clk; |
1431 | unsigned long rate = req_rate; | |
1432 | int ret = 0; | |
a093bde2 | 1433 | |
4dff95dc SB |
1434 | if (!core) |
1435 | return 0; | |
a093bde2 | 1436 | |
4dff95dc SB |
1437 | /* bail early if nothing to do */ |
1438 | if (rate == clk_core_get_rate_nolock(core)) | |
1439 | return 0; | |
a093bde2 | 1440 | |
4dff95dc SB |
1441 | if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count) |
1442 | return -EBUSY; | |
a093bde2 | 1443 | |
4dff95dc SB |
1444 | /* calculate new rates and get the topmost changed clock */ |
1445 | top = clk_calc_new_rates(core, rate); | |
1446 | if (!top) | |
1447 | return -EINVAL; | |
1448 | ||
1449 | /* notify that we are about to change rates */ | |
1450 | fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); | |
1451 | if (fail_clk) { | |
1452 | pr_debug("%s: failed to set %s rate\n", __func__, | |
1453 | fail_clk->name); | |
1454 | clk_propagate_rate_change(top, ABORT_RATE_CHANGE); | |
1455 | return -EBUSY; | |
1456 | } | |
1457 | ||
1458 | /* change the rates */ | |
1459 | clk_change_rate(top); | |
1460 | ||
1461 | core->req_rate = req_rate; | |
1462 | ||
1463 | return ret; | |
a093bde2 | 1464 | } |
035a61c3 TV |
1465 | |
1466 | /** | |
4dff95dc SB |
1467 | * clk_set_rate - specify a new rate for clk |
1468 | * @clk: the clk whose rate is being changed | |
1469 | * @rate: the new rate for clk | |
035a61c3 | 1470 | * |
4dff95dc SB |
1471 | * In the simplest case clk_set_rate will only adjust the rate of clk. |
1472 | * | |
1473 | * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to | |
1474 | * propagate up to clk's parent; whether or not this happens depends on the | |
1475 | * outcome of clk's .round_rate implementation. If *parent_rate is unchanged | |
1476 | * after calling .round_rate then upstream parent propagation is ignored. If | |
1477 | * *parent_rate comes back with a new rate for clk's parent then we propagate | |
1478 | * up to clk's parent and set its rate. Upward propagation will continue | |
1479 | * until either a clk does not support the CLK_SET_RATE_PARENT flag or | |
1480 | * .round_rate stops requesting changes to clk's parent_rate. | |
1481 | * | |
1482 | * Rate changes are accomplished via tree traversal that also recalculates the | |
1483 | * rates for the clocks and fires off POST_RATE_CHANGE notifiers. | |
1484 | * | |
1485 | * Returns 0 on success, -EERROR otherwise. | |
035a61c3 | 1486 | */ |
4dff95dc | 1487 | int clk_set_rate(struct clk *clk, unsigned long rate) |
035a61c3 | 1488 | { |
4dff95dc SB |
1489 | int ret; |
1490 | ||
035a61c3 TV |
1491 | if (!clk) |
1492 | return 0; | |
1493 | ||
4dff95dc SB |
1494 | /* prevent racing with updates to the clock topology */ |
1495 | clk_prepare_lock(); | |
da0f0b2c | 1496 | |
4dff95dc | 1497 | ret = clk_core_set_rate_nolock(clk->core, rate); |
da0f0b2c | 1498 | |
4dff95dc | 1499 | clk_prepare_unlock(); |
4935b22c | 1500 | |
4dff95dc | 1501 | return ret; |
4935b22c | 1502 | } |
4dff95dc | 1503 | EXPORT_SYMBOL_GPL(clk_set_rate); |
4935b22c | 1504 | |
4dff95dc SB |
1505 | /** |
1506 | * clk_set_rate_range - set a rate range for a clock source | |
1507 | * @clk: clock source | |
1508 | * @min: desired minimum clock rate in Hz, inclusive | |
1509 | * @max: desired maximum clock rate in Hz, inclusive | |
1510 | * | |
1511 | * Returns success (0) or negative errno. | |
1512 | */ | |
1513 | int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) | |
4935b22c | 1514 | { |
4dff95dc | 1515 | int ret = 0; |
4935b22c | 1516 | |
4dff95dc SB |
1517 | if (!clk) |
1518 | return 0; | |
903efc55 | 1519 | |
4dff95dc SB |
1520 | if (min > max) { |
1521 | pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n", | |
1522 | __func__, clk->core->name, clk->dev_id, clk->con_id, | |
1523 | min, max); | |
1524 | return -EINVAL; | |
903efc55 | 1525 | } |
4935b22c | 1526 | |
4dff95dc | 1527 | clk_prepare_lock(); |
4935b22c | 1528 | |
4dff95dc SB |
1529 | if (min != clk->min_rate || max != clk->max_rate) { |
1530 | clk->min_rate = min; | |
1531 | clk->max_rate = max; | |
1532 | ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
4935b22c JH |
1533 | } |
1534 | ||
4dff95dc | 1535 | clk_prepare_unlock(); |
4935b22c | 1536 | |
4dff95dc | 1537 | return ret; |
3fa2252b | 1538 | } |
4dff95dc | 1539 | EXPORT_SYMBOL_GPL(clk_set_rate_range); |
3fa2252b | 1540 | |
4dff95dc SB |
1541 | /** |
1542 | * clk_set_min_rate - set a minimum clock rate for a clock source | |
1543 | * @clk: clock source | |
1544 | * @rate: desired minimum clock rate in Hz, inclusive | |
1545 | * | |
1546 | * Returns success (0) or negative errno. | |
1547 | */ | |
1548 | int clk_set_min_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 1549 | { |
4dff95dc SB |
1550 | if (!clk) |
1551 | return 0; | |
1552 | ||
1553 | return clk_set_rate_range(clk, rate, clk->max_rate); | |
3fa2252b | 1554 | } |
4dff95dc | 1555 | EXPORT_SYMBOL_GPL(clk_set_min_rate); |
3fa2252b | 1556 | |
4dff95dc SB |
1557 | /** |
1558 | * clk_set_max_rate - set a maximum clock rate for a clock source | |
1559 | * @clk: clock source | |
1560 | * @rate: desired maximum clock rate in Hz, inclusive | |
1561 | * | |
1562 | * Returns success (0) or negative errno. | |
1563 | */ | |
1564 | int clk_set_max_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 1565 | { |
4dff95dc SB |
1566 | if (!clk) |
1567 | return 0; | |
4935b22c | 1568 | |
4dff95dc | 1569 | return clk_set_rate_range(clk, clk->min_rate, rate); |
4935b22c | 1570 | } |
4dff95dc | 1571 | EXPORT_SYMBOL_GPL(clk_set_max_rate); |
4935b22c | 1572 | |
b2476490 | 1573 | /** |
4dff95dc SB |
1574 | * clk_get_parent - return the parent of a clk |
1575 | * @clk: the clk whose parent gets returned | |
b2476490 | 1576 | * |
4dff95dc | 1577 | * Simply returns clk->parent. Returns NULL if clk is NULL. |
b2476490 | 1578 | */ |
4dff95dc | 1579 | struct clk *clk_get_parent(struct clk *clk) |
b2476490 | 1580 | { |
4dff95dc | 1581 | struct clk *parent; |
b2476490 | 1582 | |
4dff95dc SB |
1583 | clk_prepare_lock(); |
1584 | parent = __clk_get_parent(clk); | |
1585 | clk_prepare_unlock(); | |
496eadf8 | 1586 | |
4dff95dc SB |
1587 | return parent; |
1588 | } | |
1589 | EXPORT_SYMBOL_GPL(clk_get_parent); | |
b2476490 | 1590 | |
4dff95dc SB |
1591 | /* |
1592 | * .get_parent is mandatory for clocks with multiple possible parents. It is | |
1593 | * optional for single-parent clocks. Always call .get_parent if it is | |
1594 | * available and WARN if it is missing for multi-parent clocks. | |
1595 | * | |
1596 | * For single-parent clocks without .get_parent, first check to see if the | |
1597 | * .parents array exists, and if so use it to avoid an expensive tree | |
1598 | * traversal. If .parents does not exist then walk the tree. | |
1599 | */ | |
1600 | static struct clk_core *__clk_init_parent(struct clk_core *core) | |
1601 | { | |
1602 | struct clk_core *ret = NULL; | |
1603 | u8 index; | |
b2476490 | 1604 | |
4dff95dc SB |
1605 | /* handle the trivial cases */ |
1606 | ||
1607 | if (!core->num_parents) | |
b2476490 MT |
1608 | goto out; |
1609 | ||
4dff95dc SB |
1610 | if (core->num_parents == 1) { |
1611 | if (IS_ERR_OR_NULL(core->parent)) | |
1612 | core->parent = clk_core_lookup(core->parent_names[0]); | |
1613 | ret = core->parent; | |
1614 | goto out; | |
b2476490 MT |
1615 | } |
1616 | ||
4dff95dc SB |
1617 | if (!core->ops->get_parent) { |
1618 | WARN(!core->ops->get_parent, | |
1619 | "%s: multi-parent clocks must implement .get_parent\n", | |
1620 | __func__); | |
1621 | goto out; | |
1622 | }; | |
1623 | ||
1624 | /* | |
1625 | * Do our best to cache parent clocks in core->parents. This prevents | |
1626 | * unnecessary and expensive lookups. We don't set core->parent here; | |
1627 | * that is done by the calling function. | |
1628 | */ | |
1629 | ||
1630 | index = core->ops->get_parent(core->hw); | |
1631 | ||
1632 | if (!core->parents) | |
1633 | core->parents = | |
1634 | kcalloc(core->num_parents, sizeof(struct clk *), | |
1635 | GFP_KERNEL); | |
1636 | ||
1637 | ret = clk_core_get_parent_by_index(core, index); | |
1638 | ||
b2476490 MT |
1639 | out: |
1640 | return ret; | |
1641 | } | |
1642 | ||
4dff95dc SB |
1643 | static void clk_core_reparent(struct clk_core *core, |
1644 | struct clk_core *new_parent) | |
b2476490 | 1645 | { |
4dff95dc SB |
1646 | clk_reparent(core, new_parent); |
1647 | __clk_recalc_accuracies(core); | |
1648 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
b2476490 MT |
1649 | } |
1650 | ||
4dff95dc SB |
1651 | /** |
1652 | * clk_has_parent - check if a clock is a possible parent for another | |
1653 | * @clk: clock source | |
1654 | * @parent: parent clock source | |
1655 | * | |
1656 | * This function can be used in drivers that need to check that a clock can be | |
1657 | * the parent of another without actually changing the parent. | |
1658 | * | |
1659 | * Returns true if @parent is a possible parent for @clk, false otherwise. | |
b2476490 | 1660 | */ |
4dff95dc | 1661 | bool clk_has_parent(struct clk *clk, struct clk *parent) |
b2476490 | 1662 | { |
4dff95dc SB |
1663 | struct clk_core *core, *parent_core; |
1664 | unsigned int i; | |
b2476490 | 1665 | |
4dff95dc SB |
1666 | /* NULL clocks should be nops, so return success if either is NULL. */ |
1667 | if (!clk || !parent) | |
1668 | return true; | |
7452b219 | 1669 | |
4dff95dc SB |
1670 | core = clk->core; |
1671 | parent_core = parent->core; | |
71472c0c | 1672 | |
4dff95dc SB |
1673 | /* Optimize for the case where the parent is already the parent. */ |
1674 | if (core->parent == parent_core) | |
1675 | return true; | |
1c8e6004 | 1676 | |
4dff95dc SB |
1677 | for (i = 0; i < core->num_parents; i++) |
1678 | if (strcmp(core->parent_names[i], parent_core->name) == 0) | |
1679 | return true; | |
03bc10ab | 1680 | |
4dff95dc SB |
1681 | return false; |
1682 | } | |
1683 | EXPORT_SYMBOL_GPL(clk_has_parent); | |
03bc10ab | 1684 | |
4dff95dc SB |
1685 | static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent) |
1686 | { | |
1687 | int ret = 0; | |
1688 | int p_index = 0; | |
1689 | unsigned long p_rate = 0; | |
1690 | ||
1691 | if (!core) | |
1692 | return 0; | |
1693 | ||
1694 | /* prevent racing with updates to the clock topology */ | |
1695 | clk_prepare_lock(); | |
1696 | ||
1697 | if (core->parent == parent) | |
1698 | goto out; | |
1699 | ||
1700 | /* verify ops for for multi-parent clks */ | |
1701 | if ((core->num_parents > 1) && (!core->ops->set_parent)) { | |
1702 | ret = -ENOSYS; | |
63f5c3b2 | 1703 | goto out; |
7452b219 MT |
1704 | } |
1705 | ||
4dff95dc SB |
1706 | /* check that we are allowed to re-parent if the clock is in use */ |
1707 | if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1708 | ret = -EBUSY; | |
1709 | goto out; | |
b2476490 MT |
1710 | } |
1711 | ||
71472c0c | 1712 | /* try finding the new parent index */ |
4dff95dc | 1713 | if (parent) { |
d6968fca | 1714 | p_index = clk_fetch_parent_index(core, parent); |
4dff95dc | 1715 | p_rate = parent->rate; |
f1c8b2ed | 1716 | if (p_index < 0) { |
71472c0c | 1717 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
4dff95dc SB |
1718 | __func__, parent->name, core->name); |
1719 | ret = p_index; | |
1720 | goto out; | |
71472c0c | 1721 | } |
b2476490 MT |
1722 | } |
1723 | ||
4dff95dc SB |
1724 | /* propagate PRE_RATE_CHANGE notifications */ |
1725 | ret = __clk_speculate_rates(core, p_rate); | |
b2476490 | 1726 | |
4dff95dc SB |
1727 | /* abort if a driver objects */ |
1728 | if (ret & NOTIFY_STOP_MASK) | |
1729 | goto out; | |
b2476490 | 1730 | |
4dff95dc SB |
1731 | /* do the re-parent */ |
1732 | ret = __clk_set_parent(core, parent, p_index); | |
b2476490 | 1733 | |
4dff95dc SB |
1734 | /* propagate rate an accuracy recalculation accordingly */ |
1735 | if (ret) { | |
1736 | __clk_recalc_rates(core, ABORT_RATE_CHANGE); | |
1737 | } else { | |
1738 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
1739 | __clk_recalc_accuracies(core); | |
b2476490 MT |
1740 | } |
1741 | ||
4dff95dc SB |
1742 | out: |
1743 | clk_prepare_unlock(); | |
71472c0c | 1744 | |
4dff95dc SB |
1745 | return ret; |
1746 | } | |
b2476490 | 1747 | |
4dff95dc SB |
1748 | /** |
1749 | * clk_set_parent - switch the parent of a mux clk | |
1750 | * @clk: the mux clk whose input we are switching | |
1751 | * @parent: the new input to clk | |
1752 | * | |
1753 | * Re-parent clk to use parent as its new input source. If clk is in | |
1754 | * prepared state, the clk will get enabled for the duration of this call. If | |
1755 | * that's not acceptable for a specific clk (Eg: the consumer can't handle | |
1756 | * that, the reparenting is glitchy in hardware, etc), use the | |
1757 | * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared. | |
1758 | * | |
1759 | * After successfully changing clk's parent clk_set_parent will update the | |
1760 | * clk topology, sysfs topology and propagate rate recalculation via | |
1761 | * __clk_recalc_rates. | |
1762 | * | |
1763 | * Returns 0 on success, -EERROR otherwise. | |
1764 | */ | |
1765 | int clk_set_parent(struct clk *clk, struct clk *parent) | |
1766 | { | |
1767 | if (!clk) | |
1768 | return 0; | |
1769 | ||
1770 | return clk_core_set_parent(clk->core, parent ? parent->core : NULL); | |
b2476490 | 1771 | } |
4dff95dc | 1772 | EXPORT_SYMBOL_GPL(clk_set_parent); |
b2476490 | 1773 | |
4dff95dc SB |
1774 | /** |
1775 | * clk_set_phase - adjust the phase shift of a clock signal | |
1776 | * @clk: clock signal source | |
1777 | * @degrees: number of degrees the signal is shifted | |
1778 | * | |
1779 | * Shifts the phase of a clock signal by the specified | |
1780 | * degrees. Returns 0 on success, -EERROR otherwise. | |
1781 | * | |
1782 | * This function makes no distinction about the input or reference | |
1783 | * signal that we adjust the clock signal phase against. For example | |
1784 | * phase locked-loop clock signal generators we may shift phase with | |
1785 | * respect to feedback clock signal input, but for other cases the | |
1786 | * clock phase may be shifted with respect to some other, unspecified | |
1787 | * signal. | |
1788 | * | |
1789 | * Additionally the concept of phase shift does not propagate through | |
1790 | * the clock tree hierarchy, which sets it apart from clock rates and | |
1791 | * clock accuracy. A parent clock phase attribute does not have an | |
1792 | * impact on the phase attribute of a child clock. | |
b2476490 | 1793 | */ |
4dff95dc | 1794 | int clk_set_phase(struct clk *clk, int degrees) |
b2476490 | 1795 | { |
4dff95dc | 1796 | int ret = -EINVAL; |
b2476490 | 1797 | |
4dff95dc SB |
1798 | if (!clk) |
1799 | return 0; | |
b2476490 | 1800 | |
4dff95dc SB |
1801 | /* sanity check degrees */ |
1802 | degrees %= 360; | |
1803 | if (degrees < 0) | |
1804 | degrees += 360; | |
bf47b4fd | 1805 | |
4dff95dc | 1806 | clk_prepare_lock(); |
3fa2252b | 1807 | |
4dff95dc | 1808 | trace_clk_set_phase(clk->core, degrees); |
3fa2252b | 1809 | |
4dff95dc SB |
1810 | if (clk->core->ops->set_phase) |
1811 | ret = clk->core->ops->set_phase(clk->core->hw, degrees); | |
3fa2252b | 1812 | |
4dff95dc | 1813 | trace_clk_set_phase_complete(clk->core, degrees); |
dfc202ea | 1814 | |
4dff95dc SB |
1815 | if (!ret) |
1816 | clk->core->phase = degrees; | |
b2476490 | 1817 | |
4dff95dc | 1818 | clk_prepare_unlock(); |
dfc202ea | 1819 | |
4dff95dc SB |
1820 | return ret; |
1821 | } | |
1822 | EXPORT_SYMBOL_GPL(clk_set_phase); | |
b2476490 | 1823 | |
4dff95dc SB |
1824 | static int clk_core_get_phase(struct clk_core *core) |
1825 | { | |
1826 | int ret; | |
b2476490 | 1827 | |
4dff95dc SB |
1828 | clk_prepare_lock(); |
1829 | ret = core->phase; | |
1830 | clk_prepare_unlock(); | |
71472c0c | 1831 | |
4dff95dc | 1832 | return ret; |
b2476490 MT |
1833 | } |
1834 | ||
4dff95dc SB |
1835 | /** |
1836 | * clk_get_phase - return the phase shift of a clock signal | |
1837 | * @clk: clock signal source | |
1838 | * | |
1839 | * Returns the phase shift of a clock node in degrees, otherwise returns | |
1840 | * -EERROR. | |
1841 | */ | |
1842 | int clk_get_phase(struct clk *clk) | |
1c8e6004 | 1843 | { |
4dff95dc | 1844 | if (!clk) |
1c8e6004 TV |
1845 | return 0; |
1846 | ||
4dff95dc SB |
1847 | return clk_core_get_phase(clk->core); |
1848 | } | |
1849 | EXPORT_SYMBOL_GPL(clk_get_phase); | |
1c8e6004 | 1850 | |
4dff95dc SB |
1851 | /** |
1852 | * clk_is_match - check if two clk's point to the same hardware clock | |
1853 | * @p: clk compared against q | |
1854 | * @q: clk compared against p | |
1855 | * | |
1856 | * Returns true if the two struct clk pointers both point to the same hardware | |
1857 | * clock node. Put differently, returns true if struct clk *p and struct clk *q | |
1858 | * share the same struct clk_core object. | |
1859 | * | |
1860 | * Returns false otherwise. Note that two NULL clks are treated as matching. | |
1861 | */ | |
1862 | bool clk_is_match(const struct clk *p, const struct clk *q) | |
1863 | { | |
1864 | /* trivial case: identical struct clk's or both NULL */ | |
1865 | if (p == q) | |
1866 | return true; | |
1c8e6004 | 1867 | |
4dff95dc SB |
1868 | /* true if clk->core pointers match. Avoid derefing garbage */ |
1869 | if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q)) | |
1870 | if (p->core == q->core) | |
1871 | return true; | |
1c8e6004 | 1872 | |
4dff95dc SB |
1873 | return false; |
1874 | } | |
1875 | EXPORT_SYMBOL_GPL(clk_is_match); | |
1c8e6004 | 1876 | |
4dff95dc | 1877 | /*** debugfs support ***/ |
1c8e6004 | 1878 | |
4dff95dc SB |
1879 | #ifdef CONFIG_DEBUG_FS |
1880 | #include <linux/debugfs.h> | |
1c8e6004 | 1881 | |
4dff95dc SB |
1882 | static struct dentry *rootdir; |
1883 | static int inited = 0; | |
1884 | static DEFINE_MUTEX(clk_debug_lock); | |
1885 | static HLIST_HEAD(clk_debug_list); | |
1c8e6004 | 1886 | |
4dff95dc SB |
1887 | static struct hlist_head *all_lists[] = { |
1888 | &clk_root_list, | |
1889 | &clk_orphan_list, | |
1890 | NULL, | |
1891 | }; | |
1892 | ||
1893 | static struct hlist_head *orphan_list[] = { | |
1894 | &clk_orphan_list, | |
1895 | NULL, | |
1896 | }; | |
1897 | ||
1898 | static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, | |
1899 | int level) | |
b2476490 | 1900 | { |
4dff95dc SB |
1901 | if (!c) |
1902 | return; | |
b2476490 | 1903 | |
4dff95dc SB |
1904 | seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n", |
1905 | level * 3 + 1, "", | |
1906 | 30 - level * 3, c->name, | |
1907 | c->enable_count, c->prepare_count, clk_core_get_rate(c), | |
1908 | clk_core_get_accuracy(c), clk_core_get_phase(c)); | |
1909 | } | |
89ac8d7a | 1910 | |
4dff95dc SB |
1911 | static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, |
1912 | int level) | |
1913 | { | |
1914 | struct clk_core *child; | |
b2476490 | 1915 | |
4dff95dc SB |
1916 | if (!c) |
1917 | return; | |
b2476490 | 1918 | |
4dff95dc | 1919 | clk_summary_show_one(s, c, level); |
0e1c0301 | 1920 | |
4dff95dc SB |
1921 | hlist_for_each_entry(child, &c->children, child_node) |
1922 | clk_summary_show_subtree(s, child, level + 1); | |
1c8e6004 | 1923 | } |
b2476490 | 1924 | |
4dff95dc | 1925 | static int clk_summary_show(struct seq_file *s, void *data) |
1c8e6004 | 1926 | { |
4dff95dc SB |
1927 | struct clk_core *c; |
1928 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
1c8e6004 | 1929 | |
4dff95dc SB |
1930 | seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n"); |
1931 | seq_puts(s, "----------------------------------------------------------------------------------------\n"); | |
b2476490 | 1932 | |
1c8e6004 TV |
1933 | clk_prepare_lock(); |
1934 | ||
4dff95dc SB |
1935 | for (; *lists; lists++) |
1936 | hlist_for_each_entry(c, *lists, child_node) | |
1937 | clk_summary_show_subtree(s, c, 0); | |
b2476490 | 1938 | |
eab89f69 | 1939 | clk_prepare_unlock(); |
b2476490 | 1940 | |
4dff95dc | 1941 | return 0; |
b2476490 | 1942 | } |
1c8e6004 | 1943 | |
1c8e6004 | 1944 | |
4dff95dc | 1945 | static int clk_summary_open(struct inode *inode, struct file *file) |
1c8e6004 | 1946 | { |
4dff95dc | 1947 | return single_open(file, clk_summary_show, inode->i_private); |
1c8e6004 | 1948 | } |
b2476490 | 1949 | |
4dff95dc SB |
1950 | static const struct file_operations clk_summary_fops = { |
1951 | .open = clk_summary_open, | |
1952 | .read = seq_read, | |
1953 | .llseek = seq_lseek, | |
1954 | .release = single_release, | |
1955 | }; | |
b2476490 | 1956 | |
4dff95dc SB |
1957 | static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) |
1958 | { | |
1959 | if (!c) | |
1960 | return; | |
b2476490 | 1961 | |
7cb81136 | 1962 | /* This should be JSON format, i.e. elements separated with a comma */ |
4dff95dc SB |
1963 | seq_printf(s, "\"%s\": { ", c->name); |
1964 | seq_printf(s, "\"enable_count\": %d,", c->enable_count); | |
1965 | seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); | |
7cb81136 SW |
1966 | seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c)); |
1967 | seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c)); | |
4dff95dc | 1968 | seq_printf(s, "\"phase\": %d", clk_core_get_phase(c)); |
b2476490 | 1969 | } |
b2476490 | 1970 | |
4dff95dc | 1971 | static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) |
b2476490 | 1972 | { |
4dff95dc | 1973 | struct clk_core *child; |
b2476490 | 1974 | |
4dff95dc SB |
1975 | if (!c) |
1976 | return; | |
b2476490 | 1977 | |
4dff95dc | 1978 | clk_dump_one(s, c, level); |
b2476490 | 1979 | |
4dff95dc SB |
1980 | hlist_for_each_entry(child, &c->children, child_node) { |
1981 | seq_printf(s, ","); | |
1982 | clk_dump_subtree(s, child, level + 1); | |
b2476490 MT |
1983 | } |
1984 | ||
4dff95dc | 1985 | seq_printf(s, "}"); |
b2476490 MT |
1986 | } |
1987 | ||
4dff95dc | 1988 | static int clk_dump(struct seq_file *s, void *data) |
4e88f3de | 1989 | { |
4dff95dc SB |
1990 | struct clk_core *c; |
1991 | bool first_node = true; | |
1992 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
4e88f3de | 1993 | |
4dff95dc | 1994 | seq_printf(s, "{"); |
4e88f3de | 1995 | |
4dff95dc | 1996 | clk_prepare_lock(); |
035a61c3 | 1997 | |
4dff95dc SB |
1998 | for (; *lists; lists++) { |
1999 | hlist_for_each_entry(c, *lists, child_node) { | |
2000 | if (!first_node) | |
2001 | seq_puts(s, ","); | |
2002 | first_node = false; | |
2003 | clk_dump_subtree(s, c, 0); | |
2004 | } | |
2005 | } | |
4e88f3de | 2006 | |
4dff95dc | 2007 | clk_prepare_unlock(); |
4e88f3de | 2008 | |
70e9f4dd | 2009 | seq_puts(s, "}\n"); |
4dff95dc | 2010 | return 0; |
4e88f3de | 2011 | } |
4e88f3de | 2012 | |
4dff95dc SB |
2013 | |
2014 | static int clk_dump_open(struct inode *inode, struct file *file) | |
b2476490 | 2015 | { |
4dff95dc SB |
2016 | return single_open(file, clk_dump, inode->i_private); |
2017 | } | |
b2476490 | 2018 | |
4dff95dc SB |
2019 | static const struct file_operations clk_dump_fops = { |
2020 | .open = clk_dump_open, | |
2021 | .read = seq_read, | |
2022 | .llseek = seq_lseek, | |
2023 | .release = single_release, | |
2024 | }; | |
89ac8d7a | 2025 | |
4dff95dc SB |
2026 | static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) |
2027 | { | |
2028 | struct dentry *d; | |
2029 | int ret = -ENOMEM; | |
b2476490 | 2030 | |
4dff95dc SB |
2031 | if (!core || !pdentry) { |
2032 | ret = -EINVAL; | |
b2476490 | 2033 | goto out; |
4dff95dc | 2034 | } |
b2476490 | 2035 | |
4dff95dc SB |
2036 | d = debugfs_create_dir(core->name, pdentry); |
2037 | if (!d) | |
b61c43c0 | 2038 | goto out; |
b61c43c0 | 2039 | |
4dff95dc SB |
2040 | core->dentry = d; |
2041 | ||
2042 | d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry, | |
2043 | (u32 *)&core->rate); | |
2044 | if (!d) | |
2045 | goto err_out; | |
2046 | ||
2047 | d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry, | |
2048 | (u32 *)&core->accuracy); | |
2049 | if (!d) | |
2050 | goto err_out; | |
2051 | ||
2052 | d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry, | |
2053 | (u32 *)&core->phase); | |
2054 | if (!d) | |
2055 | goto err_out; | |
031dcc9b | 2056 | |
4dff95dc SB |
2057 | d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry, |
2058 | (u32 *)&core->flags); | |
2059 | if (!d) | |
2060 | goto err_out; | |
031dcc9b | 2061 | |
4dff95dc SB |
2062 | d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry, |
2063 | (u32 *)&core->prepare_count); | |
2064 | if (!d) | |
2065 | goto err_out; | |
b2476490 | 2066 | |
4dff95dc SB |
2067 | d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry, |
2068 | (u32 *)&core->enable_count); | |
2069 | if (!d) | |
2070 | goto err_out; | |
b2476490 | 2071 | |
4dff95dc SB |
2072 | d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry, |
2073 | (u32 *)&core->notifier_count); | |
2074 | if (!d) | |
2075 | goto err_out; | |
b2476490 | 2076 | |
4dff95dc SB |
2077 | if (core->ops->debug_init) { |
2078 | ret = core->ops->debug_init(core->hw, core->dentry); | |
2079 | if (ret) | |
2080 | goto err_out; | |
5279fc40 | 2081 | } |
b2476490 | 2082 | |
4dff95dc SB |
2083 | ret = 0; |
2084 | goto out; | |
b2476490 | 2085 | |
4dff95dc SB |
2086 | err_out: |
2087 | debugfs_remove_recursive(core->dentry); | |
2088 | core->dentry = NULL; | |
2089 | out: | |
b2476490 MT |
2090 | return ret; |
2091 | } | |
035a61c3 TV |
2092 | |
2093 | /** | |
6e5ab41b SB |
2094 | * clk_debug_register - add a clk node to the debugfs clk directory |
2095 | * @core: the clk being added to the debugfs clk directory | |
035a61c3 | 2096 | * |
6e5ab41b SB |
2097 | * Dynamically adds a clk to the debugfs clk directory if debugfs has been |
2098 | * initialized. Otherwise it bails out early since the debugfs clk directory | |
4dff95dc | 2099 | * will be created lazily by clk_debug_init as part of a late_initcall. |
035a61c3 | 2100 | */ |
4dff95dc | 2101 | static int clk_debug_register(struct clk_core *core) |
035a61c3 | 2102 | { |
4dff95dc | 2103 | int ret = 0; |
035a61c3 | 2104 | |
4dff95dc SB |
2105 | mutex_lock(&clk_debug_lock); |
2106 | hlist_add_head(&core->debug_node, &clk_debug_list); | |
2107 | ||
2108 | if (!inited) | |
2109 | goto unlock; | |
2110 | ||
2111 | ret = clk_debug_create_one(core, rootdir); | |
2112 | unlock: | |
2113 | mutex_unlock(&clk_debug_lock); | |
2114 | ||
2115 | return ret; | |
035a61c3 | 2116 | } |
b2476490 | 2117 | |
4dff95dc | 2118 | /** |
6e5ab41b SB |
2119 | * clk_debug_unregister - remove a clk node from the debugfs clk directory |
2120 | * @core: the clk being removed from the debugfs clk directory | |
e59c5371 | 2121 | * |
6e5ab41b SB |
2122 | * Dynamically removes a clk and all its child nodes from the |
2123 | * debugfs clk directory if clk->dentry points to debugfs created by | |
4dff95dc | 2124 | * clk_debug_register in __clk_init. |
e59c5371 | 2125 | */ |
4dff95dc | 2126 | static void clk_debug_unregister(struct clk_core *core) |
e59c5371 | 2127 | { |
4dff95dc SB |
2128 | mutex_lock(&clk_debug_lock); |
2129 | hlist_del_init(&core->debug_node); | |
2130 | debugfs_remove_recursive(core->dentry); | |
2131 | core->dentry = NULL; | |
2132 | mutex_unlock(&clk_debug_lock); | |
2133 | } | |
e59c5371 | 2134 | |
4dff95dc SB |
2135 | struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode, |
2136 | void *data, const struct file_operations *fops) | |
2137 | { | |
2138 | struct dentry *d = NULL; | |
e59c5371 | 2139 | |
4dff95dc SB |
2140 | if (hw->core->dentry) |
2141 | d = debugfs_create_file(name, mode, hw->core->dentry, data, | |
2142 | fops); | |
e59c5371 | 2143 | |
4dff95dc SB |
2144 | return d; |
2145 | } | |
2146 | EXPORT_SYMBOL_GPL(clk_debugfs_add_file); | |
e59c5371 | 2147 | |
4dff95dc | 2148 | /** |
6e5ab41b | 2149 | * clk_debug_init - lazily populate the debugfs clk directory |
4dff95dc | 2150 | * |
6e5ab41b SB |
2151 | * clks are often initialized very early during boot before memory can be |
2152 | * dynamically allocated and well before debugfs is setup. This function | |
2153 | * populates the debugfs clk directory once at boot-time when we know that | |
2154 | * debugfs is setup. It should only be called once at boot-time, all other clks | |
2155 | * added dynamically will be done so with clk_debug_register. | |
4dff95dc SB |
2156 | */ |
2157 | static int __init clk_debug_init(void) | |
2158 | { | |
2159 | struct clk_core *core; | |
2160 | struct dentry *d; | |
dfc202ea | 2161 | |
4dff95dc | 2162 | rootdir = debugfs_create_dir("clk", NULL); |
e59c5371 | 2163 | |
4dff95dc SB |
2164 | if (!rootdir) |
2165 | return -ENOMEM; | |
dfc202ea | 2166 | |
4dff95dc SB |
2167 | d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists, |
2168 | &clk_summary_fops); | |
2169 | if (!d) | |
2170 | return -ENOMEM; | |
e59c5371 | 2171 | |
4dff95dc SB |
2172 | d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists, |
2173 | &clk_dump_fops); | |
2174 | if (!d) | |
2175 | return -ENOMEM; | |
e59c5371 | 2176 | |
4dff95dc SB |
2177 | d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir, |
2178 | &orphan_list, &clk_summary_fops); | |
2179 | if (!d) | |
2180 | return -ENOMEM; | |
e59c5371 | 2181 | |
4dff95dc SB |
2182 | d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir, |
2183 | &orphan_list, &clk_dump_fops); | |
2184 | if (!d) | |
2185 | return -ENOMEM; | |
e59c5371 | 2186 | |
4dff95dc SB |
2187 | mutex_lock(&clk_debug_lock); |
2188 | hlist_for_each_entry(core, &clk_debug_list, debug_node) | |
2189 | clk_debug_create_one(core, rootdir); | |
e59c5371 | 2190 | |
4dff95dc SB |
2191 | inited = 1; |
2192 | mutex_unlock(&clk_debug_lock); | |
e59c5371 | 2193 | |
4dff95dc SB |
2194 | return 0; |
2195 | } | |
2196 | late_initcall(clk_debug_init); | |
2197 | #else | |
2198 | static inline int clk_debug_register(struct clk_core *core) { return 0; } | |
2199 | static inline void clk_debug_reparent(struct clk_core *core, | |
2200 | struct clk_core *new_parent) | |
035a61c3 | 2201 | { |
035a61c3 | 2202 | } |
4dff95dc | 2203 | static inline void clk_debug_unregister(struct clk_core *core) |
3d3801ef | 2204 | { |
3d3801ef | 2205 | } |
4dff95dc | 2206 | #endif |
3d3801ef | 2207 | |
b2476490 MT |
2208 | /** |
2209 | * __clk_init - initialize the data structures in a struct clk | |
2210 | * @dev: device initializing this clk, placeholder for now | |
2211 | * @clk: clk being initialized | |
2212 | * | |
035a61c3 | 2213 | * Initializes the lists in struct clk_core, queries the hardware for the |
b2476490 | 2214 | * parent and rate and sets them both. |
b2476490 | 2215 | */ |
b09d6d99 | 2216 | static int __clk_init(struct device *dev, struct clk *clk_user) |
b2476490 | 2217 | { |
d1302a36 | 2218 | int i, ret = 0; |
035a61c3 | 2219 | struct clk_core *orphan; |
b67bfe0d | 2220 | struct hlist_node *tmp2; |
d6968fca | 2221 | struct clk_core *core; |
1c8e6004 | 2222 | unsigned long rate; |
b2476490 | 2223 | |
035a61c3 | 2224 | if (!clk_user) |
d1302a36 | 2225 | return -EINVAL; |
b2476490 | 2226 | |
d6968fca | 2227 | core = clk_user->core; |
035a61c3 | 2228 | |
eab89f69 | 2229 | clk_prepare_lock(); |
b2476490 MT |
2230 | |
2231 | /* check to see if a clock with this name is already registered */ | |
d6968fca | 2232 | if (clk_core_lookup(core->name)) { |
d1302a36 | 2233 | pr_debug("%s: clk %s already initialized\n", |
d6968fca | 2234 | __func__, core->name); |
d1302a36 | 2235 | ret = -EEXIST; |
b2476490 | 2236 | goto out; |
d1302a36 | 2237 | } |
b2476490 | 2238 | |
d4d7e3dd | 2239 | /* check that clk_ops are sane. See Documentation/clk.txt */ |
d6968fca SB |
2240 | if (core->ops->set_rate && |
2241 | !((core->ops->round_rate || core->ops->determine_rate) && | |
2242 | core->ops->recalc_rate)) { | |
71472c0c | 2243 | pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", |
d6968fca | 2244 | __func__, core->name); |
d1302a36 | 2245 | ret = -EINVAL; |
d4d7e3dd MT |
2246 | goto out; |
2247 | } | |
2248 | ||
d6968fca | 2249 | if (core->ops->set_parent && !core->ops->get_parent) { |
d4d7e3dd | 2250 | pr_warning("%s: %s must implement .get_parent & .set_parent\n", |
d6968fca | 2251 | __func__, core->name); |
d1302a36 | 2252 | ret = -EINVAL; |
d4d7e3dd MT |
2253 | goto out; |
2254 | } | |
2255 | ||
d6968fca SB |
2256 | if (core->ops->set_rate_and_parent && |
2257 | !(core->ops->set_parent && core->ops->set_rate)) { | |
3fa2252b | 2258 | pr_warn("%s: %s must implement .set_parent & .set_rate\n", |
d6968fca | 2259 | __func__, core->name); |
3fa2252b SB |
2260 | ret = -EINVAL; |
2261 | goto out; | |
2262 | } | |
2263 | ||
b2476490 | 2264 | /* throw a WARN if any entries in parent_names are NULL */ |
d6968fca SB |
2265 | for (i = 0; i < core->num_parents; i++) |
2266 | WARN(!core->parent_names[i], | |
b2476490 | 2267 | "%s: invalid NULL in %s's .parent_names\n", |
d6968fca | 2268 | __func__, core->name); |
b2476490 MT |
2269 | |
2270 | /* | |
2271 | * Allocate an array of struct clk *'s to avoid unnecessary string | |
2272 | * look-ups of clk's possible parents. This can fail for clocks passed | |
d6968fca | 2273 | * in to clk_init during early boot; thus any access to core->parents[] |
b2476490 MT |
2274 | * must always check for a NULL pointer and try to populate it if |
2275 | * necessary. | |
2276 | * | |
d6968fca SB |
2277 | * If core->parents is not NULL we skip this entire block. This allows |
2278 | * for clock drivers to statically initialize core->parents. | |
b2476490 | 2279 | */ |
d6968fca SB |
2280 | if (core->num_parents > 1 && !core->parents) { |
2281 | core->parents = kcalloc(core->num_parents, sizeof(struct clk *), | |
96a7ed90 | 2282 | GFP_KERNEL); |
b2476490 | 2283 | /* |
035a61c3 | 2284 | * clk_core_lookup returns NULL for parents that have not been |
b2476490 MT |
2285 | * clk_init'd; thus any access to clk->parents[] must check |
2286 | * for a NULL pointer. We can always perform lazy lookups for | |
2287 | * missing parents later on. | |
2288 | */ | |
d6968fca SB |
2289 | if (core->parents) |
2290 | for (i = 0; i < core->num_parents; i++) | |
2291 | core->parents[i] = | |
2292 | clk_core_lookup(core->parent_names[i]); | |
b2476490 MT |
2293 | } |
2294 | ||
d6968fca | 2295 | core->parent = __clk_init_parent(core); |
b2476490 MT |
2296 | |
2297 | /* | |
d6968fca | 2298 | * Populate core->parent if parent has already been __clk_init'd. If |
b2476490 MT |
2299 | * parent has not yet been __clk_init'd then place clk in the orphan |
2300 | * list. If clk has set the CLK_IS_ROOT flag then place it in the root | |
2301 | * clk list. | |
2302 | * | |
2303 | * Every time a new clk is clk_init'd then we walk the list of orphan | |
2304 | * clocks and re-parent any that are children of the clock currently | |
2305 | * being clk_init'd. | |
2306 | */ | |
d6968fca SB |
2307 | if (core->parent) |
2308 | hlist_add_head(&core->child_node, | |
2309 | &core->parent->children); | |
2310 | else if (core->flags & CLK_IS_ROOT) | |
2311 | hlist_add_head(&core->child_node, &clk_root_list); | |
b2476490 | 2312 | else |
d6968fca | 2313 | hlist_add_head(&core->child_node, &clk_orphan_list); |
b2476490 | 2314 | |
5279fc40 BB |
2315 | /* |
2316 | * Set clk's accuracy. The preferred method is to use | |
2317 | * .recalc_accuracy. For simple clocks and lazy developers the default | |
2318 | * fallback is to use the parent's accuracy. If a clock doesn't have a | |
2319 | * parent (or is orphaned) then accuracy is set to zero (perfect | |
2320 | * clock). | |
2321 | */ | |
d6968fca SB |
2322 | if (core->ops->recalc_accuracy) |
2323 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
2324 | __clk_get_accuracy(core->parent)); | |
2325 | else if (core->parent) | |
2326 | core->accuracy = core->parent->accuracy; | |
5279fc40 | 2327 | else |
d6968fca | 2328 | core->accuracy = 0; |
5279fc40 | 2329 | |
9824cf73 MR |
2330 | /* |
2331 | * Set clk's phase. | |
2332 | * Since a phase is by definition relative to its parent, just | |
2333 | * query the current clock phase, or just assume it's in phase. | |
2334 | */ | |
d6968fca SB |
2335 | if (core->ops->get_phase) |
2336 | core->phase = core->ops->get_phase(core->hw); | |
9824cf73 | 2337 | else |
d6968fca | 2338 | core->phase = 0; |
9824cf73 | 2339 | |
b2476490 MT |
2340 | /* |
2341 | * Set clk's rate. The preferred method is to use .recalc_rate. For | |
2342 | * simple clocks and lazy developers the default fallback is to use the | |
2343 | * parent's rate. If a clock doesn't have a parent (or is orphaned) | |
2344 | * then rate is set to zero. | |
2345 | */ | |
d6968fca SB |
2346 | if (core->ops->recalc_rate) |
2347 | rate = core->ops->recalc_rate(core->hw, | |
2348 | clk_core_get_rate_nolock(core->parent)); | |
2349 | else if (core->parent) | |
2350 | rate = core->parent->rate; | |
b2476490 | 2351 | else |
1c8e6004 | 2352 | rate = 0; |
d6968fca | 2353 | core->rate = core->req_rate = rate; |
b2476490 MT |
2354 | |
2355 | /* | |
2356 | * walk the list of orphan clocks and reparent any that are children of | |
2357 | * this clock | |
2358 | */ | |
b67bfe0d | 2359 | hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { |
12d29886 | 2360 | if (orphan->num_parents && orphan->ops->get_parent) { |
1f61e5f1 | 2361 | i = orphan->ops->get_parent(orphan->hw); |
d6968fca SB |
2362 | if (!strcmp(core->name, orphan->parent_names[i])) |
2363 | clk_core_reparent(orphan, core); | |
1f61e5f1 MF |
2364 | continue; |
2365 | } | |
2366 | ||
b2476490 | 2367 | for (i = 0; i < orphan->num_parents; i++) |
d6968fca SB |
2368 | if (!strcmp(core->name, orphan->parent_names[i])) { |
2369 | clk_core_reparent(orphan, core); | |
b2476490 MT |
2370 | break; |
2371 | } | |
1f61e5f1 | 2372 | } |
b2476490 MT |
2373 | |
2374 | /* | |
2375 | * optional platform-specific magic | |
2376 | * | |
2377 | * The .init callback is not used by any of the basic clock types, but | |
2378 | * exists for weird hardware that must perform initialization magic. | |
2379 | * Please consider other ways of solving initialization problems before | |
24ee1a08 | 2380 | * using this callback, as its use is discouraged. |
b2476490 | 2381 | */ |
d6968fca SB |
2382 | if (core->ops->init) |
2383 | core->ops->init(core->hw); | |
b2476490 | 2384 | |
d6968fca | 2385 | kref_init(&core->ref); |
b2476490 | 2386 | out: |
eab89f69 | 2387 | clk_prepare_unlock(); |
b2476490 | 2388 | |
89f7e9de | 2389 | if (!ret) |
d6968fca | 2390 | clk_debug_register(core); |
89f7e9de | 2391 | |
d1302a36 | 2392 | return ret; |
b2476490 MT |
2393 | } |
2394 | ||
035a61c3 TV |
2395 | struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id, |
2396 | const char *con_id) | |
0197b3ea | 2397 | { |
0197b3ea SK |
2398 | struct clk *clk; |
2399 | ||
035a61c3 TV |
2400 | /* This is to allow this function to be chained to others */ |
2401 | if (!hw || IS_ERR(hw)) | |
2402 | return (struct clk *) hw; | |
0197b3ea | 2403 | |
035a61c3 TV |
2404 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); |
2405 | if (!clk) | |
2406 | return ERR_PTR(-ENOMEM); | |
2407 | ||
2408 | clk->core = hw->core; | |
2409 | clk->dev_id = dev_id; | |
2410 | clk->con_id = con_id; | |
1c8e6004 TV |
2411 | clk->max_rate = ULONG_MAX; |
2412 | ||
2413 | clk_prepare_lock(); | |
50595f8b | 2414 | hlist_add_head(&clk->clks_node, &hw->core->clks); |
1c8e6004 | 2415 | clk_prepare_unlock(); |
0197b3ea SK |
2416 | |
2417 | return clk; | |
2418 | } | |
035a61c3 | 2419 | |
73e0e496 | 2420 | void __clk_free_clk(struct clk *clk) |
1c8e6004 TV |
2421 | { |
2422 | clk_prepare_lock(); | |
50595f8b | 2423 | hlist_del(&clk->clks_node); |
1c8e6004 TV |
2424 | clk_prepare_unlock(); |
2425 | ||
2426 | kfree(clk); | |
2427 | } | |
0197b3ea | 2428 | |
293ba3b4 SB |
2429 | /** |
2430 | * clk_register - allocate a new clock, register it and return an opaque cookie | |
2431 | * @dev: device that is registering this clock | |
2432 | * @hw: link to hardware-specific clock data | |
2433 | * | |
2434 | * clk_register is the primary interface for populating the clock tree with new | |
2435 | * clock nodes. It returns a pointer to the newly allocated struct clk which | |
2436 | * cannot be dereferenced by driver code but may be used in conjuction with the | |
2437 | * rest of the clock API. In the event of an error clk_register will return an | |
2438 | * error code; drivers must test for an error code after calling clk_register. | |
2439 | */ | |
2440 | struct clk *clk_register(struct device *dev, struct clk_hw *hw) | |
b2476490 | 2441 | { |
d1302a36 | 2442 | int i, ret; |
d6968fca | 2443 | struct clk_core *core; |
293ba3b4 | 2444 | |
d6968fca SB |
2445 | core = kzalloc(sizeof(*core), GFP_KERNEL); |
2446 | if (!core) { | |
293ba3b4 SB |
2447 | ret = -ENOMEM; |
2448 | goto fail_out; | |
2449 | } | |
b2476490 | 2450 | |
d6968fca SB |
2451 | core->name = kstrdup_const(hw->init->name, GFP_KERNEL); |
2452 | if (!core->name) { | |
0197b3ea SK |
2453 | ret = -ENOMEM; |
2454 | goto fail_name; | |
2455 | } | |
d6968fca | 2456 | core->ops = hw->init->ops; |
ac2df527 | 2457 | if (dev && dev->driver) |
d6968fca SB |
2458 | core->owner = dev->driver->owner; |
2459 | core->hw = hw; | |
2460 | core->flags = hw->init->flags; | |
2461 | core->num_parents = hw->init->num_parents; | |
2462 | hw->core = core; | |
b2476490 | 2463 | |
d1302a36 | 2464 | /* allocate local copy in case parent_names is __initdata */ |
d6968fca | 2465 | core->parent_names = kcalloc(core->num_parents, sizeof(char *), |
96a7ed90 | 2466 | GFP_KERNEL); |
d1302a36 | 2467 | |
d6968fca | 2468 | if (!core->parent_names) { |
d1302a36 MT |
2469 | ret = -ENOMEM; |
2470 | goto fail_parent_names; | |
2471 | } | |
2472 | ||
2473 | ||
2474 | /* copy each string name in case parent_names is __initdata */ | |
d6968fca SB |
2475 | for (i = 0; i < core->num_parents; i++) { |
2476 | core->parent_names[i] = kstrdup_const(hw->init->parent_names[i], | |
0197b3ea | 2477 | GFP_KERNEL); |
d6968fca | 2478 | if (!core->parent_names[i]) { |
d1302a36 MT |
2479 | ret = -ENOMEM; |
2480 | goto fail_parent_names_copy; | |
2481 | } | |
2482 | } | |
2483 | ||
d6968fca | 2484 | INIT_HLIST_HEAD(&core->clks); |
1c8e6004 | 2485 | |
035a61c3 TV |
2486 | hw->clk = __clk_create_clk(hw, NULL, NULL); |
2487 | if (IS_ERR(hw->clk)) { | |
035a61c3 TV |
2488 | ret = PTR_ERR(hw->clk); |
2489 | goto fail_parent_names_copy; | |
2490 | } | |
2491 | ||
2492 | ret = __clk_init(dev, hw->clk); | |
d1302a36 | 2493 | if (!ret) |
035a61c3 | 2494 | return hw->clk; |
b2476490 | 2495 | |
1c8e6004 | 2496 | __clk_free_clk(hw->clk); |
035a61c3 | 2497 | hw->clk = NULL; |
b2476490 | 2498 | |
d1302a36 MT |
2499 | fail_parent_names_copy: |
2500 | while (--i >= 0) | |
d6968fca SB |
2501 | kfree_const(core->parent_names[i]); |
2502 | kfree(core->parent_names); | |
d1302a36 | 2503 | fail_parent_names: |
d6968fca | 2504 | kfree_const(core->name); |
0197b3ea | 2505 | fail_name: |
d6968fca | 2506 | kfree(core); |
d1302a36 MT |
2507 | fail_out: |
2508 | return ERR_PTR(ret); | |
b2476490 MT |
2509 | } |
2510 | EXPORT_SYMBOL_GPL(clk_register); | |
2511 | ||
6e5ab41b | 2512 | /* Free memory allocated for a clock. */ |
fcb0ee6a SN |
2513 | static void __clk_release(struct kref *ref) |
2514 | { | |
d6968fca SB |
2515 | struct clk_core *core = container_of(ref, struct clk_core, ref); |
2516 | int i = core->num_parents; | |
fcb0ee6a | 2517 | |
496eadf8 KK |
2518 | lockdep_assert_held(&prepare_lock); |
2519 | ||
d6968fca | 2520 | kfree(core->parents); |
fcb0ee6a | 2521 | while (--i >= 0) |
d6968fca | 2522 | kfree_const(core->parent_names[i]); |
fcb0ee6a | 2523 | |
d6968fca SB |
2524 | kfree(core->parent_names); |
2525 | kfree_const(core->name); | |
2526 | kfree(core); | |
fcb0ee6a SN |
2527 | } |
2528 | ||
2529 | /* | |
2530 | * Empty clk_ops for unregistered clocks. These are used temporarily | |
2531 | * after clk_unregister() was called on a clock and until last clock | |
2532 | * consumer calls clk_put() and the struct clk object is freed. | |
2533 | */ | |
2534 | static int clk_nodrv_prepare_enable(struct clk_hw *hw) | |
2535 | { | |
2536 | return -ENXIO; | |
2537 | } | |
2538 | ||
2539 | static void clk_nodrv_disable_unprepare(struct clk_hw *hw) | |
2540 | { | |
2541 | WARN_ON_ONCE(1); | |
2542 | } | |
2543 | ||
2544 | static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate, | |
2545 | unsigned long parent_rate) | |
2546 | { | |
2547 | return -ENXIO; | |
2548 | } | |
2549 | ||
2550 | static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) | |
2551 | { | |
2552 | return -ENXIO; | |
2553 | } | |
2554 | ||
2555 | static const struct clk_ops clk_nodrv_ops = { | |
2556 | .enable = clk_nodrv_prepare_enable, | |
2557 | .disable = clk_nodrv_disable_unprepare, | |
2558 | .prepare = clk_nodrv_prepare_enable, | |
2559 | .unprepare = clk_nodrv_disable_unprepare, | |
2560 | .set_rate = clk_nodrv_set_rate, | |
2561 | .set_parent = clk_nodrv_set_parent, | |
2562 | }; | |
2563 | ||
1df5c939 MB |
2564 | /** |
2565 | * clk_unregister - unregister a currently registered clock | |
2566 | * @clk: clock to unregister | |
1df5c939 | 2567 | */ |
fcb0ee6a SN |
2568 | void clk_unregister(struct clk *clk) |
2569 | { | |
2570 | unsigned long flags; | |
2571 | ||
6314b679 SB |
2572 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
2573 | return; | |
2574 | ||
035a61c3 | 2575 | clk_debug_unregister(clk->core); |
fcb0ee6a SN |
2576 | |
2577 | clk_prepare_lock(); | |
2578 | ||
035a61c3 TV |
2579 | if (clk->core->ops == &clk_nodrv_ops) { |
2580 | pr_err("%s: unregistered clock: %s\n", __func__, | |
2581 | clk->core->name); | |
6314b679 | 2582 | return; |
fcb0ee6a SN |
2583 | } |
2584 | /* | |
2585 | * Assign empty clock ops for consumers that might still hold | |
2586 | * a reference to this clock. | |
2587 | */ | |
2588 | flags = clk_enable_lock(); | |
035a61c3 | 2589 | clk->core->ops = &clk_nodrv_ops; |
fcb0ee6a SN |
2590 | clk_enable_unlock(flags); |
2591 | ||
035a61c3 TV |
2592 | if (!hlist_empty(&clk->core->children)) { |
2593 | struct clk_core *child; | |
874f224c | 2594 | struct hlist_node *t; |
fcb0ee6a SN |
2595 | |
2596 | /* Reparent all children to the orphan list. */ | |
035a61c3 TV |
2597 | hlist_for_each_entry_safe(child, t, &clk->core->children, |
2598 | child_node) | |
2599 | clk_core_set_parent(child, NULL); | |
fcb0ee6a SN |
2600 | } |
2601 | ||
035a61c3 | 2602 | hlist_del_init(&clk->core->child_node); |
fcb0ee6a | 2603 | |
035a61c3 | 2604 | if (clk->core->prepare_count) |
fcb0ee6a | 2605 | pr_warn("%s: unregistering prepared clock: %s\n", |
035a61c3 TV |
2606 | __func__, clk->core->name); |
2607 | kref_put(&clk->core->ref, __clk_release); | |
6314b679 | 2608 | |
fcb0ee6a SN |
2609 | clk_prepare_unlock(); |
2610 | } | |
1df5c939 MB |
2611 | EXPORT_SYMBOL_GPL(clk_unregister); |
2612 | ||
46c8773a SB |
2613 | static void devm_clk_release(struct device *dev, void *res) |
2614 | { | |
293ba3b4 | 2615 | clk_unregister(*(struct clk **)res); |
46c8773a SB |
2616 | } |
2617 | ||
2618 | /** | |
2619 | * devm_clk_register - resource managed clk_register() | |
2620 | * @dev: device that is registering this clock | |
2621 | * @hw: link to hardware-specific clock data | |
2622 | * | |
2623 | * Managed clk_register(). Clocks returned from this function are | |
2624 | * automatically clk_unregister()ed on driver detach. See clk_register() for | |
2625 | * more information. | |
2626 | */ | |
2627 | struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) | |
2628 | { | |
2629 | struct clk *clk; | |
293ba3b4 | 2630 | struct clk **clkp; |
46c8773a | 2631 | |
293ba3b4 SB |
2632 | clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); |
2633 | if (!clkp) | |
46c8773a SB |
2634 | return ERR_PTR(-ENOMEM); |
2635 | ||
293ba3b4 SB |
2636 | clk = clk_register(dev, hw); |
2637 | if (!IS_ERR(clk)) { | |
2638 | *clkp = clk; | |
2639 | devres_add(dev, clkp); | |
46c8773a | 2640 | } else { |
293ba3b4 | 2641 | devres_free(clkp); |
46c8773a SB |
2642 | } |
2643 | ||
2644 | return clk; | |
2645 | } | |
2646 | EXPORT_SYMBOL_GPL(devm_clk_register); | |
2647 | ||
2648 | static int devm_clk_match(struct device *dev, void *res, void *data) | |
2649 | { | |
2650 | struct clk *c = res; | |
2651 | if (WARN_ON(!c)) | |
2652 | return 0; | |
2653 | return c == data; | |
2654 | } | |
2655 | ||
2656 | /** | |
2657 | * devm_clk_unregister - resource managed clk_unregister() | |
2658 | * @clk: clock to unregister | |
2659 | * | |
2660 | * Deallocate a clock allocated with devm_clk_register(). Normally | |
2661 | * this function will not need to be called and the resource management | |
2662 | * code will ensure that the resource is freed. | |
2663 | */ | |
2664 | void devm_clk_unregister(struct device *dev, struct clk *clk) | |
2665 | { | |
2666 | WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk)); | |
2667 | } | |
2668 | EXPORT_SYMBOL_GPL(devm_clk_unregister); | |
2669 | ||
ac2df527 SN |
2670 | /* |
2671 | * clkdev helpers | |
2672 | */ | |
2673 | int __clk_get(struct clk *clk) | |
2674 | { | |
035a61c3 TV |
2675 | struct clk_core *core = !clk ? NULL : clk->core; |
2676 | ||
2677 | if (core) { | |
2678 | if (!try_module_get(core->owner)) | |
00efcb1c | 2679 | return 0; |
ac2df527 | 2680 | |
035a61c3 | 2681 | kref_get(&core->ref); |
00efcb1c | 2682 | } |
ac2df527 SN |
2683 | return 1; |
2684 | } | |
2685 | ||
2686 | void __clk_put(struct clk *clk) | |
2687 | { | |
10cdfe54 TV |
2688 | struct module *owner; |
2689 | ||
00efcb1c | 2690 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
ac2df527 SN |
2691 | return; |
2692 | ||
fcb0ee6a | 2693 | clk_prepare_lock(); |
1c8e6004 | 2694 | |
50595f8b | 2695 | hlist_del(&clk->clks_node); |
ec02ace8 TV |
2696 | if (clk->min_rate > clk->core->req_rate || |
2697 | clk->max_rate < clk->core->req_rate) | |
2698 | clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
2699 | ||
1c8e6004 TV |
2700 | owner = clk->core->owner; |
2701 | kref_put(&clk->core->ref, __clk_release); | |
2702 | ||
fcb0ee6a SN |
2703 | clk_prepare_unlock(); |
2704 | ||
10cdfe54 | 2705 | module_put(owner); |
035a61c3 | 2706 | |
035a61c3 | 2707 | kfree(clk); |
ac2df527 SN |
2708 | } |
2709 | ||
b2476490 MT |
2710 | /*** clk rate change notifiers ***/ |
2711 | ||
2712 | /** | |
2713 | * clk_notifier_register - add a clk rate change notifier | |
2714 | * @clk: struct clk * to watch | |
2715 | * @nb: struct notifier_block * with callback info | |
2716 | * | |
2717 | * Request notification when clk's rate changes. This uses an SRCU | |
2718 | * notifier because we want it to block and notifier unregistrations are | |
2719 | * uncommon. The callbacks associated with the notifier must not | |
2720 | * re-enter into the clk framework by calling any top-level clk APIs; | |
2721 | * this will cause a nested prepare_lock mutex. | |
2722 | * | |
5324fda7 SB |
2723 | * In all notification cases cases (pre, post and abort rate change) the |
2724 | * original clock rate is passed to the callback via struct | |
2725 | * clk_notifier_data.old_rate and the new frequency is passed via struct | |
b2476490 MT |
2726 | * clk_notifier_data.new_rate. |
2727 | * | |
b2476490 MT |
2728 | * clk_notifier_register() must be called from non-atomic context. |
2729 | * Returns -EINVAL if called with null arguments, -ENOMEM upon | |
2730 | * allocation failure; otherwise, passes along the return value of | |
2731 | * srcu_notifier_chain_register(). | |
2732 | */ | |
2733 | int clk_notifier_register(struct clk *clk, struct notifier_block *nb) | |
2734 | { | |
2735 | struct clk_notifier *cn; | |
2736 | int ret = -ENOMEM; | |
2737 | ||
2738 | if (!clk || !nb) | |
2739 | return -EINVAL; | |
2740 | ||
eab89f69 | 2741 | clk_prepare_lock(); |
b2476490 MT |
2742 | |
2743 | /* search the list of notifiers for this clk */ | |
2744 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2745 | if (cn->clk == clk) | |
2746 | break; | |
2747 | ||
2748 | /* if clk wasn't in the notifier list, allocate new clk_notifier */ | |
2749 | if (cn->clk != clk) { | |
2750 | cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL); | |
2751 | if (!cn) | |
2752 | goto out; | |
2753 | ||
2754 | cn->clk = clk; | |
2755 | srcu_init_notifier_head(&cn->notifier_head); | |
2756 | ||
2757 | list_add(&cn->node, &clk_notifier_list); | |
2758 | } | |
2759 | ||
2760 | ret = srcu_notifier_chain_register(&cn->notifier_head, nb); | |
2761 | ||
035a61c3 | 2762 | clk->core->notifier_count++; |
b2476490 MT |
2763 | |
2764 | out: | |
eab89f69 | 2765 | clk_prepare_unlock(); |
b2476490 MT |
2766 | |
2767 | return ret; | |
2768 | } | |
2769 | EXPORT_SYMBOL_GPL(clk_notifier_register); | |
2770 | ||
2771 | /** | |
2772 | * clk_notifier_unregister - remove a clk rate change notifier | |
2773 | * @clk: struct clk * | |
2774 | * @nb: struct notifier_block * with callback info | |
2775 | * | |
2776 | * Request no further notification for changes to 'clk' and frees memory | |
2777 | * allocated in clk_notifier_register. | |
2778 | * | |
2779 | * Returns -EINVAL if called with null arguments; otherwise, passes | |
2780 | * along the return value of srcu_notifier_chain_unregister(). | |
2781 | */ | |
2782 | int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) | |
2783 | { | |
2784 | struct clk_notifier *cn = NULL; | |
2785 | int ret = -EINVAL; | |
2786 | ||
2787 | if (!clk || !nb) | |
2788 | return -EINVAL; | |
2789 | ||
eab89f69 | 2790 | clk_prepare_lock(); |
b2476490 MT |
2791 | |
2792 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2793 | if (cn->clk == clk) | |
2794 | break; | |
2795 | ||
2796 | if (cn->clk == clk) { | |
2797 | ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); | |
2798 | ||
035a61c3 | 2799 | clk->core->notifier_count--; |
b2476490 MT |
2800 | |
2801 | /* XXX the notifier code should handle this better */ | |
2802 | if (!cn->notifier_head.head) { | |
2803 | srcu_cleanup_notifier_head(&cn->notifier_head); | |
72b5322f | 2804 | list_del(&cn->node); |
b2476490 MT |
2805 | kfree(cn); |
2806 | } | |
2807 | ||
2808 | } else { | |
2809 | ret = -ENOENT; | |
2810 | } | |
2811 | ||
eab89f69 | 2812 | clk_prepare_unlock(); |
b2476490 MT |
2813 | |
2814 | return ret; | |
2815 | } | |
2816 | EXPORT_SYMBOL_GPL(clk_notifier_unregister); | |
766e6a4e GL |
2817 | |
2818 | #ifdef CONFIG_OF | |
2819 | /** | |
2820 | * struct of_clk_provider - Clock provider registration structure | |
2821 | * @link: Entry in global list of clock providers | |
2822 | * @node: Pointer to device tree node of clock provider | |
2823 | * @get: Get clock callback. Returns NULL or a struct clk for the | |
2824 | * given clock specifier | |
2825 | * @data: context pointer to be passed into @get callback | |
2826 | */ | |
2827 | struct of_clk_provider { | |
2828 | struct list_head link; | |
2829 | ||
2830 | struct device_node *node; | |
2831 | struct clk *(*get)(struct of_phandle_args *clkspec, void *data); | |
2832 | void *data; | |
2833 | }; | |
2834 | ||
f2f6c255 PG |
2835 | static const struct of_device_id __clk_of_table_sentinel |
2836 | __used __section(__clk_of_table_end); | |
2837 | ||
766e6a4e | 2838 | static LIST_HEAD(of_clk_providers); |
d6782c26 SN |
2839 | static DEFINE_MUTEX(of_clk_mutex); |
2840 | ||
766e6a4e GL |
2841 | struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, |
2842 | void *data) | |
2843 | { | |
2844 | return data; | |
2845 | } | |
2846 | EXPORT_SYMBOL_GPL(of_clk_src_simple_get); | |
2847 | ||
494bfec9 SG |
2848 | struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data) |
2849 | { | |
2850 | struct clk_onecell_data *clk_data = data; | |
2851 | unsigned int idx = clkspec->args[0]; | |
2852 | ||
2853 | if (idx >= clk_data->clk_num) { | |
2854 | pr_err("%s: invalid clock index %d\n", __func__, idx); | |
2855 | return ERR_PTR(-EINVAL); | |
2856 | } | |
2857 | ||
2858 | return clk_data->clks[idx]; | |
2859 | } | |
2860 | EXPORT_SYMBOL_GPL(of_clk_src_onecell_get); | |
2861 | ||
766e6a4e GL |
2862 | /** |
2863 | * of_clk_add_provider() - Register a clock provider for a node | |
2864 | * @np: Device node pointer associated with clock provider | |
2865 | * @clk_src_get: callback for decoding clock | |
2866 | * @data: context pointer for @clk_src_get callback. | |
2867 | */ | |
2868 | int of_clk_add_provider(struct device_node *np, | |
2869 | struct clk *(*clk_src_get)(struct of_phandle_args *clkspec, | |
2870 | void *data), | |
2871 | void *data) | |
2872 | { | |
2873 | struct of_clk_provider *cp; | |
86be408b | 2874 | int ret; |
766e6a4e GL |
2875 | |
2876 | cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL); | |
2877 | if (!cp) | |
2878 | return -ENOMEM; | |
2879 | ||
2880 | cp->node = of_node_get(np); | |
2881 | cp->data = data; | |
2882 | cp->get = clk_src_get; | |
2883 | ||
d6782c26 | 2884 | mutex_lock(&of_clk_mutex); |
766e6a4e | 2885 | list_add(&cp->link, &of_clk_providers); |
d6782c26 | 2886 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2887 | pr_debug("Added clock from %s\n", np->full_name); |
2888 | ||
86be408b SN |
2889 | ret = of_clk_set_defaults(np, true); |
2890 | if (ret < 0) | |
2891 | of_clk_del_provider(np); | |
2892 | ||
2893 | return ret; | |
766e6a4e GL |
2894 | } |
2895 | EXPORT_SYMBOL_GPL(of_clk_add_provider); | |
2896 | ||
2897 | /** | |
2898 | * of_clk_del_provider() - Remove a previously registered clock provider | |
2899 | * @np: Device node pointer associated with clock provider | |
2900 | */ | |
2901 | void of_clk_del_provider(struct device_node *np) | |
2902 | { | |
2903 | struct of_clk_provider *cp; | |
2904 | ||
d6782c26 | 2905 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
2906 | list_for_each_entry(cp, &of_clk_providers, link) { |
2907 | if (cp->node == np) { | |
2908 | list_del(&cp->link); | |
2909 | of_node_put(cp->node); | |
2910 | kfree(cp); | |
2911 | break; | |
2912 | } | |
2913 | } | |
d6782c26 | 2914 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2915 | } |
2916 | EXPORT_SYMBOL_GPL(of_clk_del_provider); | |
2917 | ||
73e0e496 SB |
2918 | struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec, |
2919 | const char *dev_id, const char *con_id) | |
766e6a4e GL |
2920 | { |
2921 | struct of_clk_provider *provider; | |
a34cd466 | 2922 | struct clk *clk = ERR_PTR(-EPROBE_DEFER); |
766e6a4e | 2923 | |
306c342f SB |
2924 | if (!clkspec) |
2925 | return ERR_PTR(-EINVAL); | |
2926 | ||
766e6a4e | 2927 | /* Check if we have such a provider in our array */ |
306c342f | 2928 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
2929 | list_for_each_entry(provider, &of_clk_providers, link) { |
2930 | if (provider->node == clkspec->np) | |
2931 | clk = provider->get(clkspec, provider->data); | |
73e0e496 SB |
2932 | if (!IS_ERR(clk)) { |
2933 | clk = __clk_create_clk(__clk_get_hw(clk), dev_id, | |
2934 | con_id); | |
2935 | ||
2936 | if (!IS_ERR(clk) && !__clk_get(clk)) { | |
2937 | __clk_free_clk(clk); | |
2938 | clk = ERR_PTR(-ENOENT); | |
2939 | } | |
2940 | ||
766e6a4e | 2941 | break; |
73e0e496 | 2942 | } |
766e6a4e | 2943 | } |
306c342f | 2944 | mutex_unlock(&of_clk_mutex); |
d6782c26 SN |
2945 | |
2946 | return clk; | |
2947 | } | |
2948 | ||
306c342f SB |
2949 | /** |
2950 | * of_clk_get_from_provider() - Lookup a clock from a clock provider | |
2951 | * @clkspec: pointer to a clock specifier data structure | |
2952 | * | |
2953 | * This function looks up a struct clk from the registered list of clock | |
2954 | * providers, an input is a clock specifier data structure as returned | |
2955 | * from the of_parse_phandle_with_args() function call. | |
2956 | */ | |
d6782c26 SN |
2957 | struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) |
2958 | { | |
306c342f | 2959 | return __of_clk_get_from_provider(clkspec, NULL, __func__); |
766e6a4e GL |
2960 | } |
2961 | ||
f6102742 MT |
2962 | int of_clk_get_parent_count(struct device_node *np) |
2963 | { | |
2964 | return of_count_phandle_with_args(np, "clocks", "#clock-cells"); | |
2965 | } | |
2966 | EXPORT_SYMBOL_GPL(of_clk_get_parent_count); | |
2967 | ||
766e6a4e GL |
2968 | const char *of_clk_get_parent_name(struct device_node *np, int index) |
2969 | { | |
2970 | struct of_phandle_args clkspec; | |
7a0fc1a3 | 2971 | struct property *prop; |
766e6a4e | 2972 | const char *clk_name; |
7a0fc1a3 BD |
2973 | const __be32 *vp; |
2974 | u32 pv; | |
766e6a4e | 2975 | int rc; |
7a0fc1a3 | 2976 | int count; |
766e6a4e GL |
2977 | |
2978 | if (index < 0) | |
2979 | return NULL; | |
2980 | ||
2981 | rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, | |
2982 | &clkspec); | |
2983 | if (rc) | |
2984 | return NULL; | |
2985 | ||
7a0fc1a3 BD |
2986 | index = clkspec.args_count ? clkspec.args[0] : 0; |
2987 | count = 0; | |
2988 | ||
2989 | /* if there is an indices property, use it to transfer the index | |
2990 | * specified into an array offset for the clock-output-names property. | |
2991 | */ | |
2992 | of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { | |
2993 | if (index == pv) { | |
2994 | index = count; | |
2995 | break; | |
2996 | } | |
2997 | count++; | |
2998 | } | |
2999 | ||
766e6a4e | 3000 | if (of_property_read_string_index(clkspec.np, "clock-output-names", |
7a0fc1a3 | 3001 | index, |
766e6a4e GL |
3002 | &clk_name) < 0) |
3003 | clk_name = clkspec.np->name; | |
3004 | ||
3005 | of_node_put(clkspec.np); | |
3006 | return clk_name; | |
3007 | } | |
3008 | EXPORT_SYMBOL_GPL(of_clk_get_parent_name); | |
3009 | ||
1771b10d GC |
3010 | struct clock_provider { |
3011 | of_clk_init_cb_t clk_init_cb; | |
3012 | struct device_node *np; | |
3013 | struct list_head node; | |
3014 | }; | |
3015 | ||
3016 | static LIST_HEAD(clk_provider_list); | |
3017 | ||
3018 | /* | |
3019 | * This function looks for a parent clock. If there is one, then it | |
3020 | * checks that the provider for this parent clock was initialized, in | |
3021 | * this case the parent clock will be ready. | |
3022 | */ | |
3023 | static int parent_ready(struct device_node *np) | |
3024 | { | |
3025 | int i = 0; | |
3026 | ||
3027 | while (true) { | |
3028 | struct clk *clk = of_clk_get(np, i); | |
3029 | ||
3030 | /* this parent is ready we can check the next one */ | |
3031 | if (!IS_ERR(clk)) { | |
3032 | clk_put(clk); | |
3033 | i++; | |
3034 | continue; | |
3035 | } | |
3036 | ||
3037 | /* at least one parent is not ready, we exit now */ | |
3038 | if (PTR_ERR(clk) == -EPROBE_DEFER) | |
3039 | return 0; | |
3040 | ||
3041 | /* | |
3042 | * Here we make assumption that the device tree is | |
3043 | * written correctly. So an error means that there is | |
3044 | * no more parent. As we didn't exit yet, then the | |
3045 | * previous parent are ready. If there is no clock | |
3046 | * parent, no need to wait for them, then we can | |
3047 | * consider their absence as being ready | |
3048 | */ | |
3049 | return 1; | |
3050 | } | |
3051 | } | |
3052 | ||
766e6a4e GL |
3053 | /** |
3054 | * of_clk_init() - Scan and init clock providers from the DT | |
3055 | * @matches: array of compatible values and init functions for providers. | |
3056 | * | |
1771b10d | 3057 | * This function scans the device tree for matching clock providers |
e5ca8fb4 | 3058 | * and calls their initialization functions. It also does it by trying |
1771b10d | 3059 | * to follow the dependencies. |
766e6a4e GL |
3060 | */ |
3061 | void __init of_clk_init(const struct of_device_id *matches) | |
3062 | { | |
7f7ed584 | 3063 | const struct of_device_id *match; |
766e6a4e | 3064 | struct device_node *np; |
1771b10d GC |
3065 | struct clock_provider *clk_provider, *next; |
3066 | bool is_init_done; | |
3067 | bool force = false; | |
766e6a4e | 3068 | |
f2f6c255 | 3069 | if (!matches) |
819b4861 | 3070 | matches = &__clk_of_table; |
f2f6c255 | 3071 | |
1771b10d | 3072 | /* First prepare the list of the clocks providers */ |
7f7ed584 | 3073 | for_each_matching_node_and_match(np, matches, &match) { |
1771b10d GC |
3074 | struct clock_provider *parent = |
3075 | kzalloc(sizeof(struct clock_provider), GFP_KERNEL); | |
3076 | ||
3077 | parent->clk_init_cb = match->data; | |
3078 | parent->np = np; | |
3f6d439f | 3079 | list_add_tail(&parent->node, &clk_provider_list); |
1771b10d GC |
3080 | } |
3081 | ||
3082 | while (!list_empty(&clk_provider_list)) { | |
3083 | is_init_done = false; | |
3084 | list_for_each_entry_safe(clk_provider, next, | |
3085 | &clk_provider_list, node) { | |
3086 | if (force || parent_ready(clk_provider->np)) { | |
86be408b | 3087 | |
1771b10d | 3088 | clk_provider->clk_init_cb(clk_provider->np); |
86be408b SN |
3089 | of_clk_set_defaults(clk_provider->np, true); |
3090 | ||
1771b10d GC |
3091 | list_del(&clk_provider->node); |
3092 | kfree(clk_provider); | |
3093 | is_init_done = true; | |
3094 | } | |
3095 | } | |
3096 | ||
3097 | /* | |
e5ca8fb4 | 3098 | * We didn't manage to initialize any of the |
1771b10d GC |
3099 | * remaining providers during the last loop, so now we |
3100 | * initialize all the remaining ones unconditionally | |
3101 | * in case the clock parent was not mandatory | |
3102 | */ | |
3103 | if (!is_init_done) | |
3104 | force = true; | |
766e6a4e GL |
3105 | } |
3106 | } | |
3107 | #endif |