Commit | Line | Data |
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b2476490 MT |
1 | /* |
2 | * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> | |
3 | * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * Standard functionality for the common clock API. See Documentation/clk.txt | |
10 | */ | |
11 | ||
3c373117 | 12 | #include <linux/clk.h> |
b09d6d99 | 13 | #include <linux/clk-provider.h> |
86be408b | 14 | #include <linux/clk/clk-conf.h> |
b2476490 MT |
15 | #include <linux/module.h> |
16 | #include <linux/mutex.h> | |
17 | #include <linux/spinlock.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/list.h> | |
20 | #include <linux/slab.h> | |
766e6a4e | 21 | #include <linux/of.h> |
46c8773a | 22 | #include <linux/device.h> |
f2f6c255 | 23 | #include <linux/init.h> |
533ddeb1 | 24 | #include <linux/sched.h> |
562ef0b0 | 25 | #include <linux/clkdev.h> |
b2476490 | 26 | |
d6782c26 SN |
27 | #include "clk.h" |
28 | ||
b2476490 MT |
29 | static DEFINE_SPINLOCK(enable_lock); |
30 | static DEFINE_MUTEX(prepare_lock); | |
31 | ||
533ddeb1 MT |
32 | static struct task_struct *prepare_owner; |
33 | static struct task_struct *enable_owner; | |
34 | ||
35 | static int prepare_refcnt; | |
36 | static int enable_refcnt; | |
37 | ||
b2476490 MT |
38 | static HLIST_HEAD(clk_root_list); |
39 | static HLIST_HEAD(clk_orphan_list); | |
40 | static LIST_HEAD(clk_notifier_list); | |
41 | ||
b09d6d99 MT |
42 | /*** private data structures ***/ |
43 | ||
44 | struct clk_core { | |
45 | const char *name; | |
46 | const struct clk_ops *ops; | |
47 | struct clk_hw *hw; | |
48 | struct module *owner; | |
49 | struct clk_core *parent; | |
50 | const char **parent_names; | |
51 | struct clk_core **parents; | |
52 | u8 num_parents; | |
53 | u8 new_parent_index; | |
54 | unsigned long rate; | |
1c8e6004 | 55 | unsigned long req_rate; |
b09d6d99 MT |
56 | unsigned long new_rate; |
57 | struct clk_core *new_parent; | |
58 | struct clk_core *new_child; | |
59 | unsigned long flags; | |
e6500344 | 60 | bool orphan; |
b09d6d99 MT |
61 | unsigned int enable_count; |
62 | unsigned int prepare_count; | |
9783c0d9 SB |
63 | unsigned long min_rate; |
64 | unsigned long max_rate; | |
b09d6d99 MT |
65 | unsigned long accuracy; |
66 | int phase; | |
67 | struct hlist_head children; | |
68 | struct hlist_node child_node; | |
1c8e6004 | 69 | struct hlist_head clks; |
b09d6d99 MT |
70 | unsigned int notifier_count; |
71 | #ifdef CONFIG_DEBUG_FS | |
72 | struct dentry *dentry; | |
8c9a8a8f | 73 | struct hlist_node debug_node; |
b09d6d99 MT |
74 | #endif |
75 | struct kref ref; | |
76 | }; | |
77 | ||
dfc202ea SB |
78 | #define CREATE_TRACE_POINTS |
79 | #include <trace/events/clk.h> | |
80 | ||
b09d6d99 MT |
81 | struct clk { |
82 | struct clk_core *core; | |
83 | const char *dev_id; | |
84 | const char *con_id; | |
1c8e6004 TV |
85 | unsigned long min_rate; |
86 | unsigned long max_rate; | |
50595f8b | 87 | struct hlist_node clks_node; |
b09d6d99 MT |
88 | }; |
89 | ||
eab89f69 MT |
90 | /*** locking ***/ |
91 | static void clk_prepare_lock(void) | |
92 | { | |
533ddeb1 MT |
93 | if (!mutex_trylock(&prepare_lock)) { |
94 | if (prepare_owner == current) { | |
95 | prepare_refcnt++; | |
96 | return; | |
97 | } | |
98 | mutex_lock(&prepare_lock); | |
99 | } | |
100 | WARN_ON_ONCE(prepare_owner != NULL); | |
101 | WARN_ON_ONCE(prepare_refcnt != 0); | |
102 | prepare_owner = current; | |
103 | prepare_refcnt = 1; | |
eab89f69 MT |
104 | } |
105 | ||
106 | static void clk_prepare_unlock(void) | |
107 | { | |
533ddeb1 MT |
108 | WARN_ON_ONCE(prepare_owner != current); |
109 | WARN_ON_ONCE(prepare_refcnt == 0); | |
110 | ||
111 | if (--prepare_refcnt) | |
112 | return; | |
113 | prepare_owner = NULL; | |
eab89f69 MT |
114 | mutex_unlock(&prepare_lock); |
115 | } | |
116 | ||
117 | static unsigned long clk_enable_lock(void) | |
a57aa185 | 118 | __acquires(enable_lock) |
eab89f69 MT |
119 | { |
120 | unsigned long flags; | |
533ddeb1 MT |
121 | |
122 | if (!spin_trylock_irqsave(&enable_lock, flags)) { | |
123 | if (enable_owner == current) { | |
124 | enable_refcnt++; | |
a57aa185 | 125 | __acquire(enable_lock); |
533ddeb1 MT |
126 | return flags; |
127 | } | |
128 | spin_lock_irqsave(&enable_lock, flags); | |
129 | } | |
130 | WARN_ON_ONCE(enable_owner != NULL); | |
131 | WARN_ON_ONCE(enable_refcnt != 0); | |
132 | enable_owner = current; | |
133 | enable_refcnt = 1; | |
eab89f69 MT |
134 | return flags; |
135 | } | |
136 | ||
137 | static void clk_enable_unlock(unsigned long flags) | |
a57aa185 | 138 | __releases(enable_lock) |
eab89f69 | 139 | { |
533ddeb1 MT |
140 | WARN_ON_ONCE(enable_owner != current); |
141 | WARN_ON_ONCE(enable_refcnt == 0); | |
142 | ||
a57aa185 SB |
143 | if (--enable_refcnt) { |
144 | __release(enable_lock); | |
533ddeb1 | 145 | return; |
a57aa185 | 146 | } |
533ddeb1 | 147 | enable_owner = NULL; |
eab89f69 MT |
148 | spin_unlock_irqrestore(&enable_lock, flags); |
149 | } | |
150 | ||
4dff95dc SB |
151 | static bool clk_core_is_prepared(struct clk_core *core) |
152 | { | |
153 | /* | |
154 | * .is_prepared is optional for clocks that can prepare | |
155 | * fall back to software usage counter if it is missing | |
156 | */ | |
157 | if (!core->ops->is_prepared) | |
158 | return core->prepare_count; | |
b2476490 | 159 | |
4dff95dc SB |
160 | return core->ops->is_prepared(core->hw); |
161 | } | |
b2476490 | 162 | |
4dff95dc SB |
163 | static bool clk_core_is_enabled(struct clk_core *core) |
164 | { | |
165 | /* | |
166 | * .is_enabled is only mandatory for clocks that gate | |
167 | * fall back to software usage counter if .is_enabled is missing | |
168 | */ | |
169 | if (!core->ops->is_enabled) | |
170 | return core->enable_count; | |
6b44c854 | 171 | |
4dff95dc SB |
172 | return core->ops->is_enabled(core->hw); |
173 | } | |
6b44c854 | 174 | |
4dff95dc | 175 | static void clk_unprepare_unused_subtree(struct clk_core *core) |
1af599df | 176 | { |
4dff95dc SB |
177 | struct clk_core *child; |
178 | ||
179 | lockdep_assert_held(&prepare_lock); | |
180 | ||
181 | hlist_for_each_entry(child, &core->children, child_node) | |
182 | clk_unprepare_unused_subtree(child); | |
183 | ||
184 | if (core->prepare_count) | |
1af599df PG |
185 | return; |
186 | ||
4dff95dc SB |
187 | if (core->flags & CLK_IGNORE_UNUSED) |
188 | return; | |
189 | ||
190 | if (clk_core_is_prepared(core)) { | |
191 | trace_clk_unprepare(core); | |
192 | if (core->ops->unprepare_unused) | |
193 | core->ops->unprepare_unused(core->hw); | |
194 | else if (core->ops->unprepare) | |
195 | core->ops->unprepare(core->hw); | |
196 | trace_clk_unprepare_complete(core); | |
197 | } | |
1af599df PG |
198 | } |
199 | ||
4dff95dc | 200 | static void clk_disable_unused_subtree(struct clk_core *core) |
1af599df | 201 | { |
035a61c3 | 202 | struct clk_core *child; |
4dff95dc | 203 | unsigned long flags; |
1af599df | 204 | |
4dff95dc | 205 | lockdep_assert_held(&prepare_lock); |
1af599df | 206 | |
4dff95dc SB |
207 | hlist_for_each_entry(child, &core->children, child_node) |
208 | clk_disable_unused_subtree(child); | |
1af599df | 209 | |
4dff95dc SB |
210 | flags = clk_enable_lock(); |
211 | ||
212 | if (core->enable_count) | |
213 | goto unlock_out; | |
214 | ||
215 | if (core->flags & CLK_IGNORE_UNUSED) | |
216 | goto unlock_out; | |
217 | ||
218 | /* | |
219 | * some gate clocks have special needs during the disable-unused | |
220 | * sequence. call .disable_unused if available, otherwise fall | |
221 | * back to .disable | |
222 | */ | |
223 | if (clk_core_is_enabled(core)) { | |
224 | trace_clk_disable(core); | |
225 | if (core->ops->disable_unused) | |
226 | core->ops->disable_unused(core->hw); | |
227 | else if (core->ops->disable) | |
228 | core->ops->disable(core->hw); | |
229 | trace_clk_disable_complete(core); | |
230 | } | |
231 | ||
232 | unlock_out: | |
233 | clk_enable_unlock(flags); | |
1af599df PG |
234 | } |
235 | ||
4dff95dc SB |
236 | static bool clk_ignore_unused; |
237 | static int __init clk_ignore_unused_setup(char *__unused) | |
1af599df | 238 | { |
4dff95dc SB |
239 | clk_ignore_unused = true; |
240 | return 1; | |
241 | } | |
242 | __setup("clk_ignore_unused", clk_ignore_unused_setup); | |
1af599df | 243 | |
4dff95dc SB |
244 | static int clk_disable_unused(void) |
245 | { | |
246 | struct clk_core *core; | |
247 | ||
248 | if (clk_ignore_unused) { | |
249 | pr_warn("clk: Not disabling unused clocks\n"); | |
250 | return 0; | |
251 | } | |
1af599df | 252 | |
eab89f69 | 253 | clk_prepare_lock(); |
1af599df | 254 | |
4dff95dc SB |
255 | hlist_for_each_entry(core, &clk_root_list, child_node) |
256 | clk_disable_unused_subtree(core); | |
257 | ||
258 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
259 | clk_disable_unused_subtree(core); | |
260 | ||
261 | hlist_for_each_entry(core, &clk_root_list, child_node) | |
262 | clk_unprepare_unused_subtree(core); | |
263 | ||
264 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
265 | clk_unprepare_unused_subtree(core); | |
1af599df | 266 | |
eab89f69 | 267 | clk_prepare_unlock(); |
1af599df PG |
268 | |
269 | return 0; | |
270 | } | |
4dff95dc | 271 | late_initcall_sync(clk_disable_unused); |
1af599df | 272 | |
4dff95dc | 273 | /*** helper functions ***/ |
1af599df | 274 | |
b76281cb | 275 | const char *__clk_get_name(const struct clk *clk) |
1af599df | 276 | { |
4dff95dc | 277 | return !clk ? NULL : clk->core->name; |
1af599df | 278 | } |
4dff95dc | 279 | EXPORT_SYMBOL_GPL(__clk_get_name); |
1af599df | 280 | |
e7df6f6e | 281 | const char *clk_hw_get_name(const struct clk_hw *hw) |
1a9c069c SB |
282 | { |
283 | return hw->core->name; | |
284 | } | |
285 | EXPORT_SYMBOL_GPL(clk_hw_get_name); | |
286 | ||
4dff95dc SB |
287 | struct clk_hw *__clk_get_hw(struct clk *clk) |
288 | { | |
289 | return !clk ? NULL : clk->core->hw; | |
290 | } | |
291 | EXPORT_SYMBOL_GPL(__clk_get_hw); | |
1af599df | 292 | |
e7df6f6e | 293 | unsigned int clk_hw_get_num_parents(const struct clk_hw *hw) |
1a9c069c SB |
294 | { |
295 | return hw->core->num_parents; | |
296 | } | |
297 | EXPORT_SYMBOL_GPL(clk_hw_get_num_parents); | |
298 | ||
e7df6f6e | 299 | struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw) |
1a9c069c SB |
300 | { |
301 | return hw->core->parent ? hw->core->parent->hw : NULL; | |
302 | } | |
303 | EXPORT_SYMBOL_GPL(clk_hw_get_parent); | |
304 | ||
4dff95dc SB |
305 | static struct clk_core *__clk_lookup_subtree(const char *name, |
306 | struct clk_core *core) | |
bddca894 | 307 | { |
035a61c3 | 308 | struct clk_core *child; |
4dff95dc | 309 | struct clk_core *ret; |
bddca894 | 310 | |
4dff95dc SB |
311 | if (!strcmp(core->name, name)) |
312 | return core; | |
bddca894 | 313 | |
4dff95dc SB |
314 | hlist_for_each_entry(child, &core->children, child_node) { |
315 | ret = __clk_lookup_subtree(name, child); | |
316 | if (ret) | |
317 | return ret; | |
bddca894 PG |
318 | } |
319 | ||
4dff95dc | 320 | return NULL; |
bddca894 PG |
321 | } |
322 | ||
4dff95dc | 323 | static struct clk_core *clk_core_lookup(const char *name) |
bddca894 | 324 | { |
4dff95dc SB |
325 | struct clk_core *root_clk; |
326 | struct clk_core *ret; | |
bddca894 | 327 | |
4dff95dc SB |
328 | if (!name) |
329 | return NULL; | |
bddca894 | 330 | |
4dff95dc SB |
331 | /* search the 'proper' clk tree first */ |
332 | hlist_for_each_entry(root_clk, &clk_root_list, child_node) { | |
333 | ret = __clk_lookup_subtree(name, root_clk); | |
334 | if (ret) | |
335 | return ret; | |
bddca894 PG |
336 | } |
337 | ||
4dff95dc SB |
338 | /* if not found, then search the orphan tree */ |
339 | hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) { | |
340 | ret = __clk_lookup_subtree(name, root_clk); | |
341 | if (ret) | |
342 | return ret; | |
343 | } | |
bddca894 | 344 | |
4dff95dc | 345 | return NULL; |
bddca894 PG |
346 | } |
347 | ||
4dff95dc SB |
348 | static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core, |
349 | u8 index) | |
bddca894 | 350 | { |
4dff95dc SB |
351 | if (!core || index >= core->num_parents) |
352 | return NULL; | |
353 | else if (!core->parents) | |
354 | return clk_core_lookup(core->parent_names[index]); | |
355 | else if (!core->parents[index]) | |
356 | return core->parents[index] = | |
357 | clk_core_lookup(core->parent_names[index]); | |
358 | else | |
359 | return core->parents[index]; | |
bddca894 PG |
360 | } |
361 | ||
e7df6f6e SB |
362 | struct clk_hw * |
363 | clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index) | |
1a9c069c SB |
364 | { |
365 | struct clk_core *parent; | |
366 | ||
367 | parent = clk_core_get_parent_by_index(hw->core, index); | |
368 | ||
369 | return !parent ? NULL : parent->hw; | |
370 | } | |
371 | EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index); | |
372 | ||
4dff95dc SB |
373 | unsigned int __clk_get_enable_count(struct clk *clk) |
374 | { | |
375 | return !clk ? 0 : clk->core->enable_count; | |
376 | } | |
b2476490 | 377 | |
4dff95dc SB |
378 | static unsigned long clk_core_get_rate_nolock(struct clk_core *core) |
379 | { | |
380 | unsigned long ret; | |
b2476490 | 381 | |
4dff95dc SB |
382 | if (!core) { |
383 | ret = 0; | |
384 | goto out; | |
385 | } | |
b2476490 | 386 | |
4dff95dc | 387 | ret = core->rate; |
b2476490 | 388 | |
4dff95dc SB |
389 | if (core->flags & CLK_IS_ROOT) |
390 | goto out; | |
c646cbf1 | 391 | |
4dff95dc SB |
392 | if (!core->parent) |
393 | ret = 0; | |
b2476490 | 394 | |
b2476490 MT |
395 | out: |
396 | return ret; | |
397 | } | |
398 | ||
e7df6f6e | 399 | unsigned long clk_hw_get_rate(const struct clk_hw *hw) |
1a9c069c SB |
400 | { |
401 | return clk_core_get_rate_nolock(hw->core); | |
402 | } | |
403 | EXPORT_SYMBOL_GPL(clk_hw_get_rate); | |
404 | ||
4dff95dc SB |
405 | static unsigned long __clk_get_accuracy(struct clk_core *core) |
406 | { | |
407 | if (!core) | |
408 | return 0; | |
b2476490 | 409 | |
4dff95dc | 410 | return core->accuracy; |
b2476490 MT |
411 | } |
412 | ||
4dff95dc | 413 | unsigned long __clk_get_flags(struct clk *clk) |
fcb0ee6a | 414 | { |
4dff95dc | 415 | return !clk ? 0 : clk->core->flags; |
fcb0ee6a | 416 | } |
4dff95dc | 417 | EXPORT_SYMBOL_GPL(__clk_get_flags); |
fcb0ee6a | 418 | |
e7df6f6e | 419 | unsigned long clk_hw_get_flags(const struct clk_hw *hw) |
1a9c069c SB |
420 | { |
421 | return hw->core->flags; | |
422 | } | |
423 | EXPORT_SYMBOL_GPL(clk_hw_get_flags); | |
424 | ||
e7df6f6e | 425 | bool clk_hw_is_prepared(const struct clk_hw *hw) |
1a9c069c SB |
426 | { |
427 | return clk_core_is_prepared(hw->core); | |
428 | } | |
429 | ||
be68bf88 JE |
430 | bool clk_hw_is_enabled(const struct clk_hw *hw) |
431 | { | |
432 | return clk_core_is_enabled(hw->core); | |
433 | } | |
434 | ||
4dff95dc | 435 | bool __clk_is_enabled(struct clk *clk) |
b2476490 | 436 | { |
4dff95dc SB |
437 | if (!clk) |
438 | return false; | |
b2476490 | 439 | |
4dff95dc SB |
440 | return clk_core_is_enabled(clk->core); |
441 | } | |
442 | EXPORT_SYMBOL_GPL(__clk_is_enabled); | |
b2476490 | 443 | |
4dff95dc SB |
444 | static bool mux_is_better_rate(unsigned long rate, unsigned long now, |
445 | unsigned long best, unsigned long flags) | |
446 | { | |
447 | if (flags & CLK_MUX_ROUND_CLOSEST) | |
448 | return abs(now - rate) < abs(best - rate); | |
1af599df | 449 | |
4dff95dc SB |
450 | return now <= rate && now > best; |
451 | } | |
bddca894 | 452 | |
0817b62c BB |
453 | static int |
454 | clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req, | |
4dff95dc SB |
455 | unsigned long flags) |
456 | { | |
457 | struct clk_core *core = hw->core, *parent, *best_parent = NULL; | |
0817b62c BB |
458 | int i, num_parents, ret; |
459 | unsigned long best = 0; | |
460 | struct clk_rate_request parent_req = *req; | |
b2476490 | 461 | |
4dff95dc SB |
462 | /* if NO_REPARENT flag set, pass through to current parent */ |
463 | if (core->flags & CLK_SET_RATE_NO_REPARENT) { | |
464 | parent = core->parent; | |
0817b62c BB |
465 | if (core->flags & CLK_SET_RATE_PARENT) { |
466 | ret = __clk_determine_rate(parent ? parent->hw : NULL, | |
467 | &parent_req); | |
468 | if (ret) | |
469 | return ret; | |
470 | ||
471 | best = parent_req.rate; | |
472 | } else if (parent) { | |
4dff95dc | 473 | best = clk_core_get_rate_nolock(parent); |
0817b62c | 474 | } else { |
4dff95dc | 475 | best = clk_core_get_rate_nolock(core); |
0817b62c BB |
476 | } |
477 | ||
4dff95dc SB |
478 | goto out; |
479 | } | |
b2476490 | 480 | |
4dff95dc SB |
481 | /* find the parent that can provide the fastest rate <= rate */ |
482 | num_parents = core->num_parents; | |
483 | for (i = 0; i < num_parents; i++) { | |
484 | parent = clk_core_get_parent_by_index(core, i); | |
485 | if (!parent) | |
486 | continue; | |
0817b62c BB |
487 | |
488 | if (core->flags & CLK_SET_RATE_PARENT) { | |
489 | parent_req = *req; | |
490 | ret = __clk_determine_rate(parent->hw, &parent_req); | |
491 | if (ret) | |
492 | continue; | |
493 | } else { | |
494 | parent_req.rate = clk_core_get_rate_nolock(parent); | |
495 | } | |
496 | ||
497 | if (mux_is_better_rate(req->rate, parent_req.rate, | |
498 | best, flags)) { | |
4dff95dc | 499 | best_parent = parent; |
0817b62c | 500 | best = parent_req.rate; |
4dff95dc SB |
501 | } |
502 | } | |
b2476490 | 503 | |
57d866e6 BB |
504 | if (!best_parent) |
505 | return -EINVAL; | |
506 | ||
4dff95dc SB |
507 | out: |
508 | if (best_parent) | |
0817b62c BB |
509 | req->best_parent_hw = best_parent->hw; |
510 | req->best_parent_rate = best; | |
511 | req->rate = best; | |
b2476490 | 512 | |
0817b62c | 513 | return 0; |
b33d212f | 514 | } |
4dff95dc SB |
515 | |
516 | struct clk *__clk_lookup(const char *name) | |
fcb0ee6a | 517 | { |
4dff95dc SB |
518 | struct clk_core *core = clk_core_lookup(name); |
519 | ||
520 | return !core ? NULL : core->hw->clk; | |
fcb0ee6a | 521 | } |
b2476490 | 522 | |
4dff95dc SB |
523 | static void clk_core_get_boundaries(struct clk_core *core, |
524 | unsigned long *min_rate, | |
525 | unsigned long *max_rate) | |
1c155b3d | 526 | { |
4dff95dc | 527 | struct clk *clk_user; |
1c155b3d | 528 | |
9783c0d9 SB |
529 | *min_rate = core->min_rate; |
530 | *max_rate = core->max_rate; | |
496eadf8 | 531 | |
4dff95dc SB |
532 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
533 | *min_rate = max(*min_rate, clk_user->min_rate); | |
1c155b3d | 534 | |
4dff95dc SB |
535 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
536 | *max_rate = min(*max_rate, clk_user->max_rate); | |
537 | } | |
1c155b3d | 538 | |
9783c0d9 SB |
539 | void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate, |
540 | unsigned long max_rate) | |
541 | { | |
542 | hw->core->min_rate = min_rate; | |
543 | hw->core->max_rate = max_rate; | |
544 | } | |
545 | EXPORT_SYMBOL_GPL(clk_hw_set_rate_range); | |
546 | ||
4dff95dc SB |
547 | /* |
548 | * Helper for finding best parent to provide a given frequency. This can be used | |
549 | * directly as a determine_rate callback (e.g. for a mux), or from a more | |
550 | * complex clock that may combine a mux with other operations. | |
551 | */ | |
0817b62c BB |
552 | int __clk_mux_determine_rate(struct clk_hw *hw, |
553 | struct clk_rate_request *req) | |
4dff95dc | 554 | { |
0817b62c | 555 | return clk_mux_determine_rate_flags(hw, req, 0); |
1c155b3d | 556 | } |
4dff95dc | 557 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); |
1c155b3d | 558 | |
0817b62c BB |
559 | int __clk_mux_determine_rate_closest(struct clk_hw *hw, |
560 | struct clk_rate_request *req) | |
b2476490 | 561 | { |
0817b62c | 562 | return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST); |
4dff95dc SB |
563 | } |
564 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); | |
b2476490 | 565 | |
4dff95dc | 566 | /*** clk api ***/ |
496eadf8 | 567 | |
4dff95dc SB |
568 | static void clk_core_unprepare(struct clk_core *core) |
569 | { | |
a6334725 SB |
570 | lockdep_assert_held(&prepare_lock); |
571 | ||
4dff95dc SB |
572 | if (!core) |
573 | return; | |
b2476490 | 574 | |
4dff95dc SB |
575 | if (WARN_ON(core->prepare_count == 0)) |
576 | return; | |
b2476490 | 577 | |
4dff95dc SB |
578 | if (--core->prepare_count > 0) |
579 | return; | |
b2476490 | 580 | |
4dff95dc | 581 | WARN_ON(core->enable_count > 0); |
b2476490 | 582 | |
4dff95dc | 583 | trace_clk_unprepare(core); |
b2476490 | 584 | |
4dff95dc SB |
585 | if (core->ops->unprepare) |
586 | core->ops->unprepare(core->hw); | |
587 | ||
588 | trace_clk_unprepare_complete(core); | |
589 | clk_core_unprepare(core->parent); | |
b2476490 MT |
590 | } |
591 | ||
4dff95dc SB |
592 | /** |
593 | * clk_unprepare - undo preparation of a clock source | |
594 | * @clk: the clk being unprepared | |
595 | * | |
596 | * clk_unprepare may sleep, which differentiates it from clk_disable. In a | |
597 | * simple case, clk_unprepare can be used instead of clk_disable to gate a clk | |
598 | * if the operation may sleep. One example is a clk which is accessed over | |
599 | * I2c. In the complex case a clk gate operation may require a fast and a slow | |
600 | * part. It is this reason that clk_unprepare and clk_disable are not mutually | |
601 | * exclusive. In fact clk_disable must be called before clk_unprepare. | |
602 | */ | |
603 | void clk_unprepare(struct clk *clk) | |
1e435256 | 604 | { |
4dff95dc SB |
605 | if (IS_ERR_OR_NULL(clk)) |
606 | return; | |
607 | ||
608 | clk_prepare_lock(); | |
609 | clk_core_unprepare(clk->core); | |
610 | clk_prepare_unlock(); | |
1e435256 | 611 | } |
4dff95dc | 612 | EXPORT_SYMBOL_GPL(clk_unprepare); |
1e435256 | 613 | |
4dff95dc | 614 | static int clk_core_prepare(struct clk_core *core) |
b2476490 | 615 | { |
4dff95dc | 616 | int ret = 0; |
b2476490 | 617 | |
a6334725 SB |
618 | lockdep_assert_held(&prepare_lock); |
619 | ||
4dff95dc | 620 | if (!core) |
1e435256 | 621 | return 0; |
1e435256 | 622 | |
4dff95dc SB |
623 | if (core->prepare_count == 0) { |
624 | ret = clk_core_prepare(core->parent); | |
625 | if (ret) | |
626 | return ret; | |
b2476490 | 627 | |
4dff95dc | 628 | trace_clk_prepare(core); |
b2476490 | 629 | |
4dff95dc SB |
630 | if (core->ops->prepare) |
631 | ret = core->ops->prepare(core->hw); | |
b2476490 | 632 | |
4dff95dc | 633 | trace_clk_prepare_complete(core); |
1c155b3d | 634 | |
4dff95dc SB |
635 | if (ret) { |
636 | clk_core_unprepare(core->parent); | |
637 | return ret; | |
638 | } | |
639 | } | |
1c155b3d | 640 | |
4dff95dc | 641 | core->prepare_count++; |
b2476490 MT |
642 | |
643 | return 0; | |
644 | } | |
b2476490 | 645 | |
4dff95dc SB |
646 | /** |
647 | * clk_prepare - prepare a clock source | |
648 | * @clk: the clk being prepared | |
649 | * | |
650 | * clk_prepare may sleep, which differentiates it from clk_enable. In a simple | |
651 | * case, clk_prepare can be used instead of clk_enable to ungate a clk if the | |
652 | * operation may sleep. One example is a clk which is accessed over I2c. In | |
653 | * the complex case a clk ungate operation may require a fast and a slow part. | |
654 | * It is this reason that clk_prepare and clk_enable are not mutually | |
655 | * exclusive. In fact clk_prepare must be called before clk_enable. | |
656 | * Returns 0 on success, -EERROR otherwise. | |
657 | */ | |
658 | int clk_prepare(struct clk *clk) | |
b2476490 | 659 | { |
4dff95dc | 660 | int ret; |
b2476490 | 661 | |
4dff95dc SB |
662 | if (!clk) |
663 | return 0; | |
b2476490 | 664 | |
4dff95dc SB |
665 | clk_prepare_lock(); |
666 | ret = clk_core_prepare(clk->core); | |
667 | clk_prepare_unlock(); | |
668 | ||
669 | return ret; | |
b2476490 | 670 | } |
4dff95dc | 671 | EXPORT_SYMBOL_GPL(clk_prepare); |
b2476490 | 672 | |
4dff95dc | 673 | static void clk_core_disable(struct clk_core *core) |
b2476490 | 674 | { |
a6334725 SB |
675 | lockdep_assert_held(&enable_lock); |
676 | ||
4dff95dc SB |
677 | if (!core) |
678 | return; | |
035a61c3 | 679 | |
4dff95dc SB |
680 | if (WARN_ON(core->enable_count == 0)) |
681 | return; | |
b2476490 | 682 | |
4dff95dc SB |
683 | if (--core->enable_count > 0) |
684 | return; | |
035a61c3 | 685 | |
4dff95dc | 686 | trace_clk_disable(core); |
035a61c3 | 687 | |
4dff95dc SB |
688 | if (core->ops->disable) |
689 | core->ops->disable(core->hw); | |
035a61c3 | 690 | |
4dff95dc | 691 | trace_clk_disable_complete(core); |
035a61c3 | 692 | |
4dff95dc | 693 | clk_core_disable(core->parent); |
035a61c3 | 694 | } |
7ef3dcc8 | 695 | |
4dff95dc SB |
696 | /** |
697 | * clk_disable - gate a clock | |
698 | * @clk: the clk being gated | |
699 | * | |
700 | * clk_disable must not sleep, which differentiates it from clk_unprepare. In | |
701 | * a simple case, clk_disable can be used instead of clk_unprepare to gate a | |
702 | * clk if the operation is fast and will never sleep. One example is a | |
703 | * SoC-internal clk which is controlled via simple register writes. In the | |
704 | * complex case a clk gate operation may require a fast and a slow part. It is | |
705 | * this reason that clk_unprepare and clk_disable are not mutually exclusive. | |
706 | * In fact clk_disable must be called before clk_unprepare. | |
707 | */ | |
708 | void clk_disable(struct clk *clk) | |
b2476490 | 709 | { |
4dff95dc SB |
710 | unsigned long flags; |
711 | ||
712 | if (IS_ERR_OR_NULL(clk)) | |
713 | return; | |
714 | ||
715 | flags = clk_enable_lock(); | |
716 | clk_core_disable(clk->core); | |
717 | clk_enable_unlock(flags); | |
b2476490 | 718 | } |
4dff95dc | 719 | EXPORT_SYMBOL_GPL(clk_disable); |
b2476490 | 720 | |
4dff95dc | 721 | static int clk_core_enable(struct clk_core *core) |
b2476490 | 722 | { |
4dff95dc | 723 | int ret = 0; |
b2476490 | 724 | |
a6334725 SB |
725 | lockdep_assert_held(&enable_lock); |
726 | ||
4dff95dc SB |
727 | if (!core) |
728 | return 0; | |
b2476490 | 729 | |
4dff95dc SB |
730 | if (WARN_ON(core->prepare_count == 0)) |
731 | return -ESHUTDOWN; | |
b2476490 | 732 | |
4dff95dc SB |
733 | if (core->enable_count == 0) { |
734 | ret = clk_core_enable(core->parent); | |
b2476490 | 735 | |
4dff95dc SB |
736 | if (ret) |
737 | return ret; | |
b2476490 | 738 | |
4dff95dc | 739 | trace_clk_enable(core); |
035a61c3 | 740 | |
4dff95dc SB |
741 | if (core->ops->enable) |
742 | ret = core->ops->enable(core->hw); | |
035a61c3 | 743 | |
4dff95dc SB |
744 | trace_clk_enable_complete(core); |
745 | ||
746 | if (ret) { | |
747 | clk_core_disable(core->parent); | |
748 | return ret; | |
749 | } | |
750 | } | |
751 | ||
752 | core->enable_count++; | |
753 | return 0; | |
035a61c3 | 754 | } |
b2476490 | 755 | |
4dff95dc SB |
756 | /** |
757 | * clk_enable - ungate a clock | |
758 | * @clk: the clk being ungated | |
759 | * | |
760 | * clk_enable must not sleep, which differentiates it from clk_prepare. In a | |
761 | * simple case, clk_enable can be used instead of clk_prepare to ungate a clk | |
762 | * if the operation will never sleep. One example is a SoC-internal clk which | |
763 | * is controlled via simple register writes. In the complex case a clk ungate | |
764 | * operation may require a fast and a slow part. It is this reason that | |
765 | * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare | |
766 | * must be called before clk_enable. Returns 0 on success, -EERROR | |
767 | * otherwise. | |
768 | */ | |
769 | int clk_enable(struct clk *clk) | |
5279fc40 | 770 | { |
4dff95dc SB |
771 | unsigned long flags; |
772 | int ret; | |
773 | ||
774 | if (!clk) | |
5279fc40 BB |
775 | return 0; |
776 | ||
4dff95dc SB |
777 | flags = clk_enable_lock(); |
778 | ret = clk_core_enable(clk->core); | |
779 | clk_enable_unlock(flags); | |
5279fc40 | 780 | |
4dff95dc | 781 | return ret; |
b2476490 | 782 | } |
4dff95dc | 783 | EXPORT_SYMBOL_GPL(clk_enable); |
b2476490 | 784 | |
0817b62c BB |
785 | static int clk_core_round_rate_nolock(struct clk_core *core, |
786 | struct clk_rate_request *req) | |
3d6ee287 | 787 | { |
4dff95dc | 788 | struct clk_core *parent; |
0817b62c | 789 | long rate; |
4dff95dc SB |
790 | |
791 | lockdep_assert_held(&prepare_lock); | |
3d6ee287 | 792 | |
d6968fca | 793 | if (!core) |
4dff95dc | 794 | return 0; |
3d6ee287 | 795 | |
4dff95dc | 796 | parent = core->parent; |
0817b62c BB |
797 | if (parent) { |
798 | req->best_parent_hw = parent->hw; | |
799 | req->best_parent_rate = parent->rate; | |
800 | } else { | |
801 | req->best_parent_hw = NULL; | |
802 | req->best_parent_rate = 0; | |
803 | } | |
3d6ee287 | 804 | |
4dff95dc | 805 | if (core->ops->determine_rate) { |
0817b62c BB |
806 | return core->ops->determine_rate(core->hw, req); |
807 | } else if (core->ops->round_rate) { | |
808 | rate = core->ops->round_rate(core->hw, req->rate, | |
809 | &req->best_parent_rate); | |
810 | if (rate < 0) | |
811 | return rate; | |
812 | ||
813 | req->rate = rate; | |
814 | } else if (core->flags & CLK_SET_RATE_PARENT) { | |
815 | return clk_core_round_rate_nolock(parent, req); | |
816 | } else { | |
817 | req->rate = core->rate; | |
818 | } | |
819 | ||
820 | return 0; | |
3d6ee287 UH |
821 | } |
822 | ||
4dff95dc SB |
823 | /** |
824 | * __clk_determine_rate - get the closest rate actually supported by a clock | |
825 | * @hw: determine the rate of this clock | |
826 | * @rate: target rate | |
827 | * @min_rate: returned rate must be greater than this rate | |
828 | * @max_rate: returned rate must be less than this rate | |
829 | * | |
6e5ab41b | 830 | * Useful for clk_ops such as .set_rate and .determine_rate. |
4dff95dc | 831 | */ |
0817b62c | 832 | int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) |
035a61c3 | 833 | { |
0817b62c BB |
834 | if (!hw) { |
835 | req->rate = 0; | |
4dff95dc | 836 | return 0; |
0817b62c | 837 | } |
035a61c3 | 838 | |
0817b62c | 839 | return clk_core_round_rate_nolock(hw->core, req); |
035a61c3 | 840 | } |
4dff95dc | 841 | EXPORT_SYMBOL_GPL(__clk_determine_rate); |
035a61c3 | 842 | |
1a9c069c SB |
843 | unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate) |
844 | { | |
845 | int ret; | |
846 | struct clk_rate_request req; | |
847 | ||
848 | clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate); | |
849 | req.rate = rate; | |
850 | ||
851 | ret = clk_core_round_rate_nolock(hw->core, &req); | |
852 | if (ret) | |
853 | return 0; | |
854 | ||
855 | return req.rate; | |
856 | } | |
857 | EXPORT_SYMBOL_GPL(clk_hw_round_rate); | |
858 | ||
4dff95dc SB |
859 | /** |
860 | * clk_round_rate - round the given rate for a clk | |
861 | * @clk: the clk for which we are rounding a rate | |
862 | * @rate: the rate which is to be rounded | |
863 | * | |
864 | * Takes in a rate as input and rounds it to a rate that the clk can actually | |
865 | * use which is then returned. If clk doesn't support round_rate operation | |
866 | * then the parent rate is returned. | |
867 | */ | |
868 | long clk_round_rate(struct clk *clk, unsigned long rate) | |
035a61c3 | 869 | { |
fc4a05d4 SB |
870 | struct clk_rate_request req; |
871 | int ret; | |
4dff95dc | 872 | |
035a61c3 | 873 | if (!clk) |
4dff95dc | 874 | return 0; |
035a61c3 | 875 | |
4dff95dc | 876 | clk_prepare_lock(); |
fc4a05d4 SB |
877 | |
878 | clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate); | |
879 | req.rate = rate; | |
880 | ||
881 | ret = clk_core_round_rate_nolock(clk->core, &req); | |
4dff95dc SB |
882 | clk_prepare_unlock(); |
883 | ||
fc4a05d4 SB |
884 | if (ret) |
885 | return ret; | |
886 | ||
887 | return req.rate; | |
035a61c3 | 888 | } |
4dff95dc | 889 | EXPORT_SYMBOL_GPL(clk_round_rate); |
b2476490 | 890 | |
4dff95dc SB |
891 | /** |
892 | * __clk_notify - call clk notifier chain | |
893 | * @core: clk that is changing rate | |
894 | * @msg: clk notifier type (see include/linux/clk.h) | |
895 | * @old_rate: old clk rate | |
896 | * @new_rate: new clk rate | |
897 | * | |
898 | * Triggers a notifier call chain on the clk rate-change notification | |
899 | * for 'clk'. Passes a pointer to the struct clk and the previous | |
900 | * and current rates to the notifier callback. Intended to be called by | |
901 | * internal clock code only. Returns NOTIFY_DONE from the last driver | |
902 | * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if | |
903 | * a driver returns that. | |
904 | */ | |
905 | static int __clk_notify(struct clk_core *core, unsigned long msg, | |
906 | unsigned long old_rate, unsigned long new_rate) | |
b2476490 | 907 | { |
4dff95dc SB |
908 | struct clk_notifier *cn; |
909 | struct clk_notifier_data cnd; | |
910 | int ret = NOTIFY_DONE; | |
b2476490 | 911 | |
4dff95dc SB |
912 | cnd.old_rate = old_rate; |
913 | cnd.new_rate = new_rate; | |
b2476490 | 914 | |
4dff95dc SB |
915 | list_for_each_entry(cn, &clk_notifier_list, node) { |
916 | if (cn->clk->core == core) { | |
917 | cnd.clk = cn->clk; | |
918 | ret = srcu_notifier_call_chain(&cn->notifier_head, msg, | |
919 | &cnd); | |
920 | } | |
b2476490 MT |
921 | } |
922 | ||
4dff95dc | 923 | return ret; |
b2476490 MT |
924 | } |
925 | ||
4dff95dc SB |
926 | /** |
927 | * __clk_recalc_accuracies | |
928 | * @core: first clk in the subtree | |
929 | * | |
930 | * Walks the subtree of clks starting with clk and recalculates accuracies as | |
931 | * it goes. Note that if a clk does not implement the .recalc_accuracy | |
6e5ab41b | 932 | * callback then it is assumed that the clock will take on the accuracy of its |
4dff95dc | 933 | * parent. |
4dff95dc SB |
934 | */ |
935 | static void __clk_recalc_accuracies(struct clk_core *core) | |
b2476490 | 936 | { |
4dff95dc SB |
937 | unsigned long parent_accuracy = 0; |
938 | struct clk_core *child; | |
b2476490 | 939 | |
4dff95dc | 940 | lockdep_assert_held(&prepare_lock); |
b2476490 | 941 | |
4dff95dc SB |
942 | if (core->parent) |
943 | parent_accuracy = core->parent->accuracy; | |
b2476490 | 944 | |
4dff95dc SB |
945 | if (core->ops->recalc_accuracy) |
946 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
947 | parent_accuracy); | |
948 | else | |
949 | core->accuracy = parent_accuracy; | |
b2476490 | 950 | |
4dff95dc SB |
951 | hlist_for_each_entry(child, &core->children, child_node) |
952 | __clk_recalc_accuracies(child); | |
b2476490 MT |
953 | } |
954 | ||
4dff95dc | 955 | static long clk_core_get_accuracy(struct clk_core *core) |
e366fdd7 | 956 | { |
4dff95dc | 957 | unsigned long accuracy; |
15a02c1f | 958 | |
4dff95dc SB |
959 | clk_prepare_lock(); |
960 | if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE)) | |
961 | __clk_recalc_accuracies(core); | |
15a02c1f | 962 | |
4dff95dc SB |
963 | accuracy = __clk_get_accuracy(core); |
964 | clk_prepare_unlock(); | |
e366fdd7 | 965 | |
4dff95dc | 966 | return accuracy; |
e366fdd7 | 967 | } |
15a02c1f | 968 | |
4dff95dc SB |
969 | /** |
970 | * clk_get_accuracy - return the accuracy of clk | |
971 | * @clk: the clk whose accuracy is being returned | |
972 | * | |
973 | * Simply returns the cached accuracy of the clk, unless | |
974 | * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be | |
975 | * issued. | |
976 | * If clk is NULL then returns 0. | |
977 | */ | |
978 | long clk_get_accuracy(struct clk *clk) | |
035a61c3 | 979 | { |
4dff95dc SB |
980 | if (!clk) |
981 | return 0; | |
035a61c3 | 982 | |
4dff95dc | 983 | return clk_core_get_accuracy(clk->core); |
035a61c3 | 984 | } |
4dff95dc | 985 | EXPORT_SYMBOL_GPL(clk_get_accuracy); |
035a61c3 | 986 | |
4dff95dc SB |
987 | static unsigned long clk_recalc(struct clk_core *core, |
988 | unsigned long parent_rate) | |
1c8e6004 | 989 | { |
4dff95dc SB |
990 | if (core->ops->recalc_rate) |
991 | return core->ops->recalc_rate(core->hw, parent_rate); | |
992 | return parent_rate; | |
1c8e6004 TV |
993 | } |
994 | ||
4dff95dc SB |
995 | /** |
996 | * __clk_recalc_rates | |
997 | * @core: first clk in the subtree | |
998 | * @msg: notification type (see include/linux/clk.h) | |
999 | * | |
1000 | * Walks the subtree of clks starting with clk and recalculates rates as it | |
1001 | * goes. Note that if a clk does not implement the .recalc_rate callback then | |
1002 | * it is assumed that the clock will take on the rate of its parent. | |
1003 | * | |
1004 | * clk_recalc_rates also propagates the POST_RATE_CHANGE notification, | |
1005 | * if necessary. | |
15a02c1f | 1006 | */ |
4dff95dc | 1007 | static void __clk_recalc_rates(struct clk_core *core, unsigned long msg) |
15a02c1f | 1008 | { |
4dff95dc SB |
1009 | unsigned long old_rate; |
1010 | unsigned long parent_rate = 0; | |
1011 | struct clk_core *child; | |
e366fdd7 | 1012 | |
4dff95dc | 1013 | lockdep_assert_held(&prepare_lock); |
15a02c1f | 1014 | |
4dff95dc | 1015 | old_rate = core->rate; |
b2476490 | 1016 | |
4dff95dc SB |
1017 | if (core->parent) |
1018 | parent_rate = core->parent->rate; | |
b2476490 | 1019 | |
4dff95dc | 1020 | core->rate = clk_recalc(core, parent_rate); |
b2476490 | 1021 | |
4dff95dc SB |
1022 | /* |
1023 | * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE | |
1024 | * & ABORT_RATE_CHANGE notifiers | |
1025 | */ | |
1026 | if (core->notifier_count && msg) | |
1027 | __clk_notify(core, msg, old_rate, core->rate); | |
b2476490 | 1028 | |
4dff95dc SB |
1029 | hlist_for_each_entry(child, &core->children, child_node) |
1030 | __clk_recalc_rates(child, msg); | |
1031 | } | |
b2476490 | 1032 | |
4dff95dc SB |
1033 | static unsigned long clk_core_get_rate(struct clk_core *core) |
1034 | { | |
1035 | unsigned long rate; | |
dfc202ea | 1036 | |
4dff95dc | 1037 | clk_prepare_lock(); |
b2476490 | 1038 | |
4dff95dc SB |
1039 | if (core && (core->flags & CLK_GET_RATE_NOCACHE)) |
1040 | __clk_recalc_rates(core, 0); | |
1041 | ||
1042 | rate = clk_core_get_rate_nolock(core); | |
1043 | clk_prepare_unlock(); | |
1044 | ||
1045 | return rate; | |
b2476490 MT |
1046 | } |
1047 | ||
1048 | /** | |
4dff95dc SB |
1049 | * clk_get_rate - return the rate of clk |
1050 | * @clk: the clk whose rate is being returned | |
b2476490 | 1051 | * |
4dff95dc SB |
1052 | * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag |
1053 | * is set, which means a recalc_rate will be issued. | |
1054 | * If clk is NULL then returns 0. | |
b2476490 | 1055 | */ |
4dff95dc | 1056 | unsigned long clk_get_rate(struct clk *clk) |
b2476490 | 1057 | { |
4dff95dc SB |
1058 | if (!clk) |
1059 | return 0; | |
63589e92 | 1060 | |
4dff95dc | 1061 | return clk_core_get_rate(clk->core); |
b2476490 | 1062 | } |
4dff95dc | 1063 | EXPORT_SYMBOL_GPL(clk_get_rate); |
b2476490 | 1064 | |
4dff95dc SB |
1065 | static int clk_fetch_parent_index(struct clk_core *core, |
1066 | struct clk_core *parent) | |
b2476490 | 1067 | { |
4dff95dc | 1068 | int i; |
b2476490 | 1069 | |
4dff95dc SB |
1070 | if (!core->parents) { |
1071 | core->parents = kcalloc(core->num_parents, | |
1072 | sizeof(struct clk *), GFP_KERNEL); | |
1073 | if (!core->parents) | |
1074 | return -ENOMEM; | |
1075 | } | |
dfc202ea | 1076 | |
4dff95dc SB |
1077 | /* |
1078 | * find index of new parent clock using cached parent ptrs, | |
1079 | * or if not yet cached, use string name comparison and cache | |
1080 | * them now to avoid future calls to clk_core_lookup. | |
1081 | */ | |
1082 | for (i = 0; i < core->num_parents; i++) { | |
1083 | if (core->parents[i] == parent) | |
1084 | return i; | |
dfc202ea | 1085 | |
4dff95dc SB |
1086 | if (core->parents[i]) |
1087 | continue; | |
dfc202ea | 1088 | |
4dff95dc SB |
1089 | if (!strcmp(core->parent_names[i], parent->name)) { |
1090 | core->parents[i] = clk_core_lookup(parent->name); | |
1091 | return i; | |
b2476490 MT |
1092 | } |
1093 | } | |
1094 | ||
4dff95dc | 1095 | return -EINVAL; |
b2476490 MT |
1096 | } |
1097 | ||
e6500344 HS |
1098 | /* |
1099 | * Update the orphan status of @core and all its children. | |
1100 | */ | |
1101 | static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan) | |
1102 | { | |
1103 | struct clk_core *child; | |
1104 | ||
1105 | core->orphan = is_orphan; | |
1106 | ||
1107 | hlist_for_each_entry(child, &core->children, child_node) | |
1108 | clk_core_update_orphan_status(child, is_orphan); | |
1109 | } | |
1110 | ||
4dff95dc | 1111 | static void clk_reparent(struct clk_core *core, struct clk_core *new_parent) |
b2476490 | 1112 | { |
e6500344 HS |
1113 | bool was_orphan = core->orphan; |
1114 | ||
4dff95dc | 1115 | hlist_del(&core->child_node); |
035a61c3 | 1116 | |
4dff95dc | 1117 | if (new_parent) { |
e6500344 HS |
1118 | bool becomes_orphan = new_parent->orphan; |
1119 | ||
4dff95dc SB |
1120 | /* avoid duplicate POST_RATE_CHANGE notifications */ |
1121 | if (new_parent->new_child == core) | |
1122 | new_parent->new_child = NULL; | |
b2476490 | 1123 | |
4dff95dc | 1124 | hlist_add_head(&core->child_node, &new_parent->children); |
e6500344 HS |
1125 | |
1126 | if (was_orphan != becomes_orphan) | |
1127 | clk_core_update_orphan_status(core, becomes_orphan); | |
4dff95dc SB |
1128 | } else { |
1129 | hlist_add_head(&core->child_node, &clk_orphan_list); | |
e6500344 HS |
1130 | if (!was_orphan) |
1131 | clk_core_update_orphan_status(core, true); | |
4dff95dc | 1132 | } |
dfc202ea | 1133 | |
4dff95dc | 1134 | core->parent = new_parent; |
035a61c3 TV |
1135 | } |
1136 | ||
4dff95dc SB |
1137 | static struct clk_core *__clk_set_parent_before(struct clk_core *core, |
1138 | struct clk_core *parent) | |
b2476490 MT |
1139 | { |
1140 | unsigned long flags; | |
4dff95dc | 1141 | struct clk_core *old_parent = core->parent; |
b2476490 | 1142 | |
4dff95dc SB |
1143 | /* |
1144 | * Migrate prepare state between parents and prevent race with | |
1145 | * clk_enable(). | |
1146 | * | |
1147 | * If the clock is not prepared, then a race with | |
1148 | * clk_enable/disable() is impossible since we already have the | |
1149 | * prepare lock (future calls to clk_enable() need to be preceded by | |
1150 | * a clk_prepare()). | |
1151 | * | |
1152 | * If the clock is prepared, migrate the prepared state to the new | |
1153 | * parent and also protect against a race with clk_enable() by | |
1154 | * forcing the clock and the new parent on. This ensures that all | |
1155 | * future calls to clk_enable() are practically NOPs with respect to | |
1156 | * hardware and software states. | |
1157 | * | |
1158 | * See also: Comment for clk_set_parent() below. | |
1159 | */ | |
1160 | if (core->prepare_count) { | |
1161 | clk_core_prepare(parent); | |
d2a5d46b | 1162 | flags = clk_enable_lock(); |
4dff95dc SB |
1163 | clk_core_enable(parent); |
1164 | clk_core_enable(core); | |
d2a5d46b | 1165 | clk_enable_unlock(flags); |
4dff95dc | 1166 | } |
63589e92 | 1167 | |
4dff95dc | 1168 | /* update the clk tree topology */ |
eab89f69 | 1169 | flags = clk_enable_lock(); |
4dff95dc | 1170 | clk_reparent(core, parent); |
eab89f69 | 1171 | clk_enable_unlock(flags); |
4dff95dc SB |
1172 | |
1173 | return old_parent; | |
b2476490 | 1174 | } |
b2476490 | 1175 | |
4dff95dc SB |
1176 | static void __clk_set_parent_after(struct clk_core *core, |
1177 | struct clk_core *parent, | |
1178 | struct clk_core *old_parent) | |
b2476490 | 1179 | { |
d2a5d46b DA |
1180 | unsigned long flags; |
1181 | ||
4dff95dc SB |
1182 | /* |
1183 | * Finish the migration of prepare state and undo the changes done | |
1184 | * for preventing a race with clk_enable(). | |
1185 | */ | |
1186 | if (core->prepare_count) { | |
d2a5d46b | 1187 | flags = clk_enable_lock(); |
4dff95dc SB |
1188 | clk_core_disable(core); |
1189 | clk_core_disable(old_parent); | |
d2a5d46b | 1190 | clk_enable_unlock(flags); |
4dff95dc SB |
1191 | clk_core_unprepare(old_parent); |
1192 | } | |
1193 | } | |
b2476490 | 1194 | |
4dff95dc SB |
1195 | static int __clk_set_parent(struct clk_core *core, struct clk_core *parent, |
1196 | u8 p_index) | |
1197 | { | |
1198 | unsigned long flags; | |
1199 | int ret = 0; | |
1200 | struct clk_core *old_parent; | |
b2476490 | 1201 | |
4dff95dc | 1202 | old_parent = __clk_set_parent_before(core, parent); |
b2476490 | 1203 | |
4dff95dc | 1204 | trace_clk_set_parent(core, parent); |
b2476490 | 1205 | |
4dff95dc SB |
1206 | /* change clock input source */ |
1207 | if (parent && core->ops->set_parent) | |
1208 | ret = core->ops->set_parent(core->hw, p_index); | |
dfc202ea | 1209 | |
4dff95dc | 1210 | trace_clk_set_parent_complete(core, parent); |
dfc202ea | 1211 | |
4dff95dc SB |
1212 | if (ret) { |
1213 | flags = clk_enable_lock(); | |
1214 | clk_reparent(core, old_parent); | |
1215 | clk_enable_unlock(flags); | |
c660b2eb | 1216 | __clk_set_parent_after(core, old_parent, parent); |
dfc202ea | 1217 | |
4dff95dc | 1218 | return ret; |
b2476490 MT |
1219 | } |
1220 | ||
4dff95dc SB |
1221 | __clk_set_parent_after(core, parent, old_parent); |
1222 | ||
b2476490 MT |
1223 | return 0; |
1224 | } | |
1225 | ||
1226 | /** | |
4dff95dc SB |
1227 | * __clk_speculate_rates |
1228 | * @core: first clk in the subtree | |
1229 | * @parent_rate: the "future" rate of clk's parent | |
b2476490 | 1230 | * |
4dff95dc SB |
1231 | * Walks the subtree of clks starting with clk, speculating rates as it |
1232 | * goes and firing off PRE_RATE_CHANGE notifications as necessary. | |
1233 | * | |
1234 | * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending | |
1235 | * pre-rate change notifications and returns early if no clks in the | |
1236 | * subtree have subscribed to the notifications. Note that if a clk does not | |
1237 | * implement the .recalc_rate callback then it is assumed that the clock will | |
1238 | * take on the rate of its parent. | |
b2476490 | 1239 | */ |
4dff95dc SB |
1240 | static int __clk_speculate_rates(struct clk_core *core, |
1241 | unsigned long parent_rate) | |
b2476490 | 1242 | { |
4dff95dc SB |
1243 | struct clk_core *child; |
1244 | unsigned long new_rate; | |
1245 | int ret = NOTIFY_DONE; | |
b2476490 | 1246 | |
4dff95dc | 1247 | lockdep_assert_held(&prepare_lock); |
864e160a | 1248 | |
4dff95dc SB |
1249 | new_rate = clk_recalc(core, parent_rate); |
1250 | ||
1251 | /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */ | |
1252 | if (core->notifier_count) | |
1253 | ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate); | |
1254 | ||
1255 | if (ret & NOTIFY_STOP_MASK) { | |
1256 | pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", | |
1257 | __func__, core->name, ret); | |
1258 | goto out; | |
1259 | } | |
1260 | ||
1261 | hlist_for_each_entry(child, &core->children, child_node) { | |
1262 | ret = __clk_speculate_rates(child, new_rate); | |
1263 | if (ret & NOTIFY_STOP_MASK) | |
1264 | break; | |
1265 | } | |
b2476490 | 1266 | |
4dff95dc | 1267 | out: |
b2476490 MT |
1268 | return ret; |
1269 | } | |
b2476490 | 1270 | |
4dff95dc SB |
1271 | static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate, |
1272 | struct clk_core *new_parent, u8 p_index) | |
b2476490 | 1273 | { |
4dff95dc | 1274 | struct clk_core *child; |
b2476490 | 1275 | |
4dff95dc SB |
1276 | core->new_rate = new_rate; |
1277 | core->new_parent = new_parent; | |
1278 | core->new_parent_index = p_index; | |
1279 | /* include clk in new parent's PRE_RATE_CHANGE notifications */ | |
1280 | core->new_child = NULL; | |
1281 | if (new_parent && new_parent != core->parent) | |
1282 | new_parent->new_child = core; | |
496eadf8 | 1283 | |
4dff95dc SB |
1284 | hlist_for_each_entry(child, &core->children, child_node) { |
1285 | child->new_rate = clk_recalc(child, new_rate); | |
1286 | clk_calc_subtree(child, child->new_rate, NULL, 0); | |
1287 | } | |
1288 | } | |
b2476490 | 1289 | |
4dff95dc SB |
1290 | /* |
1291 | * calculate the new rates returning the topmost clock that has to be | |
1292 | * changed. | |
1293 | */ | |
1294 | static struct clk_core *clk_calc_new_rates(struct clk_core *core, | |
1295 | unsigned long rate) | |
1296 | { | |
1297 | struct clk_core *top = core; | |
1298 | struct clk_core *old_parent, *parent; | |
4dff95dc SB |
1299 | unsigned long best_parent_rate = 0; |
1300 | unsigned long new_rate; | |
1301 | unsigned long min_rate; | |
1302 | unsigned long max_rate; | |
1303 | int p_index = 0; | |
1304 | long ret; | |
1305 | ||
1306 | /* sanity */ | |
1307 | if (IS_ERR_OR_NULL(core)) | |
1308 | return NULL; | |
1309 | ||
1310 | /* save parent rate, if it exists */ | |
1311 | parent = old_parent = core->parent; | |
71472c0c | 1312 | if (parent) |
4dff95dc | 1313 | best_parent_rate = parent->rate; |
71472c0c | 1314 | |
4dff95dc SB |
1315 | clk_core_get_boundaries(core, &min_rate, &max_rate); |
1316 | ||
1317 | /* find the closest rate and parent clk/rate */ | |
d6968fca | 1318 | if (core->ops->determine_rate) { |
0817b62c BB |
1319 | struct clk_rate_request req; |
1320 | ||
1321 | req.rate = rate; | |
1322 | req.min_rate = min_rate; | |
1323 | req.max_rate = max_rate; | |
1324 | if (parent) { | |
1325 | req.best_parent_hw = parent->hw; | |
1326 | req.best_parent_rate = parent->rate; | |
1327 | } else { | |
1328 | req.best_parent_hw = NULL; | |
1329 | req.best_parent_rate = 0; | |
1330 | } | |
1331 | ||
1332 | ret = core->ops->determine_rate(core->hw, &req); | |
4dff95dc SB |
1333 | if (ret < 0) |
1334 | return NULL; | |
1c8e6004 | 1335 | |
0817b62c BB |
1336 | best_parent_rate = req.best_parent_rate; |
1337 | new_rate = req.rate; | |
1338 | parent = req.best_parent_hw ? req.best_parent_hw->core : NULL; | |
4dff95dc SB |
1339 | } else if (core->ops->round_rate) { |
1340 | ret = core->ops->round_rate(core->hw, rate, | |
0817b62c | 1341 | &best_parent_rate); |
4dff95dc SB |
1342 | if (ret < 0) |
1343 | return NULL; | |
035a61c3 | 1344 | |
4dff95dc SB |
1345 | new_rate = ret; |
1346 | if (new_rate < min_rate || new_rate > max_rate) | |
1347 | return NULL; | |
1348 | } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) { | |
1349 | /* pass-through clock without adjustable parent */ | |
1350 | core->new_rate = core->rate; | |
1351 | return NULL; | |
1352 | } else { | |
1353 | /* pass-through clock with adjustable parent */ | |
1354 | top = clk_calc_new_rates(parent, rate); | |
1355 | new_rate = parent->new_rate; | |
1356 | goto out; | |
1357 | } | |
1c8e6004 | 1358 | |
4dff95dc SB |
1359 | /* some clocks must be gated to change parent */ |
1360 | if (parent != old_parent && | |
1361 | (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1362 | pr_debug("%s: %s not gated but wants to reparent\n", | |
1363 | __func__, core->name); | |
1364 | return NULL; | |
1365 | } | |
b2476490 | 1366 | |
4dff95dc SB |
1367 | /* try finding the new parent index */ |
1368 | if (parent && core->num_parents > 1) { | |
1369 | p_index = clk_fetch_parent_index(core, parent); | |
1370 | if (p_index < 0) { | |
1371 | pr_debug("%s: clk %s can not be parent of clk %s\n", | |
1372 | __func__, parent->name, core->name); | |
1373 | return NULL; | |
1374 | } | |
1375 | } | |
b2476490 | 1376 | |
4dff95dc SB |
1377 | if ((core->flags & CLK_SET_RATE_PARENT) && parent && |
1378 | best_parent_rate != parent->rate) | |
1379 | top = clk_calc_new_rates(parent, best_parent_rate); | |
035a61c3 | 1380 | |
4dff95dc SB |
1381 | out: |
1382 | clk_calc_subtree(core, new_rate, parent, p_index); | |
b2476490 | 1383 | |
4dff95dc | 1384 | return top; |
b2476490 | 1385 | } |
b2476490 | 1386 | |
4dff95dc SB |
1387 | /* |
1388 | * Notify about rate changes in a subtree. Always walk down the whole tree | |
1389 | * so that in case of an error we can walk down the whole tree again and | |
1390 | * abort the change. | |
b2476490 | 1391 | */ |
4dff95dc SB |
1392 | static struct clk_core *clk_propagate_rate_change(struct clk_core *core, |
1393 | unsigned long event) | |
b2476490 | 1394 | { |
4dff95dc | 1395 | struct clk_core *child, *tmp_clk, *fail_clk = NULL; |
b2476490 MT |
1396 | int ret = NOTIFY_DONE; |
1397 | ||
4dff95dc SB |
1398 | if (core->rate == core->new_rate) |
1399 | return NULL; | |
b2476490 | 1400 | |
4dff95dc SB |
1401 | if (core->notifier_count) { |
1402 | ret = __clk_notify(core, event, core->rate, core->new_rate); | |
1403 | if (ret & NOTIFY_STOP_MASK) | |
1404 | fail_clk = core; | |
b2476490 MT |
1405 | } |
1406 | ||
4dff95dc SB |
1407 | hlist_for_each_entry(child, &core->children, child_node) { |
1408 | /* Skip children who will be reparented to another clock */ | |
1409 | if (child->new_parent && child->new_parent != core) | |
1410 | continue; | |
1411 | tmp_clk = clk_propagate_rate_change(child, event); | |
1412 | if (tmp_clk) | |
1413 | fail_clk = tmp_clk; | |
1414 | } | |
5279fc40 | 1415 | |
4dff95dc SB |
1416 | /* handle the new child who might not be in core->children yet */ |
1417 | if (core->new_child) { | |
1418 | tmp_clk = clk_propagate_rate_change(core->new_child, event); | |
1419 | if (tmp_clk) | |
1420 | fail_clk = tmp_clk; | |
1421 | } | |
5279fc40 | 1422 | |
4dff95dc | 1423 | return fail_clk; |
5279fc40 BB |
1424 | } |
1425 | ||
4dff95dc SB |
1426 | /* |
1427 | * walk down a subtree and set the new rates notifying the rate | |
1428 | * change on the way | |
1429 | */ | |
1430 | static void clk_change_rate(struct clk_core *core) | |
035a61c3 | 1431 | { |
4dff95dc SB |
1432 | struct clk_core *child; |
1433 | struct hlist_node *tmp; | |
1434 | unsigned long old_rate; | |
1435 | unsigned long best_parent_rate = 0; | |
1436 | bool skip_set_rate = false; | |
1437 | struct clk_core *old_parent; | |
035a61c3 | 1438 | |
4dff95dc | 1439 | old_rate = core->rate; |
035a61c3 | 1440 | |
4dff95dc SB |
1441 | if (core->new_parent) |
1442 | best_parent_rate = core->new_parent->rate; | |
1443 | else if (core->parent) | |
1444 | best_parent_rate = core->parent->rate; | |
035a61c3 | 1445 | |
4dff95dc SB |
1446 | if (core->new_parent && core->new_parent != core->parent) { |
1447 | old_parent = __clk_set_parent_before(core, core->new_parent); | |
1448 | trace_clk_set_parent(core, core->new_parent); | |
5279fc40 | 1449 | |
4dff95dc SB |
1450 | if (core->ops->set_rate_and_parent) { |
1451 | skip_set_rate = true; | |
1452 | core->ops->set_rate_and_parent(core->hw, core->new_rate, | |
1453 | best_parent_rate, | |
1454 | core->new_parent_index); | |
1455 | } else if (core->ops->set_parent) { | |
1456 | core->ops->set_parent(core->hw, core->new_parent_index); | |
1457 | } | |
5279fc40 | 1458 | |
4dff95dc SB |
1459 | trace_clk_set_parent_complete(core, core->new_parent); |
1460 | __clk_set_parent_after(core, core->new_parent, old_parent); | |
1461 | } | |
8f2c2db1 | 1462 | |
4dff95dc | 1463 | trace_clk_set_rate(core, core->new_rate); |
b2476490 | 1464 | |
4dff95dc SB |
1465 | if (!skip_set_rate && core->ops->set_rate) |
1466 | core->ops->set_rate(core->hw, core->new_rate, best_parent_rate); | |
496eadf8 | 1467 | |
4dff95dc | 1468 | trace_clk_set_rate_complete(core, core->new_rate); |
b2476490 | 1469 | |
4dff95dc | 1470 | core->rate = clk_recalc(core, best_parent_rate); |
b2476490 | 1471 | |
4dff95dc SB |
1472 | if (core->notifier_count && old_rate != core->rate) |
1473 | __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); | |
b2476490 | 1474 | |
85e88fab MT |
1475 | if (core->flags & CLK_RECALC_NEW_RATES) |
1476 | (void)clk_calc_new_rates(core, core->new_rate); | |
d8d91987 | 1477 | |
b2476490 | 1478 | /* |
4dff95dc SB |
1479 | * Use safe iteration, as change_rate can actually swap parents |
1480 | * for certain clock types. | |
b2476490 | 1481 | */ |
4dff95dc SB |
1482 | hlist_for_each_entry_safe(child, tmp, &core->children, child_node) { |
1483 | /* Skip children who will be reparented to another clock */ | |
1484 | if (child->new_parent && child->new_parent != core) | |
1485 | continue; | |
1486 | clk_change_rate(child); | |
1487 | } | |
b2476490 | 1488 | |
4dff95dc SB |
1489 | /* handle the new child who might not be in core->children yet */ |
1490 | if (core->new_child) | |
1491 | clk_change_rate(core->new_child); | |
b2476490 MT |
1492 | } |
1493 | ||
4dff95dc SB |
1494 | static int clk_core_set_rate_nolock(struct clk_core *core, |
1495 | unsigned long req_rate) | |
a093bde2 | 1496 | { |
4dff95dc SB |
1497 | struct clk_core *top, *fail_clk; |
1498 | unsigned long rate = req_rate; | |
1499 | int ret = 0; | |
a093bde2 | 1500 | |
4dff95dc SB |
1501 | if (!core) |
1502 | return 0; | |
a093bde2 | 1503 | |
4dff95dc SB |
1504 | /* bail early if nothing to do */ |
1505 | if (rate == clk_core_get_rate_nolock(core)) | |
1506 | return 0; | |
a093bde2 | 1507 | |
4dff95dc SB |
1508 | if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count) |
1509 | return -EBUSY; | |
a093bde2 | 1510 | |
4dff95dc SB |
1511 | /* calculate new rates and get the topmost changed clock */ |
1512 | top = clk_calc_new_rates(core, rate); | |
1513 | if (!top) | |
1514 | return -EINVAL; | |
1515 | ||
1516 | /* notify that we are about to change rates */ | |
1517 | fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); | |
1518 | if (fail_clk) { | |
1519 | pr_debug("%s: failed to set %s rate\n", __func__, | |
1520 | fail_clk->name); | |
1521 | clk_propagate_rate_change(top, ABORT_RATE_CHANGE); | |
1522 | return -EBUSY; | |
1523 | } | |
1524 | ||
1525 | /* change the rates */ | |
1526 | clk_change_rate(top); | |
1527 | ||
1528 | core->req_rate = req_rate; | |
1529 | ||
1530 | return ret; | |
a093bde2 | 1531 | } |
035a61c3 TV |
1532 | |
1533 | /** | |
4dff95dc SB |
1534 | * clk_set_rate - specify a new rate for clk |
1535 | * @clk: the clk whose rate is being changed | |
1536 | * @rate: the new rate for clk | |
035a61c3 | 1537 | * |
4dff95dc SB |
1538 | * In the simplest case clk_set_rate will only adjust the rate of clk. |
1539 | * | |
1540 | * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to | |
1541 | * propagate up to clk's parent; whether or not this happens depends on the | |
1542 | * outcome of clk's .round_rate implementation. If *parent_rate is unchanged | |
1543 | * after calling .round_rate then upstream parent propagation is ignored. If | |
1544 | * *parent_rate comes back with a new rate for clk's parent then we propagate | |
1545 | * up to clk's parent and set its rate. Upward propagation will continue | |
1546 | * until either a clk does not support the CLK_SET_RATE_PARENT flag or | |
1547 | * .round_rate stops requesting changes to clk's parent_rate. | |
1548 | * | |
1549 | * Rate changes are accomplished via tree traversal that also recalculates the | |
1550 | * rates for the clocks and fires off POST_RATE_CHANGE notifiers. | |
1551 | * | |
1552 | * Returns 0 on success, -EERROR otherwise. | |
035a61c3 | 1553 | */ |
4dff95dc | 1554 | int clk_set_rate(struct clk *clk, unsigned long rate) |
035a61c3 | 1555 | { |
4dff95dc SB |
1556 | int ret; |
1557 | ||
035a61c3 TV |
1558 | if (!clk) |
1559 | return 0; | |
1560 | ||
4dff95dc SB |
1561 | /* prevent racing with updates to the clock topology */ |
1562 | clk_prepare_lock(); | |
da0f0b2c | 1563 | |
4dff95dc | 1564 | ret = clk_core_set_rate_nolock(clk->core, rate); |
da0f0b2c | 1565 | |
4dff95dc | 1566 | clk_prepare_unlock(); |
4935b22c | 1567 | |
4dff95dc | 1568 | return ret; |
4935b22c | 1569 | } |
4dff95dc | 1570 | EXPORT_SYMBOL_GPL(clk_set_rate); |
4935b22c | 1571 | |
4dff95dc SB |
1572 | /** |
1573 | * clk_set_rate_range - set a rate range for a clock source | |
1574 | * @clk: clock source | |
1575 | * @min: desired minimum clock rate in Hz, inclusive | |
1576 | * @max: desired maximum clock rate in Hz, inclusive | |
1577 | * | |
1578 | * Returns success (0) or negative errno. | |
1579 | */ | |
1580 | int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) | |
4935b22c | 1581 | { |
4dff95dc | 1582 | int ret = 0; |
4935b22c | 1583 | |
4dff95dc SB |
1584 | if (!clk) |
1585 | return 0; | |
903efc55 | 1586 | |
4dff95dc SB |
1587 | if (min > max) { |
1588 | pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n", | |
1589 | __func__, clk->core->name, clk->dev_id, clk->con_id, | |
1590 | min, max); | |
1591 | return -EINVAL; | |
903efc55 | 1592 | } |
4935b22c | 1593 | |
4dff95dc | 1594 | clk_prepare_lock(); |
4935b22c | 1595 | |
4dff95dc SB |
1596 | if (min != clk->min_rate || max != clk->max_rate) { |
1597 | clk->min_rate = min; | |
1598 | clk->max_rate = max; | |
1599 | ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
4935b22c JH |
1600 | } |
1601 | ||
4dff95dc | 1602 | clk_prepare_unlock(); |
4935b22c | 1603 | |
4dff95dc | 1604 | return ret; |
3fa2252b | 1605 | } |
4dff95dc | 1606 | EXPORT_SYMBOL_GPL(clk_set_rate_range); |
3fa2252b | 1607 | |
4dff95dc SB |
1608 | /** |
1609 | * clk_set_min_rate - set a minimum clock rate for a clock source | |
1610 | * @clk: clock source | |
1611 | * @rate: desired minimum clock rate in Hz, inclusive | |
1612 | * | |
1613 | * Returns success (0) or negative errno. | |
1614 | */ | |
1615 | int clk_set_min_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 1616 | { |
4dff95dc SB |
1617 | if (!clk) |
1618 | return 0; | |
1619 | ||
1620 | return clk_set_rate_range(clk, rate, clk->max_rate); | |
3fa2252b | 1621 | } |
4dff95dc | 1622 | EXPORT_SYMBOL_GPL(clk_set_min_rate); |
3fa2252b | 1623 | |
4dff95dc SB |
1624 | /** |
1625 | * clk_set_max_rate - set a maximum clock rate for a clock source | |
1626 | * @clk: clock source | |
1627 | * @rate: desired maximum clock rate in Hz, inclusive | |
1628 | * | |
1629 | * Returns success (0) or negative errno. | |
1630 | */ | |
1631 | int clk_set_max_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 1632 | { |
4dff95dc SB |
1633 | if (!clk) |
1634 | return 0; | |
4935b22c | 1635 | |
4dff95dc | 1636 | return clk_set_rate_range(clk, clk->min_rate, rate); |
4935b22c | 1637 | } |
4dff95dc | 1638 | EXPORT_SYMBOL_GPL(clk_set_max_rate); |
4935b22c | 1639 | |
b2476490 | 1640 | /** |
4dff95dc SB |
1641 | * clk_get_parent - return the parent of a clk |
1642 | * @clk: the clk whose parent gets returned | |
b2476490 | 1643 | * |
4dff95dc | 1644 | * Simply returns clk->parent. Returns NULL if clk is NULL. |
b2476490 | 1645 | */ |
4dff95dc | 1646 | struct clk *clk_get_parent(struct clk *clk) |
b2476490 | 1647 | { |
4dff95dc | 1648 | struct clk *parent; |
b2476490 | 1649 | |
fc4a05d4 SB |
1650 | if (!clk) |
1651 | return NULL; | |
1652 | ||
4dff95dc | 1653 | clk_prepare_lock(); |
fc4a05d4 SB |
1654 | /* TODO: Create a per-user clk and change callers to call clk_put */ |
1655 | parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk; | |
4dff95dc | 1656 | clk_prepare_unlock(); |
496eadf8 | 1657 | |
4dff95dc SB |
1658 | return parent; |
1659 | } | |
1660 | EXPORT_SYMBOL_GPL(clk_get_parent); | |
b2476490 | 1661 | |
4dff95dc SB |
1662 | /* |
1663 | * .get_parent is mandatory for clocks with multiple possible parents. It is | |
1664 | * optional for single-parent clocks. Always call .get_parent if it is | |
1665 | * available and WARN if it is missing for multi-parent clocks. | |
1666 | * | |
1667 | * For single-parent clocks without .get_parent, first check to see if the | |
1668 | * .parents array exists, and if so use it to avoid an expensive tree | |
1669 | * traversal. If .parents does not exist then walk the tree. | |
1670 | */ | |
1671 | static struct clk_core *__clk_init_parent(struct clk_core *core) | |
1672 | { | |
1673 | struct clk_core *ret = NULL; | |
1674 | u8 index; | |
b2476490 | 1675 | |
4dff95dc SB |
1676 | /* handle the trivial cases */ |
1677 | ||
1678 | if (!core->num_parents) | |
b2476490 MT |
1679 | goto out; |
1680 | ||
4dff95dc SB |
1681 | if (core->num_parents == 1) { |
1682 | if (IS_ERR_OR_NULL(core->parent)) | |
1683 | core->parent = clk_core_lookup(core->parent_names[0]); | |
1684 | ret = core->parent; | |
1685 | goto out; | |
b2476490 MT |
1686 | } |
1687 | ||
4dff95dc SB |
1688 | if (!core->ops->get_parent) { |
1689 | WARN(!core->ops->get_parent, | |
1690 | "%s: multi-parent clocks must implement .get_parent\n", | |
1691 | __func__); | |
1692 | goto out; | |
90c53547 | 1693 | } |
4dff95dc SB |
1694 | |
1695 | /* | |
1696 | * Do our best to cache parent clocks in core->parents. This prevents | |
1697 | * unnecessary and expensive lookups. We don't set core->parent here; | |
1698 | * that is done by the calling function. | |
1699 | */ | |
1700 | ||
1701 | index = core->ops->get_parent(core->hw); | |
1702 | ||
1703 | if (!core->parents) | |
1704 | core->parents = | |
1705 | kcalloc(core->num_parents, sizeof(struct clk *), | |
1706 | GFP_KERNEL); | |
1707 | ||
1708 | ret = clk_core_get_parent_by_index(core, index); | |
1709 | ||
b2476490 MT |
1710 | out: |
1711 | return ret; | |
1712 | } | |
1713 | ||
4dff95dc SB |
1714 | static void clk_core_reparent(struct clk_core *core, |
1715 | struct clk_core *new_parent) | |
b2476490 | 1716 | { |
4dff95dc SB |
1717 | clk_reparent(core, new_parent); |
1718 | __clk_recalc_accuracies(core); | |
1719 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
b2476490 MT |
1720 | } |
1721 | ||
42c86547 TV |
1722 | void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent) |
1723 | { | |
1724 | if (!hw) | |
1725 | return; | |
1726 | ||
1727 | clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core); | |
1728 | } | |
1729 | ||
4dff95dc SB |
1730 | /** |
1731 | * clk_has_parent - check if a clock is a possible parent for another | |
1732 | * @clk: clock source | |
1733 | * @parent: parent clock source | |
1734 | * | |
1735 | * This function can be used in drivers that need to check that a clock can be | |
1736 | * the parent of another without actually changing the parent. | |
1737 | * | |
1738 | * Returns true if @parent is a possible parent for @clk, false otherwise. | |
b2476490 | 1739 | */ |
4dff95dc | 1740 | bool clk_has_parent(struct clk *clk, struct clk *parent) |
b2476490 | 1741 | { |
4dff95dc SB |
1742 | struct clk_core *core, *parent_core; |
1743 | unsigned int i; | |
b2476490 | 1744 | |
4dff95dc SB |
1745 | /* NULL clocks should be nops, so return success if either is NULL. */ |
1746 | if (!clk || !parent) | |
1747 | return true; | |
7452b219 | 1748 | |
4dff95dc SB |
1749 | core = clk->core; |
1750 | parent_core = parent->core; | |
71472c0c | 1751 | |
4dff95dc SB |
1752 | /* Optimize for the case where the parent is already the parent. */ |
1753 | if (core->parent == parent_core) | |
1754 | return true; | |
1c8e6004 | 1755 | |
4dff95dc SB |
1756 | for (i = 0; i < core->num_parents; i++) |
1757 | if (strcmp(core->parent_names[i], parent_core->name) == 0) | |
1758 | return true; | |
03bc10ab | 1759 | |
4dff95dc SB |
1760 | return false; |
1761 | } | |
1762 | EXPORT_SYMBOL_GPL(clk_has_parent); | |
03bc10ab | 1763 | |
4dff95dc SB |
1764 | static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent) |
1765 | { | |
1766 | int ret = 0; | |
1767 | int p_index = 0; | |
1768 | unsigned long p_rate = 0; | |
1769 | ||
1770 | if (!core) | |
1771 | return 0; | |
1772 | ||
1773 | /* prevent racing with updates to the clock topology */ | |
1774 | clk_prepare_lock(); | |
1775 | ||
1776 | if (core->parent == parent) | |
1777 | goto out; | |
1778 | ||
1779 | /* verify ops for for multi-parent clks */ | |
1780 | if ((core->num_parents > 1) && (!core->ops->set_parent)) { | |
1781 | ret = -ENOSYS; | |
63f5c3b2 | 1782 | goto out; |
7452b219 MT |
1783 | } |
1784 | ||
4dff95dc SB |
1785 | /* check that we are allowed to re-parent if the clock is in use */ |
1786 | if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1787 | ret = -EBUSY; | |
1788 | goto out; | |
b2476490 MT |
1789 | } |
1790 | ||
71472c0c | 1791 | /* try finding the new parent index */ |
4dff95dc | 1792 | if (parent) { |
d6968fca | 1793 | p_index = clk_fetch_parent_index(core, parent); |
4dff95dc | 1794 | p_rate = parent->rate; |
f1c8b2ed | 1795 | if (p_index < 0) { |
71472c0c | 1796 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
4dff95dc SB |
1797 | __func__, parent->name, core->name); |
1798 | ret = p_index; | |
1799 | goto out; | |
71472c0c | 1800 | } |
b2476490 MT |
1801 | } |
1802 | ||
4dff95dc SB |
1803 | /* propagate PRE_RATE_CHANGE notifications */ |
1804 | ret = __clk_speculate_rates(core, p_rate); | |
b2476490 | 1805 | |
4dff95dc SB |
1806 | /* abort if a driver objects */ |
1807 | if (ret & NOTIFY_STOP_MASK) | |
1808 | goto out; | |
b2476490 | 1809 | |
4dff95dc SB |
1810 | /* do the re-parent */ |
1811 | ret = __clk_set_parent(core, parent, p_index); | |
b2476490 | 1812 | |
4dff95dc SB |
1813 | /* propagate rate an accuracy recalculation accordingly */ |
1814 | if (ret) { | |
1815 | __clk_recalc_rates(core, ABORT_RATE_CHANGE); | |
1816 | } else { | |
1817 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
1818 | __clk_recalc_accuracies(core); | |
b2476490 MT |
1819 | } |
1820 | ||
4dff95dc SB |
1821 | out: |
1822 | clk_prepare_unlock(); | |
71472c0c | 1823 | |
4dff95dc SB |
1824 | return ret; |
1825 | } | |
b2476490 | 1826 | |
4dff95dc SB |
1827 | /** |
1828 | * clk_set_parent - switch the parent of a mux clk | |
1829 | * @clk: the mux clk whose input we are switching | |
1830 | * @parent: the new input to clk | |
1831 | * | |
1832 | * Re-parent clk to use parent as its new input source. If clk is in | |
1833 | * prepared state, the clk will get enabled for the duration of this call. If | |
1834 | * that's not acceptable for a specific clk (Eg: the consumer can't handle | |
1835 | * that, the reparenting is glitchy in hardware, etc), use the | |
1836 | * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared. | |
1837 | * | |
1838 | * After successfully changing clk's parent clk_set_parent will update the | |
1839 | * clk topology, sysfs topology and propagate rate recalculation via | |
1840 | * __clk_recalc_rates. | |
1841 | * | |
1842 | * Returns 0 on success, -EERROR otherwise. | |
1843 | */ | |
1844 | int clk_set_parent(struct clk *clk, struct clk *parent) | |
1845 | { | |
1846 | if (!clk) | |
1847 | return 0; | |
1848 | ||
1849 | return clk_core_set_parent(clk->core, parent ? parent->core : NULL); | |
b2476490 | 1850 | } |
4dff95dc | 1851 | EXPORT_SYMBOL_GPL(clk_set_parent); |
b2476490 | 1852 | |
4dff95dc SB |
1853 | /** |
1854 | * clk_set_phase - adjust the phase shift of a clock signal | |
1855 | * @clk: clock signal source | |
1856 | * @degrees: number of degrees the signal is shifted | |
1857 | * | |
1858 | * Shifts the phase of a clock signal by the specified | |
1859 | * degrees. Returns 0 on success, -EERROR otherwise. | |
1860 | * | |
1861 | * This function makes no distinction about the input or reference | |
1862 | * signal that we adjust the clock signal phase against. For example | |
1863 | * phase locked-loop clock signal generators we may shift phase with | |
1864 | * respect to feedback clock signal input, but for other cases the | |
1865 | * clock phase may be shifted with respect to some other, unspecified | |
1866 | * signal. | |
1867 | * | |
1868 | * Additionally the concept of phase shift does not propagate through | |
1869 | * the clock tree hierarchy, which sets it apart from clock rates and | |
1870 | * clock accuracy. A parent clock phase attribute does not have an | |
1871 | * impact on the phase attribute of a child clock. | |
b2476490 | 1872 | */ |
4dff95dc | 1873 | int clk_set_phase(struct clk *clk, int degrees) |
b2476490 | 1874 | { |
4dff95dc | 1875 | int ret = -EINVAL; |
b2476490 | 1876 | |
4dff95dc SB |
1877 | if (!clk) |
1878 | return 0; | |
b2476490 | 1879 | |
4dff95dc SB |
1880 | /* sanity check degrees */ |
1881 | degrees %= 360; | |
1882 | if (degrees < 0) | |
1883 | degrees += 360; | |
bf47b4fd | 1884 | |
4dff95dc | 1885 | clk_prepare_lock(); |
3fa2252b | 1886 | |
4dff95dc | 1887 | trace_clk_set_phase(clk->core, degrees); |
3fa2252b | 1888 | |
4dff95dc SB |
1889 | if (clk->core->ops->set_phase) |
1890 | ret = clk->core->ops->set_phase(clk->core->hw, degrees); | |
3fa2252b | 1891 | |
4dff95dc | 1892 | trace_clk_set_phase_complete(clk->core, degrees); |
dfc202ea | 1893 | |
4dff95dc SB |
1894 | if (!ret) |
1895 | clk->core->phase = degrees; | |
b2476490 | 1896 | |
4dff95dc | 1897 | clk_prepare_unlock(); |
dfc202ea | 1898 | |
4dff95dc SB |
1899 | return ret; |
1900 | } | |
1901 | EXPORT_SYMBOL_GPL(clk_set_phase); | |
b2476490 | 1902 | |
4dff95dc SB |
1903 | static int clk_core_get_phase(struct clk_core *core) |
1904 | { | |
1905 | int ret; | |
b2476490 | 1906 | |
4dff95dc SB |
1907 | clk_prepare_lock(); |
1908 | ret = core->phase; | |
1909 | clk_prepare_unlock(); | |
71472c0c | 1910 | |
4dff95dc | 1911 | return ret; |
b2476490 MT |
1912 | } |
1913 | ||
4dff95dc SB |
1914 | /** |
1915 | * clk_get_phase - return the phase shift of a clock signal | |
1916 | * @clk: clock signal source | |
1917 | * | |
1918 | * Returns the phase shift of a clock node in degrees, otherwise returns | |
1919 | * -EERROR. | |
1920 | */ | |
1921 | int clk_get_phase(struct clk *clk) | |
1c8e6004 | 1922 | { |
4dff95dc | 1923 | if (!clk) |
1c8e6004 TV |
1924 | return 0; |
1925 | ||
4dff95dc SB |
1926 | return clk_core_get_phase(clk->core); |
1927 | } | |
1928 | EXPORT_SYMBOL_GPL(clk_get_phase); | |
1c8e6004 | 1929 | |
4dff95dc SB |
1930 | /** |
1931 | * clk_is_match - check if two clk's point to the same hardware clock | |
1932 | * @p: clk compared against q | |
1933 | * @q: clk compared against p | |
1934 | * | |
1935 | * Returns true if the two struct clk pointers both point to the same hardware | |
1936 | * clock node. Put differently, returns true if struct clk *p and struct clk *q | |
1937 | * share the same struct clk_core object. | |
1938 | * | |
1939 | * Returns false otherwise. Note that two NULL clks are treated as matching. | |
1940 | */ | |
1941 | bool clk_is_match(const struct clk *p, const struct clk *q) | |
1942 | { | |
1943 | /* trivial case: identical struct clk's or both NULL */ | |
1944 | if (p == q) | |
1945 | return true; | |
1c8e6004 | 1946 | |
4dff95dc SB |
1947 | /* true if clk->core pointers match. Avoid derefing garbage */ |
1948 | if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q)) | |
1949 | if (p->core == q->core) | |
1950 | return true; | |
1c8e6004 | 1951 | |
4dff95dc SB |
1952 | return false; |
1953 | } | |
1954 | EXPORT_SYMBOL_GPL(clk_is_match); | |
1c8e6004 | 1955 | |
4dff95dc | 1956 | /*** debugfs support ***/ |
1c8e6004 | 1957 | |
4dff95dc SB |
1958 | #ifdef CONFIG_DEBUG_FS |
1959 | #include <linux/debugfs.h> | |
1c8e6004 | 1960 | |
4dff95dc SB |
1961 | static struct dentry *rootdir; |
1962 | static int inited = 0; | |
1963 | static DEFINE_MUTEX(clk_debug_lock); | |
1964 | static HLIST_HEAD(clk_debug_list); | |
1c8e6004 | 1965 | |
4dff95dc SB |
1966 | static struct hlist_head *all_lists[] = { |
1967 | &clk_root_list, | |
1968 | &clk_orphan_list, | |
1969 | NULL, | |
1970 | }; | |
1971 | ||
1972 | static struct hlist_head *orphan_list[] = { | |
1973 | &clk_orphan_list, | |
1974 | NULL, | |
1975 | }; | |
1976 | ||
1977 | static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, | |
1978 | int level) | |
b2476490 | 1979 | { |
4dff95dc SB |
1980 | if (!c) |
1981 | return; | |
b2476490 | 1982 | |
4dff95dc SB |
1983 | seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n", |
1984 | level * 3 + 1, "", | |
1985 | 30 - level * 3, c->name, | |
1986 | c->enable_count, c->prepare_count, clk_core_get_rate(c), | |
1987 | clk_core_get_accuracy(c), clk_core_get_phase(c)); | |
1988 | } | |
89ac8d7a | 1989 | |
4dff95dc SB |
1990 | static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, |
1991 | int level) | |
1992 | { | |
1993 | struct clk_core *child; | |
b2476490 | 1994 | |
4dff95dc SB |
1995 | if (!c) |
1996 | return; | |
b2476490 | 1997 | |
4dff95dc | 1998 | clk_summary_show_one(s, c, level); |
0e1c0301 | 1999 | |
4dff95dc SB |
2000 | hlist_for_each_entry(child, &c->children, child_node) |
2001 | clk_summary_show_subtree(s, child, level + 1); | |
1c8e6004 | 2002 | } |
b2476490 | 2003 | |
4dff95dc | 2004 | static int clk_summary_show(struct seq_file *s, void *data) |
1c8e6004 | 2005 | { |
4dff95dc SB |
2006 | struct clk_core *c; |
2007 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
1c8e6004 | 2008 | |
4dff95dc SB |
2009 | seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n"); |
2010 | seq_puts(s, "----------------------------------------------------------------------------------------\n"); | |
b2476490 | 2011 | |
1c8e6004 TV |
2012 | clk_prepare_lock(); |
2013 | ||
4dff95dc SB |
2014 | for (; *lists; lists++) |
2015 | hlist_for_each_entry(c, *lists, child_node) | |
2016 | clk_summary_show_subtree(s, c, 0); | |
b2476490 | 2017 | |
eab89f69 | 2018 | clk_prepare_unlock(); |
b2476490 | 2019 | |
4dff95dc | 2020 | return 0; |
b2476490 | 2021 | } |
1c8e6004 | 2022 | |
1c8e6004 | 2023 | |
4dff95dc | 2024 | static int clk_summary_open(struct inode *inode, struct file *file) |
1c8e6004 | 2025 | { |
4dff95dc | 2026 | return single_open(file, clk_summary_show, inode->i_private); |
1c8e6004 | 2027 | } |
b2476490 | 2028 | |
4dff95dc SB |
2029 | static const struct file_operations clk_summary_fops = { |
2030 | .open = clk_summary_open, | |
2031 | .read = seq_read, | |
2032 | .llseek = seq_lseek, | |
2033 | .release = single_release, | |
2034 | }; | |
b2476490 | 2035 | |
4dff95dc SB |
2036 | static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) |
2037 | { | |
2038 | if (!c) | |
2039 | return; | |
b2476490 | 2040 | |
7cb81136 | 2041 | /* This should be JSON format, i.e. elements separated with a comma */ |
4dff95dc SB |
2042 | seq_printf(s, "\"%s\": { ", c->name); |
2043 | seq_printf(s, "\"enable_count\": %d,", c->enable_count); | |
2044 | seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); | |
7cb81136 SW |
2045 | seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c)); |
2046 | seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c)); | |
4dff95dc | 2047 | seq_printf(s, "\"phase\": %d", clk_core_get_phase(c)); |
b2476490 | 2048 | } |
b2476490 | 2049 | |
4dff95dc | 2050 | static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) |
b2476490 | 2051 | { |
4dff95dc | 2052 | struct clk_core *child; |
b2476490 | 2053 | |
4dff95dc SB |
2054 | if (!c) |
2055 | return; | |
b2476490 | 2056 | |
4dff95dc | 2057 | clk_dump_one(s, c, level); |
b2476490 | 2058 | |
4dff95dc SB |
2059 | hlist_for_each_entry(child, &c->children, child_node) { |
2060 | seq_printf(s, ","); | |
2061 | clk_dump_subtree(s, child, level + 1); | |
b2476490 MT |
2062 | } |
2063 | ||
4dff95dc | 2064 | seq_printf(s, "}"); |
b2476490 MT |
2065 | } |
2066 | ||
4dff95dc | 2067 | static int clk_dump(struct seq_file *s, void *data) |
4e88f3de | 2068 | { |
4dff95dc SB |
2069 | struct clk_core *c; |
2070 | bool first_node = true; | |
2071 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
4e88f3de | 2072 | |
4dff95dc | 2073 | seq_printf(s, "{"); |
4e88f3de | 2074 | |
4dff95dc | 2075 | clk_prepare_lock(); |
035a61c3 | 2076 | |
4dff95dc SB |
2077 | for (; *lists; lists++) { |
2078 | hlist_for_each_entry(c, *lists, child_node) { | |
2079 | if (!first_node) | |
2080 | seq_puts(s, ","); | |
2081 | first_node = false; | |
2082 | clk_dump_subtree(s, c, 0); | |
2083 | } | |
2084 | } | |
4e88f3de | 2085 | |
4dff95dc | 2086 | clk_prepare_unlock(); |
4e88f3de | 2087 | |
70e9f4dd | 2088 | seq_puts(s, "}\n"); |
4dff95dc | 2089 | return 0; |
4e88f3de | 2090 | } |
4e88f3de | 2091 | |
4dff95dc SB |
2092 | |
2093 | static int clk_dump_open(struct inode *inode, struct file *file) | |
b2476490 | 2094 | { |
4dff95dc SB |
2095 | return single_open(file, clk_dump, inode->i_private); |
2096 | } | |
b2476490 | 2097 | |
4dff95dc SB |
2098 | static const struct file_operations clk_dump_fops = { |
2099 | .open = clk_dump_open, | |
2100 | .read = seq_read, | |
2101 | .llseek = seq_lseek, | |
2102 | .release = single_release, | |
2103 | }; | |
89ac8d7a | 2104 | |
4dff95dc SB |
2105 | static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) |
2106 | { | |
2107 | struct dentry *d; | |
2108 | int ret = -ENOMEM; | |
b2476490 | 2109 | |
4dff95dc SB |
2110 | if (!core || !pdentry) { |
2111 | ret = -EINVAL; | |
b2476490 | 2112 | goto out; |
4dff95dc | 2113 | } |
b2476490 | 2114 | |
4dff95dc SB |
2115 | d = debugfs_create_dir(core->name, pdentry); |
2116 | if (!d) | |
b61c43c0 | 2117 | goto out; |
b61c43c0 | 2118 | |
4dff95dc SB |
2119 | core->dentry = d; |
2120 | ||
2121 | d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry, | |
2122 | (u32 *)&core->rate); | |
2123 | if (!d) | |
2124 | goto err_out; | |
2125 | ||
2126 | d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry, | |
2127 | (u32 *)&core->accuracy); | |
2128 | if (!d) | |
2129 | goto err_out; | |
2130 | ||
2131 | d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry, | |
2132 | (u32 *)&core->phase); | |
2133 | if (!d) | |
2134 | goto err_out; | |
031dcc9b | 2135 | |
4dff95dc SB |
2136 | d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry, |
2137 | (u32 *)&core->flags); | |
2138 | if (!d) | |
2139 | goto err_out; | |
031dcc9b | 2140 | |
4dff95dc SB |
2141 | d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry, |
2142 | (u32 *)&core->prepare_count); | |
2143 | if (!d) | |
2144 | goto err_out; | |
b2476490 | 2145 | |
4dff95dc SB |
2146 | d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry, |
2147 | (u32 *)&core->enable_count); | |
2148 | if (!d) | |
2149 | goto err_out; | |
b2476490 | 2150 | |
4dff95dc SB |
2151 | d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry, |
2152 | (u32 *)&core->notifier_count); | |
2153 | if (!d) | |
2154 | goto err_out; | |
b2476490 | 2155 | |
4dff95dc SB |
2156 | if (core->ops->debug_init) { |
2157 | ret = core->ops->debug_init(core->hw, core->dentry); | |
2158 | if (ret) | |
2159 | goto err_out; | |
5279fc40 | 2160 | } |
b2476490 | 2161 | |
4dff95dc SB |
2162 | ret = 0; |
2163 | goto out; | |
b2476490 | 2164 | |
4dff95dc SB |
2165 | err_out: |
2166 | debugfs_remove_recursive(core->dentry); | |
2167 | core->dentry = NULL; | |
2168 | out: | |
b2476490 MT |
2169 | return ret; |
2170 | } | |
035a61c3 TV |
2171 | |
2172 | /** | |
6e5ab41b SB |
2173 | * clk_debug_register - add a clk node to the debugfs clk directory |
2174 | * @core: the clk being added to the debugfs clk directory | |
035a61c3 | 2175 | * |
6e5ab41b SB |
2176 | * Dynamically adds a clk to the debugfs clk directory if debugfs has been |
2177 | * initialized. Otherwise it bails out early since the debugfs clk directory | |
4dff95dc | 2178 | * will be created lazily by clk_debug_init as part of a late_initcall. |
035a61c3 | 2179 | */ |
4dff95dc | 2180 | static int clk_debug_register(struct clk_core *core) |
035a61c3 | 2181 | { |
4dff95dc | 2182 | int ret = 0; |
035a61c3 | 2183 | |
4dff95dc SB |
2184 | mutex_lock(&clk_debug_lock); |
2185 | hlist_add_head(&core->debug_node, &clk_debug_list); | |
2186 | ||
2187 | if (!inited) | |
2188 | goto unlock; | |
2189 | ||
2190 | ret = clk_debug_create_one(core, rootdir); | |
2191 | unlock: | |
2192 | mutex_unlock(&clk_debug_lock); | |
2193 | ||
2194 | return ret; | |
035a61c3 | 2195 | } |
b2476490 | 2196 | |
4dff95dc | 2197 | /** |
6e5ab41b SB |
2198 | * clk_debug_unregister - remove a clk node from the debugfs clk directory |
2199 | * @core: the clk being removed from the debugfs clk directory | |
e59c5371 | 2200 | * |
6e5ab41b SB |
2201 | * Dynamically removes a clk and all its child nodes from the |
2202 | * debugfs clk directory if clk->dentry points to debugfs created by | |
4dff95dc | 2203 | * clk_debug_register in __clk_init. |
e59c5371 | 2204 | */ |
4dff95dc | 2205 | static void clk_debug_unregister(struct clk_core *core) |
e59c5371 | 2206 | { |
4dff95dc SB |
2207 | mutex_lock(&clk_debug_lock); |
2208 | hlist_del_init(&core->debug_node); | |
2209 | debugfs_remove_recursive(core->dentry); | |
2210 | core->dentry = NULL; | |
2211 | mutex_unlock(&clk_debug_lock); | |
2212 | } | |
e59c5371 | 2213 | |
4dff95dc SB |
2214 | struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode, |
2215 | void *data, const struct file_operations *fops) | |
2216 | { | |
2217 | struct dentry *d = NULL; | |
e59c5371 | 2218 | |
4dff95dc SB |
2219 | if (hw->core->dentry) |
2220 | d = debugfs_create_file(name, mode, hw->core->dentry, data, | |
2221 | fops); | |
e59c5371 | 2222 | |
4dff95dc SB |
2223 | return d; |
2224 | } | |
2225 | EXPORT_SYMBOL_GPL(clk_debugfs_add_file); | |
e59c5371 | 2226 | |
4dff95dc | 2227 | /** |
6e5ab41b | 2228 | * clk_debug_init - lazily populate the debugfs clk directory |
4dff95dc | 2229 | * |
6e5ab41b SB |
2230 | * clks are often initialized very early during boot before memory can be |
2231 | * dynamically allocated and well before debugfs is setup. This function | |
2232 | * populates the debugfs clk directory once at boot-time when we know that | |
2233 | * debugfs is setup. It should only be called once at boot-time, all other clks | |
2234 | * added dynamically will be done so with clk_debug_register. | |
4dff95dc SB |
2235 | */ |
2236 | static int __init clk_debug_init(void) | |
2237 | { | |
2238 | struct clk_core *core; | |
2239 | struct dentry *d; | |
dfc202ea | 2240 | |
4dff95dc | 2241 | rootdir = debugfs_create_dir("clk", NULL); |
e59c5371 | 2242 | |
4dff95dc SB |
2243 | if (!rootdir) |
2244 | return -ENOMEM; | |
dfc202ea | 2245 | |
4dff95dc SB |
2246 | d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists, |
2247 | &clk_summary_fops); | |
2248 | if (!d) | |
2249 | return -ENOMEM; | |
e59c5371 | 2250 | |
4dff95dc SB |
2251 | d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists, |
2252 | &clk_dump_fops); | |
2253 | if (!d) | |
2254 | return -ENOMEM; | |
e59c5371 | 2255 | |
4dff95dc SB |
2256 | d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir, |
2257 | &orphan_list, &clk_summary_fops); | |
2258 | if (!d) | |
2259 | return -ENOMEM; | |
e59c5371 | 2260 | |
4dff95dc SB |
2261 | d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir, |
2262 | &orphan_list, &clk_dump_fops); | |
2263 | if (!d) | |
2264 | return -ENOMEM; | |
e59c5371 | 2265 | |
4dff95dc SB |
2266 | mutex_lock(&clk_debug_lock); |
2267 | hlist_for_each_entry(core, &clk_debug_list, debug_node) | |
2268 | clk_debug_create_one(core, rootdir); | |
e59c5371 | 2269 | |
4dff95dc SB |
2270 | inited = 1; |
2271 | mutex_unlock(&clk_debug_lock); | |
e59c5371 | 2272 | |
4dff95dc SB |
2273 | return 0; |
2274 | } | |
2275 | late_initcall(clk_debug_init); | |
2276 | #else | |
2277 | static inline int clk_debug_register(struct clk_core *core) { return 0; } | |
2278 | static inline void clk_debug_reparent(struct clk_core *core, | |
2279 | struct clk_core *new_parent) | |
035a61c3 | 2280 | { |
035a61c3 | 2281 | } |
4dff95dc | 2282 | static inline void clk_debug_unregister(struct clk_core *core) |
3d3801ef | 2283 | { |
3d3801ef | 2284 | } |
4dff95dc | 2285 | #endif |
3d3801ef | 2286 | |
b2476490 MT |
2287 | /** |
2288 | * __clk_init - initialize the data structures in a struct clk | |
2289 | * @dev: device initializing this clk, placeholder for now | |
2290 | * @clk: clk being initialized | |
2291 | * | |
035a61c3 | 2292 | * Initializes the lists in struct clk_core, queries the hardware for the |
b2476490 | 2293 | * parent and rate and sets them both. |
b2476490 | 2294 | */ |
b09d6d99 | 2295 | static int __clk_init(struct device *dev, struct clk *clk_user) |
b2476490 | 2296 | { |
d1302a36 | 2297 | int i, ret = 0; |
035a61c3 | 2298 | struct clk_core *orphan; |
b67bfe0d | 2299 | struct hlist_node *tmp2; |
d6968fca | 2300 | struct clk_core *core; |
1c8e6004 | 2301 | unsigned long rate; |
b2476490 | 2302 | |
035a61c3 | 2303 | if (!clk_user) |
d1302a36 | 2304 | return -EINVAL; |
b2476490 | 2305 | |
d6968fca | 2306 | core = clk_user->core; |
035a61c3 | 2307 | |
eab89f69 | 2308 | clk_prepare_lock(); |
b2476490 MT |
2309 | |
2310 | /* check to see if a clock with this name is already registered */ | |
d6968fca | 2311 | if (clk_core_lookup(core->name)) { |
d1302a36 | 2312 | pr_debug("%s: clk %s already initialized\n", |
d6968fca | 2313 | __func__, core->name); |
d1302a36 | 2314 | ret = -EEXIST; |
b2476490 | 2315 | goto out; |
d1302a36 | 2316 | } |
b2476490 | 2317 | |
d4d7e3dd | 2318 | /* check that clk_ops are sane. See Documentation/clk.txt */ |
d6968fca SB |
2319 | if (core->ops->set_rate && |
2320 | !((core->ops->round_rate || core->ops->determine_rate) && | |
2321 | core->ops->recalc_rate)) { | |
71472c0c | 2322 | pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", |
d6968fca | 2323 | __func__, core->name); |
d1302a36 | 2324 | ret = -EINVAL; |
d4d7e3dd MT |
2325 | goto out; |
2326 | } | |
2327 | ||
d6968fca | 2328 | if (core->ops->set_parent && !core->ops->get_parent) { |
d4d7e3dd | 2329 | pr_warning("%s: %s must implement .get_parent & .set_parent\n", |
d6968fca | 2330 | __func__, core->name); |
d1302a36 | 2331 | ret = -EINVAL; |
d4d7e3dd MT |
2332 | goto out; |
2333 | } | |
2334 | ||
d6968fca SB |
2335 | if (core->ops->set_rate_and_parent && |
2336 | !(core->ops->set_parent && core->ops->set_rate)) { | |
3fa2252b | 2337 | pr_warn("%s: %s must implement .set_parent & .set_rate\n", |
d6968fca | 2338 | __func__, core->name); |
3fa2252b SB |
2339 | ret = -EINVAL; |
2340 | goto out; | |
2341 | } | |
2342 | ||
b2476490 | 2343 | /* throw a WARN if any entries in parent_names are NULL */ |
d6968fca SB |
2344 | for (i = 0; i < core->num_parents; i++) |
2345 | WARN(!core->parent_names[i], | |
b2476490 | 2346 | "%s: invalid NULL in %s's .parent_names\n", |
d6968fca | 2347 | __func__, core->name); |
b2476490 MT |
2348 | |
2349 | /* | |
2350 | * Allocate an array of struct clk *'s to avoid unnecessary string | |
2351 | * look-ups of clk's possible parents. This can fail for clocks passed | |
d6968fca | 2352 | * in to clk_init during early boot; thus any access to core->parents[] |
b2476490 MT |
2353 | * must always check for a NULL pointer and try to populate it if |
2354 | * necessary. | |
2355 | * | |
d6968fca SB |
2356 | * If core->parents is not NULL we skip this entire block. This allows |
2357 | * for clock drivers to statically initialize core->parents. | |
b2476490 | 2358 | */ |
d6968fca SB |
2359 | if (core->num_parents > 1 && !core->parents) { |
2360 | core->parents = kcalloc(core->num_parents, sizeof(struct clk *), | |
96a7ed90 | 2361 | GFP_KERNEL); |
b2476490 | 2362 | /* |
035a61c3 | 2363 | * clk_core_lookup returns NULL for parents that have not been |
b2476490 MT |
2364 | * clk_init'd; thus any access to clk->parents[] must check |
2365 | * for a NULL pointer. We can always perform lazy lookups for | |
2366 | * missing parents later on. | |
2367 | */ | |
d6968fca SB |
2368 | if (core->parents) |
2369 | for (i = 0; i < core->num_parents; i++) | |
2370 | core->parents[i] = | |
2371 | clk_core_lookup(core->parent_names[i]); | |
b2476490 MT |
2372 | } |
2373 | ||
d6968fca | 2374 | core->parent = __clk_init_parent(core); |
b2476490 MT |
2375 | |
2376 | /* | |
d6968fca | 2377 | * Populate core->parent if parent has already been __clk_init'd. If |
b2476490 MT |
2378 | * parent has not yet been __clk_init'd then place clk in the orphan |
2379 | * list. If clk has set the CLK_IS_ROOT flag then place it in the root | |
2380 | * clk list. | |
2381 | * | |
2382 | * Every time a new clk is clk_init'd then we walk the list of orphan | |
2383 | * clocks and re-parent any that are children of the clock currently | |
2384 | * being clk_init'd. | |
2385 | */ | |
e6500344 | 2386 | if (core->parent) { |
d6968fca SB |
2387 | hlist_add_head(&core->child_node, |
2388 | &core->parent->children); | |
e6500344 HS |
2389 | core->orphan = core->parent->orphan; |
2390 | } else if (core->flags & CLK_IS_ROOT) { | |
d6968fca | 2391 | hlist_add_head(&core->child_node, &clk_root_list); |
e6500344 HS |
2392 | core->orphan = false; |
2393 | } else { | |
d6968fca | 2394 | hlist_add_head(&core->child_node, &clk_orphan_list); |
e6500344 HS |
2395 | core->orphan = true; |
2396 | } | |
b2476490 | 2397 | |
5279fc40 BB |
2398 | /* |
2399 | * Set clk's accuracy. The preferred method is to use | |
2400 | * .recalc_accuracy. For simple clocks and lazy developers the default | |
2401 | * fallback is to use the parent's accuracy. If a clock doesn't have a | |
2402 | * parent (or is orphaned) then accuracy is set to zero (perfect | |
2403 | * clock). | |
2404 | */ | |
d6968fca SB |
2405 | if (core->ops->recalc_accuracy) |
2406 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
2407 | __clk_get_accuracy(core->parent)); | |
2408 | else if (core->parent) | |
2409 | core->accuracy = core->parent->accuracy; | |
5279fc40 | 2410 | else |
d6968fca | 2411 | core->accuracy = 0; |
5279fc40 | 2412 | |
9824cf73 MR |
2413 | /* |
2414 | * Set clk's phase. | |
2415 | * Since a phase is by definition relative to its parent, just | |
2416 | * query the current clock phase, or just assume it's in phase. | |
2417 | */ | |
d6968fca SB |
2418 | if (core->ops->get_phase) |
2419 | core->phase = core->ops->get_phase(core->hw); | |
9824cf73 | 2420 | else |
d6968fca | 2421 | core->phase = 0; |
9824cf73 | 2422 | |
b2476490 MT |
2423 | /* |
2424 | * Set clk's rate. The preferred method is to use .recalc_rate. For | |
2425 | * simple clocks and lazy developers the default fallback is to use the | |
2426 | * parent's rate. If a clock doesn't have a parent (or is orphaned) | |
2427 | * then rate is set to zero. | |
2428 | */ | |
d6968fca SB |
2429 | if (core->ops->recalc_rate) |
2430 | rate = core->ops->recalc_rate(core->hw, | |
2431 | clk_core_get_rate_nolock(core->parent)); | |
2432 | else if (core->parent) | |
2433 | rate = core->parent->rate; | |
b2476490 | 2434 | else |
1c8e6004 | 2435 | rate = 0; |
d6968fca | 2436 | core->rate = core->req_rate = rate; |
b2476490 MT |
2437 | |
2438 | /* | |
2439 | * walk the list of orphan clocks and reparent any that are children of | |
2440 | * this clock | |
2441 | */ | |
b67bfe0d | 2442 | hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { |
12d29886 | 2443 | if (orphan->num_parents && orphan->ops->get_parent) { |
1f61e5f1 | 2444 | i = orphan->ops->get_parent(orphan->hw); |
9054a31d MR |
2445 | if (i >= 0 && i < orphan->num_parents && |
2446 | !strcmp(core->name, orphan->parent_names[i])) | |
d6968fca | 2447 | clk_core_reparent(orphan, core); |
1f61e5f1 MF |
2448 | continue; |
2449 | } | |
2450 | ||
b2476490 | 2451 | for (i = 0; i < orphan->num_parents; i++) |
d6968fca SB |
2452 | if (!strcmp(core->name, orphan->parent_names[i])) { |
2453 | clk_core_reparent(orphan, core); | |
b2476490 MT |
2454 | break; |
2455 | } | |
1f61e5f1 | 2456 | } |
b2476490 MT |
2457 | |
2458 | /* | |
2459 | * optional platform-specific magic | |
2460 | * | |
2461 | * The .init callback is not used by any of the basic clock types, but | |
2462 | * exists for weird hardware that must perform initialization magic. | |
2463 | * Please consider other ways of solving initialization problems before | |
24ee1a08 | 2464 | * using this callback, as its use is discouraged. |
b2476490 | 2465 | */ |
d6968fca SB |
2466 | if (core->ops->init) |
2467 | core->ops->init(core->hw); | |
b2476490 | 2468 | |
d6968fca | 2469 | kref_init(&core->ref); |
b2476490 | 2470 | out: |
eab89f69 | 2471 | clk_prepare_unlock(); |
b2476490 | 2472 | |
89f7e9de | 2473 | if (!ret) |
d6968fca | 2474 | clk_debug_register(core); |
89f7e9de | 2475 | |
d1302a36 | 2476 | return ret; |
b2476490 MT |
2477 | } |
2478 | ||
035a61c3 TV |
2479 | struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id, |
2480 | const char *con_id) | |
0197b3ea | 2481 | { |
0197b3ea SK |
2482 | struct clk *clk; |
2483 | ||
035a61c3 | 2484 | /* This is to allow this function to be chained to others */ |
c1de1357 | 2485 | if (IS_ERR_OR_NULL(hw)) |
035a61c3 | 2486 | return (struct clk *) hw; |
0197b3ea | 2487 | |
035a61c3 TV |
2488 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); |
2489 | if (!clk) | |
2490 | return ERR_PTR(-ENOMEM); | |
2491 | ||
2492 | clk->core = hw->core; | |
2493 | clk->dev_id = dev_id; | |
2494 | clk->con_id = con_id; | |
1c8e6004 TV |
2495 | clk->max_rate = ULONG_MAX; |
2496 | ||
2497 | clk_prepare_lock(); | |
50595f8b | 2498 | hlist_add_head(&clk->clks_node, &hw->core->clks); |
1c8e6004 | 2499 | clk_prepare_unlock(); |
0197b3ea SK |
2500 | |
2501 | return clk; | |
2502 | } | |
035a61c3 | 2503 | |
73e0e496 | 2504 | void __clk_free_clk(struct clk *clk) |
1c8e6004 TV |
2505 | { |
2506 | clk_prepare_lock(); | |
50595f8b | 2507 | hlist_del(&clk->clks_node); |
1c8e6004 TV |
2508 | clk_prepare_unlock(); |
2509 | ||
2510 | kfree(clk); | |
2511 | } | |
0197b3ea | 2512 | |
293ba3b4 SB |
2513 | /** |
2514 | * clk_register - allocate a new clock, register it and return an opaque cookie | |
2515 | * @dev: device that is registering this clock | |
2516 | * @hw: link to hardware-specific clock data | |
2517 | * | |
2518 | * clk_register is the primary interface for populating the clock tree with new | |
2519 | * clock nodes. It returns a pointer to the newly allocated struct clk which | |
a59a5163 | 2520 | * cannot be dereferenced by driver code but may be used in conjunction with the |
293ba3b4 SB |
2521 | * rest of the clock API. In the event of an error clk_register will return an |
2522 | * error code; drivers must test for an error code after calling clk_register. | |
2523 | */ | |
2524 | struct clk *clk_register(struct device *dev, struct clk_hw *hw) | |
b2476490 | 2525 | { |
d1302a36 | 2526 | int i, ret; |
d6968fca | 2527 | struct clk_core *core; |
293ba3b4 | 2528 | |
d6968fca SB |
2529 | core = kzalloc(sizeof(*core), GFP_KERNEL); |
2530 | if (!core) { | |
293ba3b4 SB |
2531 | ret = -ENOMEM; |
2532 | goto fail_out; | |
2533 | } | |
b2476490 | 2534 | |
d6968fca SB |
2535 | core->name = kstrdup_const(hw->init->name, GFP_KERNEL); |
2536 | if (!core->name) { | |
0197b3ea SK |
2537 | ret = -ENOMEM; |
2538 | goto fail_name; | |
2539 | } | |
d6968fca | 2540 | core->ops = hw->init->ops; |
ac2df527 | 2541 | if (dev && dev->driver) |
d6968fca SB |
2542 | core->owner = dev->driver->owner; |
2543 | core->hw = hw; | |
2544 | core->flags = hw->init->flags; | |
2545 | core->num_parents = hw->init->num_parents; | |
9783c0d9 SB |
2546 | core->min_rate = 0; |
2547 | core->max_rate = ULONG_MAX; | |
d6968fca | 2548 | hw->core = core; |
b2476490 | 2549 | |
d1302a36 | 2550 | /* allocate local copy in case parent_names is __initdata */ |
d6968fca | 2551 | core->parent_names = kcalloc(core->num_parents, sizeof(char *), |
96a7ed90 | 2552 | GFP_KERNEL); |
d1302a36 | 2553 | |
d6968fca | 2554 | if (!core->parent_names) { |
d1302a36 MT |
2555 | ret = -ENOMEM; |
2556 | goto fail_parent_names; | |
2557 | } | |
2558 | ||
2559 | ||
2560 | /* copy each string name in case parent_names is __initdata */ | |
d6968fca SB |
2561 | for (i = 0; i < core->num_parents; i++) { |
2562 | core->parent_names[i] = kstrdup_const(hw->init->parent_names[i], | |
0197b3ea | 2563 | GFP_KERNEL); |
d6968fca | 2564 | if (!core->parent_names[i]) { |
d1302a36 MT |
2565 | ret = -ENOMEM; |
2566 | goto fail_parent_names_copy; | |
2567 | } | |
2568 | } | |
2569 | ||
d6968fca | 2570 | INIT_HLIST_HEAD(&core->clks); |
1c8e6004 | 2571 | |
035a61c3 TV |
2572 | hw->clk = __clk_create_clk(hw, NULL, NULL); |
2573 | if (IS_ERR(hw->clk)) { | |
035a61c3 TV |
2574 | ret = PTR_ERR(hw->clk); |
2575 | goto fail_parent_names_copy; | |
2576 | } | |
2577 | ||
2578 | ret = __clk_init(dev, hw->clk); | |
d1302a36 | 2579 | if (!ret) |
035a61c3 | 2580 | return hw->clk; |
b2476490 | 2581 | |
1c8e6004 | 2582 | __clk_free_clk(hw->clk); |
035a61c3 | 2583 | hw->clk = NULL; |
b2476490 | 2584 | |
d1302a36 MT |
2585 | fail_parent_names_copy: |
2586 | while (--i >= 0) | |
d6968fca SB |
2587 | kfree_const(core->parent_names[i]); |
2588 | kfree(core->parent_names); | |
d1302a36 | 2589 | fail_parent_names: |
d6968fca | 2590 | kfree_const(core->name); |
0197b3ea | 2591 | fail_name: |
d6968fca | 2592 | kfree(core); |
d1302a36 MT |
2593 | fail_out: |
2594 | return ERR_PTR(ret); | |
b2476490 MT |
2595 | } |
2596 | EXPORT_SYMBOL_GPL(clk_register); | |
2597 | ||
6e5ab41b | 2598 | /* Free memory allocated for a clock. */ |
fcb0ee6a SN |
2599 | static void __clk_release(struct kref *ref) |
2600 | { | |
d6968fca SB |
2601 | struct clk_core *core = container_of(ref, struct clk_core, ref); |
2602 | int i = core->num_parents; | |
fcb0ee6a | 2603 | |
496eadf8 KK |
2604 | lockdep_assert_held(&prepare_lock); |
2605 | ||
d6968fca | 2606 | kfree(core->parents); |
fcb0ee6a | 2607 | while (--i >= 0) |
d6968fca | 2608 | kfree_const(core->parent_names[i]); |
fcb0ee6a | 2609 | |
d6968fca SB |
2610 | kfree(core->parent_names); |
2611 | kfree_const(core->name); | |
2612 | kfree(core); | |
fcb0ee6a SN |
2613 | } |
2614 | ||
2615 | /* | |
2616 | * Empty clk_ops for unregistered clocks. These are used temporarily | |
2617 | * after clk_unregister() was called on a clock and until last clock | |
2618 | * consumer calls clk_put() and the struct clk object is freed. | |
2619 | */ | |
2620 | static int clk_nodrv_prepare_enable(struct clk_hw *hw) | |
2621 | { | |
2622 | return -ENXIO; | |
2623 | } | |
2624 | ||
2625 | static void clk_nodrv_disable_unprepare(struct clk_hw *hw) | |
2626 | { | |
2627 | WARN_ON_ONCE(1); | |
2628 | } | |
2629 | ||
2630 | static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate, | |
2631 | unsigned long parent_rate) | |
2632 | { | |
2633 | return -ENXIO; | |
2634 | } | |
2635 | ||
2636 | static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) | |
2637 | { | |
2638 | return -ENXIO; | |
2639 | } | |
2640 | ||
2641 | static const struct clk_ops clk_nodrv_ops = { | |
2642 | .enable = clk_nodrv_prepare_enable, | |
2643 | .disable = clk_nodrv_disable_unprepare, | |
2644 | .prepare = clk_nodrv_prepare_enable, | |
2645 | .unprepare = clk_nodrv_disable_unprepare, | |
2646 | .set_rate = clk_nodrv_set_rate, | |
2647 | .set_parent = clk_nodrv_set_parent, | |
2648 | }; | |
2649 | ||
1df5c939 MB |
2650 | /** |
2651 | * clk_unregister - unregister a currently registered clock | |
2652 | * @clk: clock to unregister | |
1df5c939 | 2653 | */ |
fcb0ee6a SN |
2654 | void clk_unregister(struct clk *clk) |
2655 | { | |
2656 | unsigned long flags; | |
2657 | ||
6314b679 SB |
2658 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
2659 | return; | |
2660 | ||
035a61c3 | 2661 | clk_debug_unregister(clk->core); |
fcb0ee6a SN |
2662 | |
2663 | clk_prepare_lock(); | |
2664 | ||
035a61c3 TV |
2665 | if (clk->core->ops == &clk_nodrv_ops) { |
2666 | pr_err("%s: unregistered clock: %s\n", __func__, | |
2667 | clk->core->name); | |
6314b679 | 2668 | return; |
fcb0ee6a SN |
2669 | } |
2670 | /* | |
2671 | * Assign empty clock ops for consumers that might still hold | |
2672 | * a reference to this clock. | |
2673 | */ | |
2674 | flags = clk_enable_lock(); | |
035a61c3 | 2675 | clk->core->ops = &clk_nodrv_ops; |
fcb0ee6a SN |
2676 | clk_enable_unlock(flags); |
2677 | ||
035a61c3 TV |
2678 | if (!hlist_empty(&clk->core->children)) { |
2679 | struct clk_core *child; | |
874f224c | 2680 | struct hlist_node *t; |
fcb0ee6a SN |
2681 | |
2682 | /* Reparent all children to the orphan list. */ | |
035a61c3 TV |
2683 | hlist_for_each_entry_safe(child, t, &clk->core->children, |
2684 | child_node) | |
2685 | clk_core_set_parent(child, NULL); | |
fcb0ee6a SN |
2686 | } |
2687 | ||
035a61c3 | 2688 | hlist_del_init(&clk->core->child_node); |
fcb0ee6a | 2689 | |
035a61c3 | 2690 | if (clk->core->prepare_count) |
fcb0ee6a | 2691 | pr_warn("%s: unregistering prepared clock: %s\n", |
035a61c3 TV |
2692 | __func__, clk->core->name); |
2693 | kref_put(&clk->core->ref, __clk_release); | |
6314b679 | 2694 | |
fcb0ee6a SN |
2695 | clk_prepare_unlock(); |
2696 | } | |
1df5c939 MB |
2697 | EXPORT_SYMBOL_GPL(clk_unregister); |
2698 | ||
46c8773a SB |
2699 | static void devm_clk_release(struct device *dev, void *res) |
2700 | { | |
293ba3b4 | 2701 | clk_unregister(*(struct clk **)res); |
46c8773a SB |
2702 | } |
2703 | ||
2704 | /** | |
2705 | * devm_clk_register - resource managed clk_register() | |
2706 | * @dev: device that is registering this clock | |
2707 | * @hw: link to hardware-specific clock data | |
2708 | * | |
2709 | * Managed clk_register(). Clocks returned from this function are | |
2710 | * automatically clk_unregister()ed on driver detach. See clk_register() for | |
2711 | * more information. | |
2712 | */ | |
2713 | struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) | |
2714 | { | |
2715 | struct clk *clk; | |
293ba3b4 | 2716 | struct clk **clkp; |
46c8773a | 2717 | |
293ba3b4 SB |
2718 | clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); |
2719 | if (!clkp) | |
46c8773a SB |
2720 | return ERR_PTR(-ENOMEM); |
2721 | ||
293ba3b4 SB |
2722 | clk = clk_register(dev, hw); |
2723 | if (!IS_ERR(clk)) { | |
2724 | *clkp = clk; | |
2725 | devres_add(dev, clkp); | |
46c8773a | 2726 | } else { |
293ba3b4 | 2727 | devres_free(clkp); |
46c8773a SB |
2728 | } |
2729 | ||
2730 | return clk; | |
2731 | } | |
2732 | EXPORT_SYMBOL_GPL(devm_clk_register); | |
2733 | ||
2734 | static int devm_clk_match(struct device *dev, void *res, void *data) | |
2735 | { | |
2736 | struct clk *c = res; | |
2737 | if (WARN_ON(!c)) | |
2738 | return 0; | |
2739 | return c == data; | |
2740 | } | |
2741 | ||
2742 | /** | |
2743 | * devm_clk_unregister - resource managed clk_unregister() | |
2744 | * @clk: clock to unregister | |
2745 | * | |
2746 | * Deallocate a clock allocated with devm_clk_register(). Normally | |
2747 | * this function will not need to be called and the resource management | |
2748 | * code will ensure that the resource is freed. | |
2749 | */ | |
2750 | void devm_clk_unregister(struct device *dev, struct clk *clk) | |
2751 | { | |
2752 | WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk)); | |
2753 | } | |
2754 | EXPORT_SYMBOL_GPL(devm_clk_unregister); | |
2755 | ||
ac2df527 SN |
2756 | /* |
2757 | * clkdev helpers | |
2758 | */ | |
2759 | int __clk_get(struct clk *clk) | |
2760 | { | |
035a61c3 TV |
2761 | struct clk_core *core = !clk ? NULL : clk->core; |
2762 | ||
2763 | if (core) { | |
2764 | if (!try_module_get(core->owner)) | |
00efcb1c | 2765 | return 0; |
ac2df527 | 2766 | |
035a61c3 | 2767 | kref_get(&core->ref); |
00efcb1c | 2768 | } |
ac2df527 SN |
2769 | return 1; |
2770 | } | |
2771 | ||
2772 | void __clk_put(struct clk *clk) | |
2773 | { | |
10cdfe54 TV |
2774 | struct module *owner; |
2775 | ||
00efcb1c | 2776 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
ac2df527 SN |
2777 | return; |
2778 | ||
fcb0ee6a | 2779 | clk_prepare_lock(); |
1c8e6004 | 2780 | |
50595f8b | 2781 | hlist_del(&clk->clks_node); |
ec02ace8 TV |
2782 | if (clk->min_rate > clk->core->req_rate || |
2783 | clk->max_rate < clk->core->req_rate) | |
2784 | clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
2785 | ||
1c8e6004 TV |
2786 | owner = clk->core->owner; |
2787 | kref_put(&clk->core->ref, __clk_release); | |
2788 | ||
fcb0ee6a SN |
2789 | clk_prepare_unlock(); |
2790 | ||
10cdfe54 | 2791 | module_put(owner); |
035a61c3 | 2792 | |
035a61c3 | 2793 | kfree(clk); |
ac2df527 SN |
2794 | } |
2795 | ||
b2476490 MT |
2796 | /*** clk rate change notifiers ***/ |
2797 | ||
2798 | /** | |
2799 | * clk_notifier_register - add a clk rate change notifier | |
2800 | * @clk: struct clk * to watch | |
2801 | * @nb: struct notifier_block * with callback info | |
2802 | * | |
2803 | * Request notification when clk's rate changes. This uses an SRCU | |
2804 | * notifier because we want it to block and notifier unregistrations are | |
2805 | * uncommon. The callbacks associated with the notifier must not | |
2806 | * re-enter into the clk framework by calling any top-level clk APIs; | |
2807 | * this will cause a nested prepare_lock mutex. | |
2808 | * | |
5324fda7 SB |
2809 | * In all notification cases cases (pre, post and abort rate change) the |
2810 | * original clock rate is passed to the callback via struct | |
2811 | * clk_notifier_data.old_rate and the new frequency is passed via struct | |
b2476490 MT |
2812 | * clk_notifier_data.new_rate. |
2813 | * | |
b2476490 MT |
2814 | * clk_notifier_register() must be called from non-atomic context. |
2815 | * Returns -EINVAL if called with null arguments, -ENOMEM upon | |
2816 | * allocation failure; otherwise, passes along the return value of | |
2817 | * srcu_notifier_chain_register(). | |
2818 | */ | |
2819 | int clk_notifier_register(struct clk *clk, struct notifier_block *nb) | |
2820 | { | |
2821 | struct clk_notifier *cn; | |
2822 | int ret = -ENOMEM; | |
2823 | ||
2824 | if (!clk || !nb) | |
2825 | return -EINVAL; | |
2826 | ||
eab89f69 | 2827 | clk_prepare_lock(); |
b2476490 MT |
2828 | |
2829 | /* search the list of notifiers for this clk */ | |
2830 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2831 | if (cn->clk == clk) | |
2832 | break; | |
2833 | ||
2834 | /* if clk wasn't in the notifier list, allocate new clk_notifier */ | |
2835 | if (cn->clk != clk) { | |
2836 | cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL); | |
2837 | if (!cn) | |
2838 | goto out; | |
2839 | ||
2840 | cn->clk = clk; | |
2841 | srcu_init_notifier_head(&cn->notifier_head); | |
2842 | ||
2843 | list_add(&cn->node, &clk_notifier_list); | |
2844 | } | |
2845 | ||
2846 | ret = srcu_notifier_chain_register(&cn->notifier_head, nb); | |
2847 | ||
035a61c3 | 2848 | clk->core->notifier_count++; |
b2476490 MT |
2849 | |
2850 | out: | |
eab89f69 | 2851 | clk_prepare_unlock(); |
b2476490 MT |
2852 | |
2853 | return ret; | |
2854 | } | |
2855 | EXPORT_SYMBOL_GPL(clk_notifier_register); | |
2856 | ||
2857 | /** | |
2858 | * clk_notifier_unregister - remove a clk rate change notifier | |
2859 | * @clk: struct clk * | |
2860 | * @nb: struct notifier_block * with callback info | |
2861 | * | |
2862 | * Request no further notification for changes to 'clk' and frees memory | |
2863 | * allocated in clk_notifier_register. | |
2864 | * | |
2865 | * Returns -EINVAL if called with null arguments; otherwise, passes | |
2866 | * along the return value of srcu_notifier_chain_unregister(). | |
2867 | */ | |
2868 | int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) | |
2869 | { | |
2870 | struct clk_notifier *cn = NULL; | |
2871 | int ret = -EINVAL; | |
2872 | ||
2873 | if (!clk || !nb) | |
2874 | return -EINVAL; | |
2875 | ||
eab89f69 | 2876 | clk_prepare_lock(); |
b2476490 MT |
2877 | |
2878 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2879 | if (cn->clk == clk) | |
2880 | break; | |
2881 | ||
2882 | if (cn->clk == clk) { | |
2883 | ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); | |
2884 | ||
035a61c3 | 2885 | clk->core->notifier_count--; |
b2476490 MT |
2886 | |
2887 | /* XXX the notifier code should handle this better */ | |
2888 | if (!cn->notifier_head.head) { | |
2889 | srcu_cleanup_notifier_head(&cn->notifier_head); | |
72b5322f | 2890 | list_del(&cn->node); |
b2476490 MT |
2891 | kfree(cn); |
2892 | } | |
2893 | ||
2894 | } else { | |
2895 | ret = -ENOENT; | |
2896 | } | |
2897 | ||
eab89f69 | 2898 | clk_prepare_unlock(); |
b2476490 MT |
2899 | |
2900 | return ret; | |
2901 | } | |
2902 | EXPORT_SYMBOL_GPL(clk_notifier_unregister); | |
766e6a4e GL |
2903 | |
2904 | #ifdef CONFIG_OF | |
2905 | /** | |
2906 | * struct of_clk_provider - Clock provider registration structure | |
2907 | * @link: Entry in global list of clock providers | |
2908 | * @node: Pointer to device tree node of clock provider | |
2909 | * @get: Get clock callback. Returns NULL or a struct clk for the | |
2910 | * given clock specifier | |
2911 | * @data: context pointer to be passed into @get callback | |
2912 | */ | |
2913 | struct of_clk_provider { | |
2914 | struct list_head link; | |
2915 | ||
2916 | struct device_node *node; | |
2917 | struct clk *(*get)(struct of_phandle_args *clkspec, void *data); | |
2918 | void *data; | |
2919 | }; | |
2920 | ||
f2f6c255 PG |
2921 | static const struct of_device_id __clk_of_table_sentinel |
2922 | __used __section(__clk_of_table_end); | |
2923 | ||
766e6a4e | 2924 | static LIST_HEAD(of_clk_providers); |
d6782c26 SN |
2925 | static DEFINE_MUTEX(of_clk_mutex); |
2926 | ||
766e6a4e GL |
2927 | struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, |
2928 | void *data) | |
2929 | { | |
2930 | return data; | |
2931 | } | |
2932 | EXPORT_SYMBOL_GPL(of_clk_src_simple_get); | |
2933 | ||
494bfec9 SG |
2934 | struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data) |
2935 | { | |
2936 | struct clk_onecell_data *clk_data = data; | |
2937 | unsigned int idx = clkspec->args[0]; | |
2938 | ||
2939 | if (idx >= clk_data->clk_num) { | |
7e96353c | 2940 | pr_err("%s: invalid clock index %u\n", __func__, idx); |
494bfec9 SG |
2941 | return ERR_PTR(-EINVAL); |
2942 | } | |
2943 | ||
2944 | return clk_data->clks[idx]; | |
2945 | } | |
2946 | EXPORT_SYMBOL_GPL(of_clk_src_onecell_get); | |
2947 | ||
766e6a4e GL |
2948 | /** |
2949 | * of_clk_add_provider() - Register a clock provider for a node | |
2950 | * @np: Device node pointer associated with clock provider | |
2951 | * @clk_src_get: callback for decoding clock | |
2952 | * @data: context pointer for @clk_src_get callback. | |
2953 | */ | |
2954 | int of_clk_add_provider(struct device_node *np, | |
2955 | struct clk *(*clk_src_get)(struct of_phandle_args *clkspec, | |
2956 | void *data), | |
2957 | void *data) | |
2958 | { | |
2959 | struct of_clk_provider *cp; | |
86be408b | 2960 | int ret; |
766e6a4e GL |
2961 | |
2962 | cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL); | |
2963 | if (!cp) | |
2964 | return -ENOMEM; | |
2965 | ||
2966 | cp->node = of_node_get(np); | |
2967 | cp->data = data; | |
2968 | cp->get = clk_src_get; | |
2969 | ||
d6782c26 | 2970 | mutex_lock(&of_clk_mutex); |
766e6a4e | 2971 | list_add(&cp->link, &of_clk_providers); |
d6782c26 | 2972 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2973 | pr_debug("Added clock from %s\n", np->full_name); |
2974 | ||
86be408b SN |
2975 | ret = of_clk_set_defaults(np, true); |
2976 | if (ret < 0) | |
2977 | of_clk_del_provider(np); | |
2978 | ||
2979 | return ret; | |
766e6a4e GL |
2980 | } |
2981 | EXPORT_SYMBOL_GPL(of_clk_add_provider); | |
2982 | ||
2983 | /** | |
2984 | * of_clk_del_provider() - Remove a previously registered clock provider | |
2985 | * @np: Device node pointer associated with clock provider | |
2986 | */ | |
2987 | void of_clk_del_provider(struct device_node *np) | |
2988 | { | |
2989 | struct of_clk_provider *cp; | |
2990 | ||
d6782c26 | 2991 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
2992 | list_for_each_entry(cp, &of_clk_providers, link) { |
2993 | if (cp->node == np) { | |
2994 | list_del(&cp->link); | |
2995 | of_node_put(cp->node); | |
2996 | kfree(cp); | |
2997 | break; | |
2998 | } | |
2999 | } | |
d6782c26 | 3000 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
3001 | } |
3002 | EXPORT_SYMBOL_GPL(of_clk_del_provider); | |
3003 | ||
73e0e496 SB |
3004 | struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec, |
3005 | const char *dev_id, const char *con_id) | |
766e6a4e GL |
3006 | { |
3007 | struct of_clk_provider *provider; | |
a34cd466 | 3008 | struct clk *clk = ERR_PTR(-EPROBE_DEFER); |
766e6a4e | 3009 | |
306c342f SB |
3010 | if (!clkspec) |
3011 | return ERR_PTR(-EINVAL); | |
3012 | ||
766e6a4e | 3013 | /* Check if we have such a provider in our array */ |
306c342f | 3014 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
3015 | list_for_each_entry(provider, &of_clk_providers, link) { |
3016 | if (provider->node == clkspec->np) | |
3017 | clk = provider->get(clkspec, provider->data); | |
73e0e496 SB |
3018 | if (!IS_ERR(clk)) { |
3019 | clk = __clk_create_clk(__clk_get_hw(clk), dev_id, | |
3020 | con_id); | |
3021 | ||
3022 | if (!IS_ERR(clk) && !__clk_get(clk)) { | |
3023 | __clk_free_clk(clk); | |
3024 | clk = ERR_PTR(-ENOENT); | |
3025 | } | |
3026 | ||
766e6a4e | 3027 | break; |
73e0e496 | 3028 | } |
766e6a4e | 3029 | } |
306c342f | 3030 | mutex_unlock(&of_clk_mutex); |
d6782c26 SN |
3031 | |
3032 | return clk; | |
3033 | } | |
3034 | ||
306c342f SB |
3035 | /** |
3036 | * of_clk_get_from_provider() - Lookup a clock from a clock provider | |
3037 | * @clkspec: pointer to a clock specifier data structure | |
3038 | * | |
3039 | * This function looks up a struct clk from the registered list of clock | |
3040 | * providers, an input is a clock specifier data structure as returned | |
3041 | * from the of_parse_phandle_with_args() function call. | |
3042 | */ | |
d6782c26 SN |
3043 | struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) |
3044 | { | |
306c342f | 3045 | return __of_clk_get_from_provider(clkspec, NULL, __func__); |
766e6a4e GL |
3046 | } |
3047 | ||
f6102742 MT |
3048 | int of_clk_get_parent_count(struct device_node *np) |
3049 | { | |
3050 | return of_count_phandle_with_args(np, "clocks", "#clock-cells"); | |
3051 | } | |
3052 | EXPORT_SYMBOL_GPL(of_clk_get_parent_count); | |
3053 | ||
766e6a4e GL |
3054 | const char *of_clk_get_parent_name(struct device_node *np, int index) |
3055 | { | |
3056 | struct of_phandle_args clkspec; | |
7a0fc1a3 | 3057 | struct property *prop; |
766e6a4e | 3058 | const char *clk_name; |
7a0fc1a3 BD |
3059 | const __be32 *vp; |
3060 | u32 pv; | |
766e6a4e | 3061 | int rc; |
7a0fc1a3 | 3062 | int count; |
0a4807c2 | 3063 | struct clk *clk; |
766e6a4e | 3064 | |
766e6a4e GL |
3065 | rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, |
3066 | &clkspec); | |
3067 | if (rc) | |
3068 | return NULL; | |
3069 | ||
7a0fc1a3 BD |
3070 | index = clkspec.args_count ? clkspec.args[0] : 0; |
3071 | count = 0; | |
3072 | ||
3073 | /* if there is an indices property, use it to transfer the index | |
3074 | * specified into an array offset for the clock-output-names property. | |
3075 | */ | |
3076 | of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { | |
3077 | if (index == pv) { | |
3078 | index = count; | |
3079 | break; | |
3080 | } | |
3081 | count++; | |
3082 | } | |
3083 | ||
766e6a4e | 3084 | if (of_property_read_string_index(clkspec.np, "clock-output-names", |
7a0fc1a3 | 3085 | index, |
0a4807c2 SB |
3086 | &clk_name) < 0) { |
3087 | /* | |
3088 | * Best effort to get the name if the clock has been | |
3089 | * registered with the framework. If the clock isn't | |
3090 | * registered, we return the node name as the name of | |
3091 | * the clock as long as #clock-cells = 0. | |
3092 | */ | |
3093 | clk = of_clk_get_from_provider(&clkspec); | |
3094 | if (IS_ERR(clk)) { | |
3095 | if (clkspec.args_count == 0) | |
3096 | clk_name = clkspec.np->name; | |
3097 | else | |
3098 | clk_name = NULL; | |
3099 | } else { | |
3100 | clk_name = __clk_get_name(clk); | |
3101 | clk_put(clk); | |
3102 | } | |
3103 | } | |
3104 | ||
766e6a4e GL |
3105 | |
3106 | of_node_put(clkspec.np); | |
3107 | return clk_name; | |
3108 | } | |
3109 | EXPORT_SYMBOL_GPL(of_clk_get_parent_name); | |
3110 | ||
2e61dfb3 DN |
3111 | /** |
3112 | * of_clk_parent_fill() - Fill @parents with names of @np's parents and return | |
3113 | * number of parents | |
3114 | * @np: Device node pointer associated with clock provider | |
3115 | * @parents: pointer to char array that hold the parents' names | |
3116 | * @size: size of the @parents array | |
3117 | * | |
3118 | * Return: number of parents for the clock node. | |
3119 | */ | |
3120 | int of_clk_parent_fill(struct device_node *np, const char **parents, | |
3121 | unsigned int size) | |
3122 | { | |
3123 | unsigned int i = 0; | |
3124 | ||
3125 | while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL) | |
3126 | i++; | |
3127 | ||
3128 | return i; | |
3129 | } | |
3130 | EXPORT_SYMBOL_GPL(of_clk_parent_fill); | |
3131 | ||
1771b10d GC |
3132 | struct clock_provider { |
3133 | of_clk_init_cb_t clk_init_cb; | |
3134 | struct device_node *np; | |
3135 | struct list_head node; | |
3136 | }; | |
3137 | ||
1771b10d GC |
3138 | /* |
3139 | * This function looks for a parent clock. If there is one, then it | |
3140 | * checks that the provider for this parent clock was initialized, in | |
3141 | * this case the parent clock will be ready. | |
3142 | */ | |
3143 | static int parent_ready(struct device_node *np) | |
3144 | { | |
3145 | int i = 0; | |
3146 | ||
3147 | while (true) { | |
3148 | struct clk *clk = of_clk_get(np, i); | |
3149 | ||
3150 | /* this parent is ready we can check the next one */ | |
3151 | if (!IS_ERR(clk)) { | |
3152 | clk_put(clk); | |
3153 | i++; | |
3154 | continue; | |
3155 | } | |
3156 | ||
3157 | /* at least one parent is not ready, we exit now */ | |
3158 | if (PTR_ERR(clk) == -EPROBE_DEFER) | |
3159 | return 0; | |
3160 | ||
3161 | /* | |
3162 | * Here we make assumption that the device tree is | |
3163 | * written correctly. So an error means that there is | |
3164 | * no more parent. As we didn't exit yet, then the | |
3165 | * previous parent are ready. If there is no clock | |
3166 | * parent, no need to wait for them, then we can | |
3167 | * consider their absence as being ready | |
3168 | */ | |
3169 | return 1; | |
3170 | } | |
3171 | } | |
3172 | ||
766e6a4e GL |
3173 | /** |
3174 | * of_clk_init() - Scan and init clock providers from the DT | |
3175 | * @matches: array of compatible values and init functions for providers. | |
3176 | * | |
1771b10d | 3177 | * This function scans the device tree for matching clock providers |
e5ca8fb4 | 3178 | * and calls their initialization functions. It also does it by trying |
1771b10d | 3179 | * to follow the dependencies. |
766e6a4e GL |
3180 | */ |
3181 | void __init of_clk_init(const struct of_device_id *matches) | |
3182 | { | |
7f7ed584 | 3183 | const struct of_device_id *match; |
766e6a4e | 3184 | struct device_node *np; |
1771b10d GC |
3185 | struct clock_provider *clk_provider, *next; |
3186 | bool is_init_done; | |
3187 | bool force = false; | |
2573a02a | 3188 | LIST_HEAD(clk_provider_list); |
766e6a4e | 3189 | |
f2f6c255 | 3190 | if (!matches) |
819b4861 | 3191 | matches = &__clk_of_table; |
f2f6c255 | 3192 | |
1771b10d | 3193 | /* First prepare the list of the clocks providers */ |
7f7ed584 | 3194 | for_each_matching_node_and_match(np, matches, &match) { |
2e3b19f1 SB |
3195 | struct clock_provider *parent; |
3196 | ||
3197 | parent = kzalloc(sizeof(*parent), GFP_KERNEL); | |
3198 | if (!parent) { | |
3199 | list_for_each_entry_safe(clk_provider, next, | |
3200 | &clk_provider_list, node) { | |
3201 | list_del(&clk_provider->node); | |
6bc9d9d6 | 3202 | of_node_put(clk_provider->np); |
2e3b19f1 SB |
3203 | kfree(clk_provider); |
3204 | } | |
6bc9d9d6 | 3205 | of_node_put(np); |
2e3b19f1 SB |
3206 | return; |
3207 | } | |
1771b10d GC |
3208 | |
3209 | parent->clk_init_cb = match->data; | |
6bc9d9d6 | 3210 | parent->np = of_node_get(np); |
3f6d439f | 3211 | list_add_tail(&parent->node, &clk_provider_list); |
1771b10d GC |
3212 | } |
3213 | ||
3214 | while (!list_empty(&clk_provider_list)) { | |
3215 | is_init_done = false; | |
3216 | list_for_each_entry_safe(clk_provider, next, | |
3217 | &clk_provider_list, node) { | |
3218 | if (force || parent_ready(clk_provider->np)) { | |
86be408b | 3219 | |
1771b10d | 3220 | clk_provider->clk_init_cb(clk_provider->np); |
86be408b SN |
3221 | of_clk_set_defaults(clk_provider->np, true); |
3222 | ||
1771b10d | 3223 | list_del(&clk_provider->node); |
6bc9d9d6 | 3224 | of_node_put(clk_provider->np); |
1771b10d GC |
3225 | kfree(clk_provider); |
3226 | is_init_done = true; | |
3227 | } | |
3228 | } | |
3229 | ||
3230 | /* | |
e5ca8fb4 | 3231 | * We didn't manage to initialize any of the |
1771b10d GC |
3232 | * remaining providers during the last loop, so now we |
3233 | * initialize all the remaining ones unconditionally | |
3234 | * in case the clock parent was not mandatory | |
3235 | */ | |
3236 | if (!is_init_done) | |
3237 | force = true; | |
766e6a4e GL |
3238 | } |
3239 | } | |
3240 | #endif |