Commit | Line | Data |
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b2476490 MT |
1 | /* |
2 | * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> | |
3 | * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * Standard functionality for the common clock API. See Documentation/clk.txt | |
10 | */ | |
11 | ||
3c373117 | 12 | #include <linux/clk.h> |
b09d6d99 | 13 | #include <linux/clk-provider.h> |
86be408b | 14 | #include <linux/clk/clk-conf.h> |
b2476490 MT |
15 | #include <linux/module.h> |
16 | #include <linux/mutex.h> | |
17 | #include <linux/spinlock.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/list.h> | |
20 | #include <linux/slab.h> | |
766e6a4e | 21 | #include <linux/of.h> |
46c8773a | 22 | #include <linux/device.h> |
f2f6c255 | 23 | #include <linux/init.h> |
533ddeb1 | 24 | #include <linux/sched.h> |
562ef0b0 | 25 | #include <linux/clkdev.h> |
b2476490 | 26 | |
d6782c26 SN |
27 | #include "clk.h" |
28 | ||
b2476490 MT |
29 | static DEFINE_SPINLOCK(enable_lock); |
30 | static DEFINE_MUTEX(prepare_lock); | |
31 | ||
533ddeb1 MT |
32 | static struct task_struct *prepare_owner; |
33 | static struct task_struct *enable_owner; | |
34 | ||
35 | static int prepare_refcnt; | |
36 | static int enable_refcnt; | |
37 | ||
b2476490 MT |
38 | static HLIST_HEAD(clk_root_list); |
39 | static HLIST_HEAD(clk_orphan_list); | |
40 | static LIST_HEAD(clk_notifier_list); | |
41 | ||
b09d6d99 MT |
42 | /*** private data structures ***/ |
43 | ||
44 | struct clk_core { | |
45 | const char *name; | |
46 | const struct clk_ops *ops; | |
47 | struct clk_hw *hw; | |
48 | struct module *owner; | |
49 | struct clk_core *parent; | |
50 | const char **parent_names; | |
51 | struct clk_core **parents; | |
52 | u8 num_parents; | |
53 | u8 new_parent_index; | |
54 | unsigned long rate; | |
1c8e6004 | 55 | unsigned long req_rate; |
b09d6d99 MT |
56 | unsigned long new_rate; |
57 | struct clk_core *new_parent; | |
58 | struct clk_core *new_child; | |
59 | unsigned long flags; | |
e6500344 | 60 | bool orphan; |
b09d6d99 MT |
61 | unsigned int enable_count; |
62 | unsigned int prepare_count; | |
9783c0d9 SB |
63 | unsigned long min_rate; |
64 | unsigned long max_rate; | |
b09d6d99 MT |
65 | unsigned long accuracy; |
66 | int phase; | |
67 | struct hlist_head children; | |
68 | struct hlist_node child_node; | |
1c8e6004 | 69 | struct hlist_head clks; |
b09d6d99 MT |
70 | unsigned int notifier_count; |
71 | #ifdef CONFIG_DEBUG_FS | |
72 | struct dentry *dentry; | |
8c9a8a8f | 73 | struct hlist_node debug_node; |
b09d6d99 MT |
74 | #endif |
75 | struct kref ref; | |
76 | }; | |
77 | ||
dfc202ea SB |
78 | #define CREATE_TRACE_POINTS |
79 | #include <trace/events/clk.h> | |
80 | ||
b09d6d99 MT |
81 | struct clk { |
82 | struct clk_core *core; | |
83 | const char *dev_id; | |
84 | const char *con_id; | |
1c8e6004 TV |
85 | unsigned long min_rate; |
86 | unsigned long max_rate; | |
50595f8b | 87 | struct hlist_node clks_node; |
b09d6d99 MT |
88 | }; |
89 | ||
eab89f69 MT |
90 | /*** locking ***/ |
91 | static void clk_prepare_lock(void) | |
92 | { | |
533ddeb1 MT |
93 | if (!mutex_trylock(&prepare_lock)) { |
94 | if (prepare_owner == current) { | |
95 | prepare_refcnt++; | |
96 | return; | |
97 | } | |
98 | mutex_lock(&prepare_lock); | |
99 | } | |
100 | WARN_ON_ONCE(prepare_owner != NULL); | |
101 | WARN_ON_ONCE(prepare_refcnt != 0); | |
102 | prepare_owner = current; | |
103 | prepare_refcnt = 1; | |
eab89f69 MT |
104 | } |
105 | ||
106 | static void clk_prepare_unlock(void) | |
107 | { | |
533ddeb1 MT |
108 | WARN_ON_ONCE(prepare_owner != current); |
109 | WARN_ON_ONCE(prepare_refcnt == 0); | |
110 | ||
111 | if (--prepare_refcnt) | |
112 | return; | |
113 | prepare_owner = NULL; | |
eab89f69 MT |
114 | mutex_unlock(&prepare_lock); |
115 | } | |
116 | ||
117 | static unsigned long clk_enable_lock(void) | |
a57aa185 | 118 | __acquires(enable_lock) |
eab89f69 MT |
119 | { |
120 | unsigned long flags; | |
533ddeb1 MT |
121 | |
122 | if (!spin_trylock_irqsave(&enable_lock, flags)) { | |
123 | if (enable_owner == current) { | |
124 | enable_refcnt++; | |
a57aa185 | 125 | __acquire(enable_lock); |
533ddeb1 MT |
126 | return flags; |
127 | } | |
128 | spin_lock_irqsave(&enable_lock, flags); | |
129 | } | |
130 | WARN_ON_ONCE(enable_owner != NULL); | |
131 | WARN_ON_ONCE(enable_refcnt != 0); | |
132 | enable_owner = current; | |
133 | enable_refcnt = 1; | |
eab89f69 MT |
134 | return flags; |
135 | } | |
136 | ||
137 | static void clk_enable_unlock(unsigned long flags) | |
a57aa185 | 138 | __releases(enable_lock) |
eab89f69 | 139 | { |
533ddeb1 MT |
140 | WARN_ON_ONCE(enable_owner != current); |
141 | WARN_ON_ONCE(enable_refcnt == 0); | |
142 | ||
a57aa185 SB |
143 | if (--enable_refcnt) { |
144 | __release(enable_lock); | |
533ddeb1 | 145 | return; |
a57aa185 | 146 | } |
533ddeb1 | 147 | enable_owner = NULL; |
eab89f69 MT |
148 | spin_unlock_irqrestore(&enable_lock, flags); |
149 | } | |
150 | ||
4dff95dc SB |
151 | static bool clk_core_is_prepared(struct clk_core *core) |
152 | { | |
153 | /* | |
154 | * .is_prepared is optional for clocks that can prepare | |
155 | * fall back to software usage counter if it is missing | |
156 | */ | |
157 | if (!core->ops->is_prepared) | |
158 | return core->prepare_count; | |
b2476490 | 159 | |
4dff95dc SB |
160 | return core->ops->is_prepared(core->hw); |
161 | } | |
b2476490 | 162 | |
4dff95dc SB |
163 | static bool clk_core_is_enabled(struct clk_core *core) |
164 | { | |
165 | /* | |
166 | * .is_enabled is only mandatory for clocks that gate | |
167 | * fall back to software usage counter if .is_enabled is missing | |
168 | */ | |
169 | if (!core->ops->is_enabled) | |
170 | return core->enable_count; | |
6b44c854 | 171 | |
4dff95dc SB |
172 | return core->ops->is_enabled(core->hw); |
173 | } | |
6b44c854 | 174 | |
4dff95dc | 175 | static void clk_unprepare_unused_subtree(struct clk_core *core) |
1af599df | 176 | { |
4dff95dc SB |
177 | struct clk_core *child; |
178 | ||
179 | lockdep_assert_held(&prepare_lock); | |
180 | ||
181 | hlist_for_each_entry(child, &core->children, child_node) | |
182 | clk_unprepare_unused_subtree(child); | |
183 | ||
184 | if (core->prepare_count) | |
1af599df PG |
185 | return; |
186 | ||
4dff95dc SB |
187 | if (core->flags & CLK_IGNORE_UNUSED) |
188 | return; | |
189 | ||
190 | if (clk_core_is_prepared(core)) { | |
191 | trace_clk_unprepare(core); | |
192 | if (core->ops->unprepare_unused) | |
193 | core->ops->unprepare_unused(core->hw); | |
194 | else if (core->ops->unprepare) | |
195 | core->ops->unprepare(core->hw); | |
196 | trace_clk_unprepare_complete(core); | |
197 | } | |
1af599df PG |
198 | } |
199 | ||
4dff95dc | 200 | static void clk_disable_unused_subtree(struct clk_core *core) |
1af599df | 201 | { |
035a61c3 | 202 | struct clk_core *child; |
4dff95dc | 203 | unsigned long flags; |
1af599df | 204 | |
4dff95dc | 205 | lockdep_assert_held(&prepare_lock); |
1af599df | 206 | |
4dff95dc SB |
207 | hlist_for_each_entry(child, &core->children, child_node) |
208 | clk_disable_unused_subtree(child); | |
1af599df | 209 | |
4dff95dc SB |
210 | flags = clk_enable_lock(); |
211 | ||
212 | if (core->enable_count) | |
213 | goto unlock_out; | |
214 | ||
215 | if (core->flags & CLK_IGNORE_UNUSED) | |
216 | goto unlock_out; | |
217 | ||
218 | /* | |
219 | * some gate clocks have special needs during the disable-unused | |
220 | * sequence. call .disable_unused if available, otherwise fall | |
221 | * back to .disable | |
222 | */ | |
223 | if (clk_core_is_enabled(core)) { | |
224 | trace_clk_disable(core); | |
225 | if (core->ops->disable_unused) | |
226 | core->ops->disable_unused(core->hw); | |
227 | else if (core->ops->disable) | |
228 | core->ops->disable(core->hw); | |
229 | trace_clk_disable_complete(core); | |
230 | } | |
231 | ||
232 | unlock_out: | |
233 | clk_enable_unlock(flags); | |
1af599df PG |
234 | } |
235 | ||
4dff95dc SB |
236 | static bool clk_ignore_unused; |
237 | static int __init clk_ignore_unused_setup(char *__unused) | |
1af599df | 238 | { |
4dff95dc SB |
239 | clk_ignore_unused = true; |
240 | return 1; | |
241 | } | |
242 | __setup("clk_ignore_unused", clk_ignore_unused_setup); | |
1af599df | 243 | |
4dff95dc SB |
244 | static int clk_disable_unused(void) |
245 | { | |
246 | struct clk_core *core; | |
247 | ||
248 | if (clk_ignore_unused) { | |
249 | pr_warn("clk: Not disabling unused clocks\n"); | |
250 | return 0; | |
251 | } | |
1af599df | 252 | |
eab89f69 | 253 | clk_prepare_lock(); |
1af599df | 254 | |
4dff95dc SB |
255 | hlist_for_each_entry(core, &clk_root_list, child_node) |
256 | clk_disable_unused_subtree(core); | |
257 | ||
258 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
259 | clk_disable_unused_subtree(core); | |
260 | ||
261 | hlist_for_each_entry(core, &clk_root_list, child_node) | |
262 | clk_unprepare_unused_subtree(core); | |
263 | ||
264 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
265 | clk_unprepare_unused_subtree(core); | |
1af599df | 266 | |
eab89f69 | 267 | clk_prepare_unlock(); |
1af599df PG |
268 | |
269 | return 0; | |
270 | } | |
4dff95dc | 271 | late_initcall_sync(clk_disable_unused); |
1af599df | 272 | |
4dff95dc | 273 | /*** helper functions ***/ |
1af599df | 274 | |
b76281cb | 275 | const char *__clk_get_name(const struct clk *clk) |
1af599df | 276 | { |
4dff95dc | 277 | return !clk ? NULL : clk->core->name; |
1af599df | 278 | } |
4dff95dc | 279 | EXPORT_SYMBOL_GPL(__clk_get_name); |
1af599df | 280 | |
e7df6f6e | 281 | const char *clk_hw_get_name(const struct clk_hw *hw) |
1a9c069c SB |
282 | { |
283 | return hw->core->name; | |
284 | } | |
285 | EXPORT_SYMBOL_GPL(clk_hw_get_name); | |
286 | ||
4dff95dc SB |
287 | struct clk_hw *__clk_get_hw(struct clk *clk) |
288 | { | |
289 | return !clk ? NULL : clk->core->hw; | |
290 | } | |
291 | EXPORT_SYMBOL_GPL(__clk_get_hw); | |
1af599df | 292 | |
e7df6f6e | 293 | unsigned int clk_hw_get_num_parents(const struct clk_hw *hw) |
1a9c069c SB |
294 | { |
295 | return hw->core->num_parents; | |
296 | } | |
297 | EXPORT_SYMBOL_GPL(clk_hw_get_num_parents); | |
298 | ||
e7df6f6e | 299 | struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw) |
1a9c069c SB |
300 | { |
301 | return hw->core->parent ? hw->core->parent->hw : NULL; | |
302 | } | |
303 | EXPORT_SYMBOL_GPL(clk_hw_get_parent); | |
304 | ||
4dff95dc SB |
305 | static struct clk_core *__clk_lookup_subtree(const char *name, |
306 | struct clk_core *core) | |
bddca894 | 307 | { |
035a61c3 | 308 | struct clk_core *child; |
4dff95dc | 309 | struct clk_core *ret; |
bddca894 | 310 | |
4dff95dc SB |
311 | if (!strcmp(core->name, name)) |
312 | return core; | |
bddca894 | 313 | |
4dff95dc SB |
314 | hlist_for_each_entry(child, &core->children, child_node) { |
315 | ret = __clk_lookup_subtree(name, child); | |
316 | if (ret) | |
317 | return ret; | |
bddca894 PG |
318 | } |
319 | ||
4dff95dc | 320 | return NULL; |
bddca894 PG |
321 | } |
322 | ||
4dff95dc | 323 | static struct clk_core *clk_core_lookup(const char *name) |
bddca894 | 324 | { |
4dff95dc SB |
325 | struct clk_core *root_clk; |
326 | struct clk_core *ret; | |
bddca894 | 327 | |
4dff95dc SB |
328 | if (!name) |
329 | return NULL; | |
bddca894 | 330 | |
4dff95dc SB |
331 | /* search the 'proper' clk tree first */ |
332 | hlist_for_each_entry(root_clk, &clk_root_list, child_node) { | |
333 | ret = __clk_lookup_subtree(name, root_clk); | |
334 | if (ret) | |
335 | return ret; | |
bddca894 PG |
336 | } |
337 | ||
4dff95dc SB |
338 | /* if not found, then search the orphan tree */ |
339 | hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) { | |
340 | ret = __clk_lookup_subtree(name, root_clk); | |
341 | if (ret) | |
342 | return ret; | |
343 | } | |
bddca894 | 344 | |
4dff95dc | 345 | return NULL; |
bddca894 PG |
346 | } |
347 | ||
4dff95dc SB |
348 | static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core, |
349 | u8 index) | |
bddca894 | 350 | { |
4dff95dc SB |
351 | if (!core || index >= core->num_parents) |
352 | return NULL; | |
88cfbef2 MY |
353 | |
354 | if (!core->parents[index]) | |
355 | core->parents[index] = | |
356 | clk_core_lookup(core->parent_names[index]); | |
357 | ||
358 | return core->parents[index]; | |
bddca894 PG |
359 | } |
360 | ||
e7df6f6e SB |
361 | struct clk_hw * |
362 | clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index) | |
1a9c069c SB |
363 | { |
364 | struct clk_core *parent; | |
365 | ||
366 | parent = clk_core_get_parent_by_index(hw->core, index); | |
367 | ||
368 | return !parent ? NULL : parent->hw; | |
369 | } | |
370 | EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index); | |
371 | ||
4dff95dc SB |
372 | unsigned int __clk_get_enable_count(struct clk *clk) |
373 | { | |
374 | return !clk ? 0 : clk->core->enable_count; | |
375 | } | |
b2476490 | 376 | |
4dff95dc SB |
377 | static unsigned long clk_core_get_rate_nolock(struct clk_core *core) |
378 | { | |
379 | unsigned long ret; | |
b2476490 | 380 | |
4dff95dc SB |
381 | if (!core) { |
382 | ret = 0; | |
383 | goto out; | |
384 | } | |
b2476490 | 385 | |
4dff95dc | 386 | ret = core->rate; |
b2476490 | 387 | |
47b0eeb3 | 388 | if (!core->num_parents) |
4dff95dc | 389 | goto out; |
c646cbf1 | 390 | |
4dff95dc SB |
391 | if (!core->parent) |
392 | ret = 0; | |
b2476490 | 393 | |
b2476490 MT |
394 | out: |
395 | return ret; | |
396 | } | |
397 | ||
e7df6f6e | 398 | unsigned long clk_hw_get_rate(const struct clk_hw *hw) |
1a9c069c SB |
399 | { |
400 | return clk_core_get_rate_nolock(hw->core); | |
401 | } | |
402 | EXPORT_SYMBOL_GPL(clk_hw_get_rate); | |
403 | ||
4dff95dc SB |
404 | static unsigned long __clk_get_accuracy(struct clk_core *core) |
405 | { | |
406 | if (!core) | |
407 | return 0; | |
b2476490 | 408 | |
4dff95dc | 409 | return core->accuracy; |
b2476490 MT |
410 | } |
411 | ||
4dff95dc | 412 | unsigned long __clk_get_flags(struct clk *clk) |
fcb0ee6a | 413 | { |
4dff95dc | 414 | return !clk ? 0 : clk->core->flags; |
fcb0ee6a | 415 | } |
4dff95dc | 416 | EXPORT_SYMBOL_GPL(__clk_get_flags); |
fcb0ee6a | 417 | |
e7df6f6e | 418 | unsigned long clk_hw_get_flags(const struct clk_hw *hw) |
1a9c069c SB |
419 | { |
420 | return hw->core->flags; | |
421 | } | |
422 | EXPORT_SYMBOL_GPL(clk_hw_get_flags); | |
423 | ||
e7df6f6e | 424 | bool clk_hw_is_prepared(const struct clk_hw *hw) |
1a9c069c SB |
425 | { |
426 | return clk_core_is_prepared(hw->core); | |
427 | } | |
428 | ||
be68bf88 JE |
429 | bool clk_hw_is_enabled(const struct clk_hw *hw) |
430 | { | |
431 | return clk_core_is_enabled(hw->core); | |
432 | } | |
433 | ||
4dff95dc | 434 | bool __clk_is_enabled(struct clk *clk) |
b2476490 | 435 | { |
4dff95dc SB |
436 | if (!clk) |
437 | return false; | |
b2476490 | 438 | |
4dff95dc SB |
439 | return clk_core_is_enabled(clk->core); |
440 | } | |
441 | EXPORT_SYMBOL_GPL(__clk_is_enabled); | |
b2476490 | 442 | |
4dff95dc SB |
443 | static bool mux_is_better_rate(unsigned long rate, unsigned long now, |
444 | unsigned long best, unsigned long flags) | |
445 | { | |
446 | if (flags & CLK_MUX_ROUND_CLOSEST) | |
447 | return abs(now - rate) < abs(best - rate); | |
1af599df | 448 | |
4dff95dc SB |
449 | return now <= rate && now > best; |
450 | } | |
bddca894 | 451 | |
0817b62c BB |
452 | static int |
453 | clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req, | |
4dff95dc SB |
454 | unsigned long flags) |
455 | { | |
456 | struct clk_core *core = hw->core, *parent, *best_parent = NULL; | |
0817b62c BB |
457 | int i, num_parents, ret; |
458 | unsigned long best = 0; | |
459 | struct clk_rate_request parent_req = *req; | |
b2476490 | 460 | |
4dff95dc SB |
461 | /* if NO_REPARENT flag set, pass through to current parent */ |
462 | if (core->flags & CLK_SET_RATE_NO_REPARENT) { | |
463 | parent = core->parent; | |
0817b62c BB |
464 | if (core->flags & CLK_SET_RATE_PARENT) { |
465 | ret = __clk_determine_rate(parent ? parent->hw : NULL, | |
466 | &parent_req); | |
467 | if (ret) | |
468 | return ret; | |
469 | ||
470 | best = parent_req.rate; | |
471 | } else if (parent) { | |
4dff95dc | 472 | best = clk_core_get_rate_nolock(parent); |
0817b62c | 473 | } else { |
4dff95dc | 474 | best = clk_core_get_rate_nolock(core); |
0817b62c BB |
475 | } |
476 | ||
4dff95dc SB |
477 | goto out; |
478 | } | |
b2476490 | 479 | |
4dff95dc SB |
480 | /* find the parent that can provide the fastest rate <= rate */ |
481 | num_parents = core->num_parents; | |
482 | for (i = 0; i < num_parents; i++) { | |
483 | parent = clk_core_get_parent_by_index(core, i); | |
484 | if (!parent) | |
485 | continue; | |
0817b62c BB |
486 | |
487 | if (core->flags & CLK_SET_RATE_PARENT) { | |
488 | parent_req = *req; | |
489 | ret = __clk_determine_rate(parent->hw, &parent_req); | |
490 | if (ret) | |
491 | continue; | |
492 | } else { | |
493 | parent_req.rate = clk_core_get_rate_nolock(parent); | |
494 | } | |
495 | ||
496 | if (mux_is_better_rate(req->rate, parent_req.rate, | |
497 | best, flags)) { | |
4dff95dc | 498 | best_parent = parent; |
0817b62c | 499 | best = parent_req.rate; |
4dff95dc SB |
500 | } |
501 | } | |
b2476490 | 502 | |
57d866e6 BB |
503 | if (!best_parent) |
504 | return -EINVAL; | |
505 | ||
4dff95dc SB |
506 | out: |
507 | if (best_parent) | |
0817b62c BB |
508 | req->best_parent_hw = best_parent->hw; |
509 | req->best_parent_rate = best; | |
510 | req->rate = best; | |
b2476490 | 511 | |
0817b62c | 512 | return 0; |
b33d212f | 513 | } |
4dff95dc SB |
514 | |
515 | struct clk *__clk_lookup(const char *name) | |
fcb0ee6a | 516 | { |
4dff95dc SB |
517 | struct clk_core *core = clk_core_lookup(name); |
518 | ||
519 | return !core ? NULL : core->hw->clk; | |
fcb0ee6a | 520 | } |
b2476490 | 521 | |
4dff95dc SB |
522 | static void clk_core_get_boundaries(struct clk_core *core, |
523 | unsigned long *min_rate, | |
524 | unsigned long *max_rate) | |
1c155b3d | 525 | { |
4dff95dc | 526 | struct clk *clk_user; |
1c155b3d | 527 | |
9783c0d9 SB |
528 | *min_rate = core->min_rate; |
529 | *max_rate = core->max_rate; | |
496eadf8 | 530 | |
4dff95dc SB |
531 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
532 | *min_rate = max(*min_rate, clk_user->min_rate); | |
1c155b3d | 533 | |
4dff95dc SB |
534 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
535 | *max_rate = min(*max_rate, clk_user->max_rate); | |
536 | } | |
1c155b3d | 537 | |
9783c0d9 SB |
538 | void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate, |
539 | unsigned long max_rate) | |
540 | { | |
541 | hw->core->min_rate = min_rate; | |
542 | hw->core->max_rate = max_rate; | |
543 | } | |
544 | EXPORT_SYMBOL_GPL(clk_hw_set_rate_range); | |
545 | ||
4dff95dc SB |
546 | /* |
547 | * Helper for finding best parent to provide a given frequency. This can be used | |
548 | * directly as a determine_rate callback (e.g. for a mux), or from a more | |
549 | * complex clock that may combine a mux with other operations. | |
550 | */ | |
0817b62c BB |
551 | int __clk_mux_determine_rate(struct clk_hw *hw, |
552 | struct clk_rate_request *req) | |
4dff95dc | 553 | { |
0817b62c | 554 | return clk_mux_determine_rate_flags(hw, req, 0); |
1c155b3d | 555 | } |
4dff95dc | 556 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); |
1c155b3d | 557 | |
0817b62c BB |
558 | int __clk_mux_determine_rate_closest(struct clk_hw *hw, |
559 | struct clk_rate_request *req) | |
b2476490 | 560 | { |
0817b62c | 561 | return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST); |
4dff95dc SB |
562 | } |
563 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); | |
b2476490 | 564 | |
4dff95dc | 565 | /*** clk api ***/ |
496eadf8 | 566 | |
4dff95dc SB |
567 | static void clk_core_unprepare(struct clk_core *core) |
568 | { | |
a6334725 SB |
569 | lockdep_assert_held(&prepare_lock); |
570 | ||
4dff95dc SB |
571 | if (!core) |
572 | return; | |
b2476490 | 573 | |
4dff95dc SB |
574 | if (WARN_ON(core->prepare_count == 0)) |
575 | return; | |
b2476490 | 576 | |
2e20fbf5 LJ |
577 | if (WARN_ON(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL)) |
578 | return; | |
579 | ||
4dff95dc SB |
580 | if (--core->prepare_count > 0) |
581 | return; | |
b2476490 | 582 | |
4dff95dc | 583 | WARN_ON(core->enable_count > 0); |
b2476490 | 584 | |
4dff95dc | 585 | trace_clk_unprepare(core); |
b2476490 | 586 | |
4dff95dc SB |
587 | if (core->ops->unprepare) |
588 | core->ops->unprepare(core->hw); | |
589 | ||
590 | trace_clk_unprepare_complete(core); | |
591 | clk_core_unprepare(core->parent); | |
b2476490 MT |
592 | } |
593 | ||
4dff95dc SB |
594 | /** |
595 | * clk_unprepare - undo preparation of a clock source | |
596 | * @clk: the clk being unprepared | |
597 | * | |
598 | * clk_unprepare may sleep, which differentiates it from clk_disable. In a | |
599 | * simple case, clk_unprepare can be used instead of clk_disable to gate a clk | |
600 | * if the operation may sleep. One example is a clk which is accessed over | |
601 | * I2c. In the complex case a clk gate operation may require a fast and a slow | |
602 | * part. It is this reason that clk_unprepare and clk_disable are not mutually | |
603 | * exclusive. In fact clk_disable must be called before clk_unprepare. | |
604 | */ | |
605 | void clk_unprepare(struct clk *clk) | |
1e435256 | 606 | { |
4dff95dc SB |
607 | if (IS_ERR_OR_NULL(clk)) |
608 | return; | |
609 | ||
610 | clk_prepare_lock(); | |
611 | clk_core_unprepare(clk->core); | |
612 | clk_prepare_unlock(); | |
1e435256 | 613 | } |
4dff95dc | 614 | EXPORT_SYMBOL_GPL(clk_unprepare); |
1e435256 | 615 | |
4dff95dc | 616 | static int clk_core_prepare(struct clk_core *core) |
b2476490 | 617 | { |
4dff95dc | 618 | int ret = 0; |
b2476490 | 619 | |
a6334725 SB |
620 | lockdep_assert_held(&prepare_lock); |
621 | ||
4dff95dc | 622 | if (!core) |
1e435256 | 623 | return 0; |
1e435256 | 624 | |
4dff95dc SB |
625 | if (core->prepare_count == 0) { |
626 | ret = clk_core_prepare(core->parent); | |
627 | if (ret) | |
628 | return ret; | |
b2476490 | 629 | |
4dff95dc | 630 | trace_clk_prepare(core); |
b2476490 | 631 | |
4dff95dc SB |
632 | if (core->ops->prepare) |
633 | ret = core->ops->prepare(core->hw); | |
b2476490 | 634 | |
4dff95dc | 635 | trace_clk_prepare_complete(core); |
1c155b3d | 636 | |
4dff95dc SB |
637 | if (ret) { |
638 | clk_core_unprepare(core->parent); | |
639 | return ret; | |
640 | } | |
641 | } | |
1c155b3d | 642 | |
4dff95dc | 643 | core->prepare_count++; |
b2476490 MT |
644 | |
645 | return 0; | |
646 | } | |
b2476490 | 647 | |
4dff95dc SB |
648 | /** |
649 | * clk_prepare - prepare a clock source | |
650 | * @clk: the clk being prepared | |
651 | * | |
652 | * clk_prepare may sleep, which differentiates it from clk_enable. In a simple | |
653 | * case, clk_prepare can be used instead of clk_enable to ungate a clk if the | |
654 | * operation may sleep. One example is a clk which is accessed over I2c. In | |
655 | * the complex case a clk ungate operation may require a fast and a slow part. | |
656 | * It is this reason that clk_prepare and clk_enable are not mutually | |
657 | * exclusive. In fact clk_prepare must be called before clk_enable. | |
658 | * Returns 0 on success, -EERROR otherwise. | |
659 | */ | |
660 | int clk_prepare(struct clk *clk) | |
b2476490 | 661 | { |
4dff95dc | 662 | int ret; |
b2476490 | 663 | |
4dff95dc SB |
664 | if (!clk) |
665 | return 0; | |
b2476490 | 666 | |
4dff95dc SB |
667 | clk_prepare_lock(); |
668 | ret = clk_core_prepare(clk->core); | |
669 | clk_prepare_unlock(); | |
670 | ||
671 | return ret; | |
b2476490 | 672 | } |
4dff95dc | 673 | EXPORT_SYMBOL_GPL(clk_prepare); |
b2476490 | 674 | |
4dff95dc | 675 | static void clk_core_disable(struct clk_core *core) |
b2476490 | 676 | { |
a6334725 SB |
677 | lockdep_assert_held(&enable_lock); |
678 | ||
4dff95dc SB |
679 | if (!core) |
680 | return; | |
035a61c3 | 681 | |
4dff95dc SB |
682 | if (WARN_ON(core->enable_count == 0)) |
683 | return; | |
b2476490 | 684 | |
2e20fbf5 LJ |
685 | if (WARN_ON(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL)) |
686 | return; | |
687 | ||
4dff95dc SB |
688 | if (--core->enable_count > 0) |
689 | return; | |
035a61c3 | 690 | |
4dff95dc | 691 | trace_clk_disable(core); |
035a61c3 | 692 | |
4dff95dc SB |
693 | if (core->ops->disable) |
694 | core->ops->disable(core->hw); | |
035a61c3 | 695 | |
4dff95dc | 696 | trace_clk_disable_complete(core); |
035a61c3 | 697 | |
4dff95dc | 698 | clk_core_disable(core->parent); |
035a61c3 | 699 | } |
7ef3dcc8 | 700 | |
4dff95dc SB |
701 | /** |
702 | * clk_disable - gate a clock | |
703 | * @clk: the clk being gated | |
704 | * | |
705 | * clk_disable must not sleep, which differentiates it from clk_unprepare. In | |
706 | * a simple case, clk_disable can be used instead of clk_unprepare to gate a | |
707 | * clk if the operation is fast and will never sleep. One example is a | |
708 | * SoC-internal clk which is controlled via simple register writes. In the | |
709 | * complex case a clk gate operation may require a fast and a slow part. It is | |
710 | * this reason that clk_unprepare and clk_disable are not mutually exclusive. | |
711 | * In fact clk_disable must be called before clk_unprepare. | |
712 | */ | |
713 | void clk_disable(struct clk *clk) | |
b2476490 | 714 | { |
4dff95dc SB |
715 | unsigned long flags; |
716 | ||
717 | if (IS_ERR_OR_NULL(clk)) | |
718 | return; | |
719 | ||
720 | flags = clk_enable_lock(); | |
721 | clk_core_disable(clk->core); | |
722 | clk_enable_unlock(flags); | |
b2476490 | 723 | } |
4dff95dc | 724 | EXPORT_SYMBOL_GPL(clk_disable); |
b2476490 | 725 | |
4dff95dc | 726 | static int clk_core_enable(struct clk_core *core) |
b2476490 | 727 | { |
4dff95dc | 728 | int ret = 0; |
b2476490 | 729 | |
a6334725 SB |
730 | lockdep_assert_held(&enable_lock); |
731 | ||
4dff95dc SB |
732 | if (!core) |
733 | return 0; | |
b2476490 | 734 | |
4dff95dc SB |
735 | if (WARN_ON(core->prepare_count == 0)) |
736 | return -ESHUTDOWN; | |
b2476490 | 737 | |
4dff95dc SB |
738 | if (core->enable_count == 0) { |
739 | ret = clk_core_enable(core->parent); | |
b2476490 | 740 | |
4dff95dc SB |
741 | if (ret) |
742 | return ret; | |
b2476490 | 743 | |
4dff95dc | 744 | trace_clk_enable(core); |
035a61c3 | 745 | |
4dff95dc SB |
746 | if (core->ops->enable) |
747 | ret = core->ops->enable(core->hw); | |
035a61c3 | 748 | |
4dff95dc SB |
749 | trace_clk_enable_complete(core); |
750 | ||
751 | if (ret) { | |
752 | clk_core_disable(core->parent); | |
753 | return ret; | |
754 | } | |
755 | } | |
756 | ||
757 | core->enable_count++; | |
758 | return 0; | |
035a61c3 | 759 | } |
b2476490 | 760 | |
4dff95dc SB |
761 | /** |
762 | * clk_enable - ungate a clock | |
763 | * @clk: the clk being ungated | |
764 | * | |
765 | * clk_enable must not sleep, which differentiates it from clk_prepare. In a | |
766 | * simple case, clk_enable can be used instead of clk_prepare to ungate a clk | |
767 | * if the operation will never sleep. One example is a SoC-internal clk which | |
768 | * is controlled via simple register writes. In the complex case a clk ungate | |
769 | * operation may require a fast and a slow part. It is this reason that | |
770 | * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare | |
771 | * must be called before clk_enable. Returns 0 on success, -EERROR | |
772 | * otherwise. | |
773 | */ | |
774 | int clk_enable(struct clk *clk) | |
5279fc40 | 775 | { |
4dff95dc SB |
776 | unsigned long flags; |
777 | int ret; | |
778 | ||
779 | if (!clk) | |
5279fc40 BB |
780 | return 0; |
781 | ||
4dff95dc SB |
782 | flags = clk_enable_lock(); |
783 | ret = clk_core_enable(clk->core); | |
784 | clk_enable_unlock(flags); | |
5279fc40 | 785 | |
4dff95dc | 786 | return ret; |
b2476490 | 787 | } |
4dff95dc | 788 | EXPORT_SYMBOL_GPL(clk_enable); |
b2476490 | 789 | |
0817b62c BB |
790 | static int clk_core_round_rate_nolock(struct clk_core *core, |
791 | struct clk_rate_request *req) | |
3d6ee287 | 792 | { |
4dff95dc | 793 | struct clk_core *parent; |
0817b62c | 794 | long rate; |
4dff95dc SB |
795 | |
796 | lockdep_assert_held(&prepare_lock); | |
3d6ee287 | 797 | |
d6968fca | 798 | if (!core) |
4dff95dc | 799 | return 0; |
3d6ee287 | 800 | |
4dff95dc | 801 | parent = core->parent; |
0817b62c BB |
802 | if (parent) { |
803 | req->best_parent_hw = parent->hw; | |
804 | req->best_parent_rate = parent->rate; | |
805 | } else { | |
806 | req->best_parent_hw = NULL; | |
807 | req->best_parent_rate = 0; | |
808 | } | |
3d6ee287 | 809 | |
4dff95dc | 810 | if (core->ops->determine_rate) { |
0817b62c BB |
811 | return core->ops->determine_rate(core->hw, req); |
812 | } else if (core->ops->round_rate) { | |
813 | rate = core->ops->round_rate(core->hw, req->rate, | |
814 | &req->best_parent_rate); | |
815 | if (rate < 0) | |
816 | return rate; | |
817 | ||
818 | req->rate = rate; | |
819 | } else if (core->flags & CLK_SET_RATE_PARENT) { | |
820 | return clk_core_round_rate_nolock(parent, req); | |
821 | } else { | |
822 | req->rate = core->rate; | |
823 | } | |
824 | ||
825 | return 0; | |
3d6ee287 UH |
826 | } |
827 | ||
4dff95dc SB |
828 | /** |
829 | * __clk_determine_rate - get the closest rate actually supported by a clock | |
830 | * @hw: determine the rate of this clock | |
831 | * @rate: target rate | |
832 | * @min_rate: returned rate must be greater than this rate | |
833 | * @max_rate: returned rate must be less than this rate | |
834 | * | |
6e5ab41b | 835 | * Useful for clk_ops such as .set_rate and .determine_rate. |
4dff95dc | 836 | */ |
0817b62c | 837 | int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) |
035a61c3 | 838 | { |
0817b62c BB |
839 | if (!hw) { |
840 | req->rate = 0; | |
4dff95dc | 841 | return 0; |
0817b62c | 842 | } |
035a61c3 | 843 | |
0817b62c | 844 | return clk_core_round_rate_nolock(hw->core, req); |
035a61c3 | 845 | } |
4dff95dc | 846 | EXPORT_SYMBOL_GPL(__clk_determine_rate); |
035a61c3 | 847 | |
1a9c069c SB |
848 | unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate) |
849 | { | |
850 | int ret; | |
851 | struct clk_rate_request req; | |
852 | ||
853 | clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate); | |
854 | req.rate = rate; | |
855 | ||
856 | ret = clk_core_round_rate_nolock(hw->core, &req); | |
857 | if (ret) | |
858 | return 0; | |
859 | ||
860 | return req.rate; | |
861 | } | |
862 | EXPORT_SYMBOL_GPL(clk_hw_round_rate); | |
863 | ||
4dff95dc SB |
864 | /** |
865 | * clk_round_rate - round the given rate for a clk | |
866 | * @clk: the clk for which we are rounding a rate | |
867 | * @rate: the rate which is to be rounded | |
868 | * | |
869 | * Takes in a rate as input and rounds it to a rate that the clk can actually | |
870 | * use which is then returned. If clk doesn't support round_rate operation | |
871 | * then the parent rate is returned. | |
872 | */ | |
873 | long clk_round_rate(struct clk *clk, unsigned long rate) | |
035a61c3 | 874 | { |
fc4a05d4 SB |
875 | struct clk_rate_request req; |
876 | int ret; | |
4dff95dc | 877 | |
035a61c3 | 878 | if (!clk) |
4dff95dc | 879 | return 0; |
035a61c3 | 880 | |
4dff95dc | 881 | clk_prepare_lock(); |
fc4a05d4 SB |
882 | |
883 | clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate); | |
884 | req.rate = rate; | |
885 | ||
886 | ret = clk_core_round_rate_nolock(clk->core, &req); | |
4dff95dc SB |
887 | clk_prepare_unlock(); |
888 | ||
fc4a05d4 SB |
889 | if (ret) |
890 | return ret; | |
891 | ||
892 | return req.rate; | |
035a61c3 | 893 | } |
4dff95dc | 894 | EXPORT_SYMBOL_GPL(clk_round_rate); |
b2476490 | 895 | |
4dff95dc SB |
896 | /** |
897 | * __clk_notify - call clk notifier chain | |
898 | * @core: clk that is changing rate | |
899 | * @msg: clk notifier type (see include/linux/clk.h) | |
900 | * @old_rate: old clk rate | |
901 | * @new_rate: new clk rate | |
902 | * | |
903 | * Triggers a notifier call chain on the clk rate-change notification | |
904 | * for 'clk'. Passes a pointer to the struct clk and the previous | |
905 | * and current rates to the notifier callback. Intended to be called by | |
906 | * internal clock code only. Returns NOTIFY_DONE from the last driver | |
907 | * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if | |
908 | * a driver returns that. | |
909 | */ | |
910 | static int __clk_notify(struct clk_core *core, unsigned long msg, | |
911 | unsigned long old_rate, unsigned long new_rate) | |
b2476490 | 912 | { |
4dff95dc SB |
913 | struct clk_notifier *cn; |
914 | struct clk_notifier_data cnd; | |
915 | int ret = NOTIFY_DONE; | |
b2476490 | 916 | |
4dff95dc SB |
917 | cnd.old_rate = old_rate; |
918 | cnd.new_rate = new_rate; | |
b2476490 | 919 | |
4dff95dc SB |
920 | list_for_each_entry(cn, &clk_notifier_list, node) { |
921 | if (cn->clk->core == core) { | |
922 | cnd.clk = cn->clk; | |
923 | ret = srcu_notifier_call_chain(&cn->notifier_head, msg, | |
924 | &cnd); | |
925 | } | |
b2476490 MT |
926 | } |
927 | ||
4dff95dc | 928 | return ret; |
b2476490 MT |
929 | } |
930 | ||
4dff95dc SB |
931 | /** |
932 | * __clk_recalc_accuracies | |
933 | * @core: first clk in the subtree | |
934 | * | |
935 | * Walks the subtree of clks starting with clk and recalculates accuracies as | |
936 | * it goes. Note that if a clk does not implement the .recalc_accuracy | |
6e5ab41b | 937 | * callback then it is assumed that the clock will take on the accuracy of its |
4dff95dc | 938 | * parent. |
4dff95dc SB |
939 | */ |
940 | static void __clk_recalc_accuracies(struct clk_core *core) | |
b2476490 | 941 | { |
4dff95dc SB |
942 | unsigned long parent_accuracy = 0; |
943 | struct clk_core *child; | |
b2476490 | 944 | |
4dff95dc | 945 | lockdep_assert_held(&prepare_lock); |
b2476490 | 946 | |
4dff95dc SB |
947 | if (core->parent) |
948 | parent_accuracy = core->parent->accuracy; | |
b2476490 | 949 | |
4dff95dc SB |
950 | if (core->ops->recalc_accuracy) |
951 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
952 | parent_accuracy); | |
953 | else | |
954 | core->accuracy = parent_accuracy; | |
b2476490 | 955 | |
4dff95dc SB |
956 | hlist_for_each_entry(child, &core->children, child_node) |
957 | __clk_recalc_accuracies(child); | |
b2476490 MT |
958 | } |
959 | ||
4dff95dc | 960 | static long clk_core_get_accuracy(struct clk_core *core) |
e366fdd7 | 961 | { |
4dff95dc | 962 | unsigned long accuracy; |
15a02c1f | 963 | |
4dff95dc SB |
964 | clk_prepare_lock(); |
965 | if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE)) | |
966 | __clk_recalc_accuracies(core); | |
15a02c1f | 967 | |
4dff95dc SB |
968 | accuracy = __clk_get_accuracy(core); |
969 | clk_prepare_unlock(); | |
e366fdd7 | 970 | |
4dff95dc | 971 | return accuracy; |
e366fdd7 | 972 | } |
15a02c1f | 973 | |
4dff95dc SB |
974 | /** |
975 | * clk_get_accuracy - return the accuracy of clk | |
976 | * @clk: the clk whose accuracy is being returned | |
977 | * | |
978 | * Simply returns the cached accuracy of the clk, unless | |
979 | * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be | |
980 | * issued. | |
981 | * If clk is NULL then returns 0. | |
982 | */ | |
983 | long clk_get_accuracy(struct clk *clk) | |
035a61c3 | 984 | { |
4dff95dc SB |
985 | if (!clk) |
986 | return 0; | |
035a61c3 | 987 | |
4dff95dc | 988 | return clk_core_get_accuracy(clk->core); |
035a61c3 | 989 | } |
4dff95dc | 990 | EXPORT_SYMBOL_GPL(clk_get_accuracy); |
035a61c3 | 991 | |
4dff95dc SB |
992 | static unsigned long clk_recalc(struct clk_core *core, |
993 | unsigned long parent_rate) | |
1c8e6004 | 994 | { |
4dff95dc SB |
995 | if (core->ops->recalc_rate) |
996 | return core->ops->recalc_rate(core->hw, parent_rate); | |
997 | return parent_rate; | |
1c8e6004 TV |
998 | } |
999 | ||
4dff95dc SB |
1000 | /** |
1001 | * __clk_recalc_rates | |
1002 | * @core: first clk in the subtree | |
1003 | * @msg: notification type (see include/linux/clk.h) | |
1004 | * | |
1005 | * Walks the subtree of clks starting with clk and recalculates rates as it | |
1006 | * goes. Note that if a clk does not implement the .recalc_rate callback then | |
1007 | * it is assumed that the clock will take on the rate of its parent. | |
1008 | * | |
1009 | * clk_recalc_rates also propagates the POST_RATE_CHANGE notification, | |
1010 | * if necessary. | |
15a02c1f | 1011 | */ |
4dff95dc | 1012 | static void __clk_recalc_rates(struct clk_core *core, unsigned long msg) |
15a02c1f | 1013 | { |
4dff95dc SB |
1014 | unsigned long old_rate; |
1015 | unsigned long parent_rate = 0; | |
1016 | struct clk_core *child; | |
e366fdd7 | 1017 | |
4dff95dc | 1018 | lockdep_assert_held(&prepare_lock); |
15a02c1f | 1019 | |
4dff95dc | 1020 | old_rate = core->rate; |
b2476490 | 1021 | |
4dff95dc SB |
1022 | if (core->parent) |
1023 | parent_rate = core->parent->rate; | |
b2476490 | 1024 | |
4dff95dc | 1025 | core->rate = clk_recalc(core, parent_rate); |
b2476490 | 1026 | |
4dff95dc SB |
1027 | /* |
1028 | * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE | |
1029 | * & ABORT_RATE_CHANGE notifiers | |
1030 | */ | |
1031 | if (core->notifier_count && msg) | |
1032 | __clk_notify(core, msg, old_rate, core->rate); | |
b2476490 | 1033 | |
4dff95dc SB |
1034 | hlist_for_each_entry(child, &core->children, child_node) |
1035 | __clk_recalc_rates(child, msg); | |
1036 | } | |
b2476490 | 1037 | |
4dff95dc SB |
1038 | static unsigned long clk_core_get_rate(struct clk_core *core) |
1039 | { | |
1040 | unsigned long rate; | |
dfc202ea | 1041 | |
4dff95dc | 1042 | clk_prepare_lock(); |
b2476490 | 1043 | |
4dff95dc SB |
1044 | if (core && (core->flags & CLK_GET_RATE_NOCACHE)) |
1045 | __clk_recalc_rates(core, 0); | |
1046 | ||
1047 | rate = clk_core_get_rate_nolock(core); | |
1048 | clk_prepare_unlock(); | |
1049 | ||
1050 | return rate; | |
b2476490 MT |
1051 | } |
1052 | ||
1053 | /** | |
4dff95dc SB |
1054 | * clk_get_rate - return the rate of clk |
1055 | * @clk: the clk whose rate is being returned | |
b2476490 | 1056 | * |
4dff95dc SB |
1057 | * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag |
1058 | * is set, which means a recalc_rate will be issued. | |
1059 | * If clk is NULL then returns 0. | |
b2476490 | 1060 | */ |
4dff95dc | 1061 | unsigned long clk_get_rate(struct clk *clk) |
b2476490 | 1062 | { |
4dff95dc SB |
1063 | if (!clk) |
1064 | return 0; | |
63589e92 | 1065 | |
4dff95dc | 1066 | return clk_core_get_rate(clk->core); |
b2476490 | 1067 | } |
4dff95dc | 1068 | EXPORT_SYMBOL_GPL(clk_get_rate); |
b2476490 | 1069 | |
4dff95dc SB |
1070 | static int clk_fetch_parent_index(struct clk_core *core, |
1071 | struct clk_core *parent) | |
b2476490 | 1072 | { |
4dff95dc | 1073 | int i; |
b2476490 | 1074 | |
508f884a MY |
1075 | if (!parent) |
1076 | return -EINVAL; | |
1077 | ||
470b5e2f MY |
1078 | for (i = 0; i < core->num_parents; i++) |
1079 | if (clk_core_get_parent_by_index(core, i) == parent) | |
4dff95dc | 1080 | return i; |
b2476490 | 1081 | |
4dff95dc | 1082 | return -EINVAL; |
b2476490 MT |
1083 | } |
1084 | ||
e6500344 HS |
1085 | /* |
1086 | * Update the orphan status of @core and all its children. | |
1087 | */ | |
1088 | static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan) | |
1089 | { | |
1090 | struct clk_core *child; | |
1091 | ||
1092 | core->orphan = is_orphan; | |
1093 | ||
1094 | hlist_for_each_entry(child, &core->children, child_node) | |
1095 | clk_core_update_orphan_status(child, is_orphan); | |
1096 | } | |
1097 | ||
4dff95dc | 1098 | static void clk_reparent(struct clk_core *core, struct clk_core *new_parent) |
b2476490 | 1099 | { |
e6500344 HS |
1100 | bool was_orphan = core->orphan; |
1101 | ||
4dff95dc | 1102 | hlist_del(&core->child_node); |
035a61c3 | 1103 | |
4dff95dc | 1104 | if (new_parent) { |
e6500344 HS |
1105 | bool becomes_orphan = new_parent->orphan; |
1106 | ||
4dff95dc SB |
1107 | /* avoid duplicate POST_RATE_CHANGE notifications */ |
1108 | if (new_parent->new_child == core) | |
1109 | new_parent->new_child = NULL; | |
b2476490 | 1110 | |
4dff95dc | 1111 | hlist_add_head(&core->child_node, &new_parent->children); |
e6500344 HS |
1112 | |
1113 | if (was_orphan != becomes_orphan) | |
1114 | clk_core_update_orphan_status(core, becomes_orphan); | |
4dff95dc SB |
1115 | } else { |
1116 | hlist_add_head(&core->child_node, &clk_orphan_list); | |
e6500344 HS |
1117 | if (!was_orphan) |
1118 | clk_core_update_orphan_status(core, true); | |
4dff95dc | 1119 | } |
dfc202ea | 1120 | |
4dff95dc | 1121 | core->parent = new_parent; |
035a61c3 TV |
1122 | } |
1123 | ||
4dff95dc SB |
1124 | static struct clk_core *__clk_set_parent_before(struct clk_core *core, |
1125 | struct clk_core *parent) | |
b2476490 MT |
1126 | { |
1127 | unsigned long flags; | |
4dff95dc | 1128 | struct clk_core *old_parent = core->parent; |
b2476490 | 1129 | |
4dff95dc SB |
1130 | /* |
1131 | * Migrate prepare state between parents and prevent race with | |
1132 | * clk_enable(). | |
1133 | * | |
1134 | * If the clock is not prepared, then a race with | |
1135 | * clk_enable/disable() is impossible since we already have the | |
1136 | * prepare lock (future calls to clk_enable() need to be preceded by | |
1137 | * a clk_prepare()). | |
1138 | * | |
1139 | * If the clock is prepared, migrate the prepared state to the new | |
1140 | * parent and also protect against a race with clk_enable() by | |
1141 | * forcing the clock and the new parent on. This ensures that all | |
1142 | * future calls to clk_enable() are practically NOPs with respect to | |
1143 | * hardware and software states. | |
1144 | * | |
1145 | * See also: Comment for clk_set_parent() below. | |
1146 | */ | |
1147 | if (core->prepare_count) { | |
1148 | clk_core_prepare(parent); | |
d2a5d46b | 1149 | flags = clk_enable_lock(); |
4dff95dc SB |
1150 | clk_core_enable(parent); |
1151 | clk_core_enable(core); | |
d2a5d46b | 1152 | clk_enable_unlock(flags); |
4dff95dc | 1153 | } |
63589e92 | 1154 | |
4dff95dc | 1155 | /* update the clk tree topology */ |
eab89f69 | 1156 | flags = clk_enable_lock(); |
4dff95dc | 1157 | clk_reparent(core, parent); |
eab89f69 | 1158 | clk_enable_unlock(flags); |
4dff95dc SB |
1159 | |
1160 | return old_parent; | |
b2476490 | 1161 | } |
b2476490 | 1162 | |
4dff95dc SB |
1163 | static void __clk_set_parent_after(struct clk_core *core, |
1164 | struct clk_core *parent, | |
1165 | struct clk_core *old_parent) | |
b2476490 | 1166 | { |
d2a5d46b DA |
1167 | unsigned long flags; |
1168 | ||
4dff95dc SB |
1169 | /* |
1170 | * Finish the migration of prepare state and undo the changes done | |
1171 | * for preventing a race with clk_enable(). | |
1172 | */ | |
1173 | if (core->prepare_count) { | |
d2a5d46b | 1174 | flags = clk_enable_lock(); |
4dff95dc SB |
1175 | clk_core_disable(core); |
1176 | clk_core_disable(old_parent); | |
d2a5d46b | 1177 | clk_enable_unlock(flags); |
4dff95dc SB |
1178 | clk_core_unprepare(old_parent); |
1179 | } | |
1180 | } | |
b2476490 | 1181 | |
4dff95dc SB |
1182 | static int __clk_set_parent(struct clk_core *core, struct clk_core *parent, |
1183 | u8 p_index) | |
1184 | { | |
1185 | unsigned long flags; | |
1186 | int ret = 0; | |
1187 | struct clk_core *old_parent; | |
b2476490 | 1188 | |
4dff95dc | 1189 | old_parent = __clk_set_parent_before(core, parent); |
b2476490 | 1190 | |
4dff95dc | 1191 | trace_clk_set_parent(core, parent); |
b2476490 | 1192 | |
4dff95dc SB |
1193 | /* change clock input source */ |
1194 | if (parent && core->ops->set_parent) | |
1195 | ret = core->ops->set_parent(core->hw, p_index); | |
dfc202ea | 1196 | |
4dff95dc | 1197 | trace_clk_set_parent_complete(core, parent); |
dfc202ea | 1198 | |
4dff95dc SB |
1199 | if (ret) { |
1200 | flags = clk_enable_lock(); | |
1201 | clk_reparent(core, old_parent); | |
1202 | clk_enable_unlock(flags); | |
c660b2eb | 1203 | __clk_set_parent_after(core, old_parent, parent); |
dfc202ea | 1204 | |
4dff95dc | 1205 | return ret; |
b2476490 MT |
1206 | } |
1207 | ||
4dff95dc SB |
1208 | __clk_set_parent_after(core, parent, old_parent); |
1209 | ||
b2476490 MT |
1210 | return 0; |
1211 | } | |
1212 | ||
1213 | /** | |
4dff95dc SB |
1214 | * __clk_speculate_rates |
1215 | * @core: first clk in the subtree | |
1216 | * @parent_rate: the "future" rate of clk's parent | |
b2476490 | 1217 | * |
4dff95dc SB |
1218 | * Walks the subtree of clks starting with clk, speculating rates as it |
1219 | * goes and firing off PRE_RATE_CHANGE notifications as necessary. | |
1220 | * | |
1221 | * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending | |
1222 | * pre-rate change notifications and returns early if no clks in the | |
1223 | * subtree have subscribed to the notifications. Note that if a clk does not | |
1224 | * implement the .recalc_rate callback then it is assumed that the clock will | |
1225 | * take on the rate of its parent. | |
b2476490 | 1226 | */ |
4dff95dc SB |
1227 | static int __clk_speculate_rates(struct clk_core *core, |
1228 | unsigned long parent_rate) | |
b2476490 | 1229 | { |
4dff95dc SB |
1230 | struct clk_core *child; |
1231 | unsigned long new_rate; | |
1232 | int ret = NOTIFY_DONE; | |
b2476490 | 1233 | |
4dff95dc | 1234 | lockdep_assert_held(&prepare_lock); |
864e160a | 1235 | |
4dff95dc SB |
1236 | new_rate = clk_recalc(core, parent_rate); |
1237 | ||
1238 | /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */ | |
1239 | if (core->notifier_count) | |
1240 | ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate); | |
1241 | ||
1242 | if (ret & NOTIFY_STOP_MASK) { | |
1243 | pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", | |
1244 | __func__, core->name, ret); | |
1245 | goto out; | |
1246 | } | |
1247 | ||
1248 | hlist_for_each_entry(child, &core->children, child_node) { | |
1249 | ret = __clk_speculate_rates(child, new_rate); | |
1250 | if (ret & NOTIFY_STOP_MASK) | |
1251 | break; | |
1252 | } | |
b2476490 | 1253 | |
4dff95dc | 1254 | out: |
b2476490 MT |
1255 | return ret; |
1256 | } | |
b2476490 | 1257 | |
4dff95dc SB |
1258 | static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate, |
1259 | struct clk_core *new_parent, u8 p_index) | |
b2476490 | 1260 | { |
4dff95dc | 1261 | struct clk_core *child; |
b2476490 | 1262 | |
4dff95dc SB |
1263 | core->new_rate = new_rate; |
1264 | core->new_parent = new_parent; | |
1265 | core->new_parent_index = p_index; | |
1266 | /* include clk in new parent's PRE_RATE_CHANGE notifications */ | |
1267 | core->new_child = NULL; | |
1268 | if (new_parent && new_parent != core->parent) | |
1269 | new_parent->new_child = core; | |
496eadf8 | 1270 | |
4dff95dc SB |
1271 | hlist_for_each_entry(child, &core->children, child_node) { |
1272 | child->new_rate = clk_recalc(child, new_rate); | |
1273 | clk_calc_subtree(child, child->new_rate, NULL, 0); | |
1274 | } | |
1275 | } | |
b2476490 | 1276 | |
4dff95dc SB |
1277 | /* |
1278 | * calculate the new rates returning the topmost clock that has to be | |
1279 | * changed. | |
1280 | */ | |
1281 | static struct clk_core *clk_calc_new_rates(struct clk_core *core, | |
1282 | unsigned long rate) | |
1283 | { | |
1284 | struct clk_core *top = core; | |
1285 | struct clk_core *old_parent, *parent; | |
4dff95dc SB |
1286 | unsigned long best_parent_rate = 0; |
1287 | unsigned long new_rate; | |
1288 | unsigned long min_rate; | |
1289 | unsigned long max_rate; | |
1290 | int p_index = 0; | |
1291 | long ret; | |
1292 | ||
1293 | /* sanity */ | |
1294 | if (IS_ERR_OR_NULL(core)) | |
1295 | return NULL; | |
1296 | ||
1297 | /* save parent rate, if it exists */ | |
1298 | parent = old_parent = core->parent; | |
71472c0c | 1299 | if (parent) |
4dff95dc | 1300 | best_parent_rate = parent->rate; |
71472c0c | 1301 | |
4dff95dc SB |
1302 | clk_core_get_boundaries(core, &min_rate, &max_rate); |
1303 | ||
1304 | /* find the closest rate and parent clk/rate */ | |
d6968fca | 1305 | if (core->ops->determine_rate) { |
0817b62c BB |
1306 | struct clk_rate_request req; |
1307 | ||
1308 | req.rate = rate; | |
1309 | req.min_rate = min_rate; | |
1310 | req.max_rate = max_rate; | |
1311 | if (parent) { | |
1312 | req.best_parent_hw = parent->hw; | |
1313 | req.best_parent_rate = parent->rate; | |
1314 | } else { | |
1315 | req.best_parent_hw = NULL; | |
1316 | req.best_parent_rate = 0; | |
1317 | } | |
1318 | ||
1319 | ret = core->ops->determine_rate(core->hw, &req); | |
4dff95dc SB |
1320 | if (ret < 0) |
1321 | return NULL; | |
1c8e6004 | 1322 | |
0817b62c BB |
1323 | best_parent_rate = req.best_parent_rate; |
1324 | new_rate = req.rate; | |
1325 | parent = req.best_parent_hw ? req.best_parent_hw->core : NULL; | |
4dff95dc SB |
1326 | } else if (core->ops->round_rate) { |
1327 | ret = core->ops->round_rate(core->hw, rate, | |
0817b62c | 1328 | &best_parent_rate); |
4dff95dc SB |
1329 | if (ret < 0) |
1330 | return NULL; | |
035a61c3 | 1331 | |
4dff95dc SB |
1332 | new_rate = ret; |
1333 | if (new_rate < min_rate || new_rate > max_rate) | |
1334 | return NULL; | |
1335 | } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) { | |
1336 | /* pass-through clock without adjustable parent */ | |
1337 | core->new_rate = core->rate; | |
1338 | return NULL; | |
1339 | } else { | |
1340 | /* pass-through clock with adjustable parent */ | |
1341 | top = clk_calc_new_rates(parent, rate); | |
1342 | new_rate = parent->new_rate; | |
1343 | goto out; | |
1344 | } | |
1c8e6004 | 1345 | |
4dff95dc SB |
1346 | /* some clocks must be gated to change parent */ |
1347 | if (parent != old_parent && | |
1348 | (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1349 | pr_debug("%s: %s not gated but wants to reparent\n", | |
1350 | __func__, core->name); | |
1351 | return NULL; | |
1352 | } | |
b2476490 | 1353 | |
4dff95dc SB |
1354 | /* try finding the new parent index */ |
1355 | if (parent && core->num_parents > 1) { | |
1356 | p_index = clk_fetch_parent_index(core, parent); | |
1357 | if (p_index < 0) { | |
1358 | pr_debug("%s: clk %s can not be parent of clk %s\n", | |
1359 | __func__, parent->name, core->name); | |
1360 | return NULL; | |
1361 | } | |
1362 | } | |
b2476490 | 1363 | |
4dff95dc SB |
1364 | if ((core->flags & CLK_SET_RATE_PARENT) && parent && |
1365 | best_parent_rate != parent->rate) | |
1366 | top = clk_calc_new_rates(parent, best_parent_rate); | |
035a61c3 | 1367 | |
4dff95dc SB |
1368 | out: |
1369 | clk_calc_subtree(core, new_rate, parent, p_index); | |
b2476490 | 1370 | |
4dff95dc | 1371 | return top; |
b2476490 | 1372 | } |
b2476490 | 1373 | |
4dff95dc SB |
1374 | /* |
1375 | * Notify about rate changes in a subtree. Always walk down the whole tree | |
1376 | * so that in case of an error we can walk down the whole tree again and | |
1377 | * abort the change. | |
b2476490 | 1378 | */ |
4dff95dc SB |
1379 | static struct clk_core *clk_propagate_rate_change(struct clk_core *core, |
1380 | unsigned long event) | |
b2476490 | 1381 | { |
4dff95dc | 1382 | struct clk_core *child, *tmp_clk, *fail_clk = NULL; |
b2476490 MT |
1383 | int ret = NOTIFY_DONE; |
1384 | ||
4dff95dc SB |
1385 | if (core->rate == core->new_rate) |
1386 | return NULL; | |
b2476490 | 1387 | |
4dff95dc SB |
1388 | if (core->notifier_count) { |
1389 | ret = __clk_notify(core, event, core->rate, core->new_rate); | |
1390 | if (ret & NOTIFY_STOP_MASK) | |
1391 | fail_clk = core; | |
b2476490 MT |
1392 | } |
1393 | ||
4dff95dc SB |
1394 | hlist_for_each_entry(child, &core->children, child_node) { |
1395 | /* Skip children who will be reparented to another clock */ | |
1396 | if (child->new_parent && child->new_parent != core) | |
1397 | continue; | |
1398 | tmp_clk = clk_propagate_rate_change(child, event); | |
1399 | if (tmp_clk) | |
1400 | fail_clk = tmp_clk; | |
1401 | } | |
5279fc40 | 1402 | |
4dff95dc SB |
1403 | /* handle the new child who might not be in core->children yet */ |
1404 | if (core->new_child) { | |
1405 | tmp_clk = clk_propagate_rate_change(core->new_child, event); | |
1406 | if (tmp_clk) | |
1407 | fail_clk = tmp_clk; | |
1408 | } | |
5279fc40 | 1409 | |
4dff95dc | 1410 | return fail_clk; |
5279fc40 BB |
1411 | } |
1412 | ||
4dff95dc SB |
1413 | /* |
1414 | * walk down a subtree and set the new rates notifying the rate | |
1415 | * change on the way | |
1416 | */ | |
1417 | static void clk_change_rate(struct clk_core *core) | |
035a61c3 | 1418 | { |
4dff95dc SB |
1419 | struct clk_core *child; |
1420 | struct hlist_node *tmp; | |
1421 | unsigned long old_rate; | |
1422 | unsigned long best_parent_rate = 0; | |
1423 | bool skip_set_rate = false; | |
1424 | struct clk_core *old_parent; | |
035a61c3 | 1425 | |
4dff95dc | 1426 | old_rate = core->rate; |
035a61c3 | 1427 | |
4dff95dc SB |
1428 | if (core->new_parent) |
1429 | best_parent_rate = core->new_parent->rate; | |
1430 | else if (core->parent) | |
1431 | best_parent_rate = core->parent->rate; | |
035a61c3 | 1432 | |
2eb8c710 HS |
1433 | if (core->flags & CLK_SET_RATE_UNGATE) { |
1434 | unsigned long flags; | |
1435 | ||
1436 | clk_core_prepare(core); | |
1437 | flags = clk_enable_lock(); | |
1438 | clk_core_enable(core); | |
1439 | clk_enable_unlock(flags); | |
1440 | } | |
1441 | ||
4dff95dc SB |
1442 | if (core->new_parent && core->new_parent != core->parent) { |
1443 | old_parent = __clk_set_parent_before(core, core->new_parent); | |
1444 | trace_clk_set_parent(core, core->new_parent); | |
5279fc40 | 1445 | |
4dff95dc SB |
1446 | if (core->ops->set_rate_and_parent) { |
1447 | skip_set_rate = true; | |
1448 | core->ops->set_rate_and_parent(core->hw, core->new_rate, | |
1449 | best_parent_rate, | |
1450 | core->new_parent_index); | |
1451 | } else if (core->ops->set_parent) { | |
1452 | core->ops->set_parent(core->hw, core->new_parent_index); | |
1453 | } | |
5279fc40 | 1454 | |
4dff95dc SB |
1455 | trace_clk_set_parent_complete(core, core->new_parent); |
1456 | __clk_set_parent_after(core, core->new_parent, old_parent); | |
1457 | } | |
8f2c2db1 | 1458 | |
4dff95dc | 1459 | trace_clk_set_rate(core, core->new_rate); |
b2476490 | 1460 | |
4dff95dc SB |
1461 | if (!skip_set_rate && core->ops->set_rate) |
1462 | core->ops->set_rate(core->hw, core->new_rate, best_parent_rate); | |
496eadf8 | 1463 | |
4dff95dc | 1464 | trace_clk_set_rate_complete(core, core->new_rate); |
b2476490 | 1465 | |
4dff95dc | 1466 | core->rate = clk_recalc(core, best_parent_rate); |
b2476490 | 1467 | |
2eb8c710 HS |
1468 | if (core->flags & CLK_SET_RATE_UNGATE) { |
1469 | unsigned long flags; | |
1470 | ||
1471 | flags = clk_enable_lock(); | |
1472 | clk_core_disable(core); | |
1473 | clk_enable_unlock(flags); | |
1474 | clk_core_unprepare(core); | |
1475 | } | |
1476 | ||
4dff95dc SB |
1477 | if (core->notifier_count && old_rate != core->rate) |
1478 | __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); | |
b2476490 | 1479 | |
85e88fab MT |
1480 | if (core->flags & CLK_RECALC_NEW_RATES) |
1481 | (void)clk_calc_new_rates(core, core->new_rate); | |
d8d91987 | 1482 | |
b2476490 | 1483 | /* |
4dff95dc SB |
1484 | * Use safe iteration, as change_rate can actually swap parents |
1485 | * for certain clock types. | |
b2476490 | 1486 | */ |
4dff95dc SB |
1487 | hlist_for_each_entry_safe(child, tmp, &core->children, child_node) { |
1488 | /* Skip children who will be reparented to another clock */ | |
1489 | if (child->new_parent && child->new_parent != core) | |
1490 | continue; | |
1491 | clk_change_rate(child); | |
1492 | } | |
b2476490 | 1493 | |
4dff95dc SB |
1494 | /* handle the new child who might not be in core->children yet */ |
1495 | if (core->new_child) | |
1496 | clk_change_rate(core->new_child); | |
b2476490 MT |
1497 | } |
1498 | ||
4dff95dc SB |
1499 | static int clk_core_set_rate_nolock(struct clk_core *core, |
1500 | unsigned long req_rate) | |
a093bde2 | 1501 | { |
4dff95dc SB |
1502 | struct clk_core *top, *fail_clk; |
1503 | unsigned long rate = req_rate; | |
1504 | int ret = 0; | |
a093bde2 | 1505 | |
4dff95dc SB |
1506 | if (!core) |
1507 | return 0; | |
a093bde2 | 1508 | |
4dff95dc SB |
1509 | /* bail early if nothing to do */ |
1510 | if (rate == clk_core_get_rate_nolock(core)) | |
1511 | return 0; | |
a093bde2 | 1512 | |
4dff95dc SB |
1513 | if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count) |
1514 | return -EBUSY; | |
a093bde2 | 1515 | |
4dff95dc SB |
1516 | /* calculate new rates and get the topmost changed clock */ |
1517 | top = clk_calc_new_rates(core, rate); | |
1518 | if (!top) | |
1519 | return -EINVAL; | |
1520 | ||
1521 | /* notify that we are about to change rates */ | |
1522 | fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); | |
1523 | if (fail_clk) { | |
1524 | pr_debug("%s: failed to set %s rate\n", __func__, | |
1525 | fail_clk->name); | |
1526 | clk_propagate_rate_change(top, ABORT_RATE_CHANGE); | |
1527 | return -EBUSY; | |
1528 | } | |
1529 | ||
1530 | /* change the rates */ | |
1531 | clk_change_rate(top); | |
1532 | ||
1533 | core->req_rate = req_rate; | |
1534 | ||
1535 | return ret; | |
a093bde2 | 1536 | } |
035a61c3 TV |
1537 | |
1538 | /** | |
4dff95dc SB |
1539 | * clk_set_rate - specify a new rate for clk |
1540 | * @clk: the clk whose rate is being changed | |
1541 | * @rate: the new rate for clk | |
035a61c3 | 1542 | * |
4dff95dc SB |
1543 | * In the simplest case clk_set_rate will only adjust the rate of clk. |
1544 | * | |
1545 | * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to | |
1546 | * propagate up to clk's parent; whether or not this happens depends on the | |
1547 | * outcome of clk's .round_rate implementation. If *parent_rate is unchanged | |
1548 | * after calling .round_rate then upstream parent propagation is ignored. If | |
1549 | * *parent_rate comes back with a new rate for clk's parent then we propagate | |
1550 | * up to clk's parent and set its rate. Upward propagation will continue | |
1551 | * until either a clk does not support the CLK_SET_RATE_PARENT flag or | |
1552 | * .round_rate stops requesting changes to clk's parent_rate. | |
1553 | * | |
1554 | * Rate changes are accomplished via tree traversal that also recalculates the | |
1555 | * rates for the clocks and fires off POST_RATE_CHANGE notifiers. | |
1556 | * | |
1557 | * Returns 0 on success, -EERROR otherwise. | |
035a61c3 | 1558 | */ |
4dff95dc | 1559 | int clk_set_rate(struct clk *clk, unsigned long rate) |
035a61c3 | 1560 | { |
4dff95dc SB |
1561 | int ret; |
1562 | ||
035a61c3 TV |
1563 | if (!clk) |
1564 | return 0; | |
1565 | ||
4dff95dc SB |
1566 | /* prevent racing with updates to the clock topology */ |
1567 | clk_prepare_lock(); | |
da0f0b2c | 1568 | |
4dff95dc | 1569 | ret = clk_core_set_rate_nolock(clk->core, rate); |
da0f0b2c | 1570 | |
4dff95dc | 1571 | clk_prepare_unlock(); |
4935b22c | 1572 | |
4dff95dc | 1573 | return ret; |
4935b22c | 1574 | } |
4dff95dc | 1575 | EXPORT_SYMBOL_GPL(clk_set_rate); |
4935b22c | 1576 | |
4dff95dc SB |
1577 | /** |
1578 | * clk_set_rate_range - set a rate range for a clock source | |
1579 | * @clk: clock source | |
1580 | * @min: desired minimum clock rate in Hz, inclusive | |
1581 | * @max: desired maximum clock rate in Hz, inclusive | |
1582 | * | |
1583 | * Returns success (0) or negative errno. | |
1584 | */ | |
1585 | int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) | |
4935b22c | 1586 | { |
4dff95dc | 1587 | int ret = 0; |
4935b22c | 1588 | |
4dff95dc SB |
1589 | if (!clk) |
1590 | return 0; | |
903efc55 | 1591 | |
4dff95dc SB |
1592 | if (min > max) { |
1593 | pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n", | |
1594 | __func__, clk->core->name, clk->dev_id, clk->con_id, | |
1595 | min, max); | |
1596 | return -EINVAL; | |
903efc55 | 1597 | } |
4935b22c | 1598 | |
4dff95dc | 1599 | clk_prepare_lock(); |
4935b22c | 1600 | |
4dff95dc SB |
1601 | if (min != clk->min_rate || max != clk->max_rate) { |
1602 | clk->min_rate = min; | |
1603 | clk->max_rate = max; | |
1604 | ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
4935b22c JH |
1605 | } |
1606 | ||
4dff95dc | 1607 | clk_prepare_unlock(); |
4935b22c | 1608 | |
4dff95dc | 1609 | return ret; |
3fa2252b | 1610 | } |
4dff95dc | 1611 | EXPORT_SYMBOL_GPL(clk_set_rate_range); |
3fa2252b | 1612 | |
4dff95dc SB |
1613 | /** |
1614 | * clk_set_min_rate - set a minimum clock rate for a clock source | |
1615 | * @clk: clock source | |
1616 | * @rate: desired minimum clock rate in Hz, inclusive | |
1617 | * | |
1618 | * Returns success (0) or negative errno. | |
1619 | */ | |
1620 | int clk_set_min_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 1621 | { |
4dff95dc SB |
1622 | if (!clk) |
1623 | return 0; | |
1624 | ||
1625 | return clk_set_rate_range(clk, rate, clk->max_rate); | |
3fa2252b | 1626 | } |
4dff95dc | 1627 | EXPORT_SYMBOL_GPL(clk_set_min_rate); |
3fa2252b | 1628 | |
4dff95dc SB |
1629 | /** |
1630 | * clk_set_max_rate - set a maximum clock rate for a clock source | |
1631 | * @clk: clock source | |
1632 | * @rate: desired maximum clock rate in Hz, inclusive | |
1633 | * | |
1634 | * Returns success (0) or negative errno. | |
1635 | */ | |
1636 | int clk_set_max_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 1637 | { |
4dff95dc SB |
1638 | if (!clk) |
1639 | return 0; | |
4935b22c | 1640 | |
4dff95dc | 1641 | return clk_set_rate_range(clk, clk->min_rate, rate); |
4935b22c | 1642 | } |
4dff95dc | 1643 | EXPORT_SYMBOL_GPL(clk_set_max_rate); |
4935b22c | 1644 | |
b2476490 | 1645 | /** |
4dff95dc SB |
1646 | * clk_get_parent - return the parent of a clk |
1647 | * @clk: the clk whose parent gets returned | |
b2476490 | 1648 | * |
4dff95dc | 1649 | * Simply returns clk->parent. Returns NULL if clk is NULL. |
b2476490 | 1650 | */ |
4dff95dc | 1651 | struct clk *clk_get_parent(struct clk *clk) |
b2476490 | 1652 | { |
4dff95dc | 1653 | struct clk *parent; |
b2476490 | 1654 | |
fc4a05d4 SB |
1655 | if (!clk) |
1656 | return NULL; | |
1657 | ||
4dff95dc | 1658 | clk_prepare_lock(); |
fc4a05d4 SB |
1659 | /* TODO: Create a per-user clk and change callers to call clk_put */ |
1660 | parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk; | |
4dff95dc | 1661 | clk_prepare_unlock(); |
496eadf8 | 1662 | |
4dff95dc SB |
1663 | return parent; |
1664 | } | |
1665 | EXPORT_SYMBOL_GPL(clk_get_parent); | |
b2476490 | 1666 | |
4dff95dc SB |
1667 | static struct clk_core *__clk_init_parent(struct clk_core *core) |
1668 | { | |
5146e0b0 | 1669 | u8 index = 0; |
4dff95dc | 1670 | |
2430a94d | 1671 | if (core->num_parents > 1 && core->ops->get_parent) |
5146e0b0 | 1672 | index = core->ops->get_parent(core->hw); |
b2476490 | 1673 | |
5146e0b0 | 1674 | return clk_core_get_parent_by_index(core, index); |
b2476490 MT |
1675 | } |
1676 | ||
4dff95dc SB |
1677 | static void clk_core_reparent(struct clk_core *core, |
1678 | struct clk_core *new_parent) | |
b2476490 | 1679 | { |
4dff95dc SB |
1680 | clk_reparent(core, new_parent); |
1681 | __clk_recalc_accuracies(core); | |
1682 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
b2476490 MT |
1683 | } |
1684 | ||
42c86547 TV |
1685 | void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent) |
1686 | { | |
1687 | if (!hw) | |
1688 | return; | |
1689 | ||
1690 | clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core); | |
1691 | } | |
1692 | ||
4dff95dc SB |
1693 | /** |
1694 | * clk_has_parent - check if a clock is a possible parent for another | |
1695 | * @clk: clock source | |
1696 | * @parent: parent clock source | |
1697 | * | |
1698 | * This function can be used in drivers that need to check that a clock can be | |
1699 | * the parent of another without actually changing the parent. | |
1700 | * | |
1701 | * Returns true if @parent is a possible parent for @clk, false otherwise. | |
b2476490 | 1702 | */ |
4dff95dc | 1703 | bool clk_has_parent(struct clk *clk, struct clk *parent) |
b2476490 | 1704 | { |
4dff95dc SB |
1705 | struct clk_core *core, *parent_core; |
1706 | unsigned int i; | |
b2476490 | 1707 | |
4dff95dc SB |
1708 | /* NULL clocks should be nops, so return success if either is NULL. */ |
1709 | if (!clk || !parent) | |
1710 | return true; | |
7452b219 | 1711 | |
4dff95dc SB |
1712 | core = clk->core; |
1713 | parent_core = parent->core; | |
71472c0c | 1714 | |
4dff95dc SB |
1715 | /* Optimize for the case where the parent is already the parent. */ |
1716 | if (core->parent == parent_core) | |
1717 | return true; | |
1c8e6004 | 1718 | |
4dff95dc SB |
1719 | for (i = 0; i < core->num_parents; i++) |
1720 | if (strcmp(core->parent_names[i], parent_core->name) == 0) | |
1721 | return true; | |
03bc10ab | 1722 | |
4dff95dc SB |
1723 | return false; |
1724 | } | |
1725 | EXPORT_SYMBOL_GPL(clk_has_parent); | |
03bc10ab | 1726 | |
4dff95dc SB |
1727 | static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent) |
1728 | { | |
1729 | int ret = 0; | |
1730 | int p_index = 0; | |
1731 | unsigned long p_rate = 0; | |
1732 | ||
1733 | if (!core) | |
1734 | return 0; | |
1735 | ||
1736 | /* prevent racing with updates to the clock topology */ | |
1737 | clk_prepare_lock(); | |
1738 | ||
1739 | if (core->parent == parent) | |
1740 | goto out; | |
1741 | ||
1742 | /* verify ops for for multi-parent clks */ | |
1743 | if ((core->num_parents > 1) && (!core->ops->set_parent)) { | |
1744 | ret = -ENOSYS; | |
63f5c3b2 | 1745 | goto out; |
7452b219 MT |
1746 | } |
1747 | ||
4dff95dc SB |
1748 | /* check that we are allowed to re-parent if the clock is in use */ |
1749 | if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1750 | ret = -EBUSY; | |
1751 | goto out; | |
b2476490 MT |
1752 | } |
1753 | ||
71472c0c | 1754 | /* try finding the new parent index */ |
4dff95dc | 1755 | if (parent) { |
d6968fca | 1756 | p_index = clk_fetch_parent_index(core, parent); |
f1c8b2ed | 1757 | if (p_index < 0) { |
71472c0c | 1758 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
4dff95dc SB |
1759 | __func__, parent->name, core->name); |
1760 | ret = p_index; | |
1761 | goto out; | |
71472c0c | 1762 | } |
e8f0e68e | 1763 | p_rate = parent->rate; |
b2476490 MT |
1764 | } |
1765 | ||
4dff95dc SB |
1766 | /* propagate PRE_RATE_CHANGE notifications */ |
1767 | ret = __clk_speculate_rates(core, p_rate); | |
b2476490 | 1768 | |
4dff95dc SB |
1769 | /* abort if a driver objects */ |
1770 | if (ret & NOTIFY_STOP_MASK) | |
1771 | goto out; | |
b2476490 | 1772 | |
4dff95dc SB |
1773 | /* do the re-parent */ |
1774 | ret = __clk_set_parent(core, parent, p_index); | |
b2476490 | 1775 | |
4dff95dc SB |
1776 | /* propagate rate an accuracy recalculation accordingly */ |
1777 | if (ret) { | |
1778 | __clk_recalc_rates(core, ABORT_RATE_CHANGE); | |
1779 | } else { | |
1780 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
1781 | __clk_recalc_accuracies(core); | |
b2476490 MT |
1782 | } |
1783 | ||
4dff95dc SB |
1784 | out: |
1785 | clk_prepare_unlock(); | |
71472c0c | 1786 | |
4dff95dc SB |
1787 | return ret; |
1788 | } | |
b2476490 | 1789 | |
4dff95dc SB |
1790 | /** |
1791 | * clk_set_parent - switch the parent of a mux clk | |
1792 | * @clk: the mux clk whose input we are switching | |
1793 | * @parent: the new input to clk | |
1794 | * | |
1795 | * Re-parent clk to use parent as its new input source. If clk is in | |
1796 | * prepared state, the clk will get enabled for the duration of this call. If | |
1797 | * that's not acceptable for a specific clk (Eg: the consumer can't handle | |
1798 | * that, the reparenting is glitchy in hardware, etc), use the | |
1799 | * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared. | |
1800 | * | |
1801 | * After successfully changing clk's parent clk_set_parent will update the | |
1802 | * clk topology, sysfs topology and propagate rate recalculation via | |
1803 | * __clk_recalc_rates. | |
1804 | * | |
1805 | * Returns 0 on success, -EERROR otherwise. | |
1806 | */ | |
1807 | int clk_set_parent(struct clk *clk, struct clk *parent) | |
1808 | { | |
1809 | if (!clk) | |
1810 | return 0; | |
1811 | ||
1812 | return clk_core_set_parent(clk->core, parent ? parent->core : NULL); | |
b2476490 | 1813 | } |
4dff95dc | 1814 | EXPORT_SYMBOL_GPL(clk_set_parent); |
b2476490 | 1815 | |
4dff95dc SB |
1816 | /** |
1817 | * clk_set_phase - adjust the phase shift of a clock signal | |
1818 | * @clk: clock signal source | |
1819 | * @degrees: number of degrees the signal is shifted | |
1820 | * | |
1821 | * Shifts the phase of a clock signal by the specified | |
1822 | * degrees. Returns 0 on success, -EERROR otherwise. | |
1823 | * | |
1824 | * This function makes no distinction about the input or reference | |
1825 | * signal that we adjust the clock signal phase against. For example | |
1826 | * phase locked-loop clock signal generators we may shift phase with | |
1827 | * respect to feedback clock signal input, but for other cases the | |
1828 | * clock phase may be shifted with respect to some other, unspecified | |
1829 | * signal. | |
1830 | * | |
1831 | * Additionally the concept of phase shift does not propagate through | |
1832 | * the clock tree hierarchy, which sets it apart from clock rates and | |
1833 | * clock accuracy. A parent clock phase attribute does not have an | |
1834 | * impact on the phase attribute of a child clock. | |
b2476490 | 1835 | */ |
4dff95dc | 1836 | int clk_set_phase(struct clk *clk, int degrees) |
b2476490 | 1837 | { |
4dff95dc | 1838 | int ret = -EINVAL; |
b2476490 | 1839 | |
4dff95dc SB |
1840 | if (!clk) |
1841 | return 0; | |
b2476490 | 1842 | |
4dff95dc SB |
1843 | /* sanity check degrees */ |
1844 | degrees %= 360; | |
1845 | if (degrees < 0) | |
1846 | degrees += 360; | |
bf47b4fd | 1847 | |
4dff95dc | 1848 | clk_prepare_lock(); |
3fa2252b | 1849 | |
023bd716 SL |
1850 | /* bail early if nothing to do */ |
1851 | if (degrees == clk->core->phase) | |
1852 | goto out; | |
1853 | ||
4dff95dc | 1854 | trace_clk_set_phase(clk->core, degrees); |
3fa2252b | 1855 | |
4dff95dc SB |
1856 | if (clk->core->ops->set_phase) |
1857 | ret = clk->core->ops->set_phase(clk->core->hw, degrees); | |
3fa2252b | 1858 | |
4dff95dc | 1859 | trace_clk_set_phase_complete(clk->core, degrees); |
dfc202ea | 1860 | |
4dff95dc SB |
1861 | if (!ret) |
1862 | clk->core->phase = degrees; | |
b2476490 | 1863 | |
023bd716 | 1864 | out: |
4dff95dc | 1865 | clk_prepare_unlock(); |
dfc202ea | 1866 | |
4dff95dc SB |
1867 | return ret; |
1868 | } | |
1869 | EXPORT_SYMBOL_GPL(clk_set_phase); | |
b2476490 | 1870 | |
4dff95dc SB |
1871 | static int clk_core_get_phase(struct clk_core *core) |
1872 | { | |
1873 | int ret; | |
b2476490 | 1874 | |
4dff95dc SB |
1875 | clk_prepare_lock(); |
1876 | ret = core->phase; | |
1877 | clk_prepare_unlock(); | |
71472c0c | 1878 | |
4dff95dc | 1879 | return ret; |
b2476490 MT |
1880 | } |
1881 | ||
4dff95dc SB |
1882 | /** |
1883 | * clk_get_phase - return the phase shift of a clock signal | |
1884 | * @clk: clock signal source | |
1885 | * | |
1886 | * Returns the phase shift of a clock node in degrees, otherwise returns | |
1887 | * -EERROR. | |
1888 | */ | |
1889 | int clk_get_phase(struct clk *clk) | |
1c8e6004 | 1890 | { |
4dff95dc | 1891 | if (!clk) |
1c8e6004 TV |
1892 | return 0; |
1893 | ||
4dff95dc SB |
1894 | return clk_core_get_phase(clk->core); |
1895 | } | |
1896 | EXPORT_SYMBOL_GPL(clk_get_phase); | |
1c8e6004 | 1897 | |
4dff95dc SB |
1898 | /** |
1899 | * clk_is_match - check if two clk's point to the same hardware clock | |
1900 | * @p: clk compared against q | |
1901 | * @q: clk compared against p | |
1902 | * | |
1903 | * Returns true if the two struct clk pointers both point to the same hardware | |
1904 | * clock node. Put differently, returns true if struct clk *p and struct clk *q | |
1905 | * share the same struct clk_core object. | |
1906 | * | |
1907 | * Returns false otherwise. Note that two NULL clks are treated as matching. | |
1908 | */ | |
1909 | bool clk_is_match(const struct clk *p, const struct clk *q) | |
1910 | { | |
1911 | /* trivial case: identical struct clk's or both NULL */ | |
1912 | if (p == q) | |
1913 | return true; | |
1c8e6004 | 1914 | |
3fe003f9 | 1915 | /* true if clk->core pointers match. Avoid dereferencing garbage */ |
4dff95dc SB |
1916 | if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q)) |
1917 | if (p->core == q->core) | |
1918 | return true; | |
1c8e6004 | 1919 | |
4dff95dc SB |
1920 | return false; |
1921 | } | |
1922 | EXPORT_SYMBOL_GPL(clk_is_match); | |
1c8e6004 | 1923 | |
4dff95dc | 1924 | /*** debugfs support ***/ |
1c8e6004 | 1925 | |
4dff95dc SB |
1926 | #ifdef CONFIG_DEBUG_FS |
1927 | #include <linux/debugfs.h> | |
1c8e6004 | 1928 | |
4dff95dc SB |
1929 | static struct dentry *rootdir; |
1930 | static int inited = 0; | |
1931 | static DEFINE_MUTEX(clk_debug_lock); | |
1932 | static HLIST_HEAD(clk_debug_list); | |
1c8e6004 | 1933 | |
4dff95dc SB |
1934 | static struct hlist_head *all_lists[] = { |
1935 | &clk_root_list, | |
1936 | &clk_orphan_list, | |
1937 | NULL, | |
1938 | }; | |
1939 | ||
1940 | static struct hlist_head *orphan_list[] = { | |
1941 | &clk_orphan_list, | |
1942 | NULL, | |
1943 | }; | |
1944 | ||
1945 | static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, | |
1946 | int level) | |
b2476490 | 1947 | { |
4dff95dc SB |
1948 | if (!c) |
1949 | return; | |
b2476490 | 1950 | |
4dff95dc SB |
1951 | seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n", |
1952 | level * 3 + 1, "", | |
1953 | 30 - level * 3, c->name, | |
1954 | c->enable_count, c->prepare_count, clk_core_get_rate(c), | |
1955 | clk_core_get_accuracy(c), clk_core_get_phase(c)); | |
1956 | } | |
89ac8d7a | 1957 | |
4dff95dc SB |
1958 | static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, |
1959 | int level) | |
1960 | { | |
1961 | struct clk_core *child; | |
b2476490 | 1962 | |
4dff95dc SB |
1963 | if (!c) |
1964 | return; | |
b2476490 | 1965 | |
4dff95dc | 1966 | clk_summary_show_one(s, c, level); |
0e1c0301 | 1967 | |
4dff95dc SB |
1968 | hlist_for_each_entry(child, &c->children, child_node) |
1969 | clk_summary_show_subtree(s, child, level + 1); | |
1c8e6004 | 1970 | } |
b2476490 | 1971 | |
4dff95dc | 1972 | static int clk_summary_show(struct seq_file *s, void *data) |
1c8e6004 | 1973 | { |
4dff95dc SB |
1974 | struct clk_core *c; |
1975 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
1c8e6004 | 1976 | |
4dff95dc SB |
1977 | seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n"); |
1978 | seq_puts(s, "----------------------------------------------------------------------------------------\n"); | |
b2476490 | 1979 | |
1c8e6004 TV |
1980 | clk_prepare_lock(); |
1981 | ||
4dff95dc SB |
1982 | for (; *lists; lists++) |
1983 | hlist_for_each_entry(c, *lists, child_node) | |
1984 | clk_summary_show_subtree(s, c, 0); | |
b2476490 | 1985 | |
eab89f69 | 1986 | clk_prepare_unlock(); |
b2476490 | 1987 | |
4dff95dc | 1988 | return 0; |
b2476490 | 1989 | } |
1c8e6004 | 1990 | |
1c8e6004 | 1991 | |
4dff95dc | 1992 | static int clk_summary_open(struct inode *inode, struct file *file) |
1c8e6004 | 1993 | { |
4dff95dc | 1994 | return single_open(file, clk_summary_show, inode->i_private); |
1c8e6004 | 1995 | } |
b2476490 | 1996 | |
4dff95dc SB |
1997 | static const struct file_operations clk_summary_fops = { |
1998 | .open = clk_summary_open, | |
1999 | .read = seq_read, | |
2000 | .llseek = seq_lseek, | |
2001 | .release = single_release, | |
2002 | }; | |
b2476490 | 2003 | |
4dff95dc SB |
2004 | static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) |
2005 | { | |
2006 | if (!c) | |
2007 | return; | |
b2476490 | 2008 | |
7cb81136 | 2009 | /* This should be JSON format, i.e. elements separated with a comma */ |
4dff95dc SB |
2010 | seq_printf(s, "\"%s\": { ", c->name); |
2011 | seq_printf(s, "\"enable_count\": %d,", c->enable_count); | |
2012 | seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); | |
7cb81136 SW |
2013 | seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c)); |
2014 | seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c)); | |
4dff95dc | 2015 | seq_printf(s, "\"phase\": %d", clk_core_get_phase(c)); |
b2476490 | 2016 | } |
b2476490 | 2017 | |
4dff95dc | 2018 | static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) |
b2476490 | 2019 | { |
4dff95dc | 2020 | struct clk_core *child; |
b2476490 | 2021 | |
4dff95dc SB |
2022 | if (!c) |
2023 | return; | |
b2476490 | 2024 | |
4dff95dc | 2025 | clk_dump_one(s, c, level); |
b2476490 | 2026 | |
4dff95dc SB |
2027 | hlist_for_each_entry(child, &c->children, child_node) { |
2028 | seq_printf(s, ","); | |
2029 | clk_dump_subtree(s, child, level + 1); | |
b2476490 MT |
2030 | } |
2031 | ||
4dff95dc | 2032 | seq_printf(s, "}"); |
b2476490 MT |
2033 | } |
2034 | ||
4dff95dc | 2035 | static int clk_dump(struct seq_file *s, void *data) |
4e88f3de | 2036 | { |
4dff95dc SB |
2037 | struct clk_core *c; |
2038 | bool first_node = true; | |
2039 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
4e88f3de | 2040 | |
4dff95dc | 2041 | seq_printf(s, "{"); |
4e88f3de | 2042 | |
4dff95dc | 2043 | clk_prepare_lock(); |
035a61c3 | 2044 | |
4dff95dc SB |
2045 | for (; *lists; lists++) { |
2046 | hlist_for_each_entry(c, *lists, child_node) { | |
2047 | if (!first_node) | |
2048 | seq_puts(s, ","); | |
2049 | first_node = false; | |
2050 | clk_dump_subtree(s, c, 0); | |
2051 | } | |
2052 | } | |
4e88f3de | 2053 | |
4dff95dc | 2054 | clk_prepare_unlock(); |
4e88f3de | 2055 | |
70e9f4dd | 2056 | seq_puts(s, "}\n"); |
4dff95dc | 2057 | return 0; |
4e88f3de | 2058 | } |
4e88f3de | 2059 | |
4dff95dc SB |
2060 | |
2061 | static int clk_dump_open(struct inode *inode, struct file *file) | |
b2476490 | 2062 | { |
4dff95dc SB |
2063 | return single_open(file, clk_dump, inode->i_private); |
2064 | } | |
b2476490 | 2065 | |
4dff95dc SB |
2066 | static const struct file_operations clk_dump_fops = { |
2067 | .open = clk_dump_open, | |
2068 | .read = seq_read, | |
2069 | .llseek = seq_lseek, | |
2070 | .release = single_release, | |
2071 | }; | |
89ac8d7a | 2072 | |
4dff95dc SB |
2073 | static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) |
2074 | { | |
2075 | struct dentry *d; | |
2076 | int ret = -ENOMEM; | |
b2476490 | 2077 | |
4dff95dc SB |
2078 | if (!core || !pdentry) { |
2079 | ret = -EINVAL; | |
b2476490 | 2080 | goto out; |
4dff95dc | 2081 | } |
b2476490 | 2082 | |
4dff95dc SB |
2083 | d = debugfs_create_dir(core->name, pdentry); |
2084 | if (!d) | |
b61c43c0 | 2085 | goto out; |
b61c43c0 | 2086 | |
4dff95dc SB |
2087 | core->dentry = d; |
2088 | ||
2089 | d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry, | |
2090 | (u32 *)&core->rate); | |
2091 | if (!d) | |
2092 | goto err_out; | |
2093 | ||
2094 | d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry, | |
2095 | (u32 *)&core->accuracy); | |
2096 | if (!d) | |
2097 | goto err_out; | |
2098 | ||
2099 | d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry, | |
2100 | (u32 *)&core->phase); | |
2101 | if (!d) | |
2102 | goto err_out; | |
031dcc9b | 2103 | |
4dff95dc SB |
2104 | d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry, |
2105 | (u32 *)&core->flags); | |
2106 | if (!d) | |
2107 | goto err_out; | |
031dcc9b | 2108 | |
4dff95dc SB |
2109 | d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry, |
2110 | (u32 *)&core->prepare_count); | |
2111 | if (!d) | |
2112 | goto err_out; | |
b2476490 | 2113 | |
4dff95dc SB |
2114 | d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry, |
2115 | (u32 *)&core->enable_count); | |
2116 | if (!d) | |
2117 | goto err_out; | |
b2476490 | 2118 | |
4dff95dc SB |
2119 | d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry, |
2120 | (u32 *)&core->notifier_count); | |
2121 | if (!d) | |
2122 | goto err_out; | |
b2476490 | 2123 | |
4dff95dc SB |
2124 | if (core->ops->debug_init) { |
2125 | ret = core->ops->debug_init(core->hw, core->dentry); | |
2126 | if (ret) | |
2127 | goto err_out; | |
5279fc40 | 2128 | } |
b2476490 | 2129 | |
4dff95dc SB |
2130 | ret = 0; |
2131 | goto out; | |
b2476490 | 2132 | |
4dff95dc SB |
2133 | err_out: |
2134 | debugfs_remove_recursive(core->dentry); | |
2135 | core->dentry = NULL; | |
2136 | out: | |
b2476490 MT |
2137 | return ret; |
2138 | } | |
035a61c3 TV |
2139 | |
2140 | /** | |
6e5ab41b SB |
2141 | * clk_debug_register - add a clk node to the debugfs clk directory |
2142 | * @core: the clk being added to the debugfs clk directory | |
035a61c3 | 2143 | * |
6e5ab41b SB |
2144 | * Dynamically adds a clk to the debugfs clk directory if debugfs has been |
2145 | * initialized. Otherwise it bails out early since the debugfs clk directory | |
4dff95dc | 2146 | * will be created lazily by clk_debug_init as part of a late_initcall. |
035a61c3 | 2147 | */ |
4dff95dc | 2148 | static int clk_debug_register(struct clk_core *core) |
035a61c3 | 2149 | { |
4dff95dc | 2150 | int ret = 0; |
035a61c3 | 2151 | |
4dff95dc SB |
2152 | mutex_lock(&clk_debug_lock); |
2153 | hlist_add_head(&core->debug_node, &clk_debug_list); | |
2154 | ||
2155 | if (!inited) | |
2156 | goto unlock; | |
2157 | ||
2158 | ret = clk_debug_create_one(core, rootdir); | |
2159 | unlock: | |
2160 | mutex_unlock(&clk_debug_lock); | |
2161 | ||
2162 | return ret; | |
035a61c3 | 2163 | } |
b2476490 | 2164 | |
4dff95dc | 2165 | /** |
6e5ab41b SB |
2166 | * clk_debug_unregister - remove a clk node from the debugfs clk directory |
2167 | * @core: the clk being removed from the debugfs clk directory | |
e59c5371 | 2168 | * |
6e5ab41b SB |
2169 | * Dynamically removes a clk and all its child nodes from the |
2170 | * debugfs clk directory if clk->dentry points to debugfs created by | |
706d5c73 | 2171 | * clk_debug_register in __clk_core_init. |
e59c5371 | 2172 | */ |
4dff95dc | 2173 | static void clk_debug_unregister(struct clk_core *core) |
e59c5371 | 2174 | { |
4dff95dc SB |
2175 | mutex_lock(&clk_debug_lock); |
2176 | hlist_del_init(&core->debug_node); | |
2177 | debugfs_remove_recursive(core->dentry); | |
2178 | core->dentry = NULL; | |
2179 | mutex_unlock(&clk_debug_lock); | |
2180 | } | |
e59c5371 | 2181 | |
4dff95dc SB |
2182 | struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode, |
2183 | void *data, const struct file_operations *fops) | |
2184 | { | |
2185 | struct dentry *d = NULL; | |
e59c5371 | 2186 | |
4dff95dc SB |
2187 | if (hw->core->dentry) |
2188 | d = debugfs_create_file(name, mode, hw->core->dentry, data, | |
2189 | fops); | |
e59c5371 | 2190 | |
4dff95dc SB |
2191 | return d; |
2192 | } | |
2193 | EXPORT_SYMBOL_GPL(clk_debugfs_add_file); | |
e59c5371 | 2194 | |
4dff95dc | 2195 | /** |
6e5ab41b | 2196 | * clk_debug_init - lazily populate the debugfs clk directory |
4dff95dc | 2197 | * |
6e5ab41b SB |
2198 | * clks are often initialized very early during boot before memory can be |
2199 | * dynamically allocated and well before debugfs is setup. This function | |
2200 | * populates the debugfs clk directory once at boot-time when we know that | |
2201 | * debugfs is setup. It should only be called once at boot-time, all other clks | |
2202 | * added dynamically will be done so with clk_debug_register. | |
4dff95dc SB |
2203 | */ |
2204 | static int __init clk_debug_init(void) | |
2205 | { | |
2206 | struct clk_core *core; | |
2207 | struct dentry *d; | |
dfc202ea | 2208 | |
4dff95dc | 2209 | rootdir = debugfs_create_dir("clk", NULL); |
e59c5371 | 2210 | |
4dff95dc SB |
2211 | if (!rootdir) |
2212 | return -ENOMEM; | |
dfc202ea | 2213 | |
4dff95dc SB |
2214 | d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists, |
2215 | &clk_summary_fops); | |
2216 | if (!d) | |
2217 | return -ENOMEM; | |
e59c5371 | 2218 | |
4dff95dc SB |
2219 | d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists, |
2220 | &clk_dump_fops); | |
2221 | if (!d) | |
2222 | return -ENOMEM; | |
e59c5371 | 2223 | |
4dff95dc SB |
2224 | d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir, |
2225 | &orphan_list, &clk_summary_fops); | |
2226 | if (!d) | |
2227 | return -ENOMEM; | |
e59c5371 | 2228 | |
4dff95dc SB |
2229 | d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir, |
2230 | &orphan_list, &clk_dump_fops); | |
2231 | if (!d) | |
2232 | return -ENOMEM; | |
e59c5371 | 2233 | |
4dff95dc SB |
2234 | mutex_lock(&clk_debug_lock); |
2235 | hlist_for_each_entry(core, &clk_debug_list, debug_node) | |
2236 | clk_debug_create_one(core, rootdir); | |
e59c5371 | 2237 | |
4dff95dc SB |
2238 | inited = 1; |
2239 | mutex_unlock(&clk_debug_lock); | |
e59c5371 | 2240 | |
4dff95dc SB |
2241 | return 0; |
2242 | } | |
2243 | late_initcall(clk_debug_init); | |
2244 | #else | |
2245 | static inline int clk_debug_register(struct clk_core *core) { return 0; } | |
2246 | static inline void clk_debug_reparent(struct clk_core *core, | |
2247 | struct clk_core *new_parent) | |
035a61c3 | 2248 | { |
035a61c3 | 2249 | } |
4dff95dc | 2250 | static inline void clk_debug_unregister(struct clk_core *core) |
3d3801ef | 2251 | { |
3d3801ef | 2252 | } |
4dff95dc | 2253 | #endif |
3d3801ef | 2254 | |
b2476490 | 2255 | /** |
be45ebf2 | 2256 | * __clk_core_init - initialize the data structures in a struct clk_core |
d35c80c2 | 2257 | * @core: clk_core being initialized |
b2476490 | 2258 | * |
035a61c3 | 2259 | * Initializes the lists in struct clk_core, queries the hardware for the |
b2476490 | 2260 | * parent and rate and sets them both. |
b2476490 | 2261 | */ |
be45ebf2 | 2262 | static int __clk_core_init(struct clk_core *core) |
b2476490 | 2263 | { |
d1302a36 | 2264 | int i, ret = 0; |
035a61c3 | 2265 | struct clk_core *orphan; |
b67bfe0d | 2266 | struct hlist_node *tmp2; |
1c8e6004 | 2267 | unsigned long rate; |
b2476490 | 2268 | |
d35c80c2 | 2269 | if (!core) |
d1302a36 | 2270 | return -EINVAL; |
b2476490 | 2271 | |
eab89f69 | 2272 | clk_prepare_lock(); |
b2476490 MT |
2273 | |
2274 | /* check to see if a clock with this name is already registered */ | |
d6968fca | 2275 | if (clk_core_lookup(core->name)) { |
d1302a36 | 2276 | pr_debug("%s: clk %s already initialized\n", |
d6968fca | 2277 | __func__, core->name); |
d1302a36 | 2278 | ret = -EEXIST; |
b2476490 | 2279 | goto out; |
d1302a36 | 2280 | } |
b2476490 | 2281 | |
d4d7e3dd | 2282 | /* check that clk_ops are sane. See Documentation/clk.txt */ |
d6968fca SB |
2283 | if (core->ops->set_rate && |
2284 | !((core->ops->round_rate || core->ops->determine_rate) && | |
2285 | core->ops->recalc_rate)) { | |
c44fccb5 MY |
2286 | pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", |
2287 | __func__, core->name); | |
d1302a36 | 2288 | ret = -EINVAL; |
d4d7e3dd MT |
2289 | goto out; |
2290 | } | |
2291 | ||
d6968fca | 2292 | if (core->ops->set_parent && !core->ops->get_parent) { |
c44fccb5 MY |
2293 | pr_err("%s: %s must implement .get_parent & .set_parent\n", |
2294 | __func__, core->name); | |
d1302a36 | 2295 | ret = -EINVAL; |
d4d7e3dd MT |
2296 | goto out; |
2297 | } | |
2298 | ||
3c8e77dd MY |
2299 | if (core->num_parents > 1 && !core->ops->get_parent) { |
2300 | pr_err("%s: %s must implement .get_parent as it has multi parents\n", | |
2301 | __func__, core->name); | |
2302 | ret = -EINVAL; | |
2303 | goto out; | |
2304 | } | |
2305 | ||
d6968fca SB |
2306 | if (core->ops->set_rate_and_parent && |
2307 | !(core->ops->set_parent && core->ops->set_rate)) { | |
c44fccb5 | 2308 | pr_err("%s: %s must implement .set_parent & .set_rate\n", |
d6968fca | 2309 | __func__, core->name); |
3fa2252b SB |
2310 | ret = -EINVAL; |
2311 | goto out; | |
2312 | } | |
2313 | ||
b2476490 | 2314 | /* throw a WARN if any entries in parent_names are NULL */ |
d6968fca SB |
2315 | for (i = 0; i < core->num_parents; i++) |
2316 | WARN(!core->parent_names[i], | |
b2476490 | 2317 | "%s: invalid NULL in %s's .parent_names\n", |
d6968fca | 2318 | __func__, core->name); |
b2476490 | 2319 | |
d6968fca | 2320 | core->parent = __clk_init_parent(core); |
b2476490 MT |
2321 | |
2322 | /* | |
706d5c73 SB |
2323 | * Populate core->parent if parent has already been clk_core_init'd. If |
2324 | * parent has not yet been clk_core_init'd then place clk in the orphan | |
47b0eeb3 | 2325 | * list. If clk doesn't have any parents then place it in the root |
b2476490 MT |
2326 | * clk list. |
2327 | * | |
2328 | * Every time a new clk is clk_init'd then we walk the list of orphan | |
2329 | * clocks and re-parent any that are children of the clock currently | |
2330 | * being clk_init'd. | |
2331 | */ | |
e6500344 | 2332 | if (core->parent) { |
d6968fca SB |
2333 | hlist_add_head(&core->child_node, |
2334 | &core->parent->children); | |
e6500344 | 2335 | core->orphan = core->parent->orphan; |
47b0eeb3 | 2336 | } else if (!core->num_parents) { |
d6968fca | 2337 | hlist_add_head(&core->child_node, &clk_root_list); |
e6500344 HS |
2338 | core->orphan = false; |
2339 | } else { | |
d6968fca | 2340 | hlist_add_head(&core->child_node, &clk_orphan_list); |
e6500344 HS |
2341 | core->orphan = true; |
2342 | } | |
b2476490 | 2343 | |
5279fc40 BB |
2344 | /* |
2345 | * Set clk's accuracy. The preferred method is to use | |
2346 | * .recalc_accuracy. For simple clocks and lazy developers the default | |
2347 | * fallback is to use the parent's accuracy. If a clock doesn't have a | |
2348 | * parent (or is orphaned) then accuracy is set to zero (perfect | |
2349 | * clock). | |
2350 | */ | |
d6968fca SB |
2351 | if (core->ops->recalc_accuracy) |
2352 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
2353 | __clk_get_accuracy(core->parent)); | |
2354 | else if (core->parent) | |
2355 | core->accuracy = core->parent->accuracy; | |
5279fc40 | 2356 | else |
d6968fca | 2357 | core->accuracy = 0; |
5279fc40 | 2358 | |
9824cf73 MR |
2359 | /* |
2360 | * Set clk's phase. | |
2361 | * Since a phase is by definition relative to its parent, just | |
2362 | * query the current clock phase, or just assume it's in phase. | |
2363 | */ | |
d6968fca SB |
2364 | if (core->ops->get_phase) |
2365 | core->phase = core->ops->get_phase(core->hw); | |
9824cf73 | 2366 | else |
d6968fca | 2367 | core->phase = 0; |
9824cf73 | 2368 | |
b2476490 MT |
2369 | /* |
2370 | * Set clk's rate. The preferred method is to use .recalc_rate. For | |
2371 | * simple clocks and lazy developers the default fallback is to use the | |
2372 | * parent's rate. If a clock doesn't have a parent (or is orphaned) | |
2373 | * then rate is set to zero. | |
2374 | */ | |
d6968fca SB |
2375 | if (core->ops->recalc_rate) |
2376 | rate = core->ops->recalc_rate(core->hw, | |
2377 | clk_core_get_rate_nolock(core->parent)); | |
2378 | else if (core->parent) | |
2379 | rate = core->parent->rate; | |
b2476490 | 2380 | else |
1c8e6004 | 2381 | rate = 0; |
d6968fca | 2382 | core->rate = core->req_rate = rate; |
b2476490 MT |
2383 | |
2384 | /* | |
0e8f6e49 MY |
2385 | * walk the list of orphan clocks and reparent any that newly finds a |
2386 | * parent. | |
b2476490 | 2387 | */ |
b67bfe0d | 2388 | hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { |
0e8f6e49 | 2389 | struct clk_core *parent = __clk_init_parent(orphan); |
1f61e5f1 | 2390 | |
0e8f6e49 MY |
2391 | if (parent) |
2392 | clk_core_reparent(orphan, parent); | |
2393 | } | |
b2476490 MT |
2394 | |
2395 | /* | |
2396 | * optional platform-specific magic | |
2397 | * | |
2398 | * The .init callback is not used by any of the basic clock types, but | |
2399 | * exists for weird hardware that must perform initialization magic. | |
2400 | * Please consider other ways of solving initialization problems before | |
24ee1a08 | 2401 | * using this callback, as its use is discouraged. |
b2476490 | 2402 | */ |
d6968fca SB |
2403 | if (core->ops->init) |
2404 | core->ops->init(core->hw); | |
b2476490 | 2405 | |
32b9b109 LJ |
2406 | if (core->flags & CLK_IS_CRITICAL) { |
2407 | clk_core_prepare(core); | |
2408 | clk_core_enable(core); | |
2409 | } | |
2410 | ||
d6968fca | 2411 | kref_init(&core->ref); |
b2476490 | 2412 | out: |
eab89f69 | 2413 | clk_prepare_unlock(); |
b2476490 | 2414 | |
89f7e9de | 2415 | if (!ret) |
d6968fca | 2416 | clk_debug_register(core); |
89f7e9de | 2417 | |
d1302a36 | 2418 | return ret; |
b2476490 MT |
2419 | } |
2420 | ||
035a61c3 TV |
2421 | struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id, |
2422 | const char *con_id) | |
0197b3ea | 2423 | { |
0197b3ea SK |
2424 | struct clk *clk; |
2425 | ||
035a61c3 | 2426 | /* This is to allow this function to be chained to others */ |
c1de1357 | 2427 | if (IS_ERR_OR_NULL(hw)) |
035a61c3 | 2428 | return (struct clk *) hw; |
0197b3ea | 2429 | |
035a61c3 TV |
2430 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); |
2431 | if (!clk) | |
2432 | return ERR_PTR(-ENOMEM); | |
2433 | ||
2434 | clk->core = hw->core; | |
2435 | clk->dev_id = dev_id; | |
2436 | clk->con_id = con_id; | |
1c8e6004 TV |
2437 | clk->max_rate = ULONG_MAX; |
2438 | ||
2439 | clk_prepare_lock(); | |
50595f8b | 2440 | hlist_add_head(&clk->clks_node, &hw->core->clks); |
1c8e6004 | 2441 | clk_prepare_unlock(); |
0197b3ea SK |
2442 | |
2443 | return clk; | |
2444 | } | |
035a61c3 | 2445 | |
73e0e496 | 2446 | void __clk_free_clk(struct clk *clk) |
1c8e6004 TV |
2447 | { |
2448 | clk_prepare_lock(); | |
50595f8b | 2449 | hlist_del(&clk->clks_node); |
1c8e6004 TV |
2450 | clk_prepare_unlock(); |
2451 | ||
2452 | kfree(clk); | |
2453 | } | |
0197b3ea | 2454 | |
293ba3b4 SB |
2455 | /** |
2456 | * clk_register - allocate a new clock, register it and return an opaque cookie | |
2457 | * @dev: device that is registering this clock | |
2458 | * @hw: link to hardware-specific clock data | |
2459 | * | |
2460 | * clk_register is the primary interface for populating the clock tree with new | |
2461 | * clock nodes. It returns a pointer to the newly allocated struct clk which | |
a59a5163 | 2462 | * cannot be dereferenced by driver code but may be used in conjunction with the |
293ba3b4 SB |
2463 | * rest of the clock API. In the event of an error clk_register will return an |
2464 | * error code; drivers must test for an error code after calling clk_register. | |
2465 | */ | |
2466 | struct clk *clk_register(struct device *dev, struct clk_hw *hw) | |
b2476490 | 2467 | { |
d1302a36 | 2468 | int i, ret; |
d6968fca | 2469 | struct clk_core *core; |
293ba3b4 | 2470 | |
d6968fca SB |
2471 | core = kzalloc(sizeof(*core), GFP_KERNEL); |
2472 | if (!core) { | |
293ba3b4 SB |
2473 | ret = -ENOMEM; |
2474 | goto fail_out; | |
2475 | } | |
b2476490 | 2476 | |
d6968fca SB |
2477 | core->name = kstrdup_const(hw->init->name, GFP_KERNEL); |
2478 | if (!core->name) { | |
0197b3ea SK |
2479 | ret = -ENOMEM; |
2480 | goto fail_name; | |
2481 | } | |
d6968fca | 2482 | core->ops = hw->init->ops; |
ac2df527 | 2483 | if (dev && dev->driver) |
d6968fca SB |
2484 | core->owner = dev->driver->owner; |
2485 | core->hw = hw; | |
2486 | core->flags = hw->init->flags; | |
2487 | core->num_parents = hw->init->num_parents; | |
9783c0d9 SB |
2488 | core->min_rate = 0; |
2489 | core->max_rate = ULONG_MAX; | |
d6968fca | 2490 | hw->core = core; |
b2476490 | 2491 | |
d1302a36 | 2492 | /* allocate local copy in case parent_names is __initdata */ |
d6968fca | 2493 | core->parent_names = kcalloc(core->num_parents, sizeof(char *), |
96a7ed90 | 2494 | GFP_KERNEL); |
d1302a36 | 2495 | |
d6968fca | 2496 | if (!core->parent_names) { |
d1302a36 MT |
2497 | ret = -ENOMEM; |
2498 | goto fail_parent_names; | |
2499 | } | |
2500 | ||
2501 | ||
2502 | /* copy each string name in case parent_names is __initdata */ | |
d6968fca SB |
2503 | for (i = 0; i < core->num_parents; i++) { |
2504 | core->parent_names[i] = kstrdup_const(hw->init->parent_names[i], | |
0197b3ea | 2505 | GFP_KERNEL); |
d6968fca | 2506 | if (!core->parent_names[i]) { |
d1302a36 MT |
2507 | ret = -ENOMEM; |
2508 | goto fail_parent_names_copy; | |
2509 | } | |
2510 | } | |
2511 | ||
176d1169 MY |
2512 | /* avoid unnecessary string look-ups of clk_core's possible parents. */ |
2513 | core->parents = kcalloc(core->num_parents, sizeof(*core->parents), | |
2514 | GFP_KERNEL); | |
2515 | if (!core->parents) { | |
2516 | ret = -ENOMEM; | |
2517 | goto fail_parents; | |
2518 | }; | |
2519 | ||
d6968fca | 2520 | INIT_HLIST_HEAD(&core->clks); |
1c8e6004 | 2521 | |
035a61c3 TV |
2522 | hw->clk = __clk_create_clk(hw, NULL, NULL); |
2523 | if (IS_ERR(hw->clk)) { | |
035a61c3 | 2524 | ret = PTR_ERR(hw->clk); |
176d1169 | 2525 | goto fail_parents; |
035a61c3 TV |
2526 | } |
2527 | ||
be45ebf2 | 2528 | ret = __clk_core_init(core); |
d1302a36 | 2529 | if (!ret) |
035a61c3 | 2530 | return hw->clk; |
b2476490 | 2531 | |
1c8e6004 | 2532 | __clk_free_clk(hw->clk); |
035a61c3 | 2533 | hw->clk = NULL; |
b2476490 | 2534 | |
176d1169 MY |
2535 | fail_parents: |
2536 | kfree(core->parents); | |
d1302a36 MT |
2537 | fail_parent_names_copy: |
2538 | while (--i >= 0) | |
d6968fca SB |
2539 | kfree_const(core->parent_names[i]); |
2540 | kfree(core->parent_names); | |
d1302a36 | 2541 | fail_parent_names: |
d6968fca | 2542 | kfree_const(core->name); |
0197b3ea | 2543 | fail_name: |
d6968fca | 2544 | kfree(core); |
d1302a36 MT |
2545 | fail_out: |
2546 | return ERR_PTR(ret); | |
b2476490 MT |
2547 | } |
2548 | EXPORT_SYMBOL_GPL(clk_register); | |
2549 | ||
4143804c SB |
2550 | /** |
2551 | * clk_hw_register - register a clk_hw and return an error code | |
2552 | * @dev: device that is registering this clock | |
2553 | * @hw: link to hardware-specific clock data | |
2554 | * | |
2555 | * clk_hw_register is the primary interface for populating the clock tree with | |
2556 | * new clock nodes. It returns an integer equal to zero indicating success or | |
2557 | * less than zero indicating failure. Drivers must test for an error code after | |
2558 | * calling clk_hw_register(). | |
2559 | */ | |
2560 | int clk_hw_register(struct device *dev, struct clk_hw *hw) | |
2561 | { | |
2562 | return PTR_ERR_OR_ZERO(clk_register(dev, hw)); | |
2563 | } | |
2564 | EXPORT_SYMBOL_GPL(clk_hw_register); | |
2565 | ||
6e5ab41b | 2566 | /* Free memory allocated for a clock. */ |
fcb0ee6a SN |
2567 | static void __clk_release(struct kref *ref) |
2568 | { | |
d6968fca SB |
2569 | struct clk_core *core = container_of(ref, struct clk_core, ref); |
2570 | int i = core->num_parents; | |
fcb0ee6a | 2571 | |
496eadf8 KK |
2572 | lockdep_assert_held(&prepare_lock); |
2573 | ||
d6968fca | 2574 | kfree(core->parents); |
fcb0ee6a | 2575 | while (--i >= 0) |
d6968fca | 2576 | kfree_const(core->parent_names[i]); |
fcb0ee6a | 2577 | |
d6968fca SB |
2578 | kfree(core->parent_names); |
2579 | kfree_const(core->name); | |
2580 | kfree(core); | |
fcb0ee6a SN |
2581 | } |
2582 | ||
2583 | /* | |
2584 | * Empty clk_ops for unregistered clocks. These are used temporarily | |
2585 | * after clk_unregister() was called on a clock and until last clock | |
2586 | * consumer calls clk_put() and the struct clk object is freed. | |
2587 | */ | |
2588 | static int clk_nodrv_prepare_enable(struct clk_hw *hw) | |
2589 | { | |
2590 | return -ENXIO; | |
2591 | } | |
2592 | ||
2593 | static void clk_nodrv_disable_unprepare(struct clk_hw *hw) | |
2594 | { | |
2595 | WARN_ON_ONCE(1); | |
2596 | } | |
2597 | ||
2598 | static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate, | |
2599 | unsigned long parent_rate) | |
2600 | { | |
2601 | return -ENXIO; | |
2602 | } | |
2603 | ||
2604 | static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) | |
2605 | { | |
2606 | return -ENXIO; | |
2607 | } | |
2608 | ||
2609 | static const struct clk_ops clk_nodrv_ops = { | |
2610 | .enable = clk_nodrv_prepare_enable, | |
2611 | .disable = clk_nodrv_disable_unprepare, | |
2612 | .prepare = clk_nodrv_prepare_enable, | |
2613 | .unprepare = clk_nodrv_disable_unprepare, | |
2614 | .set_rate = clk_nodrv_set_rate, | |
2615 | .set_parent = clk_nodrv_set_parent, | |
2616 | }; | |
2617 | ||
1df5c939 MB |
2618 | /** |
2619 | * clk_unregister - unregister a currently registered clock | |
2620 | * @clk: clock to unregister | |
1df5c939 | 2621 | */ |
fcb0ee6a SN |
2622 | void clk_unregister(struct clk *clk) |
2623 | { | |
2624 | unsigned long flags; | |
2625 | ||
6314b679 SB |
2626 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
2627 | return; | |
2628 | ||
035a61c3 | 2629 | clk_debug_unregister(clk->core); |
fcb0ee6a SN |
2630 | |
2631 | clk_prepare_lock(); | |
2632 | ||
035a61c3 TV |
2633 | if (clk->core->ops == &clk_nodrv_ops) { |
2634 | pr_err("%s: unregistered clock: %s\n", __func__, | |
2635 | clk->core->name); | |
4106a3d9 | 2636 | goto unlock; |
fcb0ee6a SN |
2637 | } |
2638 | /* | |
2639 | * Assign empty clock ops for consumers that might still hold | |
2640 | * a reference to this clock. | |
2641 | */ | |
2642 | flags = clk_enable_lock(); | |
035a61c3 | 2643 | clk->core->ops = &clk_nodrv_ops; |
fcb0ee6a SN |
2644 | clk_enable_unlock(flags); |
2645 | ||
035a61c3 TV |
2646 | if (!hlist_empty(&clk->core->children)) { |
2647 | struct clk_core *child; | |
874f224c | 2648 | struct hlist_node *t; |
fcb0ee6a SN |
2649 | |
2650 | /* Reparent all children to the orphan list. */ | |
035a61c3 TV |
2651 | hlist_for_each_entry_safe(child, t, &clk->core->children, |
2652 | child_node) | |
2653 | clk_core_set_parent(child, NULL); | |
fcb0ee6a SN |
2654 | } |
2655 | ||
035a61c3 | 2656 | hlist_del_init(&clk->core->child_node); |
fcb0ee6a | 2657 | |
035a61c3 | 2658 | if (clk->core->prepare_count) |
fcb0ee6a | 2659 | pr_warn("%s: unregistering prepared clock: %s\n", |
035a61c3 TV |
2660 | __func__, clk->core->name); |
2661 | kref_put(&clk->core->ref, __clk_release); | |
4106a3d9 | 2662 | unlock: |
fcb0ee6a SN |
2663 | clk_prepare_unlock(); |
2664 | } | |
1df5c939 MB |
2665 | EXPORT_SYMBOL_GPL(clk_unregister); |
2666 | ||
4143804c SB |
2667 | /** |
2668 | * clk_hw_unregister - unregister a currently registered clk_hw | |
2669 | * @hw: hardware-specific clock data to unregister | |
2670 | */ | |
2671 | void clk_hw_unregister(struct clk_hw *hw) | |
2672 | { | |
2673 | clk_unregister(hw->clk); | |
2674 | } | |
2675 | EXPORT_SYMBOL_GPL(clk_hw_unregister); | |
2676 | ||
46c8773a SB |
2677 | static void devm_clk_release(struct device *dev, void *res) |
2678 | { | |
293ba3b4 | 2679 | clk_unregister(*(struct clk **)res); |
46c8773a SB |
2680 | } |
2681 | ||
4143804c SB |
2682 | static void devm_clk_hw_release(struct device *dev, void *res) |
2683 | { | |
2684 | clk_hw_unregister(*(struct clk_hw **)res); | |
2685 | } | |
2686 | ||
46c8773a SB |
2687 | /** |
2688 | * devm_clk_register - resource managed clk_register() | |
2689 | * @dev: device that is registering this clock | |
2690 | * @hw: link to hardware-specific clock data | |
2691 | * | |
2692 | * Managed clk_register(). Clocks returned from this function are | |
2693 | * automatically clk_unregister()ed on driver detach. See clk_register() for | |
2694 | * more information. | |
2695 | */ | |
2696 | struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) | |
2697 | { | |
2698 | struct clk *clk; | |
293ba3b4 | 2699 | struct clk **clkp; |
46c8773a | 2700 | |
293ba3b4 SB |
2701 | clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); |
2702 | if (!clkp) | |
46c8773a SB |
2703 | return ERR_PTR(-ENOMEM); |
2704 | ||
293ba3b4 SB |
2705 | clk = clk_register(dev, hw); |
2706 | if (!IS_ERR(clk)) { | |
2707 | *clkp = clk; | |
2708 | devres_add(dev, clkp); | |
46c8773a | 2709 | } else { |
293ba3b4 | 2710 | devres_free(clkp); |
46c8773a SB |
2711 | } |
2712 | ||
2713 | return clk; | |
2714 | } | |
2715 | EXPORT_SYMBOL_GPL(devm_clk_register); | |
2716 | ||
4143804c SB |
2717 | /** |
2718 | * devm_clk_hw_register - resource managed clk_hw_register() | |
2719 | * @dev: device that is registering this clock | |
2720 | * @hw: link to hardware-specific clock data | |
2721 | * | |
c47265ad | 2722 | * Managed clk_hw_register(). Clocks registered by this function are |
4143804c SB |
2723 | * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register() |
2724 | * for more information. | |
2725 | */ | |
2726 | int devm_clk_hw_register(struct device *dev, struct clk_hw *hw) | |
2727 | { | |
2728 | struct clk_hw **hwp; | |
2729 | int ret; | |
2730 | ||
2731 | hwp = devres_alloc(devm_clk_hw_release, sizeof(*hwp), GFP_KERNEL); | |
2732 | if (!hwp) | |
2733 | return -ENOMEM; | |
2734 | ||
2735 | ret = clk_hw_register(dev, hw); | |
2736 | if (!ret) { | |
2737 | *hwp = hw; | |
2738 | devres_add(dev, hwp); | |
2739 | } else { | |
2740 | devres_free(hwp); | |
2741 | } | |
2742 | ||
2743 | return ret; | |
2744 | } | |
2745 | EXPORT_SYMBOL_GPL(devm_clk_hw_register); | |
2746 | ||
46c8773a SB |
2747 | static int devm_clk_match(struct device *dev, void *res, void *data) |
2748 | { | |
2749 | struct clk *c = res; | |
2750 | if (WARN_ON(!c)) | |
2751 | return 0; | |
2752 | return c == data; | |
2753 | } | |
2754 | ||
4143804c SB |
2755 | static int devm_clk_hw_match(struct device *dev, void *res, void *data) |
2756 | { | |
2757 | struct clk_hw *hw = res; | |
2758 | ||
2759 | if (WARN_ON(!hw)) | |
2760 | return 0; | |
2761 | return hw == data; | |
2762 | } | |
2763 | ||
46c8773a SB |
2764 | /** |
2765 | * devm_clk_unregister - resource managed clk_unregister() | |
2766 | * @clk: clock to unregister | |
2767 | * | |
2768 | * Deallocate a clock allocated with devm_clk_register(). Normally | |
2769 | * this function will not need to be called and the resource management | |
2770 | * code will ensure that the resource is freed. | |
2771 | */ | |
2772 | void devm_clk_unregister(struct device *dev, struct clk *clk) | |
2773 | { | |
2774 | WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk)); | |
2775 | } | |
2776 | EXPORT_SYMBOL_GPL(devm_clk_unregister); | |
2777 | ||
4143804c SB |
2778 | /** |
2779 | * devm_clk_hw_unregister - resource managed clk_hw_unregister() | |
2780 | * @dev: device that is unregistering the hardware-specific clock data | |
2781 | * @hw: link to hardware-specific clock data | |
2782 | * | |
2783 | * Unregister a clk_hw registered with devm_clk_hw_register(). Normally | |
2784 | * this function will not need to be called and the resource management | |
2785 | * code will ensure that the resource is freed. | |
2786 | */ | |
2787 | void devm_clk_hw_unregister(struct device *dev, struct clk_hw *hw) | |
2788 | { | |
2789 | WARN_ON(devres_release(dev, devm_clk_hw_release, devm_clk_hw_match, | |
2790 | hw)); | |
2791 | } | |
2792 | EXPORT_SYMBOL_GPL(devm_clk_hw_unregister); | |
2793 | ||
ac2df527 SN |
2794 | /* |
2795 | * clkdev helpers | |
2796 | */ | |
2797 | int __clk_get(struct clk *clk) | |
2798 | { | |
035a61c3 TV |
2799 | struct clk_core *core = !clk ? NULL : clk->core; |
2800 | ||
2801 | if (core) { | |
2802 | if (!try_module_get(core->owner)) | |
00efcb1c | 2803 | return 0; |
ac2df527 | 2804 | |
035a61c3 | 2805 | kref_get(&core->ref); |
00efcb1c | 2806 | } |
ac2df527 SN |
2807 | return 1; |
2808 | } | |
2809 | ||
2810 | void __clk_put(struct clk *clk) | |
2811 | { | |
10cdfe54 TV |
2812 | struct module *owner; |
2813 | ||
00efcb1c | 2814 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
ac2df527 SN |
2815 | return; |
2816 | ||
fcb0ee6a | 2817 | clk_prepare_lock(); |
1c8e6004 | 2818 | |
50595f8b | 2819 | hlist_del(&clk->clks_node); |
ec02ace8 TV |
2820 | if (clk->min_rate > clk->core->req_rate || |
2821 | clk->max_rate < clk->core->req_rate) | |
2822 | clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
2823 | ||
1c8e6004 TV |
2824 | owner = clk->core->owner; |
2825 | kref_put(&clk->core->ref, __clk_release); | |
2826 | ||
fcb0ee6a SN |
2827 | clk_prepare_unlock(); |
2828 | ||
10cdfe54 | 2829 | module_put(owner); |
035a61c3 | 2830 | |
035a61c3 | 2831 | kfree(clk); |
ac2df527 SN |
2832 | } |
2833 | ||
b2476490 MT |
2834 | /*** clk rate change notifiers ***/ |
2835 | ||
2836 | /** | |
2837 | * clk_notifier_register - add a clk rate change notifier | |
2838 | * @clk: struct clk * to watch | |
2839 | * @nb: struct notifier_block * with callback info | |
2840 | * | |
2841 | * Request notification when clk's rate changes. This uses an SRCU | |
2842 | * notifier because we want it to block and notifier unregistrations are | |
2843 | * uncommon. The callbacks associated with the notifier must not | |
2844 | * re-enter into the clk framework by calling any top-level clk APIs; | |
2845 | * this will cause a nested prepare_lock mutex. | |
2846 | * | |
198bb594 MY |
2847 | * In all notification cases (pre, post and abort rate change) the original |
2848 | * clock rate is passed to the callback via struct clk_notifier_data.old_rate | |
2849 | * and the new frequency is passed via struct clk_notifier_data.new_rate. | |
b2476490 | 2850 | * |
b2476490 MT |
2851 | * clk_notifier_register() must be called from non-atomic context. |
2852 | * Returns -EINVAL if called with null arguments, -ENOMEM upon | |
2853 | * allocation failure; otherwise, passes along the return value of | |
2854 | * srcu_notifier_chain_register(). | |
2855 | */ | |
2856 | int clk_notifier_register(struct clk *clk, struct notifier_block *nb) | |
2857 | { | |
2858 | struct clk_notifier *cn; | |
2859 | int ret = -ENOMEM; | |
2860 | ||
2861 | if (!clk || !nb) | |
2862 | return -EINVAL; | |
2863 | ||
eab89f69 | 2864 | clk_prepare_lock(); |
b2476490 MT |
2865 | |
2866 | /* search the list of notifiers for this clk */ | |
2867 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2868 | if (cn->clk == clk) | |
2869 | break; | |
2870 | ||
2871 | /* if clk wasn't in the notifier list, allocate new clk_notifier */ | |
2872 | if (cn->clk != clk) { | |
2873 | cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL); | |
2874 | if (!cn) | |
2875 | goto out; | |
2876 | ||
2877 | cn->clk = clk; | |
2878 | srcu_init_notifier_head(&cn->notifier_head); | |
2879 | ||
2880 | list_add(&cn->node, &clk_notifier_list); | |
2881 | } | |
2882 | ||
2883 | ret = srcu_notifier_chain_register(&cn->notifier_head, nb); | |
2884 | ||
035a61c3 | 2885 | clk->core->notifier_count++; |
b2476490 MT |
2886 | |
2887 | out: | |
eab89f69 | 2888 | clk_prepare_unlock(); |
b2476490 MT |
2889 | |
2890 | return ret; | |
2891 | } | |
2892 | EXPORT_SYMBOL_GPL(clk_notifier_register); | |
2893 | ||
2894 | /** | |
2895 | * clk_notifier_unregister - remove a clk rate change notifier | |
2896 | * @clk: struct clk * | |
2897 | * @nb: struct notifier_block * with callback info | |
2898 | * | |
2899 | * Request no further notification for changes to 'clk' and frees memory | |
2900 | * allocated in clk_notifier_register. | |
2901 | * | |
2902 | * Returns -EINVAL if called with null arguments; otherwise, passes | |
2903 | * along the return value of srcu_notifier_chain_unregister(). | |
2904 | */ | |
2905 | int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) | |
2906 | { | |
2907 | struct clk_notifier *cn = NULL; | |
2908 | int ret = -EINVAL; | |
2909 | ||
2910 | if (!clk || !nb) | |
2911 | return -EINVAL; | |
2912 | ||
eab89f69 | 2913 | clk_prepare_lock(); |
b2476490 MT |
2914 | |
2915 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2916 | if (cn->clk == clk) | |
2917 | break; | |
2918 | ||
2919 | if (cn->clk == clk) { | |
2920 | ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); | |
2921 | ||
035a61c3 | 2922 | clk->core->notifier_count--; |
b2476490 MT |
2923 | |
2924 | /* XXX the notifier code should handle this better */ | |
2925 | if (!cn->notifier_head.head) { | |
2926 | srcu_cleanup_notifier_head(&cn->notifier_head); | |
72b5322f | 2927 | list_del(&cn->node); |
b2476490 MT |
2928 | kfree(cn); |
2929 | } | |
2930 | ||
2931 | } else { | |
2932 | ret = -ENOENT; | |
2933 | } | |
2934 | ||
eab89f69 | 2935 | clk_prepare_unlock(); |
b2476490 MT |
2936 | |
2937 | return ret; | |
2938 | } | |
2939 | EXPORT_SYMBOL_GPL(clk_notifier_unregister); | |
766e6a4e GL |
2940 | |
2941 | #ifdef CONFIG_OF | |
2942 | /** | |
2943 | * struct of_clk_provider - Clock provider registration structure | |
2944 | * @link: Entry in global list of clock providers | |
2945 | * @node: Pointer to device tree node of clock provider | |
2946 | * @get: Get clock callback. Returns NULL or a struct clk for the | |
2947 | * given clock specifier | |
2948 | * @data: context pointer to be passed into @get callback | |
2949 | */ | |
2950 | struct of_clk_provider { | |
2951 | struct list_head link; | |
2952 | ||
2953 | struct device_node *node; | |
2954 | struct clk *(*get)(struct of_phandle_args *clkspec, void *data); | |
0861e5b8 | 2955 | struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data); |
766e6a4e GL |
2956 | void *data; |
2957 | }; | |
2958 | ||
f2f6c255 PG |
2959 | static const struct of_device_id __clk_of_table_sentinel |
2960 | __used __section(__clk_of_table_end); | |
2961 | ||
766e6a4e | 2962 | static LIST_HEAD(of_clk_providers); |
d6782c26 SN |
2963 | static DEFINE_MUTEX(of_clk_mutex); |
2964 | ||
766e6a4e GL |
2965 | struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, |
2966 | void *data) | |
2967 | { | |
2968 | return data; | |
2969 | } | |
2970 | EXPORT_SYMBOL_GPL(of_clk_src_simple_get); | |
2971 | ||
0861e5b8 SB |
2972 | struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data) |
2973 | { | |
2974 | return data; | |
2975 | } | |
2976 | EXPORT_SYMBOL_GPL(of_clk_hw_simple_get); | |
2977 | ||
494bfec9 SG |
2978 | struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data) |
2979 | { | |
2980 | struct clk_onecell_data *clk_data = data; | |
2981 | unsigned int idx = clkspec->args[0]; | |
2982 | ||
2983 | if (idx >= clk_data->clk_num) { | |
7e96353c | 2984 | pr_err("%s: invalid clock index %u\n", __func__, idx); |
494bfec9 SG |
2985 | return ERR_PTR(-EINVAL); |
2986 | } | |
2987 | ||
2988 | return clk_data->clks[idx]; | |
2989 | } | |
2990 | EXPORT_SYMBOL_GPL(of_clk_src_onecell_get); | |
2991 | ||
0861e5b8 SB |
2992 | struct clk_hw * |
2993 | of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data) | |
2994 | { | |
2995 | struct clk_hw_onecell_data *hw_data = data; | |
2996 | unsigned int idx = clkspec->args[0]; | |
2997 | ||
2998 | if (idx >= hw_data->num) { | |
2999 | pr_err("%s: invalid index %u\n", __func__, idx); | |
3000 | return ERR_PTR(-EINVAL); | |
3001 | } | |
3002 | ||
3003 | return hw_data->hws[idx]; | |
3004 | } | |
3005 | EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get); | |
3006 | ||
766e6a4e GL |
3007 | /** |
3008 | * of_clk_add_provider() - Register a clock provider for a node | |
3009 | * @np: Device node pointer associated with clock provider | |
3010 | * @clk_src_get: callback for decoding clock | |
3011 | * @data: context pointer for @clk_src_get callback. | |
3012 | */ | |
3013 | int of_clk_add_provider(struct device_node *np, | |
3014 | struct clk *(*clk_src_get)(struct of_phandle_args *clkspec, | |
3015 | void *data), | |
3016 | void *data) | |
3017 | { | |
3018 | struct of_clk_provider *cp; | |
86be408b | 3019 | int ret; |
766e6a4e GL |
3020 | |
3021 | cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL); | |
3022 | if (!cp) | |
3023 | return -ENOMEM; | |
3024 | ||
3025 | cp->node = of_node_get(np); | |
3026 | cp->data = data; | |
3027 | cp->get = clk_src_get; | |
3028 | ||
d6782c26 | 3029 | mutex_lock(&of_clk_mutex); |
766e6a4e | 3030 | list_add(&cp->link, &of_clk_providers); |
d6782c26 | 3031 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
3032 | pr_debug("Added clock from %s\n", np->full_name); |
3033 | ||
86be408b SN |
3034 | ret = of_clk_set_defaults(np, true); |
3035 | if (ret < 0) | |
3036 | of_clk_del_provider(np); | |
3037 | ||
3038 | return ret; | |
766e6a4e GL |
3039 | } |
3040 | EXPORT_SYMBOL_GPL(of_clk_add_provider); | |
3041 | ||
0861e5b8 SB |
3042 | /** |
3043 | * of_clk_add_hw_provider() - Register a clock provider for a node | |
3044 | * @np: Device node pointer associated with clock provider | |
3045 | * @get: callback for decoding clk_hw | |
3046 | * @data: context pointer for @get callback. | |
3047 | */ | |
3048 | int of_clk_add_hw_provider(struct device_node *np, | |
3049 | struct clk_hw *(*get)(struct of_phandle_args *clkspec, | |
3050 | void *data), | |
3051 | void *data) | |
3052 | { | |
3053 | struct of_clk_provider *cp; | |
3054 | int ret; | |
3055 | ||
3056 | cp = kzalloc(sizeof(*cp), GFP_KERNEL); | |
3057 | if (!cp) | |
3058 | return -ENOMEM; | |
3059 | ||
3060 | cp->node = of_node_get(np); | |
3061 | cp->data = data; | |
3062 | cp->get_hw = get; | |
3063 | ||
3064 | mutex_lock(&of_clk_mutex); | |
3065 | list_add(&cp->link, &of_clk_providers); | |
3066 | mutex_unlock(&of_clk_mutex); | |
3067 | pr_debug("Added clk_hw provider from %s\n", np->full_name); | |
3068 | ||
3069 | ret = of_clk_set_defaults(np, true); | |
3070 | if (ret < 0) | |
3071 | of_clk_del_provider(np); | |
3072 | ||
3073 | return ret; | |
3074 | } | |
3075 | EXPORT_SYMBOL_GPL(of_clk_add_hw_provider); | |
3076 | ||
766e6a4e GL |
3077 | /** |
3078 | * of_clk_del_provider() - Remove a previously registered clock provider | |
3079 | * @np: Device node pointer associated with clock provider | |
3080 | */ | |
3081 | void of_clk_del_provider(struct device_node *np) | |
3082 | { | |
3083 | struct of_clk_provider *cp; | |
3084 | ||
d6782c26 | 3085 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
3086 | list_for_each_entry(cp, &of_clk_providers, link) { |
3087 | if (cp->node == np) { | |
3088 | list_del(&cp->link); | |
3089 | of_node_put(cp->node); | |
3090 | kfree(cp); | |
3091 | break; | |
3092 | } | |
3093 | } | |
d6782c26 | 3094 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
3095 | } |
3096 | EXPORT_SYMBOL_GPL(of_clk_del_provider); | |
3097 | ||
0861e5b8 SB |
3098 | static struct clk_hw * |
3099 | __of_clk_get_hw_from_provider(struct of_clk_provider *provider, | |
3100 | struct of_phandle_args *clkspec) | |
3101 | { | |
3102 | struct clk *clk; | |
3103 | struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER); | |
3104 | ||
3105 | if (provider->get_hw) { | |
3106 | hw = provider->get_hw(clkspec, provider->data); | |
3107 | } else if (provider->get) { | |
3108 | clk = provider->get(clkspec, provider->data); | |
3109 | if (!IS_ERR(clk)) | |
3110 | hw = __clk_get_hw(clk); | |
3111 | else | |
3112 | hw = ERR_CAST(clk); | |
3113 | } | |
3114 | ||
3115 | return hw; | |
3116 | } | |
3117 | ||
73e0e496 SB |
3118 | struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec, |
3119 | const char *dev_id, const char *con_id) | |
766e6a4e GL |
3120 | { |
3121 | struct of_clk_provider *provider; | |
a34cd466 | 3122 | struct clk *clk = ERR_PTR(-EPROBE_DEFER); |
0861e5b8 | 3123 | struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER); |
766e6a4e | 3124 | |
306c342f SB |
3125 | if (!clkspec) |
3126 | return ERR_PTR(-EINVAL); | |
3127 | ||
766e6a4e | 3128 | /* Check if we have such a provider in our array */ |
306c342f | 3129 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
3130 | list_for_each_entry(provider, &of_clk_providers, link) { |
3131 | if (provider->node == clkspec->np) | |
0861e5b8 SB |
3132 | hw = __of_clk_get_hw_from_provider(provider, clkspec); |
3133 | if (!IS_ERR(hw)) { | |
3134 | clk = __clk_create_clk(hw, dev_id, con_id); | |
73e0e496 SB |
3135 | |
3136 | if (!IS_ERR(clk) && !__clk_get(clk)) { | |
3137 | __clk_free_clk(clk); | |
3138 | clk = ERR_PTR(-ENOENT); | |
3139 | } | |
3140 | ||
766e6a4e | 3141 | break; |
73e0e496 | 3142 | } |
766e6a4e | 3143 | } |
306c342f | 3144 | mutex_unlock(&of_clk_mutex); |
d6782c26 SN |
3145 | |
3146 | return clk; | |
3147 | } | |
3148 | ||
306c342f SB |
3149 | /** |
3150 | * of_clk_get_from_provider() - Lookup a clock from a clock provider | |
3151 | * @clkspec: pointer to a clock specifier data structure | |
3152 | * | |
3153 | * This function looks up a struct clk from the registered list of clock | |
3154 | * providers, an input is a clock specifier data structure as returned | |
3155 | * from the of_parse_phandle_with_args() function call. | |
3156 | */ | |
d6782c26 SN |
3157 | struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) |
3158 | { | |
306c342f | 3159 | return __of_clk_get_from_provider(clkspec, NULL, __func__); |
766e6a4e | 3160 | } |
fb4dd222 | 3161 | EXPORT_SYMBOL_GPL(of_clk_get_from_provider); |
766e6a4e | 3162 | |
929e7f3b SB |
3163 | /** |
3164 | * of_clk_get_parent_count() - Count the number of clocks a device node has | |
3165 | * @np: device node to count | |
3166 | * | |
3167 | * Returns: The number of clocks that are possible parents of this node | |
3168 | */ | |
3169 | unsigned int of_clk_get_parent_count(struct device_node *np) | |
f6102742 | 3170 | { |
929e7f3b SB |
3171 | int count; |
3172 | ||
3173 | count = of_count_phandle_with_args(np, "clocks", "#clock-cells"); | |
3174 | if (count < 0) | |
3175 | return 0; | |
3176 | ||
3177 | return count; | |
f6102742 MT |
3178 | } |
3179 | EXPORT_SYMBOL_GPL(of_clk_get_parent_count); | |
3180 | ||
766e6a4e GL |
3181 | const char *of_clk_get_parent_name(struct device_node *np, int index) |
3182 | { | |
3183 | struct of_phandle_args clkspec; | |
7a0fc1a3 | 3184 | struct property *prop; |
766e6a4e | 3185 | const char *clk_name; |
7a0fc1a3 BD |
3186 | const __be32 *vp; |
3187 | u32 pv; | |
766e6a4e | 3188 | int rc; |
7a0fc1a3 | 3189 | int count; |
0a4807c2 | 3190 | struct clk *clk; |
766e6a4e | 3191 | |
766e6a4e GL |
3192 | rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, |
3193 | &clkspec); | |
3194 | if (rc) | |
3195 | return NULL; | |
3196 | ||
7a0fc1a3 BD |
3197 | index = clkspec.args_count ? clkspec.args[0] : 0; |
3198 | count = 0; | |
3199 | ||
3200 | /* if there is an indices property, use it to transfer the index | |
3201 | * specified into an array offset for the clock-output-names property. | |
3202 | */ | |
3203 | of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { | |
3204 | if (index == pv) { | |
3205 | index = count; | |
3206 | break; | |
3207 | } | |
3208 | count++; | |
3209 | } | |
8da411cc MY |
3210 | /* We went off the end of 'clock-indices' without finding it */ |
3211 | if (prop && !vp) | |
3212 | return NULL; | |
7a0fc1a3 | 3213 | |
766e6a4e | 3214 | if (of_property_read_string_index(clkspec.np, "clock-output-names", |
7a0fc1a3 | 3215 | index, |
0a4807c2 SB |
3216 | &clk_name) < 0) { |
3217 | /* | |
3218 | * Best effort to get the name if the clock has been | |
3219 | * registered with the framework. If the clock isn't | |
3220 | * registered, we return the node name as the name of | |
3221 | * the clock as long as #clock-cells = 0. | |
3222 | */ | |
3223 | clk = of_clk_get_from_provider(&clkspec); | |
3224 | if (IS_ERR(clk)) { | |
3225 | if (clkspec.args_count == 0) | |
3226 | clk_name = clkspec.np->name; | |
3227 | else | |
3228 | clk_name = NULL; | |
3229 | } else { | |
3230 | clk_name = __clk_get_name(clk); | |
3231 | clk_put(clk); | |
3232 | } | |
3233 | } | |
3234 | ||
766e6a4e GL |
3235 | |
3236 | of_node_put(clkspec.np); | |
3237 | return clk_name; | |
3238 | } | |
3239 | EXPORT_SYMBOL_GPL(of_clk_get_parent_name); | |
3240 | ||
2e61dfb3 DN |
3241 | /** |
3242 | * of_clk_parent_fill() - Fill @parents with names of @np's parents and return | |
3243 | * number of parents | |
3244 | * @np: Device node pointer associated with clock provider | |
3245 | * @parents: pointer to char array that hold the parents' names | |
3246 | * @size: size of the @parents array | |
3247 | * | |
3248 | * Return: number of parents for the clock node. | |
3249 | */ | |
3250 | int of_clk_parent_fill(struct device_node *np, const char **parents, | |
3251 | unsigned int size) | |
3252 | { | |
3253 | unsigned int i = 0; | |
3254 | ||
3255 | while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL) | |
3256 | i++; | |
3257 | ||
3258 | return i; | |
3259 | } | |
3260 | EXPORT_SYMBOL_GPL(of_clk_parent_fill); | |
3261 | ||
1771b10d GC |
3262 | struct clock_provider { |
3263 | of_clk_init_cb_t clk_init_cb; | |
3264 | struct device_node *np; | |
3265 | struct list_head node; | |
3266 | }; | |
3267 | ||
1771b10d GC |
3268 | /* |
3269 | * This function looks for a parent clock. If there is one, then it | |
3270 | * checks that the provider for this parent clock was initialized, in | |
3271 | * this case the parent clock will be ready. | |
3272 | */ | |
3273 | static int parent_ready(struct device_node *np) | |
3274 | { | |
3275 | int i = 0; | |
3276 | ||
3277 | while (true) { | |
3278 | struct clk *clk = of_clk_get(np, i); | |
3279 | ||
3280 | /* this parent is ready we can check the next one */ | |
3281 | if (!IS_ERR(clk)) { | |
3282 | clk_put(clk); | |
3283 | i++; | |
3284 | continue; | |
3285 | } | |
3286 | ||
3287 | /* at least one parent is not ready, we exit now */ | |
3288 | if (PTR_ERR(clk) == -EPROBE_DEFER) | |
3289 | return 0; | |
3290 | ||
3291 | /* | |
3292 | * Here we make assumption that the device tree is | |
3293 | * written correctly. So an error means that there is | |
3294 | * no more parent. As we didn't exit yet, then the | |
3295 | * previous parent are ready. If there is no clock | |
3296 | * parent, no need to wait for them, then we can | |
3297 | * consider their absence as being ready | |
3298 | */ | |
3299 | return 1; | |
3300 | } | |
3301 | } | |
3302 | ||
d56f8994 LJ |
3303 | /** |
3304 | * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree | |
3305 | * @np: Device node pointer associated with clock provider | |
3306 | * @index: clock index | |
3307 | * @flags: pointer to clk_core->flags | |
3308 | * | |
3309 | * Detects if the clock-critical property exists and, if so, sets the | |
3310 | * corresponding CLK_IS_CRITICAL flag. | |
3311 | * | |
3312 | * Do not use this function. It exists only for legacy Device Tree | |
3313 | * bindings, such as the one-clock-per-node style that are outdated. | |
3314 | * Those bindings typically put all clock data into .dts and the Linux | |
3315 | * driver has no clock data, thus making it impossible to set this flag | |
3316 | * correctly from the driver. Only those drivers may call | |
3317 | * of_clk_detect_critical from their setup functions. | |
3318 | * | |
3319 | * Return: error code or zero on success | |
3320 | */ | |
3321 | int of_clk_detect_critical(struct device_node *np, | |
3322 | int index, unsigned long *flags) | |
3323 | { | |
3324 | struct property *prop; | |
3325 | const __be32 *cur; | |
3326 | uint32_t idx; | |
3327 | ||
3328 | if (!np || !flags) | |
3329 | return -EINVAL; | |
3330 | ||
3331 | of_property_for_each_u32(np, "clock-critical", prop, cur, idx) | |
3332 | if (index == idx) | |
3333 | *flags |= CLK_IS_CRITICAL; | |
3334 | ||
3335 | return 0; | |
3336 | } | |
3337 | ||
766e6a4e GL |
3338 | /** |
3339 | * of_clk_init() - Scan and init clock providers from the DT | |
3340 | * @matches: array of compatible values and init functions for providers. | |
3341 | * | |
1771b10d | 3342 | * This function scans the device tree for matching clock providers |
e5ca8fb4 | 3343 | * and calls their initialization functions. It also does it by trying |
1771b10d | 3344 | * to follow the dependencies. |
766e6a4e GL |
3345 | */ |
3346 | void __init of_clk_init(const struct of_device_id *matches) | |
3347 | { | |
7f7ed584 | 3348 | const struct of_device_id *match; |
766e6a4e | 3349 | struct device_node *np; |
1771b10d GC |
3350 | struct clock_provider *clk_provider, *next; |
3351 | bool is_init_done; | |
3352 | bool force = false; | |
2573a02a | 3353 | LIST_HEAD(clk_provider_list); |
766e6a4e | 3354 | |
f2f6c255 | 3355 | if (!matches) |
819b4861 | 3356 | matches = &__clk_of_table; |
f2f6c255 | 3357 | |
1771b10d | 3358 | /* First prepare the list of the clocks providers */ |
7f7ed584 | 3359 | for_each_matching_node_and_match(np, matches, &match) { |
2e3b19f1 SB |
3360 | struct clock_provider *parent; |
3361 | ||
3e5dd6f6 GU |
3362 | if (!of_device_is_available(np)) |
3363 | continue; | |
3364 | ||
2e3b19f1 SB |
3365 | parent = kzalloc(sizeof(*parent), GFP_KERNEL); |
3366 | if (!parent) { | |
3367 | list_for_each_entry_safe(clk_provider, next, | |
3368 | &clk_provider_list, node) { | |
3369 | list_del(&clk_provider->node); | |
6bc9d9d6 | 3370 | of_node_put(clk_provider->np); |
2e3b19f1 SB |
3371 | kfree(clk_provider); |
3372 | } | |
6bc9d9d6 | 3373 | of_node_put(np); |
2e3b19f1 SB |
3374 | return; |
3375 | } | |
1771b10d GC |
3376 | |
3377 | parent->clk_init_cb = match->data; | |
6bc9d9d6 | 3378 | parent->np = of_node_get(np); |
3f6d439f | 3379 | list_add_tail(&parent->node, &clk_provider_list); |
1771b10d GC |
3380 | } |
3381 | ||
3382 | while (!list_empty(&clk_provider_list)) { | |
3383 | is_init_done = false; | |
3384 | list_for_each_entry_safe(clk_provider, next, | |
3385 | &clk_provider_list, node) { | |
3386 | if (force || parent_ready(clk_provider->np)) { | |
86be408b | 3387 | |
1771b10d | 3388 | clk_provider->clk_init_cb(clk_provider->np); |
86be408b SN |
3389 | of_clk_set_defaults(clk_provider->np, true); |
3390 | ||
1771b10d | 3391 | list_del(&clk_provider->node); |
6bc9d9d6 | 3392 | of_node_put(clk_provider->np); |
1771b10d GC |
3393 | kfree(clk_provider); |
3394 | is_init_done = true; | |
3395 | } | |
3396 | } | |
3397 | ||
3398 | /* | |
e5ca8fb4 | 3399 | * We didn't manage to initialize any of the |
1771b10d GC |
3400 | * remaining providers during the last loop, so now we |
3401 | * initialize all the remaining ones unconditionally | |
3402 | * in case the clock parent was not mandatory | |
3403 | */ | |
3404 | if (!is_init_done) | |
3405 | force = true; | |
766e6a4e GL |
3406 | } |
3407 | } | |
3408 | #endif |