[deliverable/linux.git] / drivers / clk / hisilicon / clk.c

/*
 * Hisilicon clock driver
 *
 * Copyright (c) 2012-2013 Hisilicon Limited.
 * Copyright (c) 2012-2013 Linaro Limited.
 *
 * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
 *	   Xin Li <li.xin@linaro.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License along
 * with this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 *
 */

#include <linux/kernel.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/slab.h>
#include <linux/clk.h>

#include "clk.h"

static DEFINE_SPINLOCK(hisi_clk_lock);
static struct clk **clk_table;
static struct clk_onecell_data clk_data;

void __init hisi_clk_init(struct device_node *np, int nr_clks)
{
	clk_table = kzalloc(sizeof(struct clk *) * nr_clks, GFP_KERNEL);
	if (!clk_table) {
		pr_err("%s: could not allocate clock lookup table\n", __func__);
		return;
	}
	clk_data.clks = clk_table;
	clk_data.clk_num = nr_clks;
	of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
}

void __init hisi_clk_register_fixed_rate(struct hisi_fixed_rate_clock *clks,
					 int nums, void __iomem *base)
{
	struct clk *clk;
	int i;

	for (i = 0; i < nums; i++) {
		clk = clk_register_fixed_rate(NULL, clks[i].name,
					      clks[i].parent_name,
					      clks[i].flags,
					      clks[i].fixed_rate);
		if (IS_ERR(clk)) {
			pr_err("%s: failed to register clock %s\n",
			       __func__, clks[i].name);
			continue;
		}
		clk_table[clks[i].id] = clk;
	}
}

void __init hisi_clk_register_fixed_factor(struct hisi_fixed_factor_clock *clks,
					   int nums, void __iomem *base)
{
	struct clk *clk;
	int i;

	for (i = 0; i < nums; i++) {
		clk = clk_register_fixed_factor(NULL, clks[i].name,
						clks[i].parent_name,
						clks[i].flags, clks[i].mult,
						clks[i].div);
		if (IS_ERR(clk)) {
			pr_err("%s: failed to register clock %s\n",
			       __func__, clks[i].name);
			continue;
		}
		clk_table[clks[i].id] = clk;
	}
}

void __init hisi_clk_register_mux(struct hisi_mux_clock *clks,
				  int nums, void __iomem *base)
{
	struct clk *clk;
	int i;

	for (i = 0; i < nums; i++) {
		clk = clk_register_mux(NULL, clks[i].name, clks[i].parent_names,
				       clks[i].num_parents, clks[i].flags,
				       base + clks[i].offset, clks[i].shift,
				       clks[i].width, clks[i].mux_flags,
				       &hisi_clk_lock);
		if (IS_ERR(clk)) {
			pr_err("%s: failed to register clock %s\n",
			       __func__, clks[i].name);
			continue;
		}

		if (clks[i].alias)
			clk_register_clkdev(clk, clks[i].alias, NULL);

		clk_table[clks[i].id] = clk;
	}
}

void __init hisi_clk_register_divider(struct hisi_divider_clock *clks,
				      int nums, void __iomem *base)
{
	struct clk *clk;
	int i;

	for (i = 0; i < nums; i++) {
		clk = clk_register_divider_table(NULL, clks[i].name,
						 clks[i].parent_name,
						 clks[i].flags,
						 base + clks[i].offset,
						 clks[i].shift, clks[i].width,
						 clks[i].div_flags,
						 clks[i].table,
						 &hisi_clk_lock);
		if (IS_ERR(clk)) {
			pr_err("%s: failed to register clock %s\n",
			       __func__, clks[i].name);
			continue;
		}

		if (clks[i].alias)
			clk_register_clkdev(clk, clks[i].alias, NULL);

		clk_table[clks[i].id] = clk;
	}
}

void __init hisi_clk_register_gate_sep(struct hisi_gate_clock *clks,
				       int nums, void __iomem *base)
{
	struct clk *clk;
	int i;

	for (i = 0; i < nums; i++) {
		clk = hisi_register_clkgate_sep(NULL, clks[i].name,
						clks[i].parent_name,
						clks[i].flags,
						base + clks[i].offset,
						clks[i].bit_idx,
						clks[i].gate_flags,
						&hisi_clk_lock);
		if (IS_ERR(clk)) {
			pr_err("%s: failed to register clock %s\n",
			       __func__, clks[i].name);
			continue;
		}

		if (clks[i].alias)
			clk_register_clkdev(clk, clks[i].alias, NULL);

		clk_table[clks[i].id] = clk;
	}
}
Commit	Line	Data
0aa0c95f HZ	1	/*
	2	* Hisilicon clock driver
	3	*
	4	* Copyright (c) 2012-2013 Hisilicon Limited.
	5	* Copyright (c) 2012-2013 Linaro Limited.
	6	*
	7	* Author: Haojian Zhuang <haojian.zhuang@linaro.org>
	8	* Xin Li <li.xin@linaro.org>
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; either version 2 of the License, or
	13	* (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License along
	21	* with this program; if not, write to the Free Software Foundation, Inc.,
	22	* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
	23	*
	24	*/
	25
	26	#include <linux/kernel.h>
	27	#include <linux/clk-provider.h>
	28	#include <linux/clkdev.h>
	29	#include <linux/delay.h>
	30	#include <linux/io.h>
	31	#include <linux/of.h>
	32	#include <linux/of_address.h>
	33	#include <linux/of_device.h>
	34	#include <linux/slab.h>
	35	#include <linux/clk.h>
	36
	37	#include "clk.h"
	38
	39	static DEFINE_SPINLOCK(hisi_clk_lock);
	40	static struct clk **clk_table;
	41	static struct clk_onecell_data clk_data;
	42
	43	void __init hisi_clk_init(struct device_node *np, int nr_clks)
	44	{
	45	clk_table = kzalloc(sizeof(struct clk ) nr_clks, GFP_KERNEL);
	46	if (!clk_table) {
	47	pr_err("%s: could not allocate clock lookup table\n", __func__);
	48	return;
	49	}
	50	clk_data.clks = clk_table;
	51	clk_data.clk_num = nr_clks;
	52	of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
	53	}
	54
	55	void __init hisi_clk_register_fixed_rate(struct hisi_fixed_rate_clock *clks,
	56	int nums, void __iomem *base)
	57	{
	58	struct clk *clk;
	59	int i;
	60
	61	for (i = 0; i < nums; i++) {
	62	clk = clk_register_fixed_rate(NULL, clks[i].name,
	63	clks[i].parent_name,
	64	clks[i].flags,
65	clks[i].fixed_rate);
66	if (IS_ERR(clk)) {
67	pr_err("%s: failed to register clock %s\n",
68	__func__, clks[i].name);
69	continue;
70	}
16d1c899	71	clk_table[clks[i].id] = clk;
0aa0c95f HZ	72	}
	73	}
	74
	75	void __init hisi_clk_register_fixed_factor(struct hisi_fixed_factor_clock *clks,
	76	int nums, void __iomem *base)
	77	{
	78	struct clk *clk;
	79	int i;
	80
	81	for (i = 0; i < nums; i++) {
	82	clk = clk_register_fixed_factor(NULL, clks[i].name,
	83	clks[i].parent_name,
	84	clks[i].flags, clks[i].mult,
	85	clks[i].div);
	86	if (IS_ERR(clk)) {
	87	pr_err("%s: failed to register clock %s\n",
	88	__func__, clks[i].name);
	89	continue;
	90	}
16d1c899	91	clk_table[clks[i].id] = clk;
0aa0c95f HZ	92	}
	93	}
	94
	95	void __init hisi_clk_register_mux(struct hisi_mux_clock *clks,
	96	int nums, void __iomem *base)
	97	{
	98	struct clk *clk;
	99	int i;
	100
	101	for (i = 0; i < nums; i++) {
	102	clk = clk_register_mux(NULL, clks[i].name, clks[i].parent_names,
	103	clks[i].num_parents, clks[i].flags,
	104	base + clks[i].offset, clks[i].shift,
	105	clks[i].width, clks[i].mux_flags,
	106	&hisi_clk_lock);
	107	if (IS_ERR(clk)) {
	108	pr_err("%s: failed to register clock %s\n",
	109	__func__, clks[i].name);
	110	continue;
	111	}
	112
	113	if (clks[i].alias)
	114	clk_register_clkdev(clk, clks[i].alias, NULL);
	115
	116	clk_table[clks[i].id] = clk;
	117	}
	118	}
	119
	120	void __init hisi_clk_register_divider(struct hisi_divider_clock *clks,
	121	int nums, void __iomem *base)
	122	{
	123	struct clk *clk;
	124	int i;
	125
	126	for (i = 0; i < nums; i++) {
	127	clk = clk_register_divider_table(NULL, clks[i].name,
	128	clks[i].parent_name,
	129	clks[i].flags,
	130	base + clks[i].offset,
	131	clks[i].shift, clks[i].width,
	132	clks[i].div_flags,
	133	clks[i].table,
	134	&hisi_clk_lock);
	135	if (IS_ERR(clk)) {
	136	pr_err("%s: failed to register clock %s\n",
	137	__func__, clks[i].name);
	138	continue;
	139	}
	140
	141	if (clks[i].alias)
	142	clk_register_clkdev(clk, clks[i].alias, NULL);
	143
	144	clk_table[clks[i].id] = clk;
	145	}
	146	}
	147
	148	void __init hisi_clk_register_gate_sep(struct hisi_gate_clock *clks,
	149	int nums, void __iomem *base)
	150	{
	151	struct clk *clk;
	152	int i;
	153
	154	for (i = 0; i < nums; i++) {
	155	clk = hisi_register_clkgate_sep(NULL, clks[i].name,
156	clks[i].parent_name,
157	clks[i].flags,
158	base + clks[i].offset,
159	clks[i].bit_idx,
160	clks[i].gate_flags,
161	&hisi_clk_lock);
162	if (IS_ERR(clk)) {
163	pr_err("%s: failed to register clock %s\n",
164	__func__, clks[i].name);
165	continue;
166	}
167
168	if (clks[i].alias)
169	clk_register_clkdev(clk, clks[i].alias, NULL);
170
171	clk_table[clks[i].id] = clk;
172	}
173	}