Commit | Line | Data |
---|---|---|
1d80c142 MR |
1 | config SUNXI_CCU |
2 | bool "Clock support for Allwinner SoCs" | |
3 | default ARCH_SUNXI | |
89a3dfb7 MR |
4 | |
5 | if SUNXI_CCU | |
6 | ||
7 | # Base clock types | |
8 | ||
e9b93213 MR |
9 | config SUNXI_CCU_DIV |
10 | bool | |
11 | select SUNXI_CCU_MUX | |
12 | ||
89a3dfb7 MR |
13 | config SUNXI_CCU_FRAC |
14 | bool | |
15 | ||
1a7e7c38 MR |
16 | config SUNXI_CCU_GATE |
17 | bool | |
18 | ||
2a65ed42 MR |
19 | config SUNXI_CCU_MUX |
20 | bool | |
21 | ||
6f9f7f87 MR |
22 | config SUNXI_CCU_PHASE |
23 | bool | |
24 | ||
2ab836db MR |
25 | # Multi-factor clocks |
26 | ||
adbfb005 MR |
27 | config SUNXI_CCU_NK |
28 | bool | |
29 | select SUNXI_CCU_GATE | |
30 | ||
df6561e6 MR |
31 | config SUNXI_CCU_NKM |
32 | bool | |
33 | select RATIONAL | |
34 | select SUNXI_CCU_GATE | |
35 | ||
6174a1e2 MR |
36 | config SUNXI_CCU_NM |
37 | bool | |
38 | select RATIONAL | |
39 | select SUNXI_CCU_FRAC | |
40 | select SUNXI_CCU_GATE | |
41 | ||
2ab836db MR |
42 | config SUNXI_CCU_MP |
43 | bool | |
44 | select SUNXI_CCU_GATE | |
45 | select SUNXI_CCU_MUX | |
46 | ||
89a3dfb7 | 47 | endif |