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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 2001-2002 Deep Blue Solutions Ltd. |
3 | * | |
1da177e4 LT |
4 | * This program is free software; you can redistribute it and/or modify |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * CPU support functions | |
9 | */ | |
10 | #include <linux/module.h> | |
11 | #include <linux/types.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/cpufreq.h> | |
1da177e4 LT |
14 | #include <linux/sched.h> |
15 | #include <linux/smp.h> | |
16 | #include <linux/init.h> | |
fced80c7 | 17 | #include <linux/io.h> |
1da177e4 | 18 | |
a09e64fb | 19 | #include <mach/hardware.h> |
a285edcf | 20 | #include <mach/platform.h> |
1da177e4 | 21 | #include <asm/mach-types.h> |
c5a0adb5 | 22 | #include <asm/hardware/icst.h> |
1da177e4 LT |
23 | |
24 | static struct cpufreq_driver integrator_driver; | |
25 | ||
b7a3f8db AB |
26 | #define CM_ID __io_address(INTEGRATOR_HDR_ID) |
27 | #define CM_OSC __io_address(INTEGRATOR_HDR_OSC) | |
28 | #define CM_STAT __io_address(INTEGRATOR_HDR_STAT) | |
29 | #define CM_LOCK __io_address(INTEGRATOR_HDR_LOCK) | |
1da177e4 | 30 | |
39c0cb02 | 31 | static const struct icst_params lclk_params = { |
64fceb1d | 32 | .ref = 24000000, |
4de2edbd | 33 | .vco_max = ICST525_VCO_MAX_5V, |
e73a46a3 | 34 | .vco_min = ICST525_VCO_MIN, |
1da177e4 LT |
35 | .vd_min = 8, |
36 | .vd_max = 132, | |
37 | .rd_min = 24, | |
38 | .rd_max = 24, | |
232eaf7f RK |
39 | .s2div = icst525_s2div, |
40 | .idx2s = icst525_idx2s, | |
1da177e4 LT |
41 | }; |
42 | ||
39c0cb02 | 43 | static const struct icst_params cclk_params = { |
64fceb1d | 44 | .ref = 24000000, |
4de2edbd | 45 | .vco_max = ICST525_VCO_MAX_5V, |
e73a46a3 | 46 | .vco_min = ICST525_VCO_MIN, |
1da177e4 LT |
47 | .vd_min = 12, |
48 | .vd_max = 160, | |
49 | .rd_min = 24, | |
50 | .rd_max = 24, | |
232eaf7f RK |
51 | .s2div = icst525_s2div, |
52 | .idx2s = icst525_idx2s, | |
1da177e4 LT |
53 | }; |
54 | ||
55 | /* | |
56 | * Validate the speed policy. | |
57 | */ | |
58 | static int integrator_verify_policy(struct cpufreq_policy *policy) | |
59 | { | |
39c0cb02 | 60 | struct icst_vco vco; |
1da177e4 | 61 | |
be49e346 | 62 | cpufreq_verify_within_cpu_limits(policy); |
1da177e4 | 63 | |
c5a0adb5 RK |
64 | vco = icst_hz_to_vco(&cclk_params, policy->max * 1000); |
65 | policy->max = icst_hz(&cclk_params, vco) / 1000; | |
1da177e4 | 66 | |
c5a0adb5 RK |
67 | vco = icst_hz_to_vco(&cclk_params, policy->min * 1000); |
68 | policy->min = icst_hz(&cclk_params, vco) / 1000; | |
1da177e4 | 69 | |
be49e346 | 70 | cpufreq_verify_within_cpu_limits(policy); |
1da177e4 LT |
71 | return 0; |
72 | } | |
73 | ||
74 | ||
75 | static int integrator_set_target(struct cpufreq_policy *policy, | |
76 | unsigned int target_freq, | |
77 | unsigned int relation) | |
78 | { | |
79 | cpumask_t cpus_allowed; | |
80 | int cpu = policy->cpu; | |
39c0cb02 | 81 | struct icst_vco vco; |
1da177e4 LT |
82 | struct cpufreq_freqs freqs; |
83 | u_int cm_osc; | |
84 | ||
85 | /* | |
86 | * Save this threads cpus_allowed mask. | |
87 | */ | |
88 | cpus_allowed = current->cpus_allowed; | |
89 | ||
90 | /* | |
91 | * Bind to the specified CPU. When this call returns, | |
92 | * we should be running on the right CPU. | |
93 | */ | |
94 | set_cpus_allowed(current, cpumask_of_cpu(cpu)); | |
95 | BUG_ON(cpu != smp_processor_id()); | |
96 | ||
97 | /* get current setting */ | |
98 | cm_osc = __raw_readl(CM_OSC); | |
99 | ||
100 | if (machine_is_integrator()) { | |
101 | vco.s = (cm_osc >> 8) & 7; | |
102 | } else if (machine_is_cintegrator()) { | |
103 | vco.s = 1; | |
104 | } | |
105 | vco.v = cm_osc & 255; | |
106 | vco.r = 22; | |
c5a0adb5 | 107 | freqs.old = icst_hz(&cclk_params, vco) / 1000; |
1da177e4 | 108 | |
c5a0adb5 | 109 | /* icst_hz_to_vco rounds down -- so we need the next |
1da177e4 LT |
110 | * larger freq in case of CPUFREQ_RELATION_L. |
111 | */ | |
112 | if (relation == CPUFREQ_RELATION_L) | |
113 | target_freq += 999; | |
114 | if (target_freq > policy->max) | |
115 | target_freq = policy->max; | |
c5a0adb5 RK |
116 | vco = icst_hz_to_vco(&cclk_params, target_freq * 1000); |
117 | freqs.new = icst_hz(&cclk_params, vco) / 1000; | |
1da177e4 | 118 | |
1da177e4 LT |
119 | if (freqs.old == freqs.new) { |
120 | set_cpus_allowed(current, cpus_allowed); | |
121 | return 0; | |
122 | } | |
123 | ||
b43a7ffb | 124 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); |
1da177e4 LT |
125 | |
126 | cm_osc = __raw_readl(CM_OSC); | |
127 | ||
128 | if (machine_is_integrator()) { | |
129 | cm_osc &= 0xfffff800; | |
130 | cm_osc |= vco.s << 8; | |
131 | } else if (machine_is_cintegrator()) { | |
132 | cm_osc &= 0xffffff00; | |
133 | } | |
134 | cm_osc |= vco.v; | |
135 | ||
136 | __raw_writel(0xa05f, CM_LOCK); | |
137 | __raw_writel(cm_osc, CM_OSC); | |
138 | __raw_writel(0, CM_LOCK); | |
139 | ||
140 | /* | |
141 | * Restore the CPUs allowed mask. | |
142 | */ | |
143 | set_cpus_allowed(current, cpus_allowed); | |
144 | ||
b43a7ffb | 145 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); |
1da177e4 LT |
146 | |
147 | return 0; | |
148 | } | |
149 | ||
150 | static unsigned int integrator_get(unsigned int cpu) | |
151 | { | |
152 | cpumask_t cpus_allowed; | |
153 | unsigned int current_freq; | |
154 | u_int cm_osc; | |
39c0cb02 | 155 | struct icst_vco vco; |
1da177e4 LT |
156 | |
157 | cpus_allowed = current->cpus_allowed; | |
158 | ||
159 | set_cpus_allowed(current, cpumask_of_cpu(cpu)); | |
160 | BUG_ON(cpu != smp_processor_id()); | |
161 | ||
162 | /* detect memory etc. */ | |
163 | cm_osc = __raw_readl(CM_OSC); | |
164 | ||
165 | if (machine_is_integrator()) { | |
166 | vco.s = (cm_osc >> 8) & 7; | |
1aa023b8 | 167 | } else { |
1da177e4 LT |
168 | vco.s = 1; |
169 | } | |
170 | vco.v = cm_osc & 255; | |
171 | vco.r = 22; | |
172 | ||
c5a0adb5 | 173 | current_freq = icst_hz(&cclk_params, vco) / 1000; /* current freq */ |
1da177e4 LT |
174 | |
175 | set_cpus_allowed(current, cpus_allowed); | |
176 | ||
177 | return current_freq; | |
178 | } | |
179 | ||
180 | static int integrator_cpufreq_init(struct cpufreq_policy *policy) | |
181 | { | |
182 | ||
183 | /* set default policy and cpuinfo */ | |
ab537016 VK |
184 | policy->max = policy->cpuinfo.max_freq = 160000; |
185 | policy->min = policy->cpuinfo.min_freq = 12000; | |
1da177e4 | 186 | policy->cpuinfo.transition_latency = 1000000; /* 1 ms, assumed */ |
1da177e4 LT |
187 | |
188 | return 0; | |
189 | } | |
190 | ||
191 | static struct cpufreq_driver integrator_driver = { | |
192 | .verify = integrator_verify_policy, | |
193 | .target = integrator_set_target, | |
194 | .get = integrator_get, | |
195 | .init = integrator_cpufreq_init, | |
196 | .name = "integrator", | |
197 | }; | |
198 | ||
199 | static int __init integrator_cpu_init(void) | |
200 | { | |
201 | return cpufreq_register_driver(&integrator_driver); | |
202 | } | |
203 | ||
204 | static void __exit integrator_cpu_exit(void) | |
205 | { | |
206 | cpufreq_unregister_driver(&integrator_driver); | |
207 | } | |
208 | ||
209 | MODULE_AUTHOR ("Russell M. King"); | |
210 | MODULE_DESCRIPTION ("cpufreq driver for ARM Integrator CPUs"); | |
211 | MODULE_LICENSE ("GPL"); | |
212 | ||
213 | module_init(integrator_cpu_init); | |
214 | module_exit(integrator_cpu_exit); |