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2a4bd9f0 AL |
1 | /* |
2 | * kirkwood_freq.c: cpufreq driver for the Marvell kirkwood | |
3 | * | |
4 | * Copyright (C) 2013 Andrew Lunn <andrew@lunn.ch> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/kernel.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/clk.h> | |
15 | #include <linux/clk-provider.h> | |
16 | #include <linux/cpufreq.h> | |
e768f350 | 17 | #include <linux/of_device.h> |
2a4bd9f0 AL |
18 | #include <linux/platform_device.h> |
19 | #include <linux/io.h> | |
20 | #include <asm/proc-fns.h> | |
21 | ||
22 | #define CPU_SW_INT_BLK BIT(28) | |
23 | ||
24 | static struct priv | |
25 | { | |
26 | struct clk *cpu_clk; | |
27 | struct clk *ddr_clk; | |
28 | struct clk *powersave_clk; | |
29 | struct device *dev; | |
30 | void __iomem *base; | |
31 | } priv; | |
32 | ||
33 | #define STATE_CPU_FREQ 0x01 | |
34 | #define STATE_DDR_FREQ 0x02 | |
35 | ||
36 | /* | |
37 | * Kirkwood can swap the clock to the CPU between two clocks: | |
38 | * | |
39 | * - cpu clk | |
40 | * - ddr clk | |
41 | * | |
42 | * The frequencies are set at runtime before registering this * | |
43 | * table. | |
44 | */ | |
45 | static struct cpufreq_frequency_table kirkwood_freq_table[] = { | |
46 | {STATE_CPU_FREQ, 0}, /* CPU uses cpuclk */ | |
47 | {STATE_DDR_FREQ, 0}, /* CPU uses ddrclk */ | |
48 | {0, CPUFREQ_TABLE_END}, | |
49 | }; | |
50 | ||
51 | static unsigned int kirkwood_cpufreq_get_cpu_frequency(unsigned int cpu) | |
52 | { | |
53 | if (__clk_is_enabled(priv.powersave_clk)) | |
54 | return kirkwood_freq_table[1].frequency; | |
55 | return kirkwood_freq_table[0].frequency; | |
56 | } | |
57 | ||
b43a7ffb VK |
58 | static void kirkwood_cpufreq_set_cpu_state(struct cpufreq_policy *policy, |
59 | unsigned int index) | |
2a4bd9f0 AL |
60 | { |
61 | struct cpufreq_freqs freqs; | |
50701588 | 62 | unsigned int state = kirkwood_freq_table[index].driver_data; |
2a4bd9f0 AL |
63 | unsigned long reg; |
64 | ||
65 | freqs.old = kirkwood_cpufreq_get_cpu_frequency(0); | |
66 | freqs.new = kirkwood_freq_table[index].frequency; | |
2a4bd9f0 | 67 | |
b43a7ffb | 68 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); |
2a4bd9f0 AL |
69 | |
70 | dev_dbg(priv.dev, "Attempting to set frequency to %i KHz\n", | |
71 | kirkwood_freq_table[index].frequency); | |
72 | dev_dbg(priv.dev, "old frequency was %i KHz\n", | |
73 | kirkwood_cpufreq_get_cpu_frequency(0)); | |
74 | ||
75 | if (freqs.old != freqs.new) { | |
76 | local_irq_disable(); | |
77 | ||
78 | /* Disable interrupts to the CPU */ | |
79 | reg = readl_relaxed(priv.base); | |
80 | reg |= CPU_SW_INT_BLK; | |
81 | writel_relaxed(reg, priv.base); | |
82 | ||
83 | switch (state) { | |
84 | case STATE_CPU_FREQ: | |
85 | clk_disable(priv.powersave_clk); | |
86 | break; | |
87 | case STATE_DDR_FREQ: | |
88 | clk_enable(priv.powersave_clk); | |
89 | break; | |
90 | } | |
91 | ||
92 | /* Wait-for-Interrupt, while the hardware changes frequency */ | |
93 | cpu_do_idle(); | |
94 | ||
95 | /* Enable interrupts to the CPU */ | |
96 | reg = readl_relaxed(priv.base); | |
97 | reg &= ~CPU_SW_INT_BLK; | |
98 | writel_relaxed(reg, priv.base); | |
99 | ||
100 | local_irq_enable(); | |
101 | } | |
b43a7ffb | 102 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); |
2a4bd9f0 AL |
103 | }; |
104 | ||
2a4bd9f0 AL |
105 | static int kirkwood_cpufreq_target(struct cpufreq_policy *policy, |
106 | unsigned int target_freq, | |
107 | unsigned int relation) | |
108 | { | |
109 | unsigned int index = 0; | |
110 | ||
111 | if (cpufreq_frequency_table_target(policy, kirkwood_freq_table, | |
112 | target_freq, relation, &index)) | |
113 | return -EINVAL; | |
114 | ||
b43a7ffb | 115 | kirkwood_cpufreq_set_cpu_state(policy, index); |
2a4bd9f0 AL |
116 | |
117 | return 0; | |
118 | } | |
119 | ||
120 | /* Module init and exit code */ | |
121 | static int kirkwood_cpufreq_cpu_init(struct cpufreq_policy *policy) | |
122 | { | |
2a4bd9f0 AL |
123 | /* cpuinfo and default policy values */ |
124 | policy->cpuinfo.transition_latency = 5000; /* 5uS */ | |
2a4bd9f0 | 125 | |
6efbc777 | 126 | return cpufreq_table_validate_and_show(policy, kirkwood_freq_table); |
2a4bd9f0 AL |
127 | } |
128 | ||
2a4bd9f0 AL |
129 | static struct cpufreq_driver kirkwood_cpufreq_driver = { |
130 | .get = kirkwood_cpufreq_get_cpu_frequency, | |
a86a41a1 | 131 | .verify = cpufreq_generic_frequency_table_verify, |
2a4bd9f0 AL |
132 | .target = kirkwood_cpufreq_target, |
133 | .init = kirkwood_cpufreq_cpu_init, | |
a86a41a1 | 134 | .exit = cpufreq_generic_exit, |
2a4bd9f0 | 135 | .name = "kirkwood-cpufreq", |
a86a41a1 | 136 | .attr = cpufreq_generic_attr, |
2a4bd9f0 AL |
137 | }; |
138 | ||
139 | static int kirkwood_cpufreq_probe(struct platform_device *pdev) | |
140 | { | |
141 | struct device_node *np; | |
142 | struct resource *res; | |
143 | int err; | |
144 | ||
145 | priv.dev = &pdev->dev; | |
146 | ||
147 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
cc721c4f SMP |
148 | priv.base = devm_ioremap_resource(&pdev->dev, res); |
149 | if (IS_ERR(priv.base)) | |
150 | return PTR_ERR(priv.base); | |
2a4bd9f0 | 151 | |
e768f350 SK |
152 | np = of_cpu_device_node_get(0); |
153 | if (!np) { | |
154 | dev_err(&pdev->dev, "failed to get cpu device node\n"); | |
2a4bd9f0 | 155 | return -ENODEV; |
e768f350 | 156 | } |
2a4bd9f0 AL |
157 | |
158 | priv.cpu_clk = of_clk_get_by_name(np, "cpu_clk"); | |
159 | if (IS_ERR(priv.cpu_clk)) { | |
160 | dev_err(priv.dev, "Unable to get cpuclk"); | |
161 | return PTR_ERR(priv.cpu_clk); | |
162 | } | |
163 | ||
164 | clk_prepare_enable(priv.cpu_clk); | |
165 | kirkwood_freq_table[0].frequency = clk_get_rate(priv.cpu_clk) / 1000; | |
166 | ||
167 | priv.ddr_clk = of_clk_get_by_name(np, "ddrclk"); | |
168 | if (IS_ERR(priv.ddr_clk)) { | |
169 | dev_err(priv.dev, "Unable to get ddrclk"); | |
170 | err = PTR_ERR(priv.ddr_clk); | |
171 | goto out_cpu; | |
172 | } | |
173 | ||
174 | clk_prepare_enable(priv.ddr_clk); | |
175 | kirkwood_freq_table[1].frequency = clk_get_rate(priv.ddr_clk) / 1000; | |
176 | ||
177 | priv.powersave_clk = of_clk_get_by_name(np, "powersave"); | |
178 | if (IS_ERR(priv.powersave_clk)) { | |
179 | dev_err(priv.dev, "Unable to get powersave"); | |
180 | err = PTR_ERR(priv.powersave_clk); | |
181 | goto out_ddr; | |
182 | } | |
183 | clk_prepare(priv.powersave_clk); | |
184 | ||
185 | of_node_put(np); | |
186 | np = NULL; | |
187 | ||
188 | err = cpufreq_register_driver(&kirkwood_cpufreq_driver); | |
189 | if (!err) | |
190 | return 0; | |
191 | ||
192 | dev_err(priv.dev, "Failed to register cpufreq driver"); | |
193 | ||
194 | clk_disable_unprepare(priv.powersave_clk); | |
195 | out_ddr: | |
196 | clk_disable_unprepare(priv.ddr_clk); | |
197 | out_cpu: | |
198 | clk_disable_unprepare(priv.cpu_clk); | |
199 | of_node_put(np); | |
200 | ||
201 | return err; | |
202 | } | |
203 | ||
204 | static int kirkwood_cpufreq_remove(struct platform_device *pdev) | |
205 | { | |
206 | cpufreq_unregister_driver(&kirkwood_cpufreq_driver); | |
207 | ||
208 | clk_disable_unprepare(priv.powersave_clk); | |
209 | clk_disable_unprepare(priv.ddr_clk); | |
210 | clk_disable_unprepare(priv.cpu_clk); | |
211 | ||
212 | return 0; | |
213 | } | |
214 | ||
215 | static struct platform_driver kirkwood_cpufreq_platform_driver = { | |
216 | .probe = kirkwood_cpufreq_probe, | |
217 | .remove = kirkwood_cpufreq_remove, | |
218 | .driver = { | |
219 | .name = "kirkwood-cpufreq", | |
220 | .owner = THIS_MODULE, | |
221 | }, | |
222 | }; | |
223 | ||
224 | module_platform_driver(kirkwood_cpufreq_platform_driver); | |
225 | ||
226 | MODULE_LICENSE("GPL v2"); | |
227 | MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch"); | |
228 | MODULE_DESCRIPTION("cpufreq driver for Marvell's kirkwood CPU"); | |
229 | MODULE_ALIAS("platform:kirkwood-cpufreq"); |