Commit | Line | Data |
---|---|---|
ec6bced6 | 1 | /* |
ec6bced6 TL |
2 | * CPU frequency scaling for OMAP |
3 | * | |
4 | * Copyright (C) 2005 Nokia Corporation | |
5 | * Written by Tony Lindgren <tony@atomide.com> | |
6 | * | |
7 | * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King | |
8 | * | |
731e0cc6 SS |
9 | * Copyright (C) 2007-2011 Texas Instruments, Inc. |
10 | * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar | |
11 | * | |
ec6bced6 TL |
12 | * This program is free software; you can redistribute it and/or modify |
13 | * it under the terms of the GNU General Public License version 2 as | |
14 | * published by the Free Software Foundation. | |
15 | */ | |
16 | #include <linux/types.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/sched.h> | |
19 | #include <linux/cpufreq.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/err.h> | |
f8ce2547 | 23 | #include <linux/clk.h> |
fced80c7 | 24 | #include <linux/io.h> |
731e0cc6 | 25 | #include <linux/opp.h> |
46c12216 | 26 | #include <linux/cpu.h> |
ec6bced6 | 27 | |
ec6bced6 | 28 | #include <asm/system.h> |
731e0cc6 | 29 | #include <asm/smp_plat.h> |
46c12216 | 30 | #include <asm/cpu.h> |
ec6bced6 | 31 | |
731e0cc6 SS |
32 | #include <plat/clock.h> |
33 | #include <plat/omap-pm.h> | |
34 | #include <plat/common.h> | |
a7ca9d2b | 35 | |
731e0cc6 | 36 | #include <mach/hardware.h> |
aeec2990 | 37 | |
731e0cc6 | 38 | #define VERY_HI_RATE 900000000 |
a7ca9d2b | 39 | |
46c12216 RK |
40 | #ifdef CONFIG_SMP |
41 | struct lpj_info { | |
42 | unsigned long ref; | |
43 | unsigned int freq; | |
44 | }; | |
45 | ||
46 | static DEFINE_PER_CPU(struct lpj_info, lpj_ref); | |
47 | static struct lpj_info global_lpj_ref; | |
48 | #endif | |
49 | ||
731e0cc6 | 50 | static struct cpufreq_frequency_table *freq_table; |
b8488fbe | 51 | static struct clk *mpu_clk; |
08ca3e3b | 52 | static char *mpu_clk_name; |
a820ffa8 | 53 | static struct device *mpu_dev; |
b8488fbe | 54 | |
b0a330dc | 55 | static int omap_verify_speed(struct cpufreq_policy *policy) |
ec6bced6 | 56 | { |
aeec2990 KH |
57 | if (freq_table) |
58 | return cpufreq_frequency_table_verify(policy, freq_table); | |
59 | ||
ec6bced6 TL |
60 | if (policy->cpu) |
61 | return -EINVAL; | |
62 | ||
63 | cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, | |
64 | policy->cpuinfo.max_freq); | |
b8488fbe | 65 | |
ec6bced6 TL |
66 | policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; |
67 | policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; | |
68 | cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, | |
69 | policy->cpuinfo.max_freq); | |
ec6bced6 TL |
70 | return 0; |
71 | } | |
72 | ||
b0a330dc | 73 | static unsigned int omap_getspeed(unsigned int cpu) |
ec6bced6 | 74 | { |
ec6bced6 TL |
75 | unsigned long rate; |
76 | ||
46c12216 | 77 | if (cpu >= NR_CPUS) |
ec6bced6 TL |
78 | return 0; |
79 | ||
ec6bced6 | 80 | rate = clk_get_rate(mpu_clk) / 1000; |
ec6bced6 TL |
81 | return rate; |
82 | } | |
83 | ||
84 | static int omap_target(struct cpufreq_policy *policy, | |
85 | unsigned int target_freq, | |
86 | unsigned int relation) | |
87 | { | |
46c12216 | 88 | int i, ret = 0; |
731e0cc6 | 89 | struct cpufreq_freqs freqs; |
ec6bced6 | 90 | |
aeec2990 KH |
91 | /* Ensure desired rate is within allowed range. Some govenors |
92 | * (ondemand) will just pass target_freq=0 to get the minimum. */ | |
60c45ae1 EN |
93 | if (target_freq < policy->min) |
94 | target_freq = policy->min; | |
95 | if (target_freq > policy->max) | |
96 | target_freq = policy->max; | |
aeec2990 | 97 | |
46c12216 | 98 | freqs.old = omap_getspeed(policy->cpu); |
ec6bced6 | 99 | freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; |
46c12216 | 100 | freqs.cpu = policy->cpu; |
ec6bced6 | 101 | |
022ac03b | 102 | if (freqs.old == freqs.new && policy->cur == freqs.new) |
aeec2990 KH |
103 | return ret; |
104 | ||
46c12216 RK |
105 | /* notifiers */ |
106 | for_each_cpu(i, policy->cpus) { | |
107 | freqs.cpu = i; | |
108 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
109 | } | |
731e0cc6 | 110 | |
aeec2990 | 111 | #ifdef CONFIG_CPU_FREQ_DEBUG |
731e0cc6 | 112 | pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); |
aeec2990 | 113 | #endif |
731e0cc6 | 114 | |
aeec2990 | 115 | ret = clk_set_rate(mpu_clk, freqs.new * 1000); |
46c12216 RK |
116 | freqs.new = omap_getspeed(policy->cpu); |
117 | ||
118 | #ifdef CONFIG_SMP | |
119 | /* | |
120 | * Note that loops_per_jiffy is not updated on SMP systems in | |
121 | * cpufreq driver. So, update the per-CPU loops_per_jiffy value | |
122 | * on frequency transition. We need to update all dependent CPUs. | |
123 | */ | |
124 | for_each_cpu(i, policy->cpus) { | |
125 | struct lpj_info *lpj = &per_cpu(lpj_ref, i); | |
126 | if (!lpj->freq) { | |
127 | lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy; | |
128 | lpj->freq = freqs.old; | |
129 | } | |
130 | ||
131 | per_cpu(cpu_data, i).loops_per_jiffy = | |
132 | cpufreq_scale(lpj->ref, lpj->freq, freqs.new); | |
133 | } | |
731e0cc6 | 134 | |
46c12216 RK |
135 | /* And don't forget to adjust the global one */ |
136 | if (!global_lpj_ref.freq) { | |
137 | global_lpj_ref.ref = loops_per_jiffy; | |
138 | global_lpj_ref.freq = freqs.old; | |
139 | } | |
140 | loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq, | |
141 | freqs.new); | |
142 | #endif | |
143 | ||
144 | /* notifiers */ | |
145 | for_each_cpu(i, policy->cpus) { | |
146 | freqs.cpu = i; | |
147 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
148 | } | |
ec6bced6 TL |
149 | |
150 | return ret; | |
151 | } | |
152 | ||
790ab7e9 | 153 | static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) |
ec6bced6 | 154 | { |
aeec2990 | 155 | int result = 0; |
731e0cc6 | 156 | |
08ca3e3b | 157 | mpu_clk = clk_get(NULL, mpu_clk_name); |
ec6bced6 TL |
158 | if (IS_ERR(mpu_clk)) |
159 | return PTR_ERR(mpu_clk); | |
160 | ||
46c12216 | 161 | if (policy->cpu >= NR_CPUS) |
ec6bced6 | 162 | return -EINVAL; |
aeec2990 | 163 | |
46c12216 | 164 | policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); |
731e0cc6 SS |
165 | opp_init_cpufreq_table(mpu_dev, &freq_table); |
166 | ||
aeec2990 KH |
167 | if (freq_table) { |
168 | result = cpufreq_frequency_table_cpuinfo(policy, freq_table); | |
169 | if (!result) | |
170 | cpufreq_frequency_table_get_attr(freq_table, | |
171 | policy->cpu); | |
172 | } else { | |
173 | policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; | |
174 | policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, | |
175 | VERY_HI_RATE) / 1000; | |
176 | } | |
177 | ||
731e0cc6 SS |
178 | policy->min = policy->cpuinfo.min_freq; |
179 | policy->max = policy->cpuinfo.max_freq; | |
46c12216 RK |
180 | policy->cur = omap_getspeed(policy->cpu); |
181 | ||
182 | /* | |
183 | * On OMAP SMP configuartion, both processors share the voltage | |
184 | * and clock. So both CPUs needs to be scaled together and hence | |
185 | * needs software co-ordination. Use cpufreq affected_cpus | |
186 | * interface to handle this scenario. Additional is_smp() check | |
187 | * is to keep SMP_ON_UP build working. | |
188 | */ | |
189 | if (is_smp()) { | |
190 | policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; | |
ed8ce00c | 191 | cpumask_setall(policy->cpus); |
46c12216 | 192 | } |
731e0cc6 | 193 | |
aeec2990 | 194 | /* FIXME: what's the actual transition time? */ |
b029839c | 195 | policy->cpuinfo.transition_latency = 300 * 1000; |
ec6bced6 TL |
196 | |
197 | return 0; | |
198 | } | |
199 | ||
b8488fbe HD |
200 | static int omap_cpu_exit(struct cpufreq_policy *policy) |
201 | { | |
4e37c10d | 202 | clk_exit_cpufreq_table(&freq_table); |
b8488fbe HD |
203 | clk_put(mpu_clk); |
204 | return 0; | |
205 | } | |
206 | ||
aeec2990 KH |
207 | static struct freq_attr *omap_cpufreq_attr[] = { |
208 | &cpufreq_freq_attr_scaling_available_freqs, | |
209 | NULL, | |
210 | }; | |
211 | ||
ec6bced6 TL |
212 | static struct cpufreq_driver omap_driver = { |
213 | .flags = CPUFREQ_STICKY, | |
214 | .verify = omap_verify_speed, | |
215 | .target = omap_target, | |
216 | .get = omap_getspeed, | |
217 | .init = omap_cpu_init, | |
b8488fbe | 218 | .exit = omap_cpu_exit, |
ec6bced6 | 219 | .name = "omap", |
aeec2990 | 220 | .attr = omap_cpufreq_attr, |
ec6bced6 TL |
221 | }; |
222 | ||
223 | static int __init omap_cpufreq_init(void) | |
224 | { | |
08ca3e3b NM |
225 | if (cpu_is_omap24xx()) |
226 | mpu_clk_name = "virt_prcm_set"; | |
227 | else if (cpu_is_omap34xx()) | |
228 | mpu_clk_name = "dpll1_ck"; | |
229 | else if (cpu_is_omap44xx()) | |
230 | mpu_clk_name = "dpll_mpu_ck"; | |
231 | ||
232 | if (!mpu_clk_name) { | |
233 | pr_err("%s: unsupported Silicon?\n", __func__); | |
234 | return -EINVAL; | |
235 | } | |
a820ffa8 NM |
236 | |
237 | mpu_dev = omap2_get_mpuss_device(); | |
238 | if (!mpu_dev) { | |
239 | pr_warning("%s: unable to get the mpu device\n", __func__); | |
240 | return -EINVAL; | |
241 | } | |
242 | ||
ec6bced6 TL |
243 | return cpufreq_register_driver(&omap_driver); |
244 | } | |
245 | ||
731e0cc6 SS |
246 | static void __exit omap_cpufreq_exit(void) |
247 | { | |
248 | cpufreq_unregister_driver(&omap_driver); | |
249 | } | |
aeec2990 | 250 | |
731e0cc6 SS |
251 | MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs"); |
252 | MODULE_LICENSE("GPL"); | |
253 | module_init(omap_cpufreq_init); | |
254 | module_exit(omap_cpufreq_exit); |