Revert "drm/radeon/kms: fix typo in r100_blit_copy"
[deliverable/linux.git] / drivers / crypto / Kconfig
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1
2menuconfig CRYPTO_HW
3 bool "Hardware crypto devices"
4 default y
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5 ---help---
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
8
9 If you say N, all options in this submenu will be skipped and disabled.
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10
11if CRYPTO_HW
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12
13config CRYPTO_DEV_PADLOCK
d158325e 14 tristate "Support for VIA PadLock ACE"
2f817418 15 depends on X86 && !UML
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16 help
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
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19 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
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21
22 The instructions are used only when the CPU supports them.
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23 Otherwise software encryption is used.
24
1da177e4 25config CRYPTO_DEV_PADLOCK_AES
1191f0a4 26 tristate "PadLock driver for AES algorithm"
1da177e4 27 depends on CRYPTO_DEV_PADLOCK
28ce728a 28 select CRYPTO_BLKCIPHER
7dc748e4 29 select CRYPTO_AES
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30 help
31 Use VIA PadLock for AES algorithm.
32
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33 Available in VIA C3 and newer CPUs.
34
35 If unsure say M. The compiled module will be
4737f097 36 called padlock-aes.
1191f0a4 37
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38config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
bbbee467 41 select CRYPTO_HASH
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42 select CRYPTO_SHA1
43 select CRYPTO_SHA256
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44 help
45 Use VIA PadLock for SHA1/SHA256 algorithms.
46
47 Available in VIA C7 and newer processors.
48
49 If unsure say M. The compiled module will be
4737f097 50 called padlock-sha.
6c833275 51
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52config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
f6259dea 54 depends on X86_32 && PCI
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55 select CRYPTO_ALGAPI
56 select CRYPTO_BLKCIPHER
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57 help
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
3dde6ad8 59 engine for the CryptoAPI AES algorithm.
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60
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
63
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64config ZCRYPT
65 tristate "Support for PCI-attached cryptographic adapters"
66 depends on S390
67 select ZCRYPT_MONOLITHIC if ZCRYPT="y"
2f7c8bd6 68 select HW_RANDOM
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69 help
70 Select this option if you want to use a PCI-attached cryptographic
71 adapter like:
72 + PCI Cryptographic Accelerator (PCICA)
73 + PCI Cryptographic Coprocessor (PCICC)
74 + PCI-X Cryptographic Coprocessor (PCIXCC)
75 + Crypto Express2 Coprocessor (CEX2C)
76 + Crypto Express2 Accelerator (CEX2A)
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77 + Crypto Express3 Coprocessor (CEX3C)
78 + Crypto Express3 Accelerator (CEX3A)
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79
80config ZCRYPT_MONOLITHIC
81 bool "Monolithic zcrypt module"
57a4955f 82 depends on ZCRYPT
61d48c2c 83 help
4737f097 84 Select this option if you want to have a single module z90crypt,
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85 that contains all parts of the crypto device driver (ap bus,
86 request router and all the card drivers).
87
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88config CRYPTO_SHA1_S390
89 tristate "SHA1 digest algorithm"
90 depends on S390
563f346d 91 select CRYPTO_HASH
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92 help
93 This is the s390 hardware accelerated implementation of the
94 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
95
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96 It is available as of z990.
97
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98config CRYPTO_SHA256_S390
99 tristate "SHA256 digest algorithm"
100 depends on S390
563f346d 101 select CRYPTO_HASH
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102 help
103 This is the s390 hardware accelerated implementation of the
104 SHA256 secure hash standard (DFIPS 180-2).
105
d393d9b8 106 It is available as of z9.
3f5615e0 107
291dc7c0 108config CRYPTO_SHA512_S390
4e2c6d7f 109 tristate "SHA384 and SHA512 digest algorithm"
291dc7c0 110 depends on S390
563f346d 111 select CRYPTO_HASH
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112 help
113 This is the s390 hardware accelerated implementation of the
114 SHA512 secure hash standard.
115
d393d9b8 116 It is available as of z10.
291dc7c0 117
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118config CRYPTO_DES_S390
119 tristate "DES and Triple DES cipher algorithms"
120 depends on S390
121 select CRYPTO_ALGAPI
122 select CRYPTO_BLKCIPHER
123 help
0200f3ec 124 This is the s390 hardware accelerated implementation of the
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125 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
126
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127 As of z990 the ECB and CBC mode are hardware accelerated.
128 As of z196 the CTR mode is hardware accelerated.
129
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130config CRYPTO_AES_S390
131 tristate "AES cipher algorithms"
132 depends on S390
133 select CRYPTO_ALGAPI
134 select CRYPTO_BLKCIPHER
135 help
136 This is the s390 hardware accelerated implementation of the
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137 AES cipher algorithms (FIPS-197).
138
139 As of z9 the ECB and CBC modes are hardware accelerated
140 for 128 bit keys.
141 As of z10 the ECB and CBC modes are hardware accelerated
142 for all AES key sizes.
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143 As of z196 the CTR mode is hardware accelerated for all AES
144 key sizes and XTS mode is hardware accelerated for 256 and
99d97222 145 512 bit keys.
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146
147config S390_PRNG
148 tristate "Pseudo random number generator device driver"
149 depends on S390
150 default "m"
151 help
152 Select this option if you want to use the s390 pseudo random number
153 generator. The PRNG is part of the cryptographic processor functions
154 and uses triple-DES to generate secure random numbers like the
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155 ANSI X9.17 standard. User-space programs access the
156 pseudo-random-number device through the char device /dev/prandom.
157
158 It is available as of z9.
3f5615e0 159
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160config CRYPTO_GHASH_S390
161 tristate "GHASH digest algorithm"
162 depends on S390
163 select CRYPTO_HASH
164 help
165 This is the s390 hardware accelerated implementation of the
166 GHASH message digest algorithm for GCM (Galois/Counter Mode).
167
168 It is available as of z196.
169
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170config CRYPTO_DEV_MV_CESA
171 tristate "Marvell's Cryptographic Engine"
172 depends on PLAT_ORION
173 select CRYPTO_ALGAPI
174 select CRYPTO_AES
175 select CRYPTO_BLKCIPHER2
176 help
177 This driver allows you to utilize the Cryptographic Engines and
178 Security Accelerator (CESA) which can be found on the Marvell Orion
179 and Kirkwood SoCs, such as QNAP's TS-209.
180
181 Currently the driver supports AES in ECB and CBC mode without DMA.
182
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183config CRYPTO_DEV_NIAGARA2
184 tristate "Niagara2 Stream Processing Unit driver"
50e78161 185 select CRYPTO_DES
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186 select CRYPTO_ALGAPI
187 depends on SPARC64
188 help
189 Each core of a Niagara2 processor contains a Stream
190 Processing Unit, which itself contains several cryptographic
191 sub-units. One set provides the Modular Arithmetic Unit,
192 used for SSL offload. The other set provides the Cipher
193 Group, which can perform encryption, decryption, hashing,
194 checksumming, and raw copies.
195
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196config CRYPTO_DEV_HIFN_795X
197 tristate "Driver HIFN 795x crypto accelerator chips"
c3041f9c 198 select CRYPTO_DES
f7d0561e 199 select CRYPTO_ALGAPI
653ebd9c 200 select CRYPTO_BLKCIPHER
946fef4e 201 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
2707b937 202 depends on PCI
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203 help
204 This option allows you to have support for HIFN 795x crypto adapters.
205
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206config CRYPTO_DEV_HIFN_795X_RNG
207 bool "HIFN 795x random number generator"
208 depends on CRYPTO_DEV_HIFN_795X
209 help
210 Select this option if you want to enable the random number generator
211 on the HIFN 795x crypto adapters.
f7d0561e 212
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213source drivers/crypto/caam/Kconfig
214
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215config CRYPTO_DEV_TALITOS
216 tristate "Talitos Freescale Security Engine (SEC)"
217 select CRYPTO_ALGAPI
218 select CRYPTO_AUTHENC
219 select HW_RANDOM
220 depends on FSL_SOC
221 help
222 Say 'Y' here to use the Freescale Security Engine (SEC)
223 to offload cryptographic algorithm computation.
224
225 The Freescale SEC is present on PowerQUICC 'E' processors, such
226 as the MPC8349E and MPC8548E.
227
228 To compile this driver as a module, choose M here: the module
229 will be called talitos.
230
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231config CRYPTO_DEV_IXP4XX
232 tristate "Driver for IXP4xx crypto hardware acceleration"
233 depends on ARCH_IXP4XX
234 select CRYPTO_DES
235 select CRYPTO_ALGAPI
090657e4 236 select CRYPTO_AUTHENC
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237 select CRYPTO_BLKCIPHER
238 help
239 Driver for the IXP4xx NPE crypto engine.
240
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241config CRYPTO_DEV_PPC4XX
242 tristate "Driver AMCC PPC4xx crypto accelerator"
243 depends on PPC && 4xx
244 select CRYPTO_HASH
245 select CRYPTO_ALGAPI
246 select CRYPTO_BLKCIPHER
247 help
248 This option allows you to have support for AMCC crypto acceleration.
249
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250config CRYPTO_DEV_OMAP_SHAM
251 tristate "Support for OMAP SHA1/MD5 hw accelerator"
252 depends on ARCH_OMAP2 || ARCH_OMAP3
253 select CRYPTO_SHA1
254 select CRYPTO_MD5
255 help
256 OMAP processors have SHA1/MD5 hw accelerator. Select this if you
257 want to use the OMAP module for SHA1/MD5 algorithms.
258
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259config CRYPTO_DEV_OMAP_AES
260 tristate "Support for OMAP AES hw engine"
261 depends on ARCH_OMAP2 || ARCH_OMAP3
262 select CRYPTO_AES
263 help
264 OMAP processors have AES module accelerator. Select this if you
265 want to use the OMAP module for AES algorithms.
266
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267config CRYPTO_DEV_PICOXCELL
268 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
269 depends on ARCH_PICOXCELL
270 select CRYPTO_AES
271 select CRYPTO_AUTHENC
272 select CRYPTO_ALGAPI
273 select CRYPTO_DES
274 select CRYPTO_CBC
275 select CRYPTO_ECB
276 select CRYPTO_SEQIV
277 help
278 This option enables support for the hardware offload engines in the
279 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
280 and for 3gpp Layer 2 ciphering support.
281
282 Saying m here will build a module named pipcoxcell_crypto.
283
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284config CRYPTO_DEV_S5P
285 tristate "Support for Samsung S5PV210 crypto accelerator"
286 depends on ARCH_S5PV210
287 select CRYPTO_AES
288 select CRYPTO_ALGAPI
289 select CRYPTO_BLKCIPHER
290 help
291 This option allows you to have support for S5P crypto acceleration.
292 Select this to offload Samsung S5PV210 or S5PC110 from AES
293 algorithms execution.
294
b511431d 295endif # CRYPTO_HW
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