i7core_edac: CodingStyle fixes
[deliverable/linux.git] / drivers / edac / Kconfig
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1#
2# EDAC Kconfig
4577ca55 3# Copyright (c) 2008 Doug Thompson www.softwarebitmaker.com
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4# Licensed and distributed under the GPL
5#
da9bb1d2 6
751cb5e5 7menuconfig EDAC
e24aca67 8 bool "EDAC (Error Detection And Correction) reporting"
e25df120 9 depends on HAS_IOMEM
4c6a1c13 10 depends on X86 || PPC
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11 help
12 EDAC is designed to report errors in the core system.
13 These are low-level errors that are reported in the CPU or
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14 supporting chipset or other subsystems:
15 memory errors, cache errors, PCI errors, thermal throttling, etc..
16 If unsure, select 'Y'.
da9bb1d2 17
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18 If this code is reporting problems on your system, please
19 see the EDAC project web pages for more information at:
20
21 <http://bluesmoke.sourceforge.net/>
22
23 and:
24
25 <http://buttersideup.com/edacwiki>
26
27 There is also a mailing list for the EDAC project, which can
28 be found via the sourceforge page.
29
751cb5e5 30if EDAC
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31
32comment "Reporting subsystems"
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33
34config EDAC_DEBUG
35 bool "Debugging"
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36 help
37 This turns on debugging information for the entire EDAC
38 sub-system. You can insert module with "debug_level=x", current
39 there're four debug levels (x=0,1,2,3 from low to high).
40 Usually you should select 'N'.
41
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42config EDAC_DEBUG_VERBOSE
43 bool "More verbose debugging"
44 depends on EDAC_DEBUG
45 help
46 This option makes debugging information more verbose.
47 Source file name and line number where debugging message
48 printed will be added to debugging message.
49
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50 config EDAC_DECODE_MCE
51 tristate "Decode MCEs in human-readable form (only on AMD for now)"
52 depends on CPU_SUP_AMD && X86_MCE
53 default y
54 ---help---
55 Enable this option if you want to decode Machine Check Exceptions
56 occuring on your machine in human-readable form.
57
58 You should definitely say Y here in case you want to decode MCEs
59 which occur really early upon boot, before the module infrastructure
60 has been initialized.
61
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62config EDAC_MM_EDAC
63 tristate "Main Memory EDAC (Error Detection And Correction) reporting"
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64 help
65 Some systems are able to detect and correct errors in main
66 memory. EDAC can report statistics on memory error
67 detection and correction (EDAC - or commonly referred to ECC
68 errors). EDAC will also try to decode where these errors
69 occurred so that a particular failing memory module can be
70 replaced. If unsure, select 'Y'.
71
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72config EDAC_AMD64
73 tristate "AMD64 (Opteron, Athlon64) K8, F10h, F11h"
0d18b2e3 74 depends on EDAC_MM_EDAC && K8_NB && X86_64 && PCI && EDAC_DECODE_MCE
7d6034d3 75 help
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76 Support for error detection and correction on the AMD 64
77 Families of Memory Controllers (K8, F10h and F11h)
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78
79config EDAC_AMD64_ERROR_INJECTION
80 bool "Sysfs Error Injection facilities"
81 depends on EDAC_AMD64
82 help
83 Recent Opterons (Family 10h and later) provide for Memory Error
84 Injection into the ECC detection circuits. The amd64_edac module
85 allows the operator/user to inject Uncorrectable and Correctable
86 errors into DRAM.
87
88 When enabled, in each of the respective memory controller directories
89 (/sys/devices/system/edac/mc/mcX), there are 3 input files:
90
91 - inject_section (0..3, 16-byte section of 64-byte cacheline),
92 - inject_word (0..8, 16-bit word of 16-byte section),
93 - inject_ecc_vector (hex ecc vector: select bits of inject word)
94
95 In addition, there are two control files, inject_read and inject_write,
96 which trigger the DRAM ECC Read and Write respectively.
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97
98config EDAC_AMD76X
99 tristate "AMD 76x (760, 762, 768)"
90cbc45b 100 depends on EDAC_MM_EDAC && PCI && X86_32
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101 help
102 Support for error detection and correction on the AMD 76x
103 series of chipsets used with the Athlon processor.
104
105config EDAC_E7XXX
106 tristate "Intel e7xxx (e7205, e7500, e7501, e7505)"
39f1d8d3 107 depends on EDAC_MM_EDAC && PCI && X86_32
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108 help
109 Support for error detection and correction on the Intel
110 E7205, E7500, E7501 and E7505 server chipsets.
111
112config EDAC_E752X
5135b797 113 tristate "Intel e752x (e7520, e7525, e7320) and 3100"
da960a6a 114 depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG
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115 help
116 Support for error detection and correction on the Intel
117 E7520, E7525, E7320 server chipsets.
118
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119config EDAC_I82443BXGX
120 tristate "Intel 82443BX/GX (440BX/GX)"
121 depends on EDAC_MM_EDAC && PCI && X86_32
28f96eea 122 depends on BROKEN
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123 help
124 Support for error detection and correction on the Intel
125 82443BX/GX memory controllers (440BX/GX chipsets).
126
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127config EDAC_I82875P
128 tristate "Intel 82875p (D82875P, E7210)"
39f1d8d3 129 depends on EDAC_MM_EDAC && PCI && X86_32
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130 help
131 Support for error detection and correction on the Intel
132 DP82785P and E7210 server chipsets.
133
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134config EDAC_I82975X
135 tristate "Intel 82975x (D82975x)"
136 depends on EDAC_MM_EDAC && PCI && X86
137 help
138 Support for error detection and correction on the Intel
139 DP82975x server chipsets.
140
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141config EDAC_I3000
142 tristate "Intel 3000/3010"
f5c0454c 143 depends on EDAC_MM_EDAC && PCI && X86
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144 help
145 Support for error detection and correction on the Intel
146 3000 and 3010 server chipsets.
147
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148config EDAC_I3200
149 tristate "Intel 3200"
150 depends on EDAC_MM_EDAC && PCI && X86 && EXPERIMENTAL
151 help
152 Support for error detection and correction on the Intel
153 3200 and 3210 server chipsets.
154
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155config EDAC_X38
156 tristate "Intel X38"
157 depends on EDAC_MM_EDAC && PCI && X86
158 help
159 Support for error detection and correction on the Intel
160 X38 server chipsets.
161
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162config EDAC_I5400
163 tristate "Intel 5400 (Seaburg) chipsets"
164 depends on EDAC_MM_EDAC && PCI && X86
165 help
166 Support for error detection and correction the Intel
167 i5400 MCH chipset (Seaburg).
168
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169config EDAC_I7CORE
170 tristate "Intel i7 Core (Nehalem) processors"
171 depends on EDAC_MM_EDAC && PCI && X86
172 help
173 Support for error detection and correction the Intel
174 i7 Core (Nehalem) Integrated Memory Controller
175
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176config EDAC_I82860
177 tristate "Intel 82860"
39f1d8d3 178 depends on EDAC_MM_EDAC && PCI && X86_32
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179 help
180 Support for error detection and correction on the Intel
181 82860 chipset.
182
183config EDAC_R82600
184 tristate "Radisys 82600 embedded chipset"
39f1d8d3 185 depends on EDAC_MM_EDAC && PCI && X86_32
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186 help
187 Support for error detection and correction on the Radisys
188 82600 embedded chipset.
189
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190config EDAC_I5000
191 tristate "Intel Greencreek/Blackford chipset"
192 depends on EDAC_MM_EDAC && X86 && PCI
193 help
194 Support for error detection and correction the Intel
195 Greekcreek/Blackford chipsets.
196
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197config EDAC_I5100
198 tristate "Intel San Clemente MCH"
199 depends on EDAC_MM_EDAC && X86 && PCI
200 help
201 Support for error detection and correction the Intel
202 San Clemente MCH.
203
a9a753d5 204config EDAC_MPC85XX
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205 tristate "Freescale MPC83xx / MPC85xx"
206 depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || MPC85xx)
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207 help
208 Support for error detection and correction on the Freescale
b4846251 209 MPC8349, MPC8560, MPC8540, MPC8548
a9a753d5 210
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211config EDAC_MV64X60
212 tristate "Marvell MV64x60"
213 depends on EDAC_MM_EDAC && MV64X60
214 help
215 Support for error detection and correction on the Marvell
216 MV64360 and MV64460 chipsets.
217
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218config EDAC_PASEMI
219 tristate "PA Semi PWRficient"
220 depends on EDAC_MM_EDAC && PCI
ddcc3050 221 depends on PPC_PASEMI
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222 help
223 Support for error detection and correction on PA Semi
224 PWRficient.
225
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226config EDAC_CELL
227 tristate "Cell Broadband Engine memory controller"
def434c2 228 depends on EDAC_MM_EDAC && PPC_CELL_COMMON
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229 help
230 Support for error detection and correction on the
231 Cell Broadband Engine internal memory controller
232 on platform without a hypervisor
7d8536fb 233
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234config EDAC_PPC4XX
235 tristate "PPC4xx IBM DDR2 Memory Controller"
236 depends on EDAC_MM_EDAC && 4xx
237 help
238 This enables support for EDAC on the ECC memory used
239 with the IBM DDR2 memory controller found in various
240 PowerPC 4xx embedded processors such as the 405EX[r],
241 440SP, 440SPe, 460EX, 460GT and 460SX.
242
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243config EDAC_AMD8131
244 tristate "AMD8131 HyperTransport PCI-X Tunnel"
715fe7af 245 depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
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246 help
247 Support for error detection and correction on the
248 AMD8131 HyperTransport PCI-X Tunnel chip.
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249 Note, add more Kconfig dependency if it's adopted
250 on some machine other than Maple.
e8765584 251
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252config EDAC_AMD8111
253 tristate "AMD8111 HyperTransport I/O Hub"
715fe7af 254 depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
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255 help
256 Support for error detection and correction on the
257 AMD8111 HyperTransport I/O Hub chip.
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258 Note, add more Kconfig dependency if it's adopted
259 on some machine other than Maple.
58b4ce6f 260
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261config EDAC_CPC925
262 tristate "IBM CPC925 Memory Controller (PPC970FX)"
263 depends on EDAC_MM_EDAC && PPC64
264 help
265 Support for error detection and correction on the
266 IBM CPC925 Bridge and Memory Controller, which is
267 a companion chip to the PowerPC 970 family of
268 processors.
269
751cb5e5 270endif # EDAC
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