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da9bb1d2 AC |
1 | /* |
2 | * edac_mc kernel module | |
3 | * (C) 2005 Linux Networx (http://lnxi.com) | |
4 | * This file may be distributed under the terms of the | |
5 | * GNU General Public License. | |
6 | * | |
7 | * Written by Thayne Harbaugh | |
8 | * Based on work by Dan Hollis <goemon at anime dot net> and others. | |
9 | * http://www.anime.net/~goemon/linux-ecc/ | |
10 | * | |
11 | * Modified by Dave Peterson and Doug Thompson | |
12 | * | |
13 | */ | |
14 | ||
15 | ||
16 | #include <linux/config.h> | |
da9bb1d2 AC |
17 | #include <linux/module.h> |
18 | #include <linux/proc_fs.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/types.h> | |
21 | #include <linux/smp.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/sysctl.h> | |
24 | #include <linux/highmem.h> | |
25 | #include <linux/timer.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/jiffies.h> | |
28 | #include <linux/spinlock.h> | |
29 | #include <linux/list.h> | |
30 | #include <linux/sysdev.h> | |
31 | #include <linux/ctype.h> | |
f2fe42ab | 32 | #include <linux/kthread.h> |
da9bb1d2 AC |
33 | |
34 | #include <asm/uaccess.h> | |
35 | #include <asm/page.h> | |
36 | #include <asm/edac.h> | |
37 | ||
38 | #include "edac_mc.h" | |
39 | ||
537fba28 | 40 | #define EDAC_MC_VERSION "Ver: 2.0.0 " __DATE__ |
da9bb1d2 | 41 | |
ceb2ca9c DP |
42 | /* For now, disable the EDAC sysfs code. The sysfs interface that EDAC |
43 | * presents to user space needs more thought, and is likely to change | |
44 | * substantially. | |
45 | */ | |
46 | #define DISABLE_EDAC_SYSFS | |
47 | ||
da9bb1d2 AC |
48 | #ifdef CONFIG_EDAC_DEBUG |
49 | /* Values of 0 to 4 will generate output */ | |
50 | int edac_debug_level = 1; | |
51 | EXPORT_SYMBOL(edac_debug_level); | |
52 | #endif | |
53 | ||
54 | /* EDAC Controls, setable by module parameter, and sysfs */ | |
55 | static int log_ue = 1; | |
56 | static int log_ce = 1; | |
ceb2ca9c | 57 | static int panic_on_ue; |
da9bb1d2 AC |
58 | static int poll_msec = 1000; |
59 | ||
60 | static int check_pci_parity = 0; /* default YES check PCI parity */ | |
61 | static int panic_on_pci_parity; /* default no panic on PCI Parity */ | |
62 | static atomic_t pci_parity_count = ATOMIC_INIT(0); | |
63 | ||
64 | /* lock to memory controller's control array */ | |
65 | static DECLARE_MUTEX(mem_ctls_mutex); | |
66 | static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices); | |
67 | ||
f2fe42ab DP |
68 | static struct task_struct *edac_thread; |
69 | ||
da9bb1d2 AC |
70 | /* Structure of the whitelist and blacklist arrays */ |
71 | struct edac_pci_device_list { | |
72 | unsigned int vendor; /* Vendor ID */ | |
73 | unsigned int device; /* Deviice ID */ | |
74 | }; | |
75 | ||
76 | ||
77 | #define MAX_LISTED_PCI_DEVICES 32 | |
78 | ||
79 | /* List of PCI devices (vendor-id:device-id) that should be skipped */ | |
80 | static struct edac_pci_device_list pci_blacklist[MAX_LISTED_PCI_DEVICES]; | |
81 | static int pci_blacklist_count; | |
82 | ||
83 | /* List of PCI devices (vendor-id:device-id) that should be scanned */ | |
84 | static struct edac_pci_device_list pci_whitelist[MAX_LISTED_PCI_DEVICES]; | |
85 | static int pci_whitelist_count ; | |
86 | ||
87 | /* START sysfs data and methods */ | |
88 | ||
ceb2ca9c DP |
89 | #ifndef DISABLE_EDAC_SYSFS |
90 | ||
da9bb1d2 AC |
91 | static const char *mem_types[] = { |
92 | [MEM_EMPTY] = "Empty", | |
93 | [MEM_RESERVED] = "Reserved", | |
94 | [MEM_UNKNOWN] = "Unknown", | |
95 | [MEM_FPM] = "FPM", | |
96 | [MEM_EDO] = "EDO", | |
97 | [MEM_BEDO] = "BEDO", | |
98 | [MEM_SDR] = "Unbuffered-SDR", | |
99 | [MEM_RDR] = "Registered-SDR", | |
100 | [MEM_DDR] = "Unbuffered-DDR", | |
101 | [MEM_RDDR] = "Registered-DDR", | |
102 | [MEM_RMBS] = "RMBS" | |
103 | }; | |
104 | ||
105 | static const char *dev_types[] = { | |
106 | [DEV_UNKNOWN] = "Unknown", | |
107 | [DEV_X1] = "x1", | |
108 | [DEV_X2] = "x2", | |
109 | [DEV_X4] = "x4", | |
110 | [DEV_X8] = "x8", | |
111 | [DEV_X16] = "x16", | |
112 | [DEV_X32] = "x32", | |
113 | [DEV_X64] = "x64" | |
114 | }; | |
115 | ||
116 | static const char *edac_caps[] = { | |
117 | [EDAC_UNKNOWN] = "Unknown", | |
118 | [EDAC_NONE] = "None", | |
119 | [EDAC_RESERVED] = "Reserved", | |
120 | [EDAC_PARITY] = "PARITY", | |
121 | [EDAC_EC] = "EC", | |
122 | [EDAC_SECDED] = "SECDED", | |
123 | [EDAC_S2ECD2ED] = "S2ECD2ED", | |
124 | [EDAC_S4ECD4ED] = "S4ECD4ED", | |
125 | [EDAC_S8ECD8ED] = "S8ECD8ED", | |
126 | [EDAC_S16ECD16ED] = "S16ECD16ED" | |
127 | }; | |
128 | ||
129 | ||
130 | /* sysfs object: /sys/devices/system/edac */ | |
131 | static struct sysdev_class edac_class = { | |
132 | set_kset_name("edac"), | |
133 | }; | |
134 | ||
135 | /* sysfs objects: | |
136 | * /sys/devices/system/edac/mc | |
137 | * /sys/devices/system/edac/pci | |
138 | */ | |
139 | static struct kobject edac_memctrl_kobj; | |
140 | static struct kobject edac_pci_kobj; | |
141 | ||
142 | /* | |
143 | * /sys/devices/system/edac/mc; | |
144 | * data structures and methods | |
145 | */ | |
4136cabf | 146 | #if 0 |
da9bb1d2 AC |
147 | static ssize_t memctrl_string_show(void *ptr, char *buffer) |
148 | { | |
149 | char *value = (char*) ptr; | |
150 | return sprintf(buffer, "%s\n", value); | |
151 | } | |
4136cabf | 152 | #endif |
da9bb1d2 AC |
153 | |
154 | static ssize_t memctrl_int_show(void *ptr, char *buffer) | |
155 | { | |
156 | int *value = (int*) ptr; | |
157 | return sprintf(buffer, "%d\n", *value); | |
158 | } | |
159 | ||
160 | static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count) | |
161 | { | |
162 | int *value = (int*) ptr; | |
163 | ||
164 | if (isdigit(*buffer)) | |
165 | *value = simple_strtoul(buffer, NULL, 0); | |
166 | ||
167 | return count; | |
168 | } | |
169 | ||
170 | struct memctrl_dev_attribute { | |
171 | struct attribute attr; | |
172 | void *value; | |
173 | ssize_t (*show)(void *,char *); | |
174 | ssize_t (*store)(void *, const char *, size_t); | |
175 | }; | |
176 | ||
177 | /* Set of show/store abstract level functions for memory control object */ | |
178 | static ssize_t | |
179 | memctrl_dev_show(struct kobject *kobj, struct attribute *attr, char *buffer) | |
180 | { | |
181 | struct memctrl_dev_attribute *memctrl_dev; | |
182 | memctrl_dev = (struct memctrl_dev_attribute*)attr; | |
183 | ||
184 | if (memctrl_dev->show) | |
185 | return memctrl_dev->show(memctrl_dev->value, buffer); | |
186 | return -EIO; | |
187 | } | |
188 | ||
189 | static ssize_t | |
190 | memctrl_dev_store(struct kobject *kobj, struct attribute *attr, | |
191 | const char *buffer, size_t count) | |
192 | { | |
193 | struct memctrl_dev_attribute *memctrl_dev; | |
194 | memctrl_dev = (struct memctrl_dev_attribute*)attr; | |
195 | ||
196 | if (memctrl_dev->store) | |
197 | return memctrl_dev->store(memctrl_dev->value, buffer, count); | |
198 | return -EIO; | |
199 | } | |
200 | ||
201 | static struct sysfs_ops memctrlfs_ops = { | |
202 | .show = memctrl_dev_show, | |
203 | .store = memctrl_dev_store | |
204 | }; | |
205 | ||
206 | #define MEMCTRL_ATTR(_name,_mode,_show,_store) \ | |
207 | struct memctrl_dev_attribute attr_##_name = { \ | |
208 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
209 | .value = &_name, \ | |
210 | .show = _show, \ | |
211 | .store = _store, \ | |
212 | }; | |
213 | ||
214 | #define MEMCTRL_STRING_ATTR(_name,_data,_mode,_show,_store) \ | |
215 | struct memctrl_dev_attribute attr_##_name = { \ | |
216 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
217 | .value = _data, \ | |
218 | .show = _show, \ | |
219 | .store = _store, \ | |
220 | }; | |
221 | ||
222 | /* cwrow<id> attribute f*/ | |
4136cabf | 223 | #if 0 |
da9bb1d2 | 224 | MEMCTRL_STRING_ATTR(mc_version,EDAC_MC_VERSION,S_IRUGO,memctrl_string_show,NULL); |
4136cabf | 225 | #endif |
da9bb1d2 AC |
226 | |
227 | /* csrow<id> control files */ | |
228 | MEMCTRL_ATTR(panic_on_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store); | |
229 | MEMCTRL_ATTR(log_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store); | |
230 | MEMCTRL_ATTR(log_ce,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store); | |
231 | MEMCTRL_ATTR(poll_msec,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store); | |
232 | ||
233 | ||
234 | /* Base Attributes of the memory ECC object */ | |
235 | static struct memctrl_dev_attribute *memctrl_attr[] = { | |
236 | &attr_panic_on_ue, | |
237 | &attr_log_ue, | |
238 | &attr_log_ce, | |
239 | &attr_poll_msec, | |
da9bb1d2 AC |
240 | NULL, |
241 | }; | |
242 | ||
243 | /* Main MC kobject release() function */ | |
244 | static void edac_memctrl_master_release(struct kobject *kobj) | |
245 | { | |
537fba28 | 246 | debugf1("%s()\n", __func__); |
da9bb1d2 AC |
247 | } |
248 | ||
249 | static struct kobj_type ktype_memctrl = { | |
250 | .release = edac_memctrl_master_release, | |
251 | .sysfs_ops = &memctrlfs_ops, | |
252 | .default_attrs = (struct attribute **) memctrl_attr, | |
253 | }; | |
254 | ||
ceb2ca9c | 255 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
256 | |
257 | /* Initialize the main sysfs entries for edac: | |
258 | * /sys/devices/system/edac | |
259 | * | |
260 | * and children | |
261 | * | |
262 | * Return: 0 SUCCESS | |
263 | * !0 FAILURE | |
264 | */ | |
265 | static int edac_sysfs_memctrl_setup(void) | |
ceb2ca9c DP |
266 | #ifdef DISABLE_EDAC_SYSFS |
267 | { | |
268 | return 0; | |
269 | } | |
270 | #else | |
da9bb1d2 AC |
271 | { |
272 | int err=0; | |
273 | ||
537fba28 | 274 | debugf1("%s()\n", __func__); |
da9bb1d2 AC |
275 | |
276 | /* create the /sys/devices/system/edac directory */ | |
277 | err = sysdev_class_register(&edac_class); | |
278 | if (!err) { | |
279 | /* Init the MC's kobject */ | |
280 | memset(&edac_memctrl_kobj, 0, sizeof (edac_memctrl_kobj)); | |
281 | kobject_init(&edac_memctrl_kobj); | |
282 | ||
283 | edac_memctrl_kobj.parent = &edac_class.kset.kobj; | |
284 | edac_memctrl_kobj.ktype = &ktype_memctrl; | |
285 | ||
286 | /* generate sysfs "..../edac/mc" */ | |
287 | err = kobject_set_name(&edac_memctrl_kobj,"mc"); | |
288 | if (!err) { | |
289 | /* FIXME: maybe new sysdev_create_subdir() */ | |
290 | err = kobject_register(&edac_memctrl_kobj); | |
291 | if (err) { | |
292 | debugf1("Failed to register '.../edac/mc'\n"); | |
293 | } else { | |
294 | debugf1("Registered '.../edac/mc' kobject\n"); | |
295 | } | |
296 | } | |
297 | } else { | |
537fba28 | 298 | debugf1("%s() error=%d\n", __func__, err); |
da9bb1d2 AC |
299 | } |
300 | ||
301 | return err; | |
302 | } | |
ceb2ca9c | 303 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
304 | |
305 | /* | |
306 | * MC teardown: | |
307 | * the '..../edac/mc' kobject followed by '..../edac' itself | |
308 | */ | |
309 | static void edac_sysfs_memctrl_teardown(void) | |
310 | { | |
ceb2ca9c | 311 | #ifndef DISABLE_EDAC_SYSFS |
da9bb1d2 AC |
312 | debugf0("MC: " __FILE__ ": %s()\n", __func__); |
313 | ||
314 | /* Unregister the MC's kobject */ | |
315 | kobject_unregister(&edac_memctrl_kobj); | |
316 | ||
317 | /* release the master edac mc kobject */ | |
318 | kobject_put(&edac_memctrl_kobj); | |
319 | ||
320 | /* Unregister the 'edac' object */ | |
321 | sysdev_class_unregister(&edac_class); | |
ceb2ca9c | 322 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
323 | } |
324 | ||
ceb2ca9c DP |
325 | #ifndef DISABLE_EDAC_SYSFS |
326 | ||
da9bb1d2 AC |
327 | /* |
328 | * /sys/devices/system/edac/pci; | |
329 | * data structures and methods | |
330 | */ | |
331 | ||
332 | struct list_control { | |
333 | struct edac_pci_device_list *list; | |
334 | int *count; | |
335 | }; | |
336 | ||
4136cabf AV |
337 | |
338 | #if 0 | |
da9bb1d2 AC |
339 | /* Output the list as: vendor_id:device:id<,vendor_id:device_id> */ |
340 | static ssize_t edac_pci_list_string_show(void *ptr, char *buffer) | |
341 | { | |
342 | struct list_control *listctl; | |
343 | struct edac_pci_device_list *list; | |
344 | char *p = buffer; | |
345 | int len=0; | |
346 | int i; | |
347 | ||
348 | listctl = ptr; | |
349 | list = listctl->list; | |
350 | ||
351 | for (i = 0; i < *(listctl->count); i++, list++ ) { | |
352 | if (len > 0) | |
353 | len += snprintf(p + len, (PAGE_SIZE-len), ","); | |
354 | ||
355 | len += snprintf(p + len, | |
356 | (PAGE_SIZE-len), | |
357 | "%x:%x", | |
358 | list->vendor,list->device); | |
359 | } | |
360 | ||
361 | len += snprintf(p + len,(PAGE_SIZE-len), "\n"); | |
362 | ||
363 | return (ssize_t) len; | |
364 | } | |
365 | ||
366 | /** | |
367 | * | |
368 | * Scan string from **s to **e looking for one 'vendor:device' tuple | |
369 | * where each field is a hex value | |
370 | * | |
371 | * return 0 if an entry is NOT found | |
372 | * return 1 if an entry is found | |
373 | * fill in *vendor_id and *device_id with values found | |
374 | * | |
375 | * In both cases, make sure *s has been moved forward toward *e | |
376 | */ | |
377 | static int parse_one_device(const char **s,const char **e, | |
378 | unsigned int *vendor_id, unsigned int *device_id) | |
379 | { | |
380 | const char *runner, *p; | |
381 | ||
382 | /* if null byte, we are done */ | |
383 | if (!**s) { | |
384 | (*s)++; /* keep *s moving */ | |
385 | return 0; | |
386 | } | |
387 | ||
388 | /* skip over newlines & whitespace */ | |
389 | if ((**s == '\n') || isspace(**s)) { | |
390 | (*s)++; | |
391 | return 0; | |
392 | } | |
393 | ||
394 | if (!isxdigit(**s)) { | |
395 | (*s)++; | |
396 | return 0; | |
397 | } | |
398 | ||
399 | /* parse vendor_id */ | |
400 | runner = *s; | |
401 | while (runner < *e) { | |
402 | /* scan for vendor:device delimiter */ | |
403 | if (*runner == ':') { | |
404 | *vendor_id = simple_strtol((char*) *s, (char**) &p, 16); | |
405 | runner = p + 1; | |
406 | break; | |
407 | } | |
408 | runner++; | |
409 | } | |
410 | ||
411 | if (!isxdigit(*runner)) { | |
412 | *s = ++runner; | |
413 | return 0; | |
414 | } | |
415 | ||
416 | /* parse device_id */ | |
417 | if (runner < *e) { | |
418 | *device_id = simple_strtol((char*)runner, (char**)&p, 16); | |
419 | runner = p; | |
420 | } | |
421 | ||
422 | *s = runner; | |
423 | ||
424 | return 1; | |
425 | } | |
426 | ||
427 | static ssize_t edac_pci_list_string_store(void *ptr, const char *buffer, | |
428 | size_t count) | |
429 | { | |
430 | struct list_control *listctl; | |
431 | struct edac_pci_device_list *list; | |
432 | unsigned int vendor_id, device_id; | |
433 | const char *s, *e; | |
434 | int *index; | |
435 | ||
436 | s = (char*)buffer; | |
437 | e = s + count; | |
438 | ||
439 | listctl = ptr; | |
440 | list = listctl->list; | |
441 | index = listctl->count; | |
442 | ||
443 | *index = 0; | |
444 | while (*index < MAX_LISTED_PCI_DEVICES) { | |
445 | ||
446 | if (parse_one_device(&s,&e,&vendor_id,&device_id)) { | |
447 | list[ *index ].vendor = vendor_id; | |
448 | list[ *index ].device = device_id; | |
449 | (*index)++; | |
450 | } | |
451 | ||
452 | /* check for all data consume */ | |
453 | if (s >= e) | |
454 | break; | |
455 | } | |
456 | ||
457 | return count; | |
458 | } | |
459 | ||
4136cabf | 460 | #endif |
da9bb1d2 AC |
461 | static ssize_t edac_pci_int_show(void *ptr, char *buffer) |
462 | { | |
463 | int *value = ptr; | |
464 | return sprintf(buffer,"%d\n",*value); | |
465 | } | |
466 | ||
467 | static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count) | |
468 | { | |
469 | int *value = ptr; | |
470 | ||
471 | if (isdigit(*buffer)) | |
472 | *value = simple_strtoul(buffer,NULL,0); | |
473 | ||
474 | return count; | |
475 | } | |
476 | ||
477 | struct edac_pci_dev_attribute { | |
478 | struct attribute attr; | |
479 | void *value; | |
480 | ssize_t (*show)(void *,char *); | |
481 | ssize_t (*store)(void *, const char *,size_t); | |
482 | }; | |
483 | ||
484 | /* Set of show/store abstract level functions for PCI Parity object */ | |
485 | static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr, | |
486 | char *buffer) | |
487 | { | |
488 | struct edac_pci_dev_attribute *edac_pci_dev; | |
489 | edac_pci_dev= (struct edac_pci_dev_attribute*)attr; | |
490 | ||
491 | if (edac_pci_dev->show) | |
492 | return edac_pci_dev->show(edac_pci_dev->value, buffer); | |
493 | return -EIO; | |
494 | } | |
495 | ||
496 | static ssize_t edac_pci_dev_store(struct kobject *kobj, struct attribute *attr, | |
497 | const char *buffer, size_t count) | |
498 | { | |
499 | struct edac_pci_dev_attribute *edac_pci_dev; | |
500 | edac_pci_dev= (struct edac_pci_dev_attribute*)attr; | |
501 | ||
502 | if (edac_pci_dev->show) | |
503 | return edac_pci_dev->store(edac_pci_dev->value, buffer, count); | |
504 | return -EIO; | |
505 | } | |
506 | ||
507 | static struct sysfs_ops edac_pci_sysfs_ops = { | |
508 | .show = edac_pci_dev_show, | |
509 | .store = edac_pci_dev_store | |
510 | }; | |
511 | ||
512 | ||
513 | #define EDAC_PCI_ATTR(_name,_mode,_show,_store) \ | |
514 | struct edac_pci_dev_attribute edac_pci_attr_##_name = { \ | |
515 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
516 | .value = &_name, \ | |
517 | .show = _show, \ | |
518 | .store = _store, \ | |
519 | }; | |
520 | ||
521 | #define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \ | |
522 | struct edac_pci_dev_attribute edac_pci_attr_##_name = { \ | |
523 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
524 | .value = _data, \ | |
525 | .show = _show, \ | |
526 | .store = _store, \ | |
527 | }; | |
528 | ||
4136cabf | 529 | #if 0 |
da9bb1d2 AC |
530 | static struct list_control pci_whitelist_control = { |
531 | .list = pci_whitelist, | |
532 | .count = &pci_whitelist_count | |
533 | }; | |
534 | ||
535 | static struct list_control pci_blacklist_control = { | |
536 | .list = pci_blacklist, | |
537 | .count = &pci_blacklist_count | |
538 | }; | |
539 | ||
540 | /* whitelist attribute */ | |
541 | EDAC_PCI_STRING_ATTR(pci_parity_whitelist, | |
542 | &pci_whitelist_control, | |
543 | S_IRUGO|S_IWUSR, | |
544 | edac_pci_list_string_show, | |
545 | edac_pci_list_string_store); | |
546 | ||
547 | EDAC_PCI_STRING_ATTR(pci_parity_blacklist, | |
548 | &pci_blacklist_control, | |
549 | S_IRUGO|S_IWUSR, | |
550 | edac_pci_list_string_show, | |
551 | edac_pci_list_string_store); | |
4136cabf | 552 | #endif |
da9bb1d2 AC |
553 | |
554 | /* PCI Parity control files */ | |
555 | EDAC_PCI_ATTR(check_pci_parity,S_IRUGO|S_IWUSR,edac_pci_int_show,edac_pci_int_store); | |
556 | EDAC_PCI_ATTR(panic_on_pci_parity,S_IRUGO|S_IWUSR,edac_pci_int_show,edac_pci_int_store); | |
557 | EDAC_PCI_ATTR(pci_parity_count,S_IRUGO,edac_pci_int_show,NULL); | |
558 | ||
559 | /* Base Attributes of the memory ECC object */ | |
560 | static struct edac_pci_dev_attribute *edac_pci_attr[] = { | |
561 | &edac_pci_attr_check_pci_parity, | |
562 | &edac_pci_attr_panic_on_pci_parity, | |
563 | &edac_pci_attr_pci_parity_count, | |
da9bb1d2 AC |
564 | NULL, |
565 | }; | |
566 | ||
567 | /* No memory to release */ | |
568 | static void edac_pci_release(struct kobject *kobj) | |
569 | { | |
537fba28 | 570 | debugf1("%s()\n", __func__); |
da9bb1d2 AC |
571 | } |
572 | ||
573 | static struct kobj_type ktype_edac_pci = { | |
574 | .release = edac_pci_release, | |
575 | .sysfs_ops = &edac_pci_sysfs_ops, | |
576 | .default_attrs = (struct attribute **) edac_pci_attr, | |
577 | }; | |
578 | ||
ceb2ca9c DP |
579 | #endif /* DISABLE_EDAC_SYSFS */ |
580 | ||
da9bb1d2 AC |
581 | /** |
582 | * edac_sysfs_pci_setup() | |
583 | * | |
584 | */ | |
585 | static int edac_sysfs_pci_setup(void) | |
ceb2ca9c DP |
586 | #ifdef DISABLE_EDAC_SYSFS |
587 | { | |
588 | return 0; | |
589 | } | |
590 | #else | |
da9bb1d2 AC |
591 | { |
592 | int err; | |
593 | ||
537fba28 | 594 | debugf1("%s()\n", __func__); |
da9bb1d2 AC |
595 | |
596 | memset(&edac_pci_kobj, 0, sizeof(edac_pci_kobj)); | |
597 | ||
598 | kobject_init(&edac_pci_kobj); | |
599 | edac_pci_kobj.parent = &edac_class.kset.kobj; | |
600 | edac_pci_kobj.ktype = &ktype_edac_pci; | |
601 | ||
602 | err = kobject_set_name(&edac_pci_kobj, "pci"); | |
603 | if (!err) { | |
604 | /* Instanstiate the csrow object */ | |
605 | /* FIXME: maybe new sysdev_create_subdir() */ | |
606 | err = kobject_register(&edac_pci_kobj); | |
607 | if (err) | |
608 | debugf1("Failed to register '.../edac/pci'\n"); | |
609 | else | |
610 | debugf1("Registered '.../edac/pci' kobject\n"); | |
611 | } | |
612 | return err; | |
613 | } | |
ceb2ca9c | 614 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
615 | |
616 | static void edac_sysfs_pci_teardown(void) | |
617 | { | |
ceb2ca9c | 618 | #ifndef DISABLE_EDAC_SYSFS |
537fba28 | 619 | debugf0("%s()\n", __func__); |
da9bb1d2 AC |
620 | |
621 | kobject_unregister(&edac_pci_kobj); | |
622 | kobject_put(&edac_pci_kobj); | |
ceb2ca9c | 623 | #endif |
da9bb1d2 AC |
624 | } |
625 | ||
ceb2ca9c DP |
626 | #ifndef DISABLE_EDAC_SYSFS |
627 | ||
da9bb1d2 AC |
628 | /* EDAC sysfs CSROW data structures and methods */ |
629 | ||
630 | /* Set of more detailed csrow<id> attribute show/store functions */ | |
631 | static ssize_t csrow_ch0_dimm_label_show(struct csrow_info *csrow, char *data) | |
632 | { | |
633 | ssize_t size = 0; | |
634 | ||
635 | if (csrow->nr_channels > 0) { | |
636 | size = snprintf(data, EDAC_MC_LABEL_LEN,"%s\n", | |
637 | csrow->channels[0].label); | |
638 | } | |
639 | return size; | |
640 | } | |
641 | ||
642 | static ssize_t csrow_ch1_dimm_label_show(struct csrow_info *csrow, char *data) | |
643 | { | |
644 | ssize_t size = 0; | |
645 | ||
646 | if (csrow->nr_channels > 0) { | |
647 | size = snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", | |
648 | csrow->channels[1].label); | |
649 | } | |
650 | return size; | |
651 | } | |
652 | ||
653 | static ssize_t csrow_ch0_dimm_label_store(struct csrow_info *csrow, | |
654 | const char *data, size_t size) | |
655 | { | |
656 | ssize_t max_size = 0; | |
657 | ||
658 | if (csrow->nr_channels > 0) { | |
659 | max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1); | |
660 | strncpy(csrow->channels[0].label, data, max_size); | |
661 | csrow->channels[0].label[max_size] = '\0'; | |
662 | } | |
663 | return size; | |
664 | } | |
665 | ||
666 | static ssize_t csrow_ch1_dimm_label_store(struct csrow_info *csrow, | |
667 | const char *data, size_t size) | |
668 | { | |
669 | ssize_t max_size = 0; | |
670 | ||
671 | if (csrow->nr_channels > 1) { | |
672 | max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1); | |
673 | strncpy(csrow->channels[1].label, data, max_size); | |
674 | csrow->channels[1].label[max_size] = '\0'; | |
675 | } | |
676 | return max_size; | |
677 | } | |
678 | ||
679 | static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data) | |
680 | { | |
681 | return sprintf(data,"%u\n", csrow->ue_count); | |
682 | } | |
683 | ||
684 | static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data) | |
685 | { | |
686 | return sprintf(data,"%u\n", csrow->ce_count); | |
687 | } | |
688 | ||
689 | static ssize_t csrow_ch0_ce_count_show(struct csrow_info *csrow, char *data) | |
690 | { | |
691 | ssize_t size = 0; | |
692 | ||
693 | if (csrow->nr_channels > 0) { | |
694 | size = sprintf(data,"%u\n", csrow->channels[0].ce_count); | |
695 | } | |
696 | return size; | |
697 | } | |
698 | ||
699 | static ssize_t csrow_ch1_ce_count_show(struct csrow_info *csrow, char *data) | |
700 | { | |
701 | ssize_t size = 0; | |
702 | ||
703 | if (csrow->nr_channels > 1) { | |
704 | size = sprintf(data,"%u\n", csrow->channels[1].ce_count); | |
705 | } | |
706 | return size; | |
707 | } | |
708 | ||
709 | static ssize_t csrow_size_show(struct csrow_info *csrow, char *data) | |
710 | { | |
711 | return sprintf(data,"%u\n", PAGES_TO_MiB(csrow->nr_pages)); | |
712 | } | |
713 | ||
714 | static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data) | |
715 | { | |
716 | return sprintf(data,"%s\n", mem_types[csrow->mtype]); | |
717 | } | |
718 | ||
719 | static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data) | |
720 | { | |
721 | return sprintf(data,"%s\n", dev_types[csrow->dtype]); | |
722 | } | |
723 | ||
724 | static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data) | |
725 | { | |
726 | return sprintf(data,"%s\n", edac_caps[csrow->edac_mode]); | |
727 | } | |
728 | ||
729 | struct csrowdev_attribute { | |
730 | struct attribute attr; | |
731 | ssize_t (*show)(struct csrow_info *,char *); | |
732 | ssize_t (*store)(struct csrow_info *, const char *,size_t); | |
733 | }; | |
734 | ||
735 | #define to_csrow(k) container_of(k, struct csrow_info, kobj) | |
736 | #define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr) | |
737 | ||
738 | /* Set of show/store higher level functions for csrow objects */ | |
739 | static ssize_t csrowdev_show(struct kobject *kobj, struct attribute *attr, | |
740 | char *buffer) | |
741 | { | |
742 | struct csrow_info *csrow = to_csrow(kobj); | |
743 | struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr); | |
744 | ||
745 | if (csrowdev_attr->show) | |
746 | return csrowdev_attr->show(csrow, buffer); | |
747 | return -EIO; | |
748 | } | |
749 | ||
750 | static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr, | |
751 | const char *buffer, size_t count) | |
752 | { | |
753 | struct csrow_info *csrow = to_csrow(kobj); | |
754 | struct csrowdev_attribute * csrowdev_attr = to_csrowdev_attr(attr); | |
755 | ||
756 | if (csrowdev_attr->store) | |
757 | return csrowdev_attr->store(csrow, buffer, count); | |
758 | return -EIO; | |
759 | } | |
760 | ||
761 | static struct sysfs_ops csrowfs_ops = { | |
762 | .show = csrowdev_show, | |
763 | .store = csrowdev_store | |
764 | }; | |
765 | ||
766 | #define CSROWDEV_ATTR(_name,_mode,_show,_store) \ | |
767 | struct csrowdev_attribute attr_##_name = { \ | |
768 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
769 | .show = _show, \ | |
770 | .store = _store, \ | |
771 | }; | |
772 | ||
773 | /* cwrow<id>/attribute files */ | |
774 | CSROWDEV_ATTR(size_mb,S_IRUGO,csrow_size_show,NULL); | |
775 | CSROWDEV_ATTR(dev_type,S_IRUGO,csrow_dev_type_show,NULL); | |
776 | CSROWDEV_ATTR(mem_type,S_IRUGO,csrow_mem_type_show,NULL); | |
777 | CSROWDEV_ATTR(edac_mode,S_IRUGO,csrow_edac_mode_show,NULL); | |
778 | CSROWDEV_ATTR(ue_count,S_IRUGO,csrow_ue_count_show,NULL); | |
779 | CSROWDEV_ATTR(ce_count,S_IRUGO,csrow_ce_count_show,NULL); | |
780 | CSROWDEV_ATTR(ch0_ce_count,S_IRUGO,csrow_ch0_ce_count_show,NULL); | |
781 | CSROWDEV_ATTR(ch1_ce_count,S_IRUGO,csrow_ch1_ce_count_show,NULL); | |
782 | ||
783 | /* control/attribute files */ | |
784 | CSROWDEV_ATTR(ch0_dimm_label,S_IRUGO|S_IWUSR, | |
785 | csrow_ch0_dimm_label_show, | |
786 | csrow_ch0_dimm_label_store); | |
787 | CSROWDEV_ATTR(ch1_dimm_label,S_IRUGO|S_IWUSR, | |
788 | csrow_ch1_dimm_label_show, | |
789 | csrow_ch1_dimm_label_store); | |
790 | ||
791 | ||
792 | /* Attributes of the CSROW<id> object */ | |
793 | static struct csrowdev_attribute *csrow_attr[] = { | |
794 | &attr_dev_type, | |
795 | &attr_mem_type, | |
796 | &attr_edac_mode, | |
797 | &attr_size_mb, | |
798 | &attr_ue_count, | |
799 | &attr_ce_count, | |
800 | &attr_ch0_ce_count, | |
801 | &attr_ch1_ce_count, | |
802 | &attr_ch0_dimm_label, | |
803 | &attr_ch1_dimm_label, | |
804 | NULL, | |
805 | }; | |
806 | ||
807 | ||
808 | /* No memory to release */ | |
809 | static void edac_csrow_instance_release(struct kobject *kobj) | |
810 | { | |
537fba28 | 811 | debugf1("%s()\n", __func__); |
da9bb1d2 AC |
812 | } |
813 | ||
814 | static struct kobj_type ktype_csrow = { | |
815 | .release = edac_csrow_instance_release, | |
816 | .sysfs_ops = &csrowfs_ops, | |
817 | .default_attrs = (struct attribute **) csrow_attr, | |
818 | }; | |
819 | ||
820 | /* Create a CSROW object under specifed edac_mc_device */ | |
821 | static int edac_create_csrow_object(struct kobject *edac_mci_kobj, | |
822 | struct csrow_info *csrow, int index ) | |
823 | { | |
824 | int err = 0; | |
825 | ||
537fba28 | 826 | debugf0("%s()\n", __func__); |
da9bb1d2 AC |
827 | |
828 | memset(&csrow->kobj, 0, sizeof(csrow->kobj)); | |
829 | ||
830 | /* generate ..../edac/mc/mc<id>/csrow<index> */ | |
831 | ||
832 | kobject_init(&csrow->kobj); | |
833 | csrow->kobj.parent = edac_mci_kobj; | |
834 | csrow->kobj.ktype = &ktype_csrow; | |
835 | ||
836 | /* name this instance of csrow<id> */ | |
837 | err = kobject_set_name(&csrow->kobj,"csrow%d",index); | |
838 | if (!err) { | |
839 | /* Instanstiate the csrow object */ | |
840 | err = kobject_register(&csrow->kobj); | |
841 | if (err) | |
842 | debugf0("Failed to register CSROW%d\n",index); | |
843 | else | |
844 | debugf0("Registered CSROW%d\n",index); | |
845 | } | |
846 | ||
847 | return err; | |
848 | } | |
849 | ||
850 | /* sysfs data structures and methods for the MCI kobjects */ | |
851 | ||
852 | static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci, | |
853 | const char *data, size_t count ) | |
854 | { | |
855 | int row, chan; | |
856 | ||
857 | mci->ue_noinfo_count = 0; | |
858 | mci->ce_noinfo_count = 0; | |
859 | mci->ue_count = 0; | |
860 | mci->ce_count = 0; | |
861 | for (row = 0; row < mci->nr_csrows; row++) { | |
862 | struct csrow_info *ri = &mci->csrows[row]; | |
863 | ||
864 | ri->ue_count = 0; | |
865 | ri->ce_count = 0; | |
866 | for (chan = 0; chan < ri->nr_channels; chan++) | |
867 | ri->channels[chan].ce_count = 0; | |
868 | } | |
869 | mci->start_time = jiffies; | |
870 | ||
871 | return count; | |
872 | } | |
873 | ||
874 | static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data) | |
875 | { | |
876 | return sprintf(data,"%d\n", mci->ue_count); | |
877 | } | |
878 | ||
879 | static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data) | |
880 | { | |
881 | return sprintf(data,"%d\n", mci->ce_count); | |
882 | } | |
883 | ||
884 | static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data) | |
885 | { | |
886 | return sprintf(data,"%d\n", mci->ce_noinfo_count); | |
887 | } | |
888 | ||
889 | static ssize_t mci_ue_noinfo_show(struct mem_ctl_info *mci, char *data) | |
890 | { | |
891 | return sprintf(data,"%d\n", mci->ue_noinfo_count); | |
892 | } | |
893 | ||
894 | static ssize_t mci_seconds_show(struct mem_ctl_info *mci, char *data) | |
895 | { | |
896 | return sprintf(data,"%ld\n", (jiffies - mci->start_time) / HZ); | |
897 | } | |
898 | ||
899 | static ssize_t mci_mod_name_show(struct mem_ctl_info *mci, char *data) | |
900 | { | |
901 | return sprintf(data,"%s %s\n", mci->mod_name, mci->mod_ver); | |
902 | } | |
903 | ||
904 | static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data) | |
905 | { | |
906 | return sprintf(data,"%s\n", mci->ctl_name); | |
907 | } | |
908 | ||
909 | static int mci_output_edac_cap(char *buf, unsigned long edac_cap) | |
910 | { | |
911 | char *p = buf; | |
912 | int bit_idx; | |
913 | ||
914 | for (bit_idx = 0; bit_idx < 8 * sizeof(edac_cap); bit_idx++) { | |
915 | if ((edac_cap >> bit_idx) & 0x1) | |
916 | p += sprintf(p, "%s ", edac_caps[bit_idx]); | |
917 | } | |
918 | ||
919 | return p - buf; | |
920 | } | |
921 | ||
922 | static ssize_t mci_edac_capability_show(struct mem_ctl_info *mci, char *data) | |
923 | { | |
924 | char *p = data; | |
925 | ||
926 | p += mci_output_edac_cap(p,mci->edac_ctl_cap); | |
927 | p += sprintf(p, "\n"); | |
928 | ||
929 | return p - data; | |
930 | } | |
931 | ||
932 | static ssize_t mci_edac_current_capability_show(struct mem_ctl_info *mci, | |
933 | char *data) | |
934 | { | |
935 | char *p = data; | |
936 | ||
937 | p += mci_output_edac_cap(p,mci->edac_cap); | |
938 | p += sprintf(p, "\n"); | |
939 | ||
940 | return p - data; | |
941 | } | |
942 | ||
943 | static int mci_output_mtype_cap(char *buf, unsigned long mtype_cap) | |
944 | { | |
945 | char *p = buf; | |
946 | int bit_idx; | |
947 | ||
948 | for (bit_idx = 0; bit_idx < 8 * sizeof(mtype_cap); bit_idx++) { | |
949 | if ((mtype_cap >> bit_idx) & 0x1) | |
950 | p += sprintf(p, "%s ", mem_types[bit_idx]); | |
951 | } | |
952 | ||
953 | return p - buf; | |
954 | } | |
955 | ||
956 | static ssize_t mci_supported_mem_type_show(struct mem_ctl_info *mci, char *data) | |
957 | { | |
958 | char *p = data; | |
959 | ||
960 | p += mci_output_mtype_cap(p,mci->mtype_cap); | |
961 | p += sprintf(p, "\n"); | |
962 | ||
963 | return p - data; | |
964 | } | |
965 | ||
966 | static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data) | |
967 | { | |
968 | int total_pages, csrow_idx; | |
969 | ||
970 | for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows; | |
971 | csrow_idx++) { | |
972 | struct csrow_info *csrow = &mci->csrows[csrow_idx]; | |
973 | ||
974 | if (!csrow->nr_pages) | |
975 | continue; | |
976 | total_pages += csrow->nr_pages; | |
977 | } | |
978 | ||
979 | return sprintf(data,"%u\n", PAGES_TO_MiB(total_pages)); | |
980 | } | |
981 | ||
982 | struct mcidev_attribute { | |
983 | struct attribute attr; | |
984 | ssize_t (*show)(struct mem_ctl_info *,char *); | |
985 | ssize_t (*store)(struct mem_ctl_info *, const char *,size_t); | |
986 | }; | |
987 | ||
988 | #define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj) | |
989 | #define to_mcidev_attr(a) container_of(a, struct mcidev_attribute, attr) | |
990 | ||
991 | static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr, | |
992 | char *buffer) | |
993 | { | |
994 | struct mem_ctl_info *mem_ctl_info = to_mci(kobj); | |
995 | struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr); | |
996 | ||
997 | if (mcidev_attr->show) | |
998 | return mcidev_attr->show(mem_ctl_info, buffer); | |
999 | return -EIO; | |
1000 | } | |
1001 | ||
1002 | static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr, | |
1003 | const char *buffer, size_t count) | |
1004 | { | |
1005 | struct mem_ctl_info *mem_ctl_info = to_mci(kobj); | |
1006 | struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr); | |
1007 | ||
1008 | if (mcidev_attr->store) | |
1009 | return mcidev_attr->store(mem_ctl_info, buffer, count); | |
1010 | return -EIO; | |
1011 | } | |
1012 | ||
1013 | static struct sysfs_ops mci_ops = { | |
1014 | .show = mcidev_show, | |
1015 | .store = mcidev_store | |
1016 | }; | |
1017 | ||
1018 | #define MCIDEV_ATTR(_name,_mode,_show,_store) \ | |
1019 | struct mcidev_attribute mci_attr_##_name = { \ | |
1020 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
1021 | .show = _show, \ | |
1022 | .store = _store, \ | |
1023 | }; | |
1024 | ||
1025 | /* Control file */ | |
1026 | MCIDEV_ATTR(reset_counters,S_IWUSR,NULL,mci_reset_counters_store); | |
1027 | ||
1028 | /* Attribute files */ | |
1029 | MCIDEV_ATTR(mc_name,S_IRUGO,mci_ctl_name_show,NULL); | |
1030 | MCIDEV_ATTR(module_name,S_IRUGO,mci_mod_name_show,NULL); | |
1031 | MCIDEV_ATTR(edac_capability,S_IRUGO,mci_edac_capability_show,NULL); | |
1032 | MCIDEV_ATTR(size_mb,S_IRUGO,mci_size_mb_show,NULL); | |
1033 | MCIDEV_ATTR(seconds_since_reset,S_IRUGO,mci_seconds_show,NULL); | |
1034 | MCIDEV_ATTR(ue_noinfo_count,S_IRUGO,mci_ue_noinfo_show,NULL); | |
1035 | MCIDEV_ATTR(ce_noinfo_count,S_IRUGO,mci_ce_noinfo_show,NULL); | |
1036 | MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL); | |
1037 | MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL); | |
1038 | MCIDEV_ATTR(edac_current_capability,S_IRUGO, | |
1039 | mci_edac_current_capability_show,NULL); | |
1040 | MCIDEV_ATTR(supported_mem_type,S_IRUGO, | |
1041 | mci_supported_mem_type_show,NULL); | |
1042 | ||
1043 | ||
1044 | static struct mcidev_attribute *mci_attr[] = { | |
1045 | &mci_attr_reset_counters, | |
1046 | &mci_attr_module_name, | |
1047 | &mci_attr_mc_name, | |
1048 | &mci_attr_edac_capability, | |
1049 | &mci_attr_edac_current_capability, | |
1050 | &mci_attr_supported_mem_type, | |
1051 | &mci_attr_size_mb, | |
1052 | &mci_attr_seconds_since_reset, | |
1053 | &mci_attr_ue_noinfo_count, | |
1054 | &mci_attr_ce_noinfo_count, | |
1055 | &mci_attr_ue_count, | |
1056 | &mci_attr_ce_count, | |
1057 | NULL | |
1058 | }; | |
1059 | ||
1060 | ||
1061 | /* | |
1062 | * Release of a MC controlling instance | |
1063 | */ | |
1064 | static void edac_mci_instance_release(struct kobject *kobj) | |
1065 | { | |
1066 | struct mem_ctl_info *mci; | |
1067 | mci = container_of(kobj,struct mem_ctl_info,edac_mci_kobj); | |
1068 | ||
537fba28 | 1069 | debugf0("%s() idx=%d calling kfree\n", __func__, mci->mc_idx); |
da9bb1d2 AC |
1070 | |
1071 | kfree(mci); | |
1072 | } | |
1073 | ||
1074 | static struct kobj_type ktype_mci = { | |
1075 | .release = edac_mci_instance_release, | |
1076 | .sysfs_ops = &mci_ops, | |
1077 | .default_attrs = (struct attribute **) mci_attr, | |
1078 | }; | |
1079 | ||
ceb2ca9c DP |
1080 | #endif /* DISABLE_EDAC_SYSFS */ |
1081 | ||
da9bb1d2 AC |
1082 | #define EDAC_DEVICE_SYMLINK "device" |
1083 | ||
1084 | /* | |
1085 | * Create a new Memory Controller kobject instance, | |
1086 | * mc<id> under the 'mc' directory | |
1087 | * | |
1088 | * Return: | |
1089 | * 0 Success | |
1090 | * !0 Failure | |
1091 | */ | |
1092 | static int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) | |
ceb2ca9c DP |
1093 | #ifdef DISABLE_EDAC_SYSFS |
1094 | { | |
1095 | return 0; | |
1096 | } | |
1097 | #else | |
da9bb1d2 AC |
1098 | { |
1099 | int i; | |
1100 | int err; | |
1101 | struct csrow_info *csrow; | |
1102 | struct kobject *edac_mci_kobj=&mci->edac_mci_kobj; | |
1103 | ||
537fba28 | 1104 | debugf0("%s() idx=%d\n", __func__, mci->mc_idx); |
da9bb1d2 AC |
1105 | |
1106 | memset(edac_mci_kobj, 0, sizeof(*edac_mci_kobj)); | |
1107 | kobject_init(edac_mci_kobj); | |
1108 | ||
1109 | /* set the name of the mc<id> object */ | |
1110 | err = kobject_set_name(edac_mci_kobj,"mc%d",mci->mc_idx); | |
1111 | if (err) | |
1112 | return err; | |
1113 | ||
1114 | /* link to our parent the '..../edac/mc' object */ | |
1115 | edac_mci_kobj->parent = &edac_memctrl_kobj; | |
1116 | edac_mci_kobj->ktype = &ktype_mci; | |
1117 | ||
1118 | /* register the mc<id> kobject */ | |
1119 | err = kobject_register(edac_mci_kobj); | |
1120 | if (err) | |
1121 | return err; | |
1122 | ||
1123 | /* create a symlink for the device */ | |
1124 | err = sysfs_create_link(edac_mci_kobj, &mci->pdev->dev.kobj, | |
1125 | EDAC_DEVICE_SYMLINK); | |
1126 | if (err) { | |
1127 | kobject_unregister(edac_mci_kobj); | |
1128 | return err; | |
1129 | } | |
1130 | ||
1131 | /* Make directories for each CSROW object | |
1132 | * under the mc<id> kobject | |
1133 | */ | |
1134 | for (i = 0; i < mci->nr_csrows; i++) { | |
1135 | ||
1136 | csrow = &mci->csrows[i]; | |
1137 | ||
1138 | /* Only expose populated CSROWs */ | |
1139 | if (csrow->nr_pages > 0) { | |
1140 | err = edac_create_csrow_object(edac_mci_kobj,csrow,i); | |
1141 | if (err) | |
1142 | goto fail; | |
1143 | } | |
1144 | } | |
1145 | ||
1146 | /* Mark this MCI instance as having sysfs entries */ | |
1147 | mci->sysfs_active = MCI_SYSFS_ACTIVE; | |
1148 | ||
1149 | return 0; | |
1150 | ||
1151 | ||
1152 | /* CSROW error: backout what has already been registered, */ | |
1153 | fail: | |
1154 | for ( i--; i >= 0; i--) { | |
1155 | if (csrow->nr_pages > 0) { | |
1156 | kobject_unregister(&mci->csrows[i].kobj); | |
1157 | kobject_put(&mci->csrows[i].kobj); | |
1158 | } | |
1159 | } | |
1160 | ||
1161 | kobject_unregister(edac_mci_kobj); | |
1162 | kobject_put(edac_mci_kobj); | |
1163 | ||
1164 | return err; | |
1165 | } | |
ceb2ca9c | 1166 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
1167 | |
1168 | /* | |
1169 | * remove a Memory Controller instance | |
1170 | */ | |
1171 | static void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci) | |
1172 | { | |
ceb2ca9c | 1173 | #ifndef DISABLE_EDAC_SYSFS |
da9bb1d2 AC |
1174 | int i; |
1175 | ||
537fba28 | 1176 | debugf0("%s()\n", __func__); |
da9bb1d2 AC |
1177 | |
1178 | /* remove all csrow kobjects */ | |
1179 | for (i = 0; i < mci->nr_csrows; i++) { | |
1180 | if (mci->csrows[i].nr_pages > 0) { | |
1181 | kobject_unregister(&mci->csrows[i].kobj); | |
1182 | kobject_put(&mci->csrows[i].kobj); | |
1183 | } | |
1184 | } | |
1185 | ||
1186 | sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK); | |
1187 | ||
1188 | kobject_unregister(&mci->edac_mci_kobj); | |
1189 | kobject_put(&mci->edac_mci_kobj); | |
ceb2ca9c | 1190 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
1191 | } |
1192 | ||
1193 | /* END OF sysfs data and methods */ | |
1194 | ||
1195 | #ifdef CONFIG_EDAC_DEBUG | |
1196 | ||
1197 | EXPORT_SYMBOL(edac_mc_dump_channel); | |
1198 | ||
1199 | void edac_mc_dump_channel(struct channel_info *chan) | |
1200 | { | |
1201 | debugf4("\tchannel = %p\n", chan); | |
1202 | debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx); | |
1203 | debugf4("\tchannel->ce_count = %d\n", chan->ce_count); | |
1204 | debugf4("\tchannel->label = '%s'\n", chan->label); | |
1205 | debugf4("\tchannel->csrow = %p\n\n", chan->csrow); | |
1206 | } | |
1207 | ||
1208 | ||
1209 | EXPORT_SYMBOL(edac_mc_dump_csrow); | |
1210 | ||
1211 | void edac_mc_dump_csrow(struct csrow_info *csrow) | |
1212 | { | |
1213 | debugf4("\tcsrow = %p\n", csrow); | |
1214 | debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx); | |
1215 | debugf4("\tcsrow->first_page = 0x%lx\n", | |
1216 | csrow->first_page); | |
1217 | debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page); | |
1218 | debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask); | |
1219 | debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages); | |
1220 | debugf4("\tcsrow->nr_channels = %d\n", | |
1221 | csrow->nr_channels); | |
1222 | debugf4("\tcsrow->channels = %p\n", csrow->channels); | |
1223 | debugf4("\tcsrow->mci = %p\n\n", csrow->mci); | |
1224 | } | |
1225 | ||
1226 | ||
1227 | EXPORT_SYMBOL(edac_mc_dump_mci); | |
1228 | ||
1229 | void edac_mc_dump_mci(struct mem_ctl_info *mci) | |
1230 | { | |
1231 | debugf3("\tmci = %p\n", mci); | |
1232 | debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap); | |
1233 | debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap); | |
1234 | debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap); | |
1235 | debugf4("\tmci->edac_check = %p\n", mci->edac_check); | |
1236 | debugf3("\tmci->nr_csrows = %d, csrows = %p\n", | |
1237 | mci->nr_csrows, mci->csrows); | |
1238 | debugf3("\tpdev = %p\n", mci->pdev); | |
1239 | debugf3("\tmod_name:ctl_name = %s:%s\n", | |
1240 | mci->mod_name, mci->ctl_name); | |
1241 | debugf3("\tpvt_info = %p\n\n", mci->pvt_info); | |
1242 | } | |
1243 | ||
1244 | ||
1245 | #endif /* CONFIG_EDAC_DEBUG */ | |
1246 | ||
1247 | /* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'. | |
1248 | * Adjust 'ptr' so that its alignment is at least as stringent as what the | |
1249 | * compiler would provide for X and return the aligned result. | |
1250 | * | |
1251 | * If 'size' is a constant, the compiler will optimize this whole function | |
1252 | * down to either a no-op or the addition of a constant to the value of 'ptr'. | |
1253 | */ | |
1254 | static inline char * align_ptr (void *ptr, unsigned size) | |
1255 | { | |
1256 | unsigned align, r; | |
1257 | ||
1258 | /* Here we assume that the alignment of a "long long" is the most | |
1259 | * stringent alignment that the compiler will ever provide by default. | |
1260 | * As far as I know, this is a reasonable assumption. | |
1261 | */ | |
1262 | if (size > sizeof(long)) | |
1263 | align = sizeof(long long); | |
1264 | else if (size > sizeof(int)) | |
1265 | align = sizeof(long); | |
1266 | else if (size > sizeof(short)) | |
1267 | align = sizeof(int); | |
1268 | else if (size > sizeof(char)) | |
1269 | align = sizeof(short); | |
1270 | else | |
1271 | return (char *) ptr; | |
1272 | ||
1273 | r = size % align; | |
1274 | ||
1275 | if (r == 0) | |
1276 | return (char *) ptr; | |
1277 | ||
1278 | return (char *) (((unsigned long) ptr) + align - r); | |
1279 | } | |
1280 | ||
1281 | ||
1282 | EXPORT_SYMBOL(edac_mc_alloc); | |
1283 | ||
1284 | /** | |
1285 | * edac_mc_alloc: Allocate a struct mem_ctl_info structure | |
1286 | * @size_pvt: size of private storage needed | |
1287 | * @nr_csrows: Number of CWROWS needed for this MC | |
1288 | * @nr_chans: Number of channels for the MC | |
1289 | * | |
1290 | * Everything is kmalloc'ed as one big chunk - more efficient. | |
1291 | * Only can be used if all structures have the same lifetime - otherwise | |
1292 | * you have to allocate and initialize your own structures. | |
1293 | * | |
1294 | * Use edac_mc_free() to free mc structures allocated by this function. | |
1295 | * | |
1296 | * Returns: | |
1297 | * NULL allocation failed | |
1298 | * struct mem_ctl_info pointer | |
1299 | */ | |
1300 | struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, | |
1301 | unsigned nr_chans) | |
1302 | { | |
1303 | struct mem_ctl_info *mci; | |
1304 | struct csrow_info *csi, *csrow; | |
1305 | struct channel_info *chi, *chp, *chan; | |
1306 | void *pvt; | |
1307 | unsigned size; | |
1308 | int row, chn; | |
1309 | ||
1310 | /* Figure out the offsets of the various items from the start of an mc | |
1311 | * structure. We want the alignment of each item to be at least as | |
1312 | * stringent as what the compiler would provide if we could simply | |
1313 | * hardcode everything into a single struct. | |
1314 | */ | |
1315 | mci = (struct mem_ctl_info *) 0; | |
1316 | csi = (struct csrow_info *)align_ptr(&mci[1], sizeof(*csi)); | |
1317 | chi = (struct channel_info *) | |
1318 | align_ptr(&csi[nr_csrows], sizeof(*chi)); | |
1319 | pvt = align_ptr(&chi[nr_chans * nr_csrows], sz_pvt); | |
1320 | size = ((unsigned long) pvt) + sz_pvt; | |
1321 | ||
1322 | if ((mci = kmalloc(size, GFP_KERNEL)) == NULL) | |
1323 | return NULL; | |
1324 | ||
1325 | /* Adjust pointers so they point within the memory we just allocated | |
1326 | * rather than an imaginary chunk of memory located at address 0. | |
1327 | */ | |
1328 | csi = (struct csrow_info *) (((char *) mci) + ((unsigned long) csi)); | |
1329 | chi = (struct channel_info *) (((char *) mci) + ((unsigned long) chi)); | |
1330 | pvt = sz_pvt ? (((char *) mci) + ((unsigned long) pvt)) : NULL; | |
1331 | ||
1332 | memset(mci, 0, size); /* clear all fields */ | |
1333 | ||
1334 | mci->csrows = csi; | |
1335 | mci->pvt_info = pvt; | |
1336 | mci->nr_csrows = nr_csrows; | |
1337 | ||
1338 | for (row = 0; row < nr_csrows; row++) { | |
1339 | csrow = &csi[row]; | |
1340 | csrow->csrow_idx = row; | |
1341 | csrow->mci = mci; | |
1342 | csrow->nr_channels = nr_chans; | |
1343 | chp = &chi[row * nr_chans]; | |
1344 | csrow->channels = chp; | |
1345 | ||
1346 | for (chn = 0; chn < nr_chans; chn++) { | |
1347 | chan = &chp[chn]; | |
1348 | chan->chan_idx = chn; | |
1349 | chan->csrow = csrow; | |
1350 | } | |
1351 | } | |
1352 | ||
1353 | return mci; | |
1354 | } | |
1355 | ||
1356 | ||
1357 | EXPORT_SYMBOL(edac_mc_free); | |
1358 | ||
1359 | /** | |
1360 | * edac_mc_free: Free a previously allocated 'mci' structure | |
1361 | * @mci: pointer to a struct mem_ctl_info structure | |
1362 | * | |
1363 | * Free up a previously allocated mci structure | |
1364 | * A MCI structure can be in 2 states after being allocated | |
1365 | * by edac_mc_alloc(). | |
1366 | * 1) Allocated in a MC driver's probe, but not yet committed | |
1367 | * 2) Allocated and committed, by a call to edac_mc_add_mc() | |
1368 | * edac_mc_add_mc() is the function that adds the sysfs entries | |
1369 | * thus, this free function must determine which state the 'mci' | |
1370 | * structure is in, then either free it directly or | |
1371 | * perform kobject cleanup by calling edac_remove_sysfs_mci_device(). | |
1372 | * | |
1373 | * VOID Return | |
1374 | */ | |
1375 | void edac_mc_free(struct mem_ctl_info *mci) | |
1376 | { | |
1377 | /* only if sysfs entries for this mci instance exist | |
1378 | * do we remove them and defer the actual kfree via | |
1379 | * the kobject 'release()' callback. | |
1380 | * | |
1381 | * Otherwise, do a straight kfree now. | |
1382 | */ | |
1383 | if (mci->sysfs_active == MCI_SYSFS_ACTIVE) | |
1384 | edac_remove_sysfs_mci_device(mci); | |
1385 | else | |
1386 | kfree(mci); | |
1387 | } | |
1388 | ||
1389 | ||
1390 | ||
1391 | EXPORT_SYMBOL(edac_mc_find_mci_by_pdev); | |
1392 | ||
1393 | struct mem_ctl_info *edac_mc_find_mci_by_pdev(struct pci_dev *pdev) | |
1394 | { | |
1395 | struct mem_ctl_info *mci; | |
1396 | struct list_head *item; | |
1397 | ||
537fba28 | 1398 | debugf3("%s()\n", __func__); |
da9bb1d2 AC |
1399 | |
1400 | list_for_each(item, &mc_devices) { | |
1401 | mci = list_entry(item, struct mem_ctl_info, link); | |
1402 | ||
1403 | if (mci->pdev == pdev) | |
1404 | return mci; | |
1405 | } | |
1406 | ||
1407 | return NULL; | |
1408 | } | |
1409 | ||
1410 | static int add_mc_to_global_list (struct mem_ctl_info *mci) | |
1411 | { | |
1412 | struct list_head *item, *insert_before; | |
1413 | struct mem_ctl_info *p; | |
1414 | int i; | |
1415 | ||
1416 | if (list_empty(&mc_devices)) { | |
1417 | mci->mc_idx = 0; | |
1418 | insert_before = &mc_devices; | |
1419 | } else { | |
1420 | if (edac_mc_find_mci_by_pdev(mci->pdev)) { | |
537fba28 DP |
1421 | edac_printk(KERN_WARNING, EDAC_MC, |
1422 | "%s (%s) %s %s already assigned %d\n", | |
1423 | mci->pdev->dev.bus_id, | |
1424 | pci_name(mci->pdev), mci->mod_name, | |
1425 | mci->ctl_name, mci->mc_idx); | |
da9bb1d2 AC |
1426 | return 1; |
1427 | } | |
1428 | ||
1429 | insert_before = NULL; | |
1430 | i = 0; | |
1431 | ||
1432 | list_for_each(item, &mc_devices) { | |
1433 | p = list_entry(item, struct mem_ctl_info, link); | |
1434 | ||
1435 | if (p->mc_idx != i) { | |
1436 | insert_before = item; | |
1437 | break; | |
1438 | } | |
1439 | ||
1440 | i++; | |
1441 | } | |
1442 | ||
1443 | mci->mc_idx = i; | |
1444 | ||
1445 | if (insert_before == NULL) | |
1446 | insert_before = &mc_devices; | |
1447 | } | |
1448 | ||
1449 | list_add_tail_rcu(&mci->link, insert_before); | |
1450 | return 0; | |
1451 | } | |
1452 | ||
1453 | ||
a1d03fcc DP |
1454 | static void complete_mc_list_del (struct rcu_head *head) |
1455 | { | |
1456 | struct mem_ctl_info *mci; | |
1457 | ||
1458 | mci = container_of(head, struct mem_ctl_info, rcu); | |
1459 | INIT_LIST_HEAD(&mci->link); | |
1460 | complete(&mci->complete); | |
1461 | } | |
1462 | ||
1463 | ||
1464 | static void del_mc_from_global_list (struct mem_ctl_info *mci) | |
1465 | { | |
1466 | list_del_rcu(&mci->link); | |
1467 | init_completion(&mci->complete); | |
1468 | call_rcu(&mci->rcu, complete_mc_list_del); | |
1469 | wait_for_completion(&mci->complete); | |
1470 | } | |
1471 | ||
da9bb1d2 AC |
1472 | |
1473 | EXPORT_SYMBOL(edac_mc_add_mc); | |
1474 | ||
1475 | /** | |
1476 | * edac_mc_add_mc: Insert the 'mci' structure into the mci global list | |
1477 | * @mci: pointer to the mci structure to be added to the list | |
1478 | * | |
1479 | * Return: | |
1480 | * 0 Success | |
1481 | * !0 Failure | |
1482 | */ | |
1483 | ||
1484 | /* FIXME - should a warning be printed if no error detection? correction? */ | |
1485 | int edac_mc_add_mc(struct mem_ctl_info *mci) | |
1486 | { | |
537fba28 | 1487 | debugf0("%s()\n", __func__); |
da9bb1d2 AC |
1488 | #ifdef CONFIG_EDAC_DEBUG |
1489 | if (edac_debug_level >= 3) | |
1490 | edac_mc_dump_mci(mci); | |
1491 | if (edac_debug_level >= 4) { | |
1492 | int i; | |
1493 | ||
1494 | for (i = 0; i < mci->nr_csrows; i++) { | |
1495 | int j; | |
1496 | edac_mc_dump_csrow(&mci->csrows[i]); | |
1497 | for (j = 0; j < mci->csrows[i].nr_channels; j++) | |
1498 | edac_mc_dump_channel(&mci->csrows[i]. | |
1499 | channels[j]); | |
1500 | } | |
1501 | } | |
1502 | #endif | |
1503 | down(&mem_ctls_mutex); | |
1504 | ||
1505 | if (add_mc_to_global_list(mci)) | |
028a7b6d | 1506 | goto fail0; |
da9bb1d2 AC |
1507 | |
1508 | /* set load time so that error rate can be tracked */ | |
1509 | mci->start_time = jiffies; | |
1510 | ||
1511 | if (edac_create_sysfs_mci_device(mci)) { | |
537fba28 DP |
1512 | edac_mc_printk(mci, KERN_WARNING, |
1513 | "failed to create sysfs device\n"); | |
028a7b6d | 1514 | goto fail1; |
da9bb1d2 AC |
1515 | } |
1516 | ||
1517 | /* Report action taken */ | |
537fba28 DP |
1518 | edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: PCI %s\n", |
1519 | mci->mod_name, mci->ctl_name, pci_name(mci->pdev)); | |
da9bb1d2 | 1520 | |
028a7b6d DP |
1521 | up(&mem_ctls_mutex); |
1522 | return 0; | |
da9bb1d2 | 1523 | |
028a7b6d DP |
1524 | fail1: |
1525 | del_mc_from_global_list(mci); | |
1526 | ||
1527 | fail0: | |
da9bb1d2 | 1528 | up(&mem_ctls_mutex); |
028a7b6d | 1529 | return 1; |
da9bb1d2 AC |
1530 | } |
1531 | ||
1532 | ||
da9bb1d2 AC |
1533 | EXPORT_SYMBOL(edac_mc_del_mc); |
1534 | ||
1535 | /** | |
1536 | * edac_mc_del_mc: Remove the specified mci structure from global list | |
1537 | * @mci: Pointer to struct mem_ctl_info structure | |
1538 | * | |
1539 | * Returns: | |
1540 | * 0 Success | |
1541 | * 1 Failure | |
1542 | */ | |
1543 | int edac_mc_del_mc(struct mem_ctl_info *mci) | |
1544 | { | |
1545 | int rc = 1; | |
1546 | ||
537fba28 | 1547 | debugf0("MC%d: %s()\n", mci->mc_idx, __func__); |
da9bb1d2 AC |
1548 | down(&mem_ctls_mutex); |
1549 | del_mc_from_global_list(mci); | |
537fba28 DP |
1550 | edac_printk(KERN_INFO, EDAC_MC, |
1551 | "Removed device %d for %s %s: PCI %s\n", mci->mc_idx, | |
1552 | mci->mod_name, mci->ctl_name, pci_name(mci->pdev)); | |
da9bb1d2 AC |
1553 | rc = 0; |
1554 | up(&mem_ctls_mutex); | |
1555 | ||
1556 | return rc; | |
1557 | } | |
1558 | ||
1559 | ||
1560 | EXPORT_SYMBOL(edac_mc_scrub_block); | |
1561 | ||
1562 | void edac_mc_scrub_block(unsigned long page, unsigned long offset, | |
1563 | u32 size) | |
1564 | { | |
1565 | struct page *pg; | |
1566 | void *virt_addr; | |
1567 | unsigned long flags = 0; | |
1568 | ||
537fba28 | 1569 | debugf3("%s()\n", __func__); |
da9bb1d2 AC |
1570 | |
1571 | /* ECC error page was not in our memory. Ignore it. */ | |
1572 | if(!pfn_valid(page)) | |
1573 | return; | |
1574 | ||
1575 | /* Find the actual page structure then map it and fix */ | |
1576 | pg = pfn_to_page(page); | |
1577 | ||
1578 | if (PageHighMem(pg)) | |
1579 | local_irq_save(flags); | |
1580 | ||
1581 | virt_addr = kmap_atomic(pg, KM_BOUNCE_READ); | |
1582 | ||
1583 | /* Perform architecture specific atomic scrub operation */ | |
1584 | atomic_scrub(virt_addr + offset, size); | |
1585 | ||
1586 | /* Unmap and complete */ | |
1587 | kunmap_atomic(virt_addr, KM_BOUNCE_READ); | |
1588 | ||
1589 | if (PageHighMem(pg)) | |
1590 | local_irq_restore(flags); | |
1591 | } | |
1592 | ||
1593 | ||
1594 | /* FIXME - should return -1 */ | |
1595 | EXPORT_SYMBOL(edac_mc_find_csrow_by_page); | |
1596 | ||
1597 | int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, | |
1598 | unsigned long page) | |
1599 | { | |
1600 | struct csrow_info *csrows = mci->csrows; | |
1601 | int row, i; | |
1602 | ||
537fba28 | 1603 | debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page); |
da9bb1d2 AC |
1604 | row = -1; |
1605 | ||
1606 | for (i = 0; i < mci->nr_csrows; i++) { | |
1607 | struct csrow_info *csrow = &csrows[i]; | |
1608 | ||
1609 | if (csrow->nr_pages == 0) | |
1610 | continue; | |
1611 | ||
537fba28 DP |
1612 | debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) " |
1613 | "mask(0x%lx)\n", mci->mc_idx, __func__, | |
1614 | csrow->first_page, page, csrow->last_page, | |
1615 | csrow->page_mask); | |
da9bb1d2 AC |
1616 | |
1617 | if ((page >= csrow->first_page) && | |
1618 | (page <= csrow->last_page) && | |
1619 | ((page & csrow->page_mask) == | |
1620 | (csrow->first_page & csrow->page_mask))) { | |
1621 | row = i; | |
1622 | break; | |
1623 | } | |
1624 | } | |
1625 | ||
1626 | if (row == -1) | |
537fba28 DP |
1627 | edac_mc_printk(mci, KERN_ERR, |
1628 | "could not look up page error address %lx\n", | |
1629 | (unsigned long) page); | |
da9bb1d2 AC |
1630 | |
1631 | return row; | |
1632 | } | |
1633 | ||
1634 | ||
1635 | EXPORT_SYMBOL(edac_mc_handle_ce); | |
1636 | ||
1637 | /* FIXME - setable log (warning/emerg) levels */ | |
1638 | /* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */ | |
1639 | void edac_mc_handle_ce(struct mem_ctl_info *mci, | |
1640 | unsigned long page_frame_number, | |
1641 | unsigned long offset_in_page, | |
1642 | unsigned long syndrome, int row, int channel, | |
1643 | const char *msg) | |
1644 | { | |
1645 | unsigned long remapped_page; | |
1646 | ||
537fba28 | 1647 | debugf3("MC%d: %s()\n", mci->mc_idx, __func__); |
da9bb1d2 AC |
1648 | |
1649 | /* FIXME - maybe make panic on INTERNAL ERROR an option */ | |
1650 | if (row >= mci->nr_csrows || row < 0) { | |
1651 | /* something is wrong */ | |
537fba28 DP |
1652 | edac_mc_printk(mci, KERN_ERR, |
1653 | "INTERNAL ERROR: row out of range " | |
1654 | "(%d >= %d)\n", row, mci->nr_csrows); | |
da9bb1d2 AC |
1655 | edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR"); |
1656 | return; | |
1657 | } | |
1658 | if (channel >= mci->csrows[row].nr_channels || channel < 0) { | |
1659 | /* something is wrong */ | |
537fba28 DP |
1660 | edac_mc_printk(mci, KERN_ERR, |
1661 | "INTERNAL ERROR: channel out of range " | |
1662 | "(%d >= %d)\n", channel, | |
1663 | mci->csrows[row].nr_channels); | |
da9bb1d2 AC |
1664 | edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR"); |
1665 | return; | |
1666 | } | |
1667 | ||
1668 | if (log_ce) | |
1669 | /* FIXME - put in DIMM location */ | |
537fba28 DP |
1670 | edac_mc_printk(mci, KERN_WARNING, |
1671 | "CE page 0x%lx, offset 0x%lx, grain %d, syndrome " | |
1672 | "0x%lx, row %d, channel %d, label \"%s\": %s\n", | |
1673 | page_frame_number, offset_in_page, | |
1674 | mci->csrows[row].grain, syndrome, row, channel, | |
1675 | mci->csrows[row].channels[channel].label, msg); | |
da9bb1d2 AC |
1676 | |
1677 | mci->ce_count++; | |
1678 | mci->csrows[row].ce_count++; | |
1679 | mci->csrows[row].channels[channel].ce_count++; | |
1680 | ||
1681 | if (mci->scrub_mode & SCRUB_SW_SRC) { | |
1682 | /* | |
1683 | * Some MC's can remap memory so that it is still available | |
1684 | * at a different address when PCI devices map into memory. | |
1685 | * MC's that can't do this lose the memory where PCI devices | |
1686 | * are mapped. This mapping is MC dependant and so we call | |
1687 | * back into the MC driver for it to map the MC page to | |
1688 | * a physical (CPU) page which can then be mapped to a virtual | |
1689 | * page - which can then be scrubbed. | |
1690 | */ | |
1691 | remapped_page = mci->ctl_page_to_phys ? | |
1692 | mci->ctl_page_to_phys(mci, page_frame_number) : | |
1693 | page_frame_number; | |
1694 | ||
1695 | edac_mc_scrub_block(remapped_page, offset_in_page, | |
1696 | mci->csrows[row].grain); | |
1697 | } | |
1698 | } | |
1699 | ||
1700 | ||
1701 | EXPORT_SYMBOL(edac_mc_handle_ce_no_info); | |
1702 | ||
1703 | void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, | |
1704 | const char *msg) | |
1705 | { | |
1706 | if (log_ce) | |
537fba28 DP |
1707 | edac_mc_printk(mci, KERN_WARNING, |
1708 | "CE - no information available: %s\n", msg); | |
da9bb1d2 AC |
1709 | mci->ce_noinfo_count++; |
1710 | mci->ce_count++; | |
1711 | } | |
1712 | ||
1713 | ||
1714 | EXPORT_SYMBOL(edac_mc_handle_ue); | |
1715 | ||
1716 | void edac_mc_handle_ue(struct mem_ctl_info *mci, | |
1717 | unsigned long page_frame_number, | |
1718 | unsigned long offset_in_page, int row, | |
1719 | const char *msg) | |
1720 | { | |
1721 | int len = EDAC_MC_LABEL_LEN * 4; | |
1722 | char labels[len + 1]; | |
1723 | char *pos = labels; | |
1724 | int chan; | |
1725 | int chars; | |
1726 | ||
537fba28 | 1727 | debugf3("MC%d: %s()\n", mci->mc_idx, __func__); |
da9bb1d2 AC |
1728 | |
1729 | /* FIXME - maybe make panic on INTERNAL ERROR an option */ | |
1730 | if (row >= mci->nr_csrows || row < 0) { | |
1731 | /* something is wrong */ | |
537fba28 DP |
1732 | edac_mc_printk(mci, KERN_ERR, |
1733 | "INTERNAL ERROR: row out of range " | |
1734 | "(%d >= %d)\n", row, mci->nr_csrows); | |
da9bb1d2 AC |
1735 | edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR"); |
1736 | return; | |
1737 | } | |
1738 | ||
1739 | chars = snprintf(pos, len + 1, "%s", | |
1740 | mci->csrows[row].channels[0].label); | |
1741 | len -= chars; | |
1742 | pos += chars; | |
1743 | for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0); | |
1744 | chan++) { | |
1745 | chars = snprintf(pos, len + 1, ":%s", | |
1746 | mci->csrows[row].channels[chan].label); | |
1747 | len -= chars; | |
1748 | pos += chars; | |
1749 | } | |
1750 | ||
1751 | if (log_ue) | |
537fba28 DP |
1752 | edac_mc_printk(mci, KERN_EMERG, |
1753 | "UE page 0x%lx, offset 0x%lx, grain %d, row %d, " | |
1754 | "labels \"%s\": %s\n", page_frame_number, | |
1755 | offset_in_page, mci->csrows[row].grain, row, labels, | |
1756 | msg); | |
da9bb1d2 AC |
1757 | |
1758 | if (panic_on_ue) | |
1759 | panic | |
1760 | ("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, row %d," | |
1761 | " labels \"%s\": %s\n", mci->mc_idx, | |
1762 | page_frame_number, offset_in_page, | |
1763 | mci->csrows[row].grain, row, labels, msg); | |
1764 | ||
1765 | mci->ue_count++; | |
1766 | mci->csrows[row].ue_count++; | |
1767 | } | |
1768 | ||
1769 | ||
1770 | EXPORT_SYMBOL(edac_mc_handle_ue_no_info); | |
1771 | ||
1772 | void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, | |
1773 | const char *msg) | |
1774 | { | |
1775 | if (panic_on_ue) | |
1776 | panic("EDAC MC%d: Uncorrected Error", mci->mc_idx); | |
1777 | ||
1778 | if (log_ue) | |
537fba28 DP |
1779 | edac_mc_printk(mci, KERN_WARNING, |
1780 | "UE - no information available: %s\n", msg); | |
da9bb1d2 AC |
1781 | mci->ue_noinfo_count++; |
1782 | mci->ue_count++; | |
1783 | } | |
1784 | ||
1785 | ||
1786 | #ifdef CONFIG_PCI | |
1787 | ||
1788 | static u16 get_pci_parity_status(struct pci_dev *dev, int secondary) | |
1789 | { | |
1790 | int where; | |
1791 | u16 status; | |
1792 | ||
1793 | where = secondary ? PCI_SEC_STATUS : PCI_STATUS; | |
1794 | pci_read_config_word(dev, where, &status); | |
1795 | ||
1796 | /* If we get back 0xFFFF then we must suspect that the card has been pulled but | |
1797 | the Linux PCI layer has not yet finished cleaning up. We don't want to report | |
1798 | on such devices */ | |
1799 | ||
1800 | if (status == 0xFFFF) { | |
1801 | u32 sanity; | |
1802 | pci_read_config_dword(dev, 0, &sanity); | |
1803 | if (sanity == 0xFFFFFFFF) | |
1804 | return 0; | |
1805 | } | |
1806 | status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR | | |
1807 | PCI_STATUS_PARITY; | |
1808 | ||
1809 | if (status) | |
1810 | /* reset only the bits we are interested in */ | |
1811 | pci_write_config_word(dev, where, status); | |
1812 | ||
1813 | return status; | |
1814 | } | |
1815 | ||
1816 | typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev); | |
1817 | ||
1818 | /* Clear any PCI parity errors logged by this device. */ | |
1819 | static void edac_pci_dev_parity_clear( struct pci_dev *dev ) | |
1820 | { | |
1821 | u8 header_type; | |
1822 | ||
1823 | get_pci_parity_status(dev, 0); | |
1824 | ||
1825 | /* read the device TYPE, looking for bridges */ | |
1826 | pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type); | |
1827 | ||
1828 | if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) | |
1829 | get_pci_parity_status(dev, 1); | |
1830 | } | |
1831 | ||
1832 | /* | |
1833 | * PCI Parity polling | |
1834 | * | |
1835 | */ | |
1836 | static void edac_pci_dev_parity_test(struct pci_dev *dev) | |
1837 | { | |
1838 | u16 status; | |
1839 | u8 header_type; | |
1840 | ||
1841 | /* read the STATUS register on this device | |
1842 | */ | |
1843 | status = get_pci_parity_status(dev, 0); | |
1844 | ||
1845 | debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id ); | |
1846 | ||
1847 | /* check the status reg for errors */ | |
1848 | if (status) { | |
1849 | if (status & (PCI_STATUS_SIG_SYSTEM_ERROR)) | |
537fba28 | 1850 | edac_printk(KERN_CRIT, EDAC_PCI, |
da9bb1d2 | 1851 | "Signaled System Error on %s\n", |
537fba28 | 1852 | pci_name(dev)); |
da9bb1d2 AC |
1853 | |
1854 | if (status & (PCI_STATUS_PARITY)) { | |
537fba28 | 1855 | edac_printk(KERN_CRIT, EDAC_PCI, |
da9bb1d2 | 1856 | "Master Data Parity Error on %s\n", |
537fba28 | 1857 | pci_name(dev)); |
da9bb1d2 AC |
1858 | |
1859 | atomic_inc(&pci_parity_count); | |
1860 | } | |
1861 | ||
1862 | if (status & (PCI_STATUS_DETECTED_PARITY)) { | |
537fba28 | 1863 | edac_printk(KERN_CRIT, EDAC_PCI, |
da9bb1d2 | 1864 | "Detected Parity Error on %s\n", |
537fba28 | 1865 | pci_name(dev)); |
da9bb1d2 AC |
1866 | |
1867 | atomic_inc(&pci_parity_count); | |
1868 | } | |
1869 | } | |
1870 | ||
1871 | /* read the device TYPE, looking for bridges */ | |
1872 | pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type); | |
1873 | ||
1874 | debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id ); | |
1875 | ||
1876 | if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { | |
1877 | /* On bridges, need to examine secondary status register */ | |
1878 | status = get_pci_parity_status(dev, 1); | |
1879 | ||
1880 | debugf2("PCI SEC_STATUS= 0x%04x %s\n", | |
1881 | status, dev->dev.bus_id ); | |
1882 | ||
1883 | /* check the secondary status reg for errors */ | |
1884 | if (status) { | |
1885 | if (status & (PCI_STATUS_SIG_SYSTEM_ERROR)) | |
537fba28 | 1886 | edac_printk(KERN_CRIT, EDAC_PCI, "Bridge " |
da9bb1d2 | 1887 | "Signaled System Error on %s\n", |
537fba28 | 1888 | pci_name(dev)); |
da9bb1d2 AC |
1889 | |
1890 | if (status & (PCI_STATUS_PARITY)) { | |
537fba28 DP |
1891 | edac_printk(KERN_CRIT, EDAC_PCI, "Bridge " |
1892 | "Master Data Parity Error on " | |
1893 | "%s\n", pci_name(dev)); | |
da9bb1d2 AC |
1894 | |
1895 | atomic_inc(&pci_parity_count); | |
1896 | } | |
1897 | ||
1898 | if (status & (PCI_STATUS_DETECTED_PARITY)) { | |
537fba28 | 1899 | edac_printk(KERN_CRIT, EDAC_PCI, "Bridge " |
da9bb1d2 | 1900 | "Detected Parity Error on %s\n", |
537fba28 | 1901 | pci_name(dev)); |
da9bb1d2 AC |
1902 | |
1903 | atomic_inc(&pci_parity_count); | |
1904 | } | |
1905 | } | |
1906 | } | |
1907 | } | |
1908 | ||
1909 | /* | |
1910 | * check_dev_on_list: Scan for a PCI device on a white/black list | |
1911 | * @list: an EDAC &edac_pci_device_list white/black list pointer | |
1912 | * @free_index: index of next free entry on the list | |
1913 | * @pci_dev: PCI Device pointer | |
1914 | * | |
1915 | * see if list contains the device. | |
1916 | * | |
1917 | * Returns: 0 not found | |
1918 | * 1 found on list | |
1919 | */ | |
1920 | static int check_dev_on_list(struct edac_pci_device_list *list, int free_index, | |
1921 | struct pci_dev *dev) | |
1922 | { | |
1923 | int i; | |
1924 | int rc = 0; /* Assume not found */ | |
1925 | unsigned short vendor=dev->vendor; | |
1926 | unsigned short device=dev->device; | |
1927 | ||
1928 | /* Scan the list, looking for a vendor/device match | |
1929 | */ | |
1930 | for (i = 0; i < free_index; i++, list++ ) { | |
1931 | if ( (list->vendor == vendor ) && | |
1932 | (list->device == device )) { | |
1933 | rc = 1; | |
1934 | break; | |
1935 | } | |
1936 | } | |
1937 | ||
1938 | return rc; | |
1939 | } | |
1940 | ||
1941 | /* | |
1942 | * pci_dev parity list iterator | |
1943 | * Scan the PCI device list for one iteration, looking for SERRORs | |
1944 | * Master Parity ERRORS or Parity ERRORs on primary or secondary devices | |
1945 | */ | |
1946 | static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn) | |
1947 | { | |
1948 | struct pci_dev *dev=NULL; | |
1949 | ||
1950 | /* request for kernel access to the next PCI device, if any, | |
1951 | * and while we are looking at it have its reference count | |
1952 | * bumped until we are done with it | |
1953 | */ | |
1954 | while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { | |
1955 | ||
1956 | /* if whitelist exists then it has priority, so only scan those | |
1957 | * devices on the whitelist | |
1958 | */ | |
1959 | if (pci_whitelist_count > 0 ) { | |
1960 | if (check_dev_on_list(pci_whitelist, | |
1961 | pci_whitelist_count, dev)) | |
1962 | fn(dev); | |
1963 | } else { | |
1964 | /* | |
1965 | * if no whitelist, then check if this devices is | |
1966 | * blacklisted | |
1967 | */ | |
1968 | if (!check_dev_on_list(pci_blacklist, | |
1969 | pci_blacklist_count, dev)) | |
1970 | fn(dev); | |
1971 | } | |
1972 | } | |
1973 | } | |
1974 | ||
1975 | static void do_pci_parity_check(void) | |
1976 | { | |
1977 | unsigned long flags; | |
1978 | int before_count; | |
1979 | ||
537fba28 | 1980 | debugf3("%s()\n", __func__); |
da9bb1d2 AC |
1981 | |
1982 | if (!check_pci_parity) | |
1983 | return; | |
1984 | ||
1985 | before_count = atomic_read(&pci_parity_count); | |
1986 | ||
1987 | /* scan all PCI devices looking for a Parity Error on devices and | |
1988 | * bridges | |
1989 | */ | |
1990 | local_irq_save(flags); | |
1991 | edac_pci_dev_parity_iterator(edac_pci_dev_parity_test); | |
1992 | local_irq_restore(flags); | |
1993 | ||
1994 | /* Only if operator has selected panic on PCI Error */ | |
1995 | if (panic_on_pci_parity) { | |
1996 | /* If the count is different 'after' from 'before' */ | |
1997 | if (before_count != atomic_read(&pci_parity_count)) | |
1998 | panic("EDAC: PCI Parity Error"); | |
1999 | } | |
2000 | } | |
2001 | ||
2002 | ||
2003 | static inline void clear_pci_parity_errors(void) | |
2004 | { | |
2005 | /* Clear any PCI bus parity errors that devices initially have logged | |
2006 | * in their registers. | |
2007 | */ | |
2008 | edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear); | |
2009 | } | |
2010 | ||
2011 | ||
2012 | #else /* CONFIG_PCI */ | |
2013 | ||
2014 | ||
2015 | static inline void do_pci_parity_check(void) | |
2016 | { | |
2017 | /* no-op */ | |
2018 | } | |
2019 | ||
2020 | ||
2021 | static inline void clear_pci_parity_errors(void) | |
2022 | { | |
2023 | /* no-op */ | |
2024 | } | |
2025 | ||
2026 | ||
2027 | #endif /* CONFIG_PCI */ | |
2028 | ||
2029 | /* | |
2030 | * Iterate over all MC instances and check for ECC, et al, errors | |
2031 | */ | |
2032 | static inline void check_mc_devices (void) | |
2033 | { | |
2034 | unsigned long flags; | |
2035 | struct list_head *item; | |
2036 | struct mem_ctl_info *mci; | |
2037 | ||
537fba28 | 2038 | debugf3("%s()\n", __func__); |
da9bb1d2 AC |
2039 | |
2040 | /* during poll, have interrupts off */ | |
2041 | local_irq_save(flags); | |
2042 | ||
2043 | list_for_each(item, &mc_devices) { | |
2044 | mci = list_entry(item, struct mem_ctl_info, link); | |
2045 | ||
2046 | if (mci->edac_check != NULL) | |
2047 | mci->edac_check(mci); | |
2048 | } | |
2049 | ||
2050 | local_irq_restore(flags); | |
2051 | } | |
2052 | ||
2053 | ||
2054 | /* | |
2055 | * Check MC status every poll_msec. | |
2056 | * Check PCI status every poll_msec as well. | |
2057 | * | |
2058 | * This where the work gets done for edac. | |
2059 | * | |
2060 | * SMP safe, doesn't use NMI, and auto-rate-limits. | |
2061 | */ | |
2062 | static void do_edac_check(void) | |
2063 | { | |
537fba28 | 2064 | debugf3("%s()\n", __func__); |
da9bb1d2 | 2065 | check_mc_devices(); |
da9bb1d2 AC |
2066 | do_pci_parity_check(); |
2067 | } | |
2068 | ||
da9bb1d2 AC |
2069 | static int edac_kernel_thread(void *arg) |
2070 | { | |
f2fe42ab DP |
2071 | while (!kthread_should_stop()) { |
2072 | do_edac_check(); | |
da9bb1d2 AC |
2073 | |
2074 | /* goto sleep for the interval */ | |
f2fe42ab | 2075 | schedule_timeout_interruptible((HZ * poll_msec) / 1000); |
da9bb1d2 AC |
2076 | try_to_freeze(); |
2077 | } | |
2078 | ||
da9bb1d2 AC |
2079 | return 0; |
2080 | } | |
2081 | ||
2082 | /* | |
2083 | * edac_mc_init | |
2084 | * module initialization entry point | |
2085 | */ | |
2086 | static int __init edac_mc_init(void) | |
2087 | { | |
537fba28 | 2088 | edac_printk(KERN_INFO, EDAC_MC, EDAC_MC_VERSION "\n"); |
da9bb1d2 AC |
2089 | |
2090 | /* | |
2091 | * Harvest and clear any boot/initialization PCI parity errors | |
2092 | * | |
2093 | * FIXME: This only clears errors logged by devices present at time of | |
2094 | * module initialization. We should also do an initial clear | |
2095 | * of each newly hotplugged device. | |
2096 | */ | |
2097 | clear_pci_parity_errors(); | |
2098 | ||
da9bb1d2 AC |
2099 | /* Create the MC sysfs entires */ |
2100 | if (edac_sysfs_memctrl_setup()) { | |
537fba28 DP |
2101 | edac_printk(KERN_ERR, EDAC_MC, |
2102 | "Error initializing sysfs code\n"); | |
da9bb1d2 AC |
2103 | return -ENODEV; |
2104 | } | |
2105 | ||
2106 | /* Create the PCI parity sysfs entries */ | |
2107 | if (edac_sysfs_pci_setup()) { | |
2108 | edac_sysfs_memctrl_teardown(); | |
537fba28 DP |
2109 | edac_printk(KERN_ERR, EDAC_MC, |
2110 | "EDAC PCI: Error initializing sysfs code\n"); | |
da9bb1d2 AC |
2111 | return -ENODEV; |
2112 | } | |
2113 | ||
da9bb1d2 | 2114 | /* create our kernel thread */ |
f2fe42ab DP |
2115 | edac_thread = kthread_run(edac_kernel_thread, NULL, "kedac"); |
2116 | if (IS_ERR(edac_thread)) { | |
da9bb1d2 AC |
2117 | /* remove the sysfs entries */ |
2118 | edac_sysfs_memctrl_teardown(); | |
2119 | edac_sysfs_pci_teardown(); | |
f2fe42ab | 2120 | return PTR_ERR(edac_thread); |
da9bb1d2 AC |
2121 | } |
2122 | ||
da9bb1d2 AC |
2123 | return 0; |
2124 | } | |
2125 | ||
2126 | ||
2127 | /* | |
2128 | * edac_mc_exit() | |
2129 | * module exit/termination functioni | |
2130 | */ | |
2131 | static void __exit edac_mc_exit(void) | |
2132 | { | |
537fba28 | 2133 | debugf0("%s()\n", __func__); |
da9bb1d2 | 2134 | |
f2fe42ab | 2135 | kthread_stop(edac_thread); |
da9bb1d2 AC |
2136 | |
2137 | /* tear down the sysfs device */ | |
2138 | edac_sysfs_memctrl_teardown(); | |
2139 | edac_sysfs_pci_teardown(); | |
2140 | } | |
2141 | ||
2142 | ||
2143 | ||
2144 | ||
2145 | module_init(edac_mc_init); | |
2146 | module_exit(edac_mc_exit); | |
2147 | ||
2148 | MODULE_LICENSE("GPL"); | |
2149 | MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n" | |
2150 | "Based on.work by Dan Hollis et al"); | |
2151 | MODULE_DESCRIPTION("Core library routines for MC reporting"); | |
2152 | ||
2153 | module_param(panic_on_ue, int, 0644); | |
2154 | MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on"); | |
2155 | module_param(check_pci_parity, int, 0644); | |
2156 | MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on"); | |
2157 | module_param(panic_on_pci_parity, int, 0644); | |
2158 | MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on"); | |
2159 | module_param(log_ue, int, 0644); | |
2160 | MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on"); | |
2161 | module_param(log_ce, int, 0644); | |
2162 | MODULE_PARM_DESC(log_ce, "Log correctable error to console: 0=off 1=on"); | |
2163 | module_param(poll_msec, int, 0644); | |
2164 | MODULE_PARM_DESC(poll_msec, "Polling period in milliseconds"); | |
2165 | #ifdef CONFIG_EDAC_DEBUG | |
2166 | module_param(edac_debug_level, int, 0644); | |
2167 | MODULE_PARM_DESC(edac_debug_level, "Debug level"); | |
2168 | #endif |