edac: Don't add __func__ or __FILE__ for debugf[0-9] msgs
[deliverable/linux.git] / drivers / edac / edac_mc_sysfs.c
CommitLineData
7c9281d7
DT
1/*
2 * edac_mc kernel module
42a8e397
DT
3 * (C) 2005-2007 Linux Networx (http://lnxi.com)
4 *
7c9281d7
DT
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
7 *
42a8e397 8 * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
7c9281d7 9 *
7a623c03
MCC
10 * (c) 2012 - Mauro Carvalho Chehab <mchehab@redhat.com>
11 * The entire API were re-written, and ported to use struct device
12 *
7c9281d7
DT
13 */
14
7c9281d7 15#include <linux/ctype.h>
5a0e3ad6 16#include <linux/slab.h>
30e1f7a8 17#include <linux/edac.h>
8096cfaf 18#include <linux/bug.h>
7a623c03 19#include <linux/pm_runtime.h>
452a6bf9 20#include <linux/uaccess.h>
7c9281d7 21
20bcb7a8 22#include "edac_core.h"
7c9281d7
DT
23#include "edac_module.h"
24
25/* MC EDAC Controls, setable by module parameter, and sysfs */
4de78c68
DJ
26static int edac_mc_log_ue = 1;
27static int edac_mc_log_ce = 1;
f044091c 28static int edac_mc_panic_on_ue;
4de78c68 29static int edac_mc_poll_msec = 1000;
7c9281d7
DT
30
31/* Getter functions for above */
4de78c68 32int edac_mc_get_log_ue(void)
7c9281d7 33{
4de78c68 34 return edac_mc_log_ue;
7c9281d7
DT
35}
36
4de78c68 37int edac_mc_get_log_ce(void)
7c9281d7 38{
4de78c68 39 return edac_mc_log_ce;
7c9281d7
DT
40}
41
4de78c68 42int edac_mc_get_panic_on_ue(void)
7c9281d7 43{
4de78c68 44 return edac_mc_panic_on_ue;
7c9281d7
DT
45}
46
81d87cb1
DJ
47/* this is temporary */
48int edac_mc_get_poll_msec(void)
49{
4de78c68 50 return edac_mc_poll_msec;
7c9281d7
DT
51}
52
096846e2
AJ
53static int edac_set_poll_msec(const char *val, struct kernel_param *kp)
54{
55 long l;
56 int ret;
57
58 if (!val)
59 return -EINVAL;
60
61 ret = strict_strtol(val, 0, &l);
62 if (ret == -EINVAL || ((int)l != l))
63 return -EINVAL;
64 *((int *)kp->arg) = l;
65
66 /* notify edac_mc engine to reset the poll period */
67 edac_mc_reset_delay_period(l);
68
69 return 0;
70}
71
7c9281d7 72/* Parameter declarations for above */
4de78c68
DJ
73module_param(edac_mc_panic_on_ue, int, 0644);
74MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
75module_param(edac_mc_log_ue, int, 0644);
76MODULE_PARM_DESC(edac_mc_log_ue,
079708b9 77 "Log uncorrectable error to console: 0=off 1=on");
4de78c68
DJ
78module_param(edac_mc_log_ce, int, 0644);
79MODULE_PARM_DESC(edac_mc_log_ce,
079708b9 80 "Log correctable error to console: 0=off 1=on");
096846e2
AJ
81module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int,
82 &edac_mc_poll_msec, 0644);
4de78c68 83MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
7c9281d7 84
de3910eb 85static struct device *mci_pdev;
7a623c03 86
7c9281d7
DT
87/*
88 * various constants for Memory Controllers
89 */
90static const char *mem_types[] = {
91 [MEM_EMPTY] = "Empty",
92 [MEM_RESERVED] = "Reserved",
93 [MEM_UNKNOWN] = "Unknown",
94 [MEM_FPM] = "FPM",
95 [MEM_EDO] = "EDO",
96 [MEM_BEDO] = "BEDO",
97 [MEM_SDR] = "Unbuffered-SDR",
98 [MEM_RDR] = "Registered-SDR",
99 [MEM_DDR] = "Unbuffered-DDR",
100 [MEM_RDDR] = "Registered-DDR",
1a9b85e6
DJ
101 [MEM_RMBS] = "RMBS",
102 [MEM_DDR2] = "Unbuffered-DDR2",
103 [MEM_FB_DDR2] = "FullyBuffered-DDR2",
1d5f726c 104 [MEM_RDDR2] = "Registered-DDR2",
b1cfebc9
YS
105 [MEM_XDR] = "XDR",
106 [MEM_DDR3] = "Unbuffered-DDR3",
107 [MEM_RDDR3] = "Registered-DDR3"
7c9281d7
DT
108};
109
110static const char *dev_types[] = {
111 [DEV_UNKNOWN] = "Unknown",
112 [DEV_X1] = "x1",
113 [DEV_X2] = "x2",
114 [DEV_X4] = "x4",
115 [DEV_X8] = "x8",
116 [DEV_X16] = "x16",
117 [DEV_X32] = "x32",
118 [DEV_X64] = "x64"
119};
120
121static const char *edac_caps[] = {
122 [EDAC_UNKNOWN] = "Unknown",
123 [EDAC_NONE] = "None",
124 [EDAC_RESERVED] = "Reserved",
125 [EDAC_PARITY] = "PARITY",
126 [EDAC_EC] = "EC",
127 [EDAC_SECDED] = "SECDED",
128 [EDAC_S2ECD2ED] = "S2ECD2ED",
129 [EDAC_S4ECD4ED] = "S4ECD4ED",
130 [EDAC_S8ECD8ED] = "S8ECD8ED",
131 [EDAC_S16ECD16ED] = "S16ECD16ED"
132};
133
19974710 134#ifdef CONFIG_EDAC_LEGACY_SYSFS
7a623c03
MCC
135/*
136 * EDAC sysfs CSROW data structures and methods
137 */
138
139#define to_csrow(k) container_of(k, struct csrow_info, dev)
140
141/*
142 * We need it to avoid namespace conflicts between the legacy API
143 * and the per-dimm/per-rank one
7c9281d7 144 */
7a623c03
MCC
145#define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
146 struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
147
148struct dev_ch_attribute {
149 struct device_attribute attr;
150 int channel;
151};
152
153#define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
154 struct dev_ch_attribute dev_attr_legacy_##_name = \
155 { __ATTR(_name, _mode, _show, _store), (_var) }
156
157#define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
7c9281d7
DT
158
159/* Set of more default csrow<id> attribute show/store functions */
7a623c03
MCC
160static ssize_t csrow_ue_count_show(struct device *dev,
161 struct device_attribute *mattr, char *data)
7c9281d7 162{
7a623c03
MCC
163 struct csrow_info *csrow = to_csrow(dev);
164
079708b9 165 return sprintf(data, "%u\n", csrow->ue_count);
7c9281d7
DT
166}
167
7a623c03
MCC
168static ssize_t csrow_ce_count_show(struct device *dev,
169 struct device_attribute *mattr, char *data)
7c9281d7 170{
7a623c03
MCC
171 struct csrow_info *csrow = to_csrow(dev);
172
079708b9 173 return sprintf(data, "%u\n", csrow->ce_count);
7c9281d7
DT
174}
175
7a623c03
MCC
176static ssize_t csrow_size_show(struct device *dev,
177 struct device_attribute *mattr, char *data)
7c9281d7 178{
7a623c03 179 struct csrow_info *csrow = to_csrow(dev);
a895bf8b
MCC
180 int i;
181 u32 nr_pages = 0;
182
183 for (i = 0; i < csrow->nr_channels; i++)
de3910eb 184 nr_pages += csrow->channels[i]->dimm->nr_pages;
a895bf8b 185 return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
7c9281d7
DT
186}
187
7a623c03
MCC
188static ssize_t csrow_mem_type_show(struct device *dev,
189 struct device_attribute *mattr, char *data)
7c9281d7 190{
7a623c03
MCC
191 struct csrow_info *csrow = to_csrow(dev);
192
de3910eb 193 return sprintf(data, "%s\n", mem_types[csrow->channels[0]->dimm->mtype]);
7c9281d7
DT
194}
195
7a623c03
MCC
196static ssize_t csrow_dev_type_show(struct device *dev,
197 struct device_attribute *mattr, char *data)
7c9281d7 198{
7a623c03
MCC
199 struct csrow_info *csrow = to_csrow(dev);
200
de3910eb 201 return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]);
7c9281d7
DT
202}
203
7a623c03
MCC
204static ssize_t csrow_edac_mode_show(struct device *dev,
205 struct device_attribute *mattr,
206 char *data)
7c9281d7 207{
7a623c03
MCC
208 struct csrow_info *csrow = to_csrow(dev);
209
de3910eb 210 return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]);
7c9281d7
DT
211}
212
213/* show/store functions for DIMM Label attributes */
7a623c03
MCC
214static ssize_t channel_dimm_label_show(struct device *dev,
215 struct device_attribute *mattr,
216 char *data)
7c9281d7 217{
7a623c03
MCC
218 struct csrow_info *csrow = to_csrow(dev);
219 unsigned chan = to_channel(mattr);
de3910eb 220 struct rank_info *rank = csrow->channels[chan];
7a623c03 221
124682c7 222 /* if field has not been initialized, there is nothing to send */
7a623c03 223 if (!rank->dimm->label[0])
124682c7
AJ
224 return 0;
225
226 return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
7a623c03 227 rank->dimm->label);
7c9281d7
DT
228}
229
7a623c03
MCC
230static ssize_t channel_dimm_label_store(struct device *dev,
231 struct device_attribute *mattr,
232 const char *data, size_t count)
7c9281d7 233{
7a623c03
MCC
234 struct csrow_info *csrow = to_csrow(dev);
235 unsigned chan = to_channel(mattr);
de3910eb 236 struct rank_info *rank = csrow->channels[chan];
7a623c03 237
7c9281d7
DT
238 ssize_t max_size = 0;
239
079708b9 240 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
7a623c03
MCC
241 strncpy(rank->dimm->label, data, max_size);
242 rank->dimm->label[max_size] = '\0';
7c9281d7
DT
243
244 return max_size;
245}
246
247/* show function for dynamic chX_ce_count attribute */
7a623c03
MCC
248static ssize_t channel_ce_count_show(struct device *dev,
249 struct device_attribute *mattr, char *data)
7c9281d7 250{
7a623c03
MCC
251 struct csrow_info *csrow = to_csrow(dev);
252 unsigned chan = to_channel(mattr);
de3910eb 253 struct rank_info *rank = csrow->channels[chan];
7a623c03
MCC
254
255 return sprintf(data, "%u\n", rank->ce_count);
7c9281d7
DT
256}
257
7a623c03
MCC
258/* cwrow<id>/attribute files */
259DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
260DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
261DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
262DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
263DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
264DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
7c9281d7 265
7a623c03
MCC
266/* default attributes of the CSROW<id> object */
267static struct attribute *csrow_attrs[] = {
268 &dev_attr_legacy_dev_type.attr,
269 &dev_attr_legacy_mem_type.attr,
270 &dev_attr_legacy_edac_mode.attr,
271 &dev_attr_legacy_size_mb.attr,
272 &dev_attr_legacy_ue_count.attr,
273 &dev_attr_legacy_ce_count.attr,
274 NULL,
275};
7c9281d7 276
7a623c03
MCC
277static struct attribute_group csrow_attr_grp = {
278 .attrs = csrow_attrs,
279};
7c9281d7 280
7a623c03
MCC
281static const struct attribute_group *csrow_attr_groups[] = {
282 &csrow_attr_grp,
283 NULL
284};
7c9281d7 285
de3910eb 286static void csrow_attr_release(struct device *dev)
7c9281d7 287{
de3910eb
MCC
288 struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
289
290 debugf1("Releasing csrow device %s\n", dev_name(dev));
291 kfree(csrow);
7c9281d7
DT
292}
293
7a623c03
MCC
294static struct device_type csrow_attr_type = {
295 .groups = csrow_attr_groups,
296 .release = csrow_attr_release,
7c9281d7
DT
297};
298
7a623c03
MCC
299/*
300 * possible dynamic channel DIMM Label attribute files
301 *
302 */
7c9281d7 303
7a623c03 304#define EDAC_NR_CHANNELS 6
7c9281d7 305
7a623c03 306DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
052dfb45 307 channel_dimm_label_show, channel_dimm_label_store, 0);
7a623c03 308DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
052dfb45 309 channel_dimm_label_show, channel_dimm_label_store, 1);
7a623c03 310DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
052dfb45 311 channel_dimm_label_show, channel_dimm_label_store, 2);
7a623c03 312DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
052dfb45 313 channel_dimm_label_show, channel_dimm_label_store, 3);
7a623c03 314DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
052dfb45 315 channel_dimm_label_show, channel_dimm_label_store, 4);
7a623c03 316DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
052dfb45 317 channel_dimm_label_show, channel_dimm_label_store, 5);
7c9281d7
DT
318
319/* Total possible dynamic DIMM Label attribute file table */
7a623c03
MCC
320static struct device_attribute *dynamic_csrow_dimm_attr[] = {
321 &dev_attr_legacy_ch0_dimm_label.attr,
322 &dev_attr_legacy_ch1_dimm_label.attr,
323 &dev_attr_legacy_ch2_dimm_label.attr,
324 &dev_attr_legacy_ch3_dimm_label.attr,
325 &dev_attr_legacy_ch4_dimm_label.attr,
326 &dev_attr_legacy_ch5_dimm_label.attr
7c9281d7
DT
327};
328
329/* possible dynamic channel ce_count attribute files */
7a623c03
MCC
330DEVICE_CHANNEL(ch0_ce_count, S_IRUGO | S_IWUSR,
331 channel_ce_count_show, NULL, 0);
332DEVICE_CHANNEL(ch1_ce_count, S_IRUGO | S_IWUSR,
333 channel_ce_count_show, NULL, 1);
334DEVICE_CHANNEL(ch2_ce_count, S_IRUGO | S_IWUSR,
335 channel_ce_count_show, NULL, 2);
336DEVICE_CHANNEL(ch3_ce_count, S_IRUGO | S_IWUSR,
337 channel_ce_count_show, NULL, 3);
338DEVICE_CHANNEL(ch4_ce_count, S_IRUGO | S_IWUSR,
339 channel_ce_count_show, NULL, 4);
340DEVICE_CHANNEL(ch5_ce_count, S_IRUGO | S_IWUSR,
341 channel_ce_count_show, NULL, 5);
7c9281d7
DT
342
343/* Total possible dynamic ce_count attribute file table */
7a623c03
MCC
344static struct device_attribute *dynamic_csrow_ce_count_attr[] = {
345 &dev_attr_legacy_ch0_ce_count.attr,
346 &dev_attr_legacy_ch1_ce_count.attr,
347 &dev_attr_legacy_ch2_ce_count.attr,
348 &dev_attr_legacy_ch3_ce_count.attr,
349 &dev_attr_legacy_ch4_ce_count.attr,
350 &dev_attr_legacy_ch5_ce_count.attr
7c9281d7
DT
351};
352
e39f4ea9
MCC
353static inline int nr_pages_per_csrow(struct csrow_info *csrow)
354{
355 int chan, nr_pages = 0;
356
357 for (chan = 0; chan < csrow->nr_channels; chan++)
de3910eb 358 nr_pages += csrow->channels[chan]->dimm->nr_pages;
e39f4ea9
MCC
359
360 return nr_pages;
361}
362
7a623c03
MCC
363/* Create a CSROW object under specifed edac_mc_device */
364static int edac_create_csrow_object(struct mem_ctl_info *mci,
365 struct csrow_info *csrow, int index)
7c9281d7 366{
7a623c03 367 int err, chan;
7c9281d7 368
7a623c03
MCC
369 if (csrow->nr_channels >= EDAC_NR_CHANNELS)
370 return -ENODEV;
7c9281d7 371
7a623c03
MCC
372 csrow->dev.type = &csrow_attr_type;
373 csrow->dev.bus = &mci->bus;
374 device_initialize(&csrow->dev);
375 csrow->dev.parent = &mci->dev;
376 dev_set_name(&csrow->dev, "csrow%d", index);
377 dev_set_drvdata(&csrow->dev, csrow);
7c9281d7 378
dd23cd6e 379 debugf0("creating (virtual) csrow node %s\n", dev_name(&csrow->dev));
7c9281d7 380
7a623c03
MCC
381 err = device_add(&csrow->dev);
382 if (err < 0)
383 return err;
7c9281d7 384
7a623c03 385 for (chan = 0; chan < csrow->nr_channels; chan++) {
e39f4ea9 386 /* Only expose populated DIMMs */
de3910eb 387 if (!csrow->channels[chan]->dimm->nr_pages)
e39f4ea9 388 continue;
7a623c03
MCC
389 err = device_create_file(&csrow->dev,
390 dynamic_csrow_dimm_attr[chan]);
391 if (err < 0)
392 goto error;
393 err = device_create_file(&csrow->dev,
394 dynamic_csrow_ce_count_attr[chan]);
395 if (err < 0) {
396 device_remove_file(&csrow->dev,
397 dynamic_csrow_dimm_attr[chan]);
398 goto error;
399 }
400 }
8096cfaf 401
7a623c03 402 return 0;
8096cfaf 403
7a623c03
MCC
404error:
405 for (--chan; chan >= 0; chan--) {
406 device_remove_file(&csrow->dev,
407 dynamic_csrow_dimm_attr[chan]);
408 device_remove_file(&csrow->dev,
409 dynamic_csrow_ce_count_attr[chan]);
410 }
411 put_device(&csrow->dev);
7c9281d7 412
7a623c03
MCC
413 return err;
414}
7c9281d7
DT
415
416/* Create a CSROW object under specifed edac_mc_device */
7a623c03 417static int edac_create_csrow_objects(struct mem_ctl_info *mci)
7c9281d7 418{
7a623c03
MCC
419 int err, i, chan;
420 struct csrow_info *csrow;
7c9281d7 421
7a623c03 422 for (i = 0; i < mci->nr_csrows; i++) {
de3910eb 423 csrow = mci->csrows[i];
e39f4ea9
MCC
424 if (!nr_pages_per_csrow(csrow))
425 continue;
de3910eb 426 err = edac_create_csrow_object(mci, mci->csrows[i], i);
7a623c03
MCC
427 if (err < 0)
428 goto error;
429 }
430 return 0;
8096cfaf 431
7a623c03
MCC
432error:
433 for (--i; i >= 0; i--) {
de3910eb 434 csrow = mci->csrows[i];
e39f4ea9
MCC
435 if (!nr_pages_per_csrow(csrow))
436 continue;
7a623c03 437 for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
de3910eb 438 if (!csrow->channels[chan]->dimm->nr_pages)
e39f4ea9 439 continue;
7a623c03
MCC
440 device_remove_file(&csrow->dev,
441 dynamic_csrow_dimm_attr[chan]);
442 device_remove_file(&csrow->dev,
443 dynamic_csrow_ce_count_attr[chan]);
444 }
de3910eb 445 put_device(&mci->csrows[i]->dev);
8096cfaf 446 }
7c9281d7 447
7a623c03
MCC
448 return err;
449}
8096cfaf 450
7a623c03
MCC
451static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
452{
453 int i, chan;
454 struct csrow_info *csrow;
8096cfaf 455
7a623c03 456 for (i = mci->nr_csrows - 1; i >= 0; i--) {
de3910eb 457 csrow = mci->csrows[i];
e39f4ea9
MCC
458 if (!nr_pages_per_csrow(csrow))
459 continue;
7a623c03 460 for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
de3910eb 461 if (!csrow->channels[chan]->dimm->nr_pages)
e39f4ea9 462 continue;
7a623c03
MCC
463 debugf1("Removing csrow %d channel %d sysfs nodes\n",
464 i, chan);
465 device_remove_file(&csrow->dev,
466 dynamic_csrow_dimm_attr[chan]);
467 device_remove_file(&csrow->dev,
468 dynamic_csrow_ce_count_attr[chan]);
7c9281d7 469 }
de3910eb
MCC
470 put_device(&mci->csrows[i]->dev);
471 device_del(&mci->csrows[i]->dev);
7c9281d7 472 }
7c9281d7 473}
19974710
MCC
474#endif
475
476/*
477 * Per-dimm (or per-rank) devices
478 */
479
480#define to_dimm(k) container_of(k, struct dimm_info, dev)
481
482/* show/store functions for DIMM Label attributes */
483static ssize_t dimmdev_location_show(struct device *dev,
484 struct device_attribute *mattr, char *data)
485{
486 struct dimm_info *dimm = to_dimm(dev);
487 struct mem_ctl_info *mci = dimm->mci;
488 int i;
489 char *p = data;
490
491 for (i = 0; i < mci->n_layers; i++) {
492 p += sprintf(p, "%s %d ",
493 edac_layer_name[mci->layers[i].type],
494 dimm->location[i]);
495 }
496
497 return p - data;
498}
499
500static ssize_t dimmdev_label_show(struct device *dev,
501 struct device_attribute *mattr, char *data)
502{
503 struct dimm_info *dimm = to_dimm(dev);
504
505 /* if field has not been initialized, there is nothing to send */
506 if (!dimm->label[0])
507 return 0;
508
509 return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label);
510}
511
512static ssize_t dimmdev_label_store(struct device *dev,
513 struct device_attribute *mattr,
514 const char *data,
515 size_t count)
516{
517 struct dimm_info *dimm = to_dimm(dev);
518
519 ssize_t max_size = 0;
520
521 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
522 strncpy(dimm->label, data, max_size);
523 dimm->label[max_size] = '\0';
524
525 return max_size;
526}
527
528static ssize_t dimmdev_size_show(struct device *dev,
529 struct device_attribute *mattr, char *data)
530{
531 struct dimm_info *dimm = to_dimm(dev);
532
533 return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
534}
535
536static ssize_t dimmdev_mem_type_show(struct device *dev,
537 struct device_attribute *mattr, char *data)
538{
539 struct dimm_info *dimm = to_dimm(dev);
540
541 return sprintf(data, "%s\n", mem_types[dimm->mtype]);
542}
543
544static ssize_t dimmdev_dev_type_show(struct device *dev,
545 struct device_attribute *mattr, char *data)
546{
547 struct dimm_info *dimm = to_dimm(dev);
548
549 return sprintf(data, "%s\n", dev_types[dimm->dtype]);
550}
551
552static ssize_t dimmdev_edac_mode_show(struct device *dev,
553 struct device_attribute *mattr,
554 char *data)
555{
556 struct dimm_info *dimm = to_dimm(dev);
557
558 return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
559}
560
561/* dimm/rank attribute files */
562static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
563 dimmdev_label_show, dimmdev_label_store);
564static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
565static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
566static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
567static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
568static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
569
570/* attributes of the dimm<id>/rank<id> object */
571static struct attribute *dimm_attrs[] = {
572 &dev_attr_dimm_label.attr,
573 &dev_attr_dimm_location.attr,
574 &dev_attr_size.attr,
575 &dev_attr_dimm_mem_type.attr,
576 &dev_attr_dimm_dev_type.attr,
577 &dev_attr_dimm_edac_mode.attr,
578 NULL,
579};
580
581static struct attribute_group dimm_attr_grp = {
582 .attrs = dimm_attrs,
583};
584
585static const struct attribute_group *dimm_attr_groups[] = {
586 &dimm_attr_grp,
587 NULL
588};
589
de3910eb 590static void dimm_attr_release(struct device *dev)
19974710 591{
de3910eb
MCC
592 struct dimm_info *dimm = container_of(dev, struct dimm_info, dev);
593
594 debugf1("Releasing dimm device %s\n", dev_name(dev));
595 kfree(dimm);
19974710
MCC
596}
597
598static struct device_type dimm_attr_type = {
599 .groups = dimm_attr_groups,
600 .release = dimm_attr_release,
601};
602
603/* Create a DIMM object under specifed memory controller device */
604static int edac_create_dimm_object(struct mem_ctl_info *mci,
605 struct dimm_info *dimm,
606 int index)
607{
608 int err;
609 dimm->mci = mci;
610
611 dimm->dev.type = &dimm_attr_type;
612 dimm->dev.bus = &mci->bus;
613 device_initialize(&dimm->dev);
614
615 dimm->dev.parent = &mci->dev;
616 if (mci->mem_is_per_rank)
617 dev_set_name(&dimm->dev, "rank%d", index);
618 else
619 dev_set_name(&dimm->dev, "dimm%d", index);
620 dev_set_drvdata(&dimm->dev, dimm);
621 pm_runtime_forbid(&mci->dev);
622
623 err = device_add(&dimm->dev);
624
dd23cd6e 625 debugf0("creating rank/dimm device %s\n", dev_name(&dimm->dev));
19974710
MCC
626
627 return err;
628}
7c9281d7 629
7a623c03
MCC
630/*
631 * Memory controller device
632 */
633
634#define to_mci(k) container_of(k, struct mem_ctl_info, dev)
7c9281d7 635
7a623c03
MCC
636static ssize_t mci_reset_counters_store(struct device *dev,
637 struct device_attribute *mattr,
079708b9 638 const char *data, size_t count)
7c9281d7 639{
7a623c03
MCC
640 struct mem_ctl_info *mci = to_mci(dev);
641 int cnt, row, chan, i;
5926ff50
MCC
642 mci->ue_mc = 0;
643 mci->ce_mc = 0;
7a623c03
MCC
644 mci->ue_noinfo_count = 0;
645 mci->ce_noinfo_count = 0;
7c9281d7
DT
646
647 for (row = 0; row < mci->nr_csrows; row++) {
de3910eb 648 struct csrow_info *ri = mci->csrows[row];
7c9281d7
DT
649
650 ri->ue_count = 0;
651 ri->ce_count = 0;
652
653 for (chan = 0; chan < ri->nr_channels; chan++)
de3910eb 654 ri->channels[chan]->ce_count = 0;
7c9281d7
DT
655 }
656
7a623c03
MCC
657 cnt = 1;
658 for (i = 0; i < mci->n_layers; i++) {
659 cnt *= mci->layers[i].size;
660 memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
661 memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
662 }
663
7c9281d7
DT
664 mci->start_time = jiffies;
665 return count;
666}
667
39094443
BP
668/* Memory scrubbing interface:
669 *
670 * A MC driver can limit the scrubbing bandwidth based on the CPU type.
671 * Therefore, ->set_sdram_scrub_rate should be made to return the actual
672 * bandwidth that is accepted or 0 when scrubbing is to be disabled.
673 *
674 * Negative value still means that an error has occurred while setting
675 * the scrub rate.
676 */
7a623c03
MCC
677static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
678 struct device_attribute *mattr,
eba042a8 679 const char *data, size_t count)
7c9281d7 680{
7a623c03 681 struct mem_ctl_info *mci = to_mci(dev);
eba042a8 682 unsigned long bandwidth = 0;
39094443 683 int new_bw = 0;
7c9281d7 684
39094443 685 if (!mci->set_sdram_scrub_rate)
5e8e19bf 686 return -ENODEV;
7c9281d7 687
eba042a8
BP
688 if (strict_strtoul(data, 10, &bandwidth) < 0)
689 return -EINVAL;
7c9281d7 690
39094443 691 new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
4949603a
MT
692 if (new_bw < 0) {
693 edac_printk(KERN_WARNING, EDAC_MC,
694 "Error setting scrub rate to: %lu\n", bandwidth);
695 return -EINVAL;
7c9281d7 696 }
39094443 697
4949603a 698 return count;
7c9281d7
DT
699}
700
39094443
BP
701/*
702 * ->get_sdram_scrub_rate() return value semantics same as above.
703 */
7a623c03
MCC
704static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
705 struct device_attribute *mattr,
706 char *data)
7c9281d7 707{
7a623c03 708 struct mem_ctl_info *mci = to_mci(dev);
39094443 709 int bandwidth = 0;
eba042a8 710
39094443 711 if (!mci->get_sdram_scrub_rate)
5e8e19bf 712 return -ENODEV;
eba042a8 713
39094443
BP
714 bandwidth = mci->get_sdram_scrub_rate(mci);
715 if (bandwidth < 0) {
eba042a8 716 edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
39094443 717 return bandwidth;
7c9281d7 718 }
39094443 719
39094443 720 return sprintf(data, "%d\n", bandwidth);
7c9281d7
DT
721}
722
723/* default attribute files for the MCI object */
7a623c03
MCC
724static ssize_t mci_ue_count_show(struct device *dev,
725 struct device_attribute *mattr,
726 char *data)
7c9281d7 727{
7a623c03
MCC
728 struct mem_ctl_info *mci = to_mci(dev);
729
5926ff50 730 return sprintf(data, "%d\n", mci->ue_mc);
7c9281d7
DT
731}
732
7a623c03
MCC
733static ssize_t mci_ce_count_show(struct device *dev,
734 struct device_attribute *mattr,
735 char *data)
7c9281d7 736{
7a623c03
MCC
737 struct mem_ctl_info *mci = to_mci(dev);
738
5926ff50 739 return sprintf(data, "%d\n", mci->ce_mc);
7c9281d7
DT
740}
741
7a623c03
MCC
742static ssize_t mci_ce_noinfo_show(struct device *dev,
743 struct device_attribute *mattr,
744 char *data)
7c9281d7 745{
7a623c03
MCC
746 struct mem_ctl_info *mci = to_mci(dev);
747
079708b9 748 return sprintf(data, "%d\n", mci->ce_noinfo_count);
7c9281d7
DT
749}
750
7a623c03
MCC
751static ssize_t mci_ue_noinfo_show(struct device *dev,
752 struct device_attribute *mattr,
753 char *data)
7c9281d7 754{
7a623c03
MCC
755 struct mem_ctl_info *mci = to_mci(dev);
756
079708b9 757 return sprintf(data, "%d\n", mci->ue_noinfo_count);
7c9281d7
DT
758}
759
7a623c03
MCC
760static ssize_t mci_seconds_show(struct device *dev,
761 struct device_attribute *mattr,
762 char *data)
7c9281d7 763{
7a623c03
MCC
764 struct mem_ctl_info *mci = to_mci(dev);
765
079708b9 766 return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
7c9281d7
DT
767}
768
7a623c03
MCC
769static ssize_t mci_ctl_name_show(struct device *dev,
770 struct device_attribute *mattr,
771 char *data)
7c9281d7 772{
7a623c03
MCC
773 struct mem_ctl_info *mci = to_mci(dev);
774
079708b9 775 return sprintf(data, "%s\n", mci->ctl_name);
7c9281d7
DT
776}
777
7a623c03
MCC
778static ssize_t mci_size_mb_show(struct device *dev,
779 struct device_attribute *mattr,
780 char *data)
7c9281d7 781{
7a623c03 782 struct mem_ctl_info *mci = to_mci(dev);
a895bf8b 783 int total_pages = 0, csrow_idx, j;
7c9281d7 784
a895bf8b 785 for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
de3910eb 786 struct csrow_info *csrow = mci->csrows[csrow_idx];
7c9281d7 787
a895bf8b 788 for (j = 0; j < csrow->nr_channels; j++) {
de3910eb 789 struct dimm_info *dimm = csrow->channels[j]->dimm;
7c9281d7 790
a895bf8b
MCC
791 total_pages += dimm->nr_pages;
792 }
7c9281d7
DT
793 }
794
079708b9 795 return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
7c9281d7
DT
796}
797
8ad6c78a
MCC
798static ssize_t mci_max_location_show(struct device *dev,
799 struct device_attribute *mattr,
800 char *data)
801{
802 struct mem_ctl_info *mci = to_mci(dev);
803 int i;
804 char *p = data;
805
806 for (i = 0; i < mci->n_layers; i++) {
807 p += sprintf(p, "%s %d ",
808 edac_layer_name[mci->layers[i].type],
809 mci->layers[i].size - 1);
810 }
811
812 return p - data;
813}
814
452a6bf9
MCC
815#ifdef CONFIG_EDAC_DEBUG
816static ssize_t edac_fake_inject_write(struct file *file,
817 const char __user *data,
818 size_t count, loff_t *ppos)
819{
820 struct device *dev = file->private_data;
821 struct mem_ctl_info *mci = to_mci(dev);
822 static enum hw_event_mc_err_type type;
823
824 type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED
825 : HW_EVENT_ERR_CORRECTED;
826
827 printk(KERN_DEBUG
828 "Generating a %s fake error to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n",
829 (type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE",
830 mci->fake_inject_layer[0],
831 mci->fake_inject_layer[1],
832 mci->fake_inject_layer[2]
833 );
834 edac_mc_handle_error(type, mci, 0, 0, 0,
835 mci->fake_inject_layer[0],
836 mci->fake_inject_layer[1],
837 mci->fake_inject_layer[2],
838 "FAKE ERROR", "for EDAC testing only", NULL);
839
840 return count;
841}
842
843static int debugfs_open(struct inode *inode, struct file *file)
844{
845 file->private_data = inode->i_private;
846 return 0;
847}
848
849static const struct file_operations debug_fake_inject_fops = {
850 .open = debugfs_open,
851 .write = edac_fake_inject_write,
852 .llseek = generic_file_llseek,
853};
854#endif
855
7c9281d7 856/* default Control file */
7a623c03 857DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
7c9281d7
DT
858
859/* default Attribute files */
7a623c03
MCC
860DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
861DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
862DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
863DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
864DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
865DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
866DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
8ad6c78a 867DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
7c9281d7
DT
868
869/* memory scrubber attribute file */
7a623c03 870DEVICE_ATTR(sdram_scrub_rate, S_IRUGO | S_IWUSR, mci_sdram_scrub_rate_show,
052dfb45 871 mci_sdram_scrub_rate_store);
7c9281d7 872
7a623c03
MCC
873static struct attribute *mci_attrs[] = {
874 &dev_attr_reset_counters.attr,
875 &dev_attr_mc_name.attr,
876 &dev_attr_size_mb.attr,
877 &dev_attr_seconds_since_reset.attr,
878 &dev_attr_ue_noinfo_count.attr,
879 &dev_attr_ce_noinfo_count.attr,
880 &dev_attr_ue_count.attr,
881 &dev_attr_ce_count.attr,
882 &dev_attr_sdram_scrub_rate.attr,
8ad6c78a 883 &dev_attr_max_location.attr,
7c9281d7
DT
884 NULL
885};
886
7a623c03
MCC
887static struct attribute_group mci_attr_grp = {
888 .attrs = mci_attrs,
cc301b3a
MCC
889};
890
7a623c03
MCC
891static const struct attribute_group *mci_attr_groups[] = {
892 &mci_attr_grp,
893 NULL
cc301b3a
MCC
894};
895
de3910eb 896static void mci_attr_release(struct device *dev)
42a8e397 897{
de3910eb
MCC
898 struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
899
900 debugf1("Releasing csrow device %s\n", dev_name(dev));
901 kfree(mci);
42a8e397
DT
902}
903
7a623c03
MCC
904static struct device_type mci_attr_type = {
905 .groups = mci_attr_groups,
906 .release = mci_attr_release,
907};
8096cfaf 908
452a6bf9
MCC
909#ifdef CONFIG_EDAC_DEBUG
910int edac_create_debug_nodes(struct mem_ctl_info *mci)
911{
912 struct dentry *d, *parent;
913 char name[80];
914 int i;
915
916 d = debugfs_create_dir(mci->dev.kobj.name, mci->debugfs);
917 if (!d)
918 return -ENOMEM;
919 parent = d;
920
921 for (i = 0; i < mci->n_layers; i++) {
922 sprintf(name, "fake_inject_%s",
923 edac_layer_name[mci->layers[i].type]);
924 d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent,
925 &mci->fake_inject_layer[i]);
926 if (!d)
927 goto nomem;
928 }
929
930 d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent,
931 &mci->fake_inject_ue);
932 if (!d)
933 goto nomem;
934
935 d = debugfs_create_file("fake_inject", S_IWUSR, parent,
936 &mci->dev,
937 &debug_fake_inject_fops);
938 if (!d)
939 goto nomem;
940
941 return 0;
942nomem:
943 debugfs_remove(mci->debugfs);
944 return -ENOMEM;
945}
946#endif
947
7c9281d7
DT
948/*
949 * Create a new Memory Controller kobject instance,
950 * mc<id> under the 'mc' directory
951 *
952 * Return:
953 * 0 Success
954 * !0 Failure
955 */
956int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
957{
7a623c03 958 int i, err;
7c9281d7 959
de3910eb
MCC
960 /*
961 * The memory controller needs its own bus, in order to avoid
962 * namespace conflicts at /sys/bus/edac.
963 */
964 mci->bus.name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
965 if (!mci->bus.name)
966 return -ENOMEM;
967 debugf0("creating bus %s\n",mci->bus.name);
968 err = bus_register(&mci->bus);
969 if (err < 0)
970 return err;
7c9281d7 971
7a623c03 972 /* get the /sys/devices/system/edac subsys reference */
7a623c03
MCC
973 mci->dev.type = &mci_attr_type;
974 device_initialize(&mci->dev);
7c9281d7 975
de3910eb 976 mci->dev.parent = mci_pdev;
7a623c03
MCC
977 mci->dev.bus = &mci->bus;
978 dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
979 dev_set_drvdata(&mci->dev, mci);
980 pm_runtime_forbid(&mci->dev);
981
dd23cd6e 982 debugf0("creating device %s\n", dev_name(&mci->dev));
7a623c03
MCC
983 err = device_add(&mci->dev);
984 if (err < 0) {
985 bus_unregister(&mci->bus);
986 kfree(mci->bus.name);
987 return err;
42a8e397
DT
988 }
989
7a623c03
MCC
990 /*
991 * Create the dimm/rank devices
7c9281d7 992 */
7a623c03 993 for (i = 0; i < mci->tot_dimms; i++) {
de3910eb 994 struct dimm_info *dimm = mci->dimms[i];
7a623c03
MCC
995 /* Only expose populated DIMMs */
996 if (dimm->nr_pages == 0)
997 continue;
998#ifdef CONFIG_EDAC_DEBUG
dd23cd6e
MCC
999 debugf1("creating dimm%d, located at ",
1000 i);
7a623c03
MCC
1001 if (edac_debug_level >= 1) {
1002 int lay;
1003 for (lay = 0; lay < mci->n_layers; lay++)
1004 printk(KERN_CONT "%s %d ",
1005 edac_layer_name[mci->layers[lay].type],
1006 dimm->location[lay]);
1007 printk(KERN_CONT "\n");
7c9281d7 1008 }
7a623c03 1009#endif
19974710
MCC
1010 err = edac_create_dimm_object(mci, dimm, i);
1011 if (err) {
dd23cd6e
MCC
1012 debugf1("failure: create dimm %d obj\n",
1013 i);
19974710
MCC
1014 goto fail;
1015 }
7c9281d7
DT
1016 }
1017
19974710 1018#ifdef CONFIG_EDAC_LEGACY_SYSFS
7a623c03
MCC
1019 err = edac_create_csrow_objects(mci);
1020 if (err < 0)
1021 goto fail;
19974710 1022#endif
7a623c03 1023
452a6bf9
MCC
1024#ifdef CONFIG_EDAC_DEBUG
1025 edac_create_debug_nodes(mci);
1026#endif
7c9281d7
DT
1027 return 0;
1028
7a623c03 1029fail:
079708b9 1030 for (i--; i >= 0; i--) {
de3910eb 1031 struct dimm_info *dimm = mci->dimms[i];
7a623c03
MCC
1032 if (dimm->nr_pages == 0)
1033 continue;
1034 put_device(&dimm->dev);
1035 device_del(&dimm->dev);
7c9281d7 1036 }
7a623c03
MCC
1037 put_device(&mci->dev);
1038 device_del(&mci->dev);
1039 bus_unregister(&mci->bus);
1040 kfree(mci->bus.name);
7c9281d7
DT
1041 return err;
1042}
1043
1044/*
1045 * remove a Memory Controller instance
1046 */
1047void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
1048{
7a623c03 1049 int i;
7c9281d7 1050
dd23cd6e 1051 debugf0("\n");
7c9281d7 1052
452a6bf9
MCC
1053#ifdef CONFIG_EDAC_DEBUG
1054 debugfs_remove(mci->debugfs);
1055#endif
19974710 1056#ifdef CONFIG_EDAC_LEGACY_SYSFS
7a623c03 1057 edac_delete_csrow_objects(mci);
19974710 1058#endif
7c9281d7 1059
7a623c03 1060 for (i = 0; i < mci->tot_dimms; i++) {
de3910eb 1061 struct dimm_info *dimm = mci->dimms[i];
7a623c03
MCC
1062 if (dimm->nr_pages == 0)
1063 continue;
dd23cd6e 1064 debugf0("removing device %s\n", dev_name(&dimm->dev));
7a623c03
MCC
1065 put_device(&dimm->dev);
1066 device_del(&dimm->dev);
6fe1108f 1067 }
7c9281d7 1068}
8096cfaf 1069
7a623c03
MCC
1070void edac_unregister_sysfs(struct mem_ctl_info *mci)
1071{
1072 debugf1("Unregistering device %s\n", dev_name(&mci->dev));
1073 put_device(&mci->dev);
1074 device_del(&mci->dev);
1075 bus_unregister(&mci->bus);
1076 kfree(mci->bus.name);
1077}
8096cfaf 1078
de3910eb 1079static void mc_attr_release(struct device *dev)
7a623c03 1080{
de3910eb
MCC
1081 /*
1082 * There's no container structure here, as this is just the mci
1083 * parent device, used to create the /sys/devices/mc sysfs node.
1084 * So, there are no attributes on it.
1085 */
1086 debugf1("Releasing device %s\n", dev_name(dev));
1087 kfree(dev);
7a623c03 1088}
8096cfaf 1089
7a623c03
MCC
1090static struct device_type mc_attr_type = {
1091 .release = mc_attr_release,
1092};
8096cfaf 1093/*
7a623c03 1094 * Init/exit code for the module. Basically, creates/removes /sys/class/rc
8096cfaf 1095 */
7a623c03 1096int __init edac_mc_sysfs_init(void)
8096cfaf 1097{
fe5ff8b8 1098 struct bus_type *edac_subsys;
7a623c03 1099 int err;
8096cfaf 1100
fe5ff8b8
KS
1101 /* get the /sys/devices/system/edac subsys reference */
1102 edac_subsys = edac_get_sysfs_subsys();
1103 if (edac_subsys == NULL) {
dd23cd6e 1104 debugf1("no edac_subsys\n");
7a623c03 1105 return -EINVAL;
8096cfaf
DT
1106 }
1107
de3910eb
MCC
1108 mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL);
1109
1110 mci_pdev->bus = edac_subsys;
1111 mci_pdev->type = &mc_attr_type;
1112 device_initialize(mci_pdev);
1113 dev_set_name(mci_pdev, "mc");
8096cfaf 1114
de3910eb 1115 err = device_add(mci_pdev);
7a623c03
MCC
1116 if (err < 0)
1117 return err;
8096cfaf 1118
de3910eb
MCC
1119 debugf0("device %s created\n", dev_name(mci_pdev));
1120
8096cfaf 1121 return 0;
8096cfaf
DT
1122}
1123
7a623c03 1124void __exit edac_mc_sysfs_exit(void)
8096cfaf 1125{
de3910eb
MCC
1126 put_device(mci_pdev);
1127 device_del(mci_pdev);
fe5ff8b8 1128 edac_put_sysfs_subsys();
8096cfaf 1129}
This page took 1.614362 seconds and 5 git commands to generate.