EDAC, mc_sysfs: Fix freeing bus' name
[deliverable/linux.git] / drivers / edac / edac_pci.c
CommitLineData
91b99041
DJ
1/*
2 * EDAC PCI component
3 *
4 * Author: Dave Jiang <djiang@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12#include <linux/module.h>
13#include <linux/types.h>
14#include <linux/smp.h>
15#include <linux/init.h>
16#include <linux/sysctl.h>
17#include <linux/highmem.h>
18#include <linux/timer.h>
19#include <linux/slab.h>
20#include <linux/spinlock.h>
21#include <linux/list.h>
91b99041
DJ
22#include <linux/ctype.h>
23#include <linux/workqueue.h>
24#include <asm/uaccess.h>
25#include <asm/page.h>
26
27#include "edac_core.h"
28#include "edac_module.h"
29
30static DEFINE_MUTEX(edac_pci_ctls_mutex);
ff6ac2a6 31static LIST_HEAD(edac_pci_list);
8641a384 32static atomic_t pci_indexes = ATOMIC_INIT(0);
91b99041 33
91b99041 34/*
d4c1465b
DT
35 * edac_pci_alloc_ctl_info
36 *
37 * The alloc() function for the 'edac_pci' control info
38 * structure. The chip driver will allocate one of these for each
39 * edac_pci it is going to control/register with the EDAC CORE.
91b99041 40 */
079708b9 41struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
052dfb45 42 const char *edac_pci_name)
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DJ
43{
44 struct edac_pci_ctl_info *pci;
93e4fe64 45 void *p = NULL, *pvt;
91b99041
DJ
46 unsigned int size;
47
956b9ba1 48 edac_dbg(1, "\n");
d4c1465b 49
93e4fe64
MCC
50 pci = edac_align_ptr(&p, sizeof(*pci), 1);
51 pvt = edac_align_ptr(&p, 1, sz_pvt);
91b99041
DJ
52 size = ((unsigned long)pvt) + sz_pvt;
53
d4c1465b
DT
54 /* Alloc the needed control struct memory */
55 pci = kzalloc(size, GFP_KERNEL);
56 if (pci == NULL)
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57 return NULL;
58
d4c1465b 59 /* Now much private space */
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60 pvt = sz_pvt ? ((char *)pci) + ((unsigned long)pvt) : NULL;
61
62 pci->pvt_info = pvt;
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63 pci->op_state = OP_ALLOC;
64
079708b9 65 snprintf(pci->name, strlen(edac_pci_name) + 1, "%s", edac_pci_name);
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66
67 return pci;
68}
69EXPORT_SYMBOL_GPL(edac_pci_alloc_ctl_info);
70
71/*
72 * edac_pci_free_ctl_info()
d4c1465b
DT
73 *
74 * Last action on the pci control structure.
75 *
6f042b50 76 * call the remove sysfs information, which will unregister
d4c1465b
DT
77 * this control struct's kobj. When that kobj's ref count
78 * goes to zero, its release function will be call and then
79 * kfree() the memory.
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80 */
81void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci)
82{
956b9ba1 83 edac_dbg(1, "\n");
079708b9 84
d4c1465b
DT
85 edac_pci_remove_sysfs(pci);
86}
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87EXPORT_SYMBOL_GPL(edac_pci_free_ctl_info);
88
89/*
90 * find_edac_pci_by_dev()
91 * scans the edac_pci list for a specific 'struct device *'
d4c1465b
DT
92 *
93 * return NULL if not found, or return control struct pointer
91b99041 94 */
079708b9 95static struct edac_pci_ctl_info *find_edac_pci_by_dev(struct device *dev)
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DJ
96{
97 struct edac_pci_ctl_info *pci;
98 struct list_head *item;
99
956b9ba1 100 edac_dbg(1, "\n");
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101
102 list_for_each(item, &edac_pci_list) {
103 pci = list_entry(item, struct edac_pci_ctl_info, link);
104
105 if (pci->dev == dev)
106 return pci;
107 }
108
109 return NULL;
110}
111
112/*
113 * add_edac_pci_to_global_list
114 * Before calling this function, caller must assign a unique value to
115 * edac_dev->pci_idx.
116 * Return:
117 * 0 on success
118 * 1 on failure
119 */
120static int add_edac_pci_to_global_list(struct edac_pci_ctl_info *pci)
121{
122 struct list_head *item, *insert_before;
123 struct edac_pci_ctl_info *rover;
124
956b9ba1 125 edac_dbg(1, "\n");
d4c1465b 126
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127 insert_before = &edac_pci_list;
128
129 /* Determine if already on the list */
d4c1465b
DT
130 rover = find_edac_pci_by_dev(pci->dev);
131 if (unlikely(rover != NULL))
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DJ
132 goto fail0;
133
134 /* Insert in ascending order by 'pci_idx', so find position */
135 list_for_each(item, &edac_pci_list) {
136 rover = list_entry(item, struct edac_pci_ctl_info, link);
137
138 if (rover->pci_idx >= pci->pci_idx) {
139 if (unlikely(rover->pci_idx == pci->pci_idx))
140 goto fail1;
141
142 insert_before = item;
143 break;
144 }
145 }
146
147 list_add_tail_rcu(&pci->link, insert_before);
148 return 0;
149
052dfb45 150fail0:
91b99041 151 edac_printk(KERN_WARNING, EDAC_PCI,
052dfb45 152 "%s (%s) %s %s already assigned %d\n",
281efb17 153 dev_name(rover->dev), edac_dev_name(rover),
052dfb45 154 rover->mod_name, rover->ctl_name, rover->pci_idx);
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155 return 1;
156
052dfb45 157fail1:
91b99041 158 edac_printk(KERN_WARNING, EDAC_PCI,
052dfb45
DT
159 "but in low-level driver: attempt to assign\n"
160 "\tduplicate pci_idx %d in %s()\n", rover->pci_idx,
161 __func__);
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162 return 1;
163}
164
91b99041
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165/*
166 * del_edac_pci_from_global_list
d4c1465b
DT
167 *
168 * remove the PCI control struct from the global list
91b99041
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169 */
170static void del_edac_pci_from_global_list(struct edac_pci_ctl_info *pci)
171{
172 list_del_rcu(&pci->link);
e2e77098
LJ
173
174 /* these are for safe removal of devices from global list while
175 * NMI handlers may be traversing list
176 */
177 synchronize_rcu();
178 INIT_LIST_HEAD(&pci->link);
91b99041
DJ
179}
180
91b99041
DJ
181/*
182 * edac_pci_workq_function()
d4c1465b
DT
183 *
184 * periodic function that performs the operation
185 * scheduled by a workq request, for a given PCI control struct
91b99041 186 */
91b99041
DJ
187static void edac_pci_workq_function(struct work_struct *work_req)
188{
fbeb4384 189 struct delayed_work *d_work = to_delayed_work(work_req);
91b99041 190 struct edac_pci_ctl_info *pci = to_edac_pci_ctl_work(d_work);
d4c1465b
DT
191 int msec;
192 unsigned long delay;
91b99041 193
956b9ba1 194 edac_dbg(3, "checking\n");
91b99041 195
d4c1465b 196 mutex_lock(&edac_pci_ctls_mutex);
91b99041 197
d4c1465b
DT
198 if (pci->op_state == OP_RUNNING_POLL) {
199 /* we might be in POLL mode, but there may NOT be a poll func
200 */
201 if ((pci->edac_check != NULL) && edac_pci_get_check_errors())
202 pci->edac_check(pci);
203
204 /* if we are on a one second period, then use round */
205 msec = edac_pci_get_poll_msec();
206 if (msec == 1000)
c2ae24cf 207 delay = round_jiffies_relative(msecs_to_jiffies(msec));
d4c1465b
DT
208 else
209 delay = msecs_to_jiffies(msec);
210
211 /* Reschedule only if we are in POLL mode */
212 queue_delayed_work(edac_workqueue, &pci->work, delay);
213 }
91b99041 214
d4c1465b 215 mutex_unlock(&edac_pci_ctls_mutex);
91b99041
DJ
216}
217
218/*
219 * edac_pci_workq_setup()
220 * initialize a workq item for this edac_pci instance
221 * passing in the new delay period in msec
d4c1465b
DT
222 *
223 * locking model:
224 * called when 'edac_pci_ctls_mutex' is locked
91b99041
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225 */
226static void edac_pci_workq_setup(struct edac_pci_ctl_info *pci,
079708b9 227 unsigned int msec)
91b99041 228{
956b9ba1 229 edac_dbg(0, "\n");
91b99041 230
91b99041 231 INIT_DELAYED_WORK(&pci->work, edac_pci_workq_function);
4de78c68 232 queue_delayed_work(edac_workqueue, &pci->work,
052dfb45 233 msecs_to_jiffies(edac_pci_get_poll_msec()));
91b99041
DJ
234}
235
236/*
237 * edac_pci_workq_teardown()
238 * stop the workq processing on this edac_pci instance
239 */
240static void edac_pci_workq_teardown(struct edac_pci_ctl_info *pci)
241{
242 int status;
243
956b9ba1 244 edac_dbg(0, "\n");
d4c1465b 245
91b99041
DJ
246 status = cancel_delayed_work(&pci->work);
247 if (status == 0)
248 flush_workqueue(edac_workqueue);
249}
250
251/*
252 * edac_pci_reset_delay_period
d4c1465b
DT
253 *
254 * called with a new period value for the workq period
255 * a) stop current workq timer
256 * b) restart workq timer with new value
91b99041
DJ
257 */
258void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci,
079708b9 259 unsigned long value)
91b99041 260{
956b9ba1 261 edac_dbg(0, "\n");
91b99041
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262
263 edac_pci_workq_teardown(pci);
264
d4c1465b
DT
265 /* need to lock for the setup */
266 mutex_lock(&edac_pci_ctls_mutex);
267
91b99041
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268 edac_pci_workq_setup(pci, value);
269
d4c1465b 270 mutex_unlock(&edac_pci_ctls_mutex);
91b99041
DJ
271}
272EXPORT_SYMBOL_GPL(edac_pci_reset_delay_period);
273
8641a384
HC
274/*
275 * edac_pci_alloc_index: Allocate a unique PCI index number
276 *
277 * Return:
278 * allocated index number
279 *
280 */
281int edac_pci_alloc_index(void)
282{
283 return atomic_inc_return(&pci_indexes) - 1;
284}
285EXPORT_SYMBOL_GPL(edac_pci_alloc_index);
286
91b99041
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287/*
288 * edac_pci_add_device: Insert the 'edac_dev' structure into the
289 * edac_pci global list and create sysfs entries associated with
290 * edac_pci structure.
291 * @pci: pointer to the edac_device structure to be added to the list
292 * @edac_idx: A unique numeric identifier to be assigned to the
293 * 'edac_pci' structure.
294 *
295 * Return:
296 * 0 Success
297 * !0 Failure
298 */
299int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)
300{
956b9ba1 301 edac_dbg(0, "\n");
91b99041
DJ
302
303 pci->pci_idx = edac_idx;
d4c1465b 304 pci->start_time = jiffies;
91b99041 305
d4c1465b 306 mutex_lock(&edac_pci_ctls_mutex);
91b99041
DJ
307
308 if (add_edac_pci_to_global_list(pci))
309 goto fail0;
310
91b99041
DJ
311 if (edac_pci_create_sysfs(pci)) {
312 edac_pci_printk(pci, KERN_WARNING,
313 "failed to create sysfs pci\n");
314 goto fail1;
315 }
316
317 if (pci->edac_check != NULL) {
318 pci->op_state = OP_RUNNING_POLL;
319
320 edac_pci_workq_setup(pci, 1000);
321 } else {
322 pci->op_state = OP_RUNNING_INTERRUPT;
323 }
324
325 edac_pci_printk(pci, KERN_INFO,
7270a608
RR
326 "Giving out device to module %s controller %s: DEV %s (%s)\n",
327 pci->mod_name, pci->ctl_name, pci->dev_name,
328 edac_op_state_to_string(pci->op_state));
91b99041 329
d4c1465b 330 mutex_unlock(&edac_pci_ctls_mutex);
91b99041
DJ
331 return 0;
332
d4c1465b 333 /* error unwind stack */
052dfb45 334fail1:
91b99041 335 del_edac_pci_from_global_list(pci);
052dfb45 336fail0:
d4c1465b 337 mutex_unlock(&edac_pci_ctls_mutex);
91b99041
DJ
338 return 1;
339}
340EXPORT_SYMBOL_GPL(edac_pci_add_device);
341
342/*
343 * edac_pci_del_device()
344 * Remove sysfs entries for specified edac_pci structure and
345 * then remove edac_pci structure from global list
346 *
347 * @dev:
348 * Pointer to 'struct device' representing edac_pci structure
349 * to remove
350 *
351 * Return:
352 * Pointer to removed edac_pci structure,
353 * or NULL if device not found
354 */
079708b9 355struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev)
91b99041
DJ
356{
357 struct edac_pci_ctl_info *pci;
358
956b9ba1 359 edac_dbg(0, "\n");
91b99041 360
d4c1465b 361 mutex_lock(&edac_pci_ctls_mutex);
91b99041 362
d4c1465b
DT
363 /* ensure the control struct is on the global list
364 * if not, then leave
365 */
366 pci = find_edac_pci_by_dev(dev);
367 if (pci == NULL) {
368 mutex_unlock(&edac_pci_ctls_mutex);
91b99041
DJ
369 return NULL;
370 }
371
372 pci->op_state = OP_OFFLINE;
373
91b99041
DJ
374 del_edac_pci_from_global_list(pci);
375
d4c1465b
DT
376 mutex_unlock(&edac_pci_ctls_mutex);
377
378 /* stop the workq timer */
379 edac_pci_workq_teardown(pci);
91b99041
DJ
380
381 edac_printk(KERN_INFO, EDAC_PCI,
052dfb45 382 "Removed device %d for %s %s: DEV %s\n",
17aa7e03 383 pci->pci_idx, pci->mod_name, pci->ctl_name, edac_dev_name(pci));
91b99041
DJ
384
385 return pci;
386}
387EXPORT_SYMBOL_GPL(edac_pci_del_device);
388
d4c1465b
DT
389/*
390 * edac_pci_generic_check
391 *
392 * a Generic parity check API
393 */
1a45027d 394static void edac_pci_generic_check(struct edac_pci_ctl_info *pci)
91b99041 395{
956b9ba1 396 edac_dbg(4, "\n");
91b99041
DJ
397 edac_pci_do_parity_check();
398}
399
d4c1465b 400/* free running instance index counter */
f044091c 401static int edac_pci_idx;
91b99041
DJ
402#define EDAC_PCI_GENCTL_NAME "EDAC PCI controller"
403
404struct edac_pci_gen_data {
405 int edac_idx;
406};
407
d4c1465b
DT
408/*
409 * edac_pci_create_generic_ctl
410 *
411 * A generic constructor for a PCI parity polling device
412 * Some systems have more than one domain of PCI busses.
413 * For systems with one domain, then this API will
414 * provide for a generic poller.
415 *
416 * This routine calls the edac_pci_alloc_ctl_info() for
417 * the generic device, with default values
418 */
079708b9 419struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev,
052dfb45 420 const char *mod_name)
91b99041
DJ
421{
422 struct edac_pci_ctl_info *pci;
423 struct edac_pci_gen_data *pdata;
424
425 pci = edac_pci_alloc_ctl_info(sizeof(*pdata), EDAC_PCI_GENCTL_NAME);
426 if (!pci)
427 return NULL;
428
429 pdata = pci->pvt_info;
430 pci->dev = dev;
431 dev_set_drvdata(pci->dev, pci);
432 pci->dev_name = pci_name(to_pci_dev(dev));
433
434 pci->mod_name = mod_name;
435 pci->ctl_name = EDAC_PCI_GENCTL_NAME;
876bb331
BP
436 if (edac_op_state == EDAC_OPSTATE_POLL)
437 pci->edac_check = edac_pci_generic_check;
91b99041
DJ
438
439 pdata->edac_idx = edac_pci_idx++;
440
441 if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
956b9ba1 442 edac_dbg(3, "failed edac_pci_add_device()\n");
91b99041
DJ
443 edac_pci_free_ctl_info(pci);
444 return NULL;
445 }
446
447 return pci;
448}
449EXPORT_SYMBOL_GPL(edac_pci_create_generic_ctl);
450
d4c1465b
DT
451/*
452 * edac_pci_release_generic_ctl
453 *
454 * The release function of a generic EDAC PCI polling device
455 */
91b99041
DJ
456void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci)
457{
956b9ba1 458 edac_dbg(0, "pci mod=%s\n", pci->mod_name);
d4c1465b 459
91b99041
DJ
460 edac_pci_del_device(pci->dev);
461 edac_pci_free_ctl_info(pci);
462}
463EXPORT_SYMBOL_GPL(edac_pci_release_generic_ctl);
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