vmwgfx: Close screen object system
[deliverable/linux.git] / drivers / firewire / core-iso.c
CommitLineData
c781c06d 1/*
b1bda4cd
JFSR
2 * Isochronous I/O functionality:
3 * - Isochronous DMA context management
4 * - Isochronous bus resource management (channels, bandwidth), client side
3038e353 5 *
3038e353
KH
6 * Copyright (C) 2006 Kristian Hoegsberg <krh@bitplanet.net>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 */
22
3038e353 23#include <linux/dma-mapping.h>
b1bda4cd 24#include <linux/errno.h>
77c9a5da 25#include <linux/firewire.h>
b1bda4cd
JFSR
26#include <linux/firewire-constants.h>
27#include <linux/kernel.h>
3038e353 28#include <linux/mm.h>
5a0e3ad6 29#include <linux/slab.h>
b1bda4cd
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30#include <linux/spinlock.h>
31#include <linux/vmalloc.h>
823467e5 32#include <linux/export.h>
3038e353 33
e8ca9702
SR
34#include <asm/byteorder.h>
35
77c9a5da 36#include "core.h"
b1bda4cd
JFSR
37
38/*
39 * Isochronous DMA context management
40 */
3038e353 41
53dca511
SR
42int fw_iso_buffer_init(struct fw_iso_buffer *buffer, struct fw_card *card,
43 int page_count, enum dma_data_direction direction)
3038e353 44{
2dbd7d7e 45 int i, j;
9aad8125
KH
46 dma_addr_t address;
47
48 buffer->page_count = page_count;
49 buffer->direction = direction;
50
51 buffer->pages = kmalloc(page_count * sizeof(buffer->pages[0]),
52 GFP_KERNEL);
53 if (buffer->pages == NULL)
54 goto out;
55
56 for (i = 0; i < buffer->page_count; i++) {
68be3fa1 57 buffer->pages[i] = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);
9aad8125
KH
58 if (buffer->pages[i] == NULL)
59 goto out_pages;
373b2edd 60
9aad8125
KH
61 address = dma_map_page(card->device, buffer->pages[i],
62 0, PAGE_SIZE, direction);
8d8bb39b 63 if (dma_mapping_error(card->device, address)) {
9aad8125
KH
64 __free_page(buffer->pages[i]);
65 goto out_pages;
66 }
67 set_page_private(buffer->pages[i], address);
3038e353
KH
68 }
69
70 return 0;
82eff9db 71
9aad8125
KH
72 out_pages:
73 for (j = 0; j < i; j++) {
74 address = page_private(buffer->pages[j]);
75 dma_unmap_page(card->device, address,
29ad14cd 76 PAGE_SIZE, direction);
9aad8125
KH
77 __free_page(buffer->pages[j]);
78 }
79 kfree(buffer->pages);
80 out:
81 buffer->pages = NULL;
e1eff7a3 82
2dbd7d7e 83 return -ENOMEM;
9aad8125 84}
c76acec6 85EXPORT_SYMBOL(fw_iso_buffer_init);
9aad8125
KH
86
87int fw_iso_buffer_map(struct fw_iso_buffer *buffer, struct vm_area_struct *vma)
88{
89 unsigned long uaddr;
e1eff7a3 90 int i, err;
9aad8125
KH
91
92 uaddr = vma->vm_start;
93 for (i = 0; i < buffer->page_count; i++) {
e1eff7a3
SR
94 err = vm_insert_page(vma, uaddr, buffer->pages[i]);
95 if (err)
96 return err;
97
9aad8125
KH
98 uaddr += PAGE_SIZE;
99 }
100
101 return 0;
3038e353
KH
102}
103
9aad8125
KH
104void fw_iso_buffer_destroy(struct fw_iso_buffer *buffer,
105 struct fw_card *card)
3038e353
KH
106{
107 int i;
9aad8125 108 dma_addr_t address;
3038e353 109
9aad8125
KH
110 for (i = 0; i < buffer->page_count; i++) {
111 address = page_private(buffer->pages[i]);
112 dma_unmap_page(card->device, address,
29ad14cd 113 PAGE_SIZE, buffer->direction);
9aad8125
KH
114 __free_page(buffer->pages[i]);
115 }
3038e353 116
9aad8125
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117 kfree(buffer->pages);
118 buffer->pages = NULL;
3038e353 119}
c76acec6 120EXPORT_SYMBOL(fw_iso_buffer_destroy);
3038e353 121
872e330e
SR
122/* Convert DMA address to offset into virtually contiguous buffer. */
123size_t fw_iso_buffer_lookup(struct fw_iso_buffer *buffer, dma_addr_t completed)
124{
125 int i;
126 dma_addr_t address;
127 ssize_t offset;
128
129 for (i = 0; i < buffer->page_count; i++) {
130 address = page_private(buffer->pages[i]);
131 offset = (ssize_t)completed - (ssize_t)address;
132 if (offset > 0 && offset <= PAGE_SIZE)
133 return (i << PAGE_SHIFT) + offset;
134 }
135
136 return 0;
137}
138
53dca511
SR
139struct fw_iso_context *fw_iso_context_create(struct fw_card *card,
140 int type, int channel, int speed, size_t header_size,
141 fw_iso_callback_t callback, void *callback_data)
3038e353
KH
142{
143 struct fw_iso_context *ctx;
3038e353 144
4817ed24
SR
145 ctx = card->driver->allocate_iso_context(card,
146 type, channel, header_size);
3038e353
KH
147 if (IS_ERR(ctx))
148 return ctx;
149
150 ctx->card = card;
151 ctx->type = type;
21efb3cf
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152 ctx->channel = channel;
153 ctx->speed = speed;
295e3feb 154 ctx->header_size = header_size;
872e330e 155 ctx->callback.sc = callback;
3038e353
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156 ctx->callback_data = callback_data;
157
3038e353
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158 return ctx;
159}
c76acec6 160EXPORT_SYMBOL(fw_iso_context_create);
3038e353
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161
162void fw_iso_context_destroy(struct fw_iso_context *ctx)
163{
872e330e 164 ctx->card->driver->free_iso_context(ctx);
3038e353 165}
c76acec6 166EXPORT_SYMBOL(fw_iso_context_destroy);
3038e353 167
53dca511
SR
168int fw_iso_context_start(struct fw_iso_context *ctx,
169 int cycle, int sync, int tags)
3038e353 170{
eb0306ea 171 return ctx->card->driver->start_iso(ctx, cycle, sync, tags);
3038e353 172}
c76acec6 173EXPORT_SYMBOL(fw_iso_context_start);
3038e353 174
872e330e
SR
175int fw_iso_context_set_channels(struct fw_iso_context *ctx, u64 *channels)
176{
177 return ctx->card->driver->set_iso_channels(ctx, channels);
178}
179
53dca511
SR
180int fw_iso_context_queue(struct fw_iso_context *ctx,
181 struct fw_iso_packet *packet,
182 struct fw_iso_buffer *buffer,
183 unsigned long payload)
3038e353 184{
872e330e 185 return ctx->card->driver->queue_iso(ctx, packet, buffer, payload);
3038e353 186}
c76acec6 187EXPORT_SYMBOL(fw_iso_context_queue);
b8295668 188
13882a82
CL
189void fw_iso_context_queue_flush(struct fw_iso_context *ctx)
190{
191 ctx->card->driver->flush_queue_iso(ctx);
192}
193EXPORT_SYMBOL(fw_iso_context_queue_flush);
194
53dca511 195int fw_iso_context_stop(struct fw_iso_context *ctx)
b8295668
KH
196{
197 return ctx->card->driver->stop_iso(ctx);
198}
c76acec6 199EXPORT_SYMBOL(fw_iso_context_stop);
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200
201/*
202 * Isochronous bus resource management (channels, bandwidth), client side
203 */
204
205static int manage_bandwidth(struct fw_card *card, int irm_id, int generation,
f30e6d3e 206 int bandwidth, bool allocate)
b1bda4cd 207{
b1bda4cd 208 int try, new, old = allocate ? BANDWIDTH_AVAILABLE_INITIAL : 0;
f30e6d3e 209 __be32 data[2];
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JFSR
210
211 /*
212 * On a 1394a IRM with low contention, try < 1 is enough.
213 * On a 1394-1995 IRM, we need at least try < 2.
214 * Let's just do try < 5.
215 */
216 for (try = 0; try < 5; try++) {
217 new = allocate ? old - bandwidth : old + bandwidth;
218 if (new < 0 || new > BANDWIDTH_AVAILABLE_INITIAL)
d6372b6e 219 return -EBUSY;
b1bda4cd
JFSR
220
221 data[0] = cpu_to_be32(old);
222 data[1] = cpu_to_be32(new);
223 switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
224 irm_id, generation, SCODE_100,
225 CSR_REGISTER_BASE + CSR_BANDWIDTH_AVAILABLE,
1821bc19 226 data, 8)) {
b1bda4cd
JFSR
227 case RCODE_GENERATION:
228 /* A generation change frees all bandwidth. */
229 return allocate ? -EAGAIN : bandwidth;
230
231 case RCODE_COMPLETE:
232 if (be32_to_cpup(data) == old)
233 return bandwidth;
234
235 old = be32_to_cpup(data);
236 /* Fall through. */
237 }
238 }
239
240 return -EIO;
241}
242
243static int manage_channel(struct fw_card *card, int irm_id, int generation,
f30e6d3e 244 u32 channels_mask, u64 offset, bool allocate)
b1bda4cd 245{
5aaffc65 246 __be32 bit, all, old;
f30e6d3e 247 __be32 data[2];
5aaffc65 248 int channel, ret = -EIO, retry = 5;
b1bda4cd 249
5d9cb7d2
SR
250 old = all = allocate ? cpu_to_be32(~0) : 0;
251
5aaffc65
CL
252 for (channel = 0; channel < 32; channel++) {
253 if (!(channels_mask & 1 << channel))
b1bda4cd
JFSR
254 continue;
255
d6372b6e
CL
256 ret = -EBUSY;
257
5aaffc65
CL
258 bit = cpu_to_be32(1 << (31 - channel));
259 if ((old & bit) != (all & bit))
b1bda4cd
JFSR
260 continue;
261
262 data[0] = old;
5aaffc65 263 data[1] = old ^ bit;
b1bda4cd
JFSR
264 switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
265 irm_id, generation, SCODE_100,
1821bc19 266 offset, data, 8)) {
b1bda4cd
JFSR
267 case RCODE_GENERATION:
268 /* A generation change frees all channels. */
5aaffc65 269 return allocate ? -EAGAIN : channel;
b1bda4cd
JFSR
270
271 case RCODE_COMPLETE:
272 if (data[0] == old)
5aaffc65 273 return channel;
b1bda4cd
JFSR
274
275 old = data[0];
276
277 /* Is the IRM 1394a-2000 compliant? */
5aaffc65 278 if ((data[0] & bit) == (data[1] & bit))
b1bda4cd
JFSR
279 continue;
280
281 /* 1394-1995 IRM, fall through to retry. */
282 default:
3a1f0a0e
CL
283 if (retry) {
284 retry--;
5aaffc65 285 channel--;
d6372b6e
CL
286 } else {
287 ret = -EIO;
3a1f0a0e 288 }
b1bda4cd
JFSR
289 }
290 }
291
d6372b6e 292 return ret;
b1bda4cd
JFSR
293}
294
295static void deallocate_channel(struct fw_card *card, int irm_id,
f30e6d3e 296 int generation, int channel)
b1bda4cd 297{
5d9cb7d2 298 u32 mask;
b1bda4cd
JFSR
299 u64 offset;
300
5d9cb7d2 301 mask = channel < 32 ? 1 << channel : 1 << (channel - 32);
b1bda4cd
JFSR
302 offset = channel < 32 ? CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI :
303 CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO;
304
f30e6d3e 305 manage_channel(card, irm_id, generation, mask, offset, false);
b1bda4cd
JFSR
306}
307
308/**
656b7afd 309 * fw_iso_resource_manage() - Allocate or deallocate a channel and/or bandwidth
b1bda4cd
JFSR
310 *
311 * In parameters: card, generation, channels_mask, bandwidth, allocate
312 * Out parameters: channel, bandwidth
313 * This function blocks (sleeps) during communication with the IRM.
5d9cb7d2 314 *
b1bda4cd 315 * Allocates or deallocates at most one channel out of channels_mask.
5d9cb7d2
SR
316 * channels_mask is a bitfield with MSB for channel 63 and LSB for channel 0.
317 * (Note, the IRM's CHANNELS_AVAILABLE is a big-endian bitfield with MSB for
318 * channel 0 and LSB for channel 63.)
319 * Allocates or deallocates as many bandwidth allocation units as specified.
b1bda4cd
JFSR
320 *
321 * Returns channel < 0 if no channel was allocated or deallocated.
322 * Returns bandwidth = 0 if no bandwidth was allocated or deallocated.
323 *
324 * If generation is stale, deallocations succeed but allocations fail with
325 * channel = -EAGAIN.
326 *
5d9cb7d2 327 * If channel allocation fails, no bandwidth will be allocated either.
b1bda4cd 328 * If bandwidth allocation fails, no channel will be allocated either.
5d9cb7d2
SR
329 * But deallocations of channel and bandwidth are tried independently
330 * of each other's success.
b1bda4cd
JFSR
331 */
332void fw_iso_resource_manage(struct fw_card *card, int generation,
333 u64 channels_mask, int *channel, int *bandwidth,
f30e6d3e 334 bool allocate)
b1bda4cd 335{
5d9cb7d2
SR
336 u32 channels_hi = channels_mask; /* channels 31...0 */
337 u32 channels_lo = channels_mask >> 32; /* channels 63...32 */
b1bda4cd
JFSR
338 int irm_id, ret, c = -EINVAL;
339
340 spin_lock_irq(&card->lock);
341 irm_id = card->irm_node->node_id;
342 spin_unlock_irq(&card->lock);
343
344 if (channels_hi)
345 c = manage_channel(card, irm_id, generation, channels_hi,
6fdc0370 346 CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI,
f30e6d3e 347 allocate);
b1bda4cd
JFSR
348 if (channels_lo && c < 0) {
349 c = manage_channel(card, irm_id, generation, channels_lo,
6fdc0370 350 CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO,
f30e6d3e 351 allocate);
b1bda4cd
JFSR
352 if (c >= 0)
353 c += 32;
354 }
355 *channel = c;
356
5d9cb7d2 357 if (allocate && channels_mask != 0 && c < 0)
b1bda4cd
JFSR
358 *bandwidth = 0;
359
360 if (*bandwidth == 0)
361 return;
362
f30e6d3e 363 ret = manage_bandwidth(card, irm_id, generation, *bandwidth, allocate);
b1bda4cd
JFSR
364 if (ret < 0)
365 *bandwidth = 0;
366
cf36df6b
CL
367 if (allocate && ret < 0) {
368 if (c >= 0)
f30e6d3e 369 deallocate_channel(card, irm_id, generation, c);
b1bda4cd
JFSR
370 *channel = ret;
371 }
372}
31ef9134 373EXPORT_SYMBOL(fw_iso_resource_manage);
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