Commit | Line | Data |
---|---|---|
c781c06d | 1 | /* |
b1bda4cd JFSR |
2 | * Isochronous I/O functionality: |
3 | * - Isochronous DMA context management | |
4 | * - Isochronous bus resource management (channels, bandwidth), client side | |
3038e353 | 5 | * |
3038e353 KH |
6 | * Copyright (C) 2006 Kristian Hoegsberg <krh@bitplanet.net> |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software Foundation, | |
20 | * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
21 | */ | |
22 | ||
3038e353 | 23 | #include <linux/dma-mapping.h> |
b1bda4cd | 24 | #include <linux/errno.h> |
77c9a5da | 25 | #include <linux/firewire.h> |
b1bda4cd JFSR |
26 | #include <linux/firewire-constants.h> |
27 | #include <linux/kernel.h> | |
3038e353 | 28 | #include <linux/mm.h> |
b1bda4cd JFSR |
29 | #include <linux/spinlock.h> |
30 | #include <linux/vmalloc.h> | |
3038e353 | 31 | |
e8ca9702 SR |
32 | #include <asm/byteorder.h> |
33 | ||
77c9a5da | 34 | #include "core.h" |
b1bda4cd JFSR |
35 | |
36 | /* | |
37 | * Isochronous DMA context management | |
38 | */ | |
3038e353 | 39 | |
53dca511 SR |
40 | int fw_iso_buffer_init(struct fw_iso_buffer *buffer, struct fw_card *card, |
41 | int page_count, enum dma_data_direction direction) | |
3038e353 | 42 | { |
2dbd7d7e | 43 | int i, j; |
9aad8125 KH |
44 | dma_addr_t address; |
45 | ||
46 | buffer->page_count = page_count; | |
47 | buffer->direction = direction; | |
48 | ||
49 | buffer->pages = kmalloc(page_count * sizeof(buffer->pages[0]), | |
50 | GFP_KERNEL); | |
51 | if (buffer->pages == NULL) | |
52 | goto out; | |
53 | ||
54 | for (i = 0; i < buffer->page_count; i++) { | |
68be3fa1 | 55 | buffer->pages[i] = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO); |
9aad8125 KH |
56 | if (buffer->pages[i] == NULL) |
57 | goto out_pages; | |
373b2edd | 58 | |
9aad8125 KH |
59 | address = dma_map_page(card->device, buffer->pages[i], |
60 | 0, PAGE_SIZE, direction); | |
8d8bb39b | 61 | if (dma_mapping_error(card->device, address)) { |
9aad8125 KH |
62 | __free_page(buffer->pages[i]); |
63 | goto out_pages; | |
64 | } | |
65 | set_page_private(buffer->pages[i], address); | |
3038e353 KH |
66 | } |
67 | ||
68 | return 0; | |
82eff9db | 69 | |
9aad8125 KH |
70 | out_pages: |
71 | for (j = 0; j < i; j++) { | |
72 | address = page_private(buffer->pages[j]); | |
73 | dma_unmap_page(card->device, address, | |
29ad14cd | 74 | PAGE_SIZE, direction); |
9aad8125 KH |
75 | __free_page(buffer->pages[j]); |
76 | } | |
77 | kfree(buffer->pages); | |
78 | out: | |
79 | buffer->pages = NULL; | |
e1eff7a3 | 80 | |
2dbd7d7e | 81 | return -ENOMEM; |
9aad8125 | 82 | } |
c76acec6 | 83 | EXPORT_SYMBOL(fw_iso_buffer_init); |
9aad8125 KH |
84 | |
85 | int fw_iso_buffer_map(struct fw_iso_buffer *buffer, struct vm_area_struct *vma) | |
86 | { | |
87 | unsigned long uaddr; | |
e1eff7a3 | 88 | int i, err; |
9aad8125 KH |
89 | |
90 | uaddr = vma->vm_start; | |
91 | for (i = 0; i < buffer->page_count; i++) { | |
e1eff7a3 SR |
92 | err = vm_insert_page(vma, uaddr, buffer->pages[i]); |
93 | if (err) | |
94 | return err; | |
95 | ||
9aad8125 KH |
96 | uaddr += PAGE_SIZE; |
97 | } | |
98 | ||
99 | return 0; | |
3038e353 KH |
100 | } |
101 | ||
9aad8125 KH |
102 | void fw_iso_buffer_destroy(struct fw_iso_buffer *buffer, |
103 | struct fw_card *card) | |
3038e353 KH |
104 | { |
105 | int i; | |
9aad8125 | 106 | dma_addr_t address; |
3038e353 | 107 | |
9aad8125 KH |
108 | for (i = 0; i < buffer->page_count; i++) { |
109 | address = page_private(buffer->pages[i]); | |
110 | dma_unmap_page(card->device, address, | |
29ad14cd | 111 | PAGE_SIZE, buffer->direction); |
9aad8125 KH |
112 | __free_page(buffer->pages[i]); |
113 | } | |
3038e353 | 114 | |
9aad8125 KH |
115 | kfree(buffer->pages); |
116 | buffer->pages = NULL; | |
3038e353 | 117 | } |
c76acec6 | 118 | EXPORT_SYMBOL(fw_iso_buffer_destroy); |
3038e353 | 119 | |
53dca511 SR |
120 | struct fw_iso_context *fw_iso_context_create(struct fw_card *card, |
121 | int type, int channel, int speed, size_t header_size, | |
122 | fw_iso_callback_t callback, void *callback_data) | |
3038e353 KH |
123 | { |
124 | struct fw_iso_context *ctx; | |
3038e353 | 125 | |
4817ed24 SR |
126 | ctx = card->driver->allocate_iso_context(card, |
127 | type, channel, header_size); | |
3038e353 KH |
128 | if (IS_ERR(ctx)) |
129 | return ctx; | |
130 | ||
131 | ctx->card = card; | |
132 | ctx->type = type; | |
21efb3cf KH |
133 | ctx->channel = channel; |
134 | ctx->speed = speed; | |
295e3feb | 135 | ctx->header_size = header_size; |
3038e353 KH |
136 | ctx->callback = callback; |
137 | ctx->callback_data = callback_data; | |
138 | ||
3038e353 KH |
139 | return ctx; |
140 | } | |
c76acec6 | 141 | EXPORT_SYMBOL(fw_iso_context_create); |
3038e353 KH |
142 | |
143 | void fw_iso_context_destroy(struct fw_iso_context *ctx) | |
144 | { | |
145 | struct fw_card *card = ctx->card; | |
146 | ||
3038e353 KH |
147 | card->driver->free_iso_context(ctx); |
148 | } | |
c76acec6 | 149 | EXPORT_SYMBOL(fw_iso_context_destroy); |
3038e353 | 150 | |
53dca511 SR |
151 | int fw_iso_context_start(struct fw_iso_context *ctx, |
152 | int cycle, int sync, int tags) | |
3038e353 | 153 | { |
eb0306ea | 154 | return ctx->card->driver->start_iso(ctx, cycle, sync, tags); |
3038e353 | 155 | } |
c76acec6 | 156 | EXPORT_SYMBOL(fw_iso_context_start); |
3038e353 | 157 | |
53dca511 SR |
158 | int fw_iso_context_queue(struct fw_iso_context *ctx, |
159 | struct fw_iso_packet *packet, | |
160 | struct fw_iso_buffer *buffer, | |
161 | unsigned long payload) | |
3038e353 KH |
162 | { |
163 | struct fw_card *card = ctx->card; | |
164 | ||
9aad8125 | 165 | return card->driver->queue_iso(ctx, packet, buffer, payload); |
3038e353 | 166 | } |
c76acec6 | 167 | EXPORT_SYMBOL(fw_iso_context_queue); |
b8295668 | 168 | |
53dca511 | 169 | int fw_iso_context_stop(struct fw_iso_context *ctx) |
b8295668 KH |
170 | { |
171 | return ctx->card->driver->stop_iso(ctx); | |
172 | } | |
c76acec6 | 173 | EXPORT_SYMBOL(fw_iso_context_stop); |
b1bda4cd JFSR |
174 | |
175 | /* | |
176 | * Isochronous bus resource management (channels, bandwidth), client side | |
177 | */ | |
178 | ||
179 | static int manage_bandwidth(struct fw_card *card, int irm_id, int generation, | |
6fdc0370 | 180 | int bandwidth, bool allocate, __be32 data[2]) |
b1bda4cd | 181 | { |
b1bda4cd JFSR |
182 | int try, new, old = allocate ? BANDWIDTH_AVAILABLE_INITIAL : 0; |
183 | ||
184 | /* | |
185 | * On a 1394a IRM with low contention, try < 1 is enough. | |
186 | * On a 1394-1995 IRM, we need at least try < 2. | |
187 | * Let's just do try < 5. | |
188 | */ | |
189 | for (try = 0; try < 5; try++) { | |
190 | new = allocate ? old - bandwidth : old + bandwidth; | |
191 | if (new < 0 || new > BANDWIDTH_AVAILABLE_INITIAL) | |
192 | break; | |
193 | ||
194 | data[0] = cpu_to_be32(old); | |
195 | data[1] = cpu_to_be32(new); | |
196 | switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP, | |
197 | irm_id, generation, SCODE_100, | |
198 | CSR_REGISTER_BASE + CSR_BANDWIDTH_AVAILABLE, | |
1821bc19 | 199 | data, 8)) { |
b1bda4cd JFSR |
200 | case RCODE_GENERATION: |
201 | /* A generation change frees all bandwidth. */ | |
202 | return allocate ? -EAGAIN : bandwidth; | |
203 | ||
204 | case RCODE_COMPLETE: | |
205 | if (be32_to_cpup(data) == old) | |
206 | return bandwidth; | |
207 | ||
208 | old = be32_to_cpup(data); | |
209 | /* Fall through. */ | |
210 | } | |
211 | } | |
212 | ||
213 | return -EIO; | |
214 | } | |
215 | ||
216 | static int manage_channel(struct fw_card *card, int irm_id, int generation, | |
6fdc0370 | 217 | u32 channels_mask, u64 offset, bool allocate, __be32 data[2]) |
b1bda4cd | 218 | { |
6fdc0370 | 219 | __be32 c, all, old; |
b1bda4cd JFSR |
220 | int i, retry = 5; |
221 | ||
5d9cb7d2 SR |
222 | old = all = allocate ? cpu_to_be32(~0) : 0; |
223 | ||
b1bda4cd | 224 | for (i = 0; i < 32; i++) { |
5d9cb7d2 | 225 | if (!(channels_mask & 1 << i)) |
b1bda4cd JFSR |
226 | continue; |
227 | ||
5d9cb7d2 SR |
228 | c = cpu_to_be32(1 << (31 - i)); |
229 | if ((old & c) != (all & c)) | |
b1bda4cd JFSR |
230 | continue; |
231 | ||
232 | data[0] = old; | |
233 | data[1] = old ^ c; | |
234 | switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP, | |
235 | irm_id, generation, SCODE_100, | |
1821bc19 | 236 | offset, data, 8)) { |
b1bda4cd JFSR |
237 | case RCODE_GENERATION: |
238 | /* A generation change frees all channels. */ | |
239 | return allocate ? -EAGAIN : i; | |
240 | ||
241 | case RCODE_COMPLETE: | |
242 | if (data[0] == old) | |
243 | return i; | |
244 | ||
245 | old = data[0]; | |
246 | ||
247 | /* Is the IRM 1394a-2000 compliant? */ | |
5d9cb7d2 | 248 | if ((data[0] & c) == (data[1] & c)) |
b1bda4cd JFSR |
249 | continue; |
250 | ||
251 | /* 1394-1995 IRM, fall through to retry. */ | |
252 | default: | |
253 | if (retry--) | |
254 | i--; | |
255 | } | |
256 | } | |
257 | ||
258 | return -EIO; | |
259 | } | |
260 | ||
261 | static void deallocate_channel(struct fw_card *card, int irm_id, | |
6fdc0370 | 262 | int generation, int channel, __be32 buffer[2]) |
b1bda4cd | 263 | { |
5d9cb7d2 | 264 | u32 mask; |
b1bda4cd JFSR |
265 | u64 offset; |
266 | ||
5d9cb7d2 | 267 | mask = channel < 32 ? 1 << channel : 1 << (channel - 32); |
b1bda4cd JFSR |
268 | offset = channel < 32 ? CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI : |
269 | CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO; | |
270 | ||
6fdc0370 | 271 | manage_channel(card, irm_id, generation, mask, offset, false, buffer); |
b1bda4cd JFSR |
272 | } |
273 | ||
274 | /** | |
275 | * fw_iso_resource_manage - Allocate or deallocate a channel and/or bandwidth | |
276 | * | |
277 | * In parameters: card, generation, channels_mask, bandwidth, allocate | |
278 | * Out parameters: channel, bandwidth | |
279 | * This function blocks (sleeps) during communication with the IRM. | |
5d9cb7d2 | 280 | * |
b1bda4cd | 281 | * Allocates or deallocates at most one channel out of channels_mask. |
5d9cb7d2 SR |
282 | * channels_mask is a bitfield with MSB for channel 63 and LSB for channel 0. |
283 | * (Note, the IRM's CHANNELS_AVAILABLE is a big-endian bitfield with MSB for | |
284 | * channel 0 and LSB for channel 63.) | |
285 | * Allocates or deallocates as many bandwidth allocation units as specified. | |
b1bda4cd JFSR |
286 | * |
287 | * Returns channel < 0 if no channel was allocated or deallocated. | |
288 | * Returns bandwidth = 0 if no bandwidth was allocated or deallocated. | |
289 | * | |
290 | * If generation is stale, deallocations succeed but allocations fail with | |
291 | * channel = -EAGAIN. | |
292 | * | |
5d9cb7d2 | 293 | * If channel allocation fails, no bandwidth will be allocated either. |
b1bda4cd | 294 | * If bandwidth allocation fails, no channel will be allocated either. |
5d9cb7d2 SR |
295 | * But deallocations of channel and bandwidth are tried independently |
296 | * of each other's success. | |
b1bda4cd JFSR |
297 | */ |
298 | void fw_iso_resource_manage(struct fw_card *card, int generation, | |
299 | u64 channels_mask, int *channel, int *bandwidth, | |
6fdc0370 | 300 | bool allocate, __be32 buffer[2]) |
b1bda4cd | 301 | { |
5d9cb7d2 SR |
302 | u32 channels_hi = channels_mask; /* channels 31...0 */ |
303 | u32 channels_lo = channels_mask >> 32; /* channels 63...32 */ | |
b1bda4cd JFSR |
304 | int irm_id, ret, c = -EINVAL; |
305 | ||
306 | spin_lock_irq(&card->lock); | |
307 | irm_id = card->irm_node->node_id; | |
308 | spin_unlock_irq(&card->lock); | |
309 | ||
310 | if (channels_hi) | |
311 | c = manage_channel(card, irm_id, generation, channels_hi, | |
6fdc0370 SR |
312 | CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI, |
313 | allocate, buffer); | |
b1bda4cd JFSR |
314 | if (channels_lo && c < 0) { |
315 | c = manage_channel(card, irm_id, generation, channels_lo, | |
6fdc0370 SR |
316 | CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO, |
317 | allocate, buffer); | |
b1bda4cd JFSR |
318 | if (c >= 0) |
319 | c += 32; | |
320 | } | |
321 | *channel = c; | |
322 | ||
5d9cb7d2 | 323 | if (allocate && channels_mask != 0 && c < 0) |
b1bda4cd JFSR |
324 | *bandwidth = 0; |
325 | ||
326 | if (*bandwidth == 0) | |
327 | return; | |
328 | ||
6fdc0370 SR |
329 | ret = manage_bandwidth(card, irm_id, generation, *bandwidth, |
330 | allocate, buffer); | |
b1bda4cd JFSR |
331 | if (ret < 0) |
332 | *bandwidth = 0; | |
333 | ||
5d9cb7d2 | 334 | if (allocate && ret < 0 && c >= 0) { |
6fdc0370 | 335 | deallocate_channel(card, irm_id, generation, c, buffer); |
b1bda4cd JFSR |
336 | *channel = ret; |
337 | } | |
338 | } |