[deliverable/linux.git] / drivers / gpio / gpio-f7188x.c

/*
 * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882 and F71889
 *
 * Copyright (C) 2010-2013 LaCie
 *
 * Author: Simon Guinot <simon.guinot@sequanux.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/gpio.h>

#define DRVNAME "gpio-f7188x"

/*
 * Super-I/O registers
 */
#define SIO_LDSEL		0x07	/* Logical device select */
#define SIO_DEVID		0x20	/* Device ID (2 bytes) */
#define SIO_DEVREV		0x22	/* Device revision */
#define SIO_MANID		0x23	/* Fintek ID (2 bytes) */

#define SIO_LD_GPIO		0x06	/* GPIO logical device */
#define SIO_UNLOCK_KEY		0x87	/* Key to enable Super-I/O */
#define SIO_LOCK_KEY		0xAA	/* Key to disable Super-I/O */

#define SIO_FINTEK_ID		0x1934	/* Manufacturer ID */
#define SIO_F71869_ID		0x0814	/* F71869 chipset ID */
#define SIO_F71869A_ID		0x1007	/* F71869A chipset ID */
#define SIO_F71882_ID		0x0541	/* F71882 chipset ID */
#define SIO_F71889_ID		0x0909	/* F71889 chipset ID */

enum chips { f71869, f71869a, f71882fg, f71889f };

static const char * const f7188x_names[] = {
	"f71869",
	"f71869a",
	"f71882fg",
	"f71889f",
};

struct f7188x_sio {
	int addr;
	enum chips type;
};

struct f7188x_gpio_bank {
	struct gpio_chip chip;
	unsigned int regbase;
	struct f7188x_gpio_data *data;
};

struct f7188x_gpio_data {
	struct f7188x_sio *sio;
	int nr_bank;
	struct f7188x_gpio_bank *bank;
};

/*
 * Super-I/O functions.
 */

static inline int superio_inb(int base, int reg)
{
	outb(reg, base);
	return inb(base + 1);
}

static int superio_inw(int base, int reg)
{
	int val;

	outb(reg++, base);
	val = inb(base + 1) << 8;
	outb(reg, base);
	val |= inb(base + 1);

	return val;
}

static inline void superio_outb(int base, int reg, int val)
{
	outb(reg, base);
	outb(val, base + 1);
}

static inline int superio_enter(int base)
{
	/* Don't step on other drivers' I/O space by accident. */
	if (!request_muxed_region(base, 2, DRVNAME)) {
		pr_err(DRVNAME "I/O address 0x%04x already in use\n", base);
		return -EBUSY;
	}

	/* According to the datasheet the key must be send twice. */
	outb(SIO_UNLOCK_KEY, base);
	outb(SIO_UNLOCK_KEY, base);

	return 0;
}

static inline void superio_select(int base, int ld)
{
	outb(SIO_LDSEL, base);
	outb(ld, base + 1);
}

static inline void superio_exit(int base)
{
	outb(SIO_LOCK_KEY, base);
	release_region(base, 2);
}

/*
 * GPIO chip.
 */

static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset);
static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset);
static int f7188x_gpio_direction_out(struct gpio_chip *chip,
				     unsigned offset, int value);
static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);

#define F7188X_GPIO_BANK(_base, _ngpio, _regbase)			\
	{								\
		.chip = {						\
			.label            = DRVNAME,			\
			.owner            = THIS_MODULE,		\
			.direction_input  = f7188x_gpio_direction_in,	\
			.get              = f7188x_gpio_get,		\
			.direction_output = f7188x_gpio_direction_out,	\
			.set              = f7188x_gpio_set,		\
			.base             = _base,			\
			.ngpio            = _ngpio,			\
			.can_sleep        = true,			\
		},							\
		.regbase = _regbase,					\
	}

#define gpio_dir(base) (base + 0)
#define gpio_data_out(base) (base + 1)
#define gpio_data_in(base) (base + 2)
/* Output mode register (0:open drain 1:push-pull). */
#define gpio_out_mode(base) (base + 3)

static struct f7188x_gpio_bank f71869_gpio_bank[] = {
	F7188X_GPIO_BANK(0, 6, 0xF0),
	F7188X_GPIO_BANK(10, 8, 0xE0),
	F7188X_GPIO_BANK(20, 8, 0xD0),
	F7188X_GPIO_BANK(30, 8, 0xC0),
	F7188X_GPIO_BANK(40, 8, 0xB0),
	F7188X_GPIO_BANK(50, 5, 0xA0),
	F7188X_GPIO_BANK(60, 6, 0x90),
};

static struct f7188x_gpio_bank f71869a_gpio_bank[] = {
	F7188X_GPIO_BANK(0, 6, 0xF0),
	F7188X_GPIO_BANK(10, 8, 0xE0),
	F7188X_GPIO_BANK(20, 8, 0xD0),
	F7188X_GPIO_BANK(30, 8, 0xC0),
	F7188X_GPIO_BANK(40, 8, 0xB0),
	F7188X_GPIO_BANK(50, 5, 0xA0),
	F7188X_GPIO_BANK(60, 8, 0x90),
	F7188X_GPIO_BANK(70, 8, 0x80),
};

static struct f7188x_gpio_bank f71882_gpio_bank[] = {
	F7188X_GPIO_BANK(0, 8, 0xF0),
	F7188X_GPIO_BANK(10, 8, 0xE0),
	F7188X_GPIO_BANK(20, 8, 0xD0),
	F7188X_GPIO_BANK(30, 4, 0xC0),
	F7188X_GPIO_BANK(40, 4, 0xB0),
};

static struct f7188x_gpio_bank f71889_gpio_bank[] = {
	F7188X_GPIO_BANK(0, 7, 0xF0),
	F7188X_GPIO_BANK(10, 7, 0xE0),
	F7188X_GPIO_BANK(20, 8, 0xD0),
	F7188X_GPIO_BANK(30, 8, 0xC0),
	F7188X_GPIO_BANK(40, 8, 0xB0),
	F7188X_GPIO_BANK(50, 5, 0xA0),
	F7188X_GPIO_BANK(60, 8, 0x90),
	F7188X_GPIO_BANK(70, 8, 0x80),
};

static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
{
	int err;
	struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
	struct f7188x_sio *sio = bank->data->sio;
	u8 dir;

	err = superio_enter(sio->addr);
	if (err)
		return err;
	superio_select(sio->addr, SIO_LD_GPIO);

	dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
	dir &= ~(1 << offset);
	superio_outb(sio->addr, gpio_dir(bank->regbase), dir);

	superio_exit(sio->addr);

	return 0;
}

static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset)
{
	int err;
	struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
	struct f7188x_sio *sio = bank->data->sio;
	u8 dir, data;

	err = superio_enter(sio->addr);
	if (err)
		return err;
	superio_select(sio->addr, SIO_LD_GPIO);

	dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
	dir = !!(dir & (1 << offset));
	if (dir)
		data = superio_inb(sio->addr, gpio_data_out(bank->regbase));
	else
		data = superio_inb(sio->addr, gpio_data_in(bank->regbase));

	superio_exit(sio->addr);

	return !!(data & 1 << offset);
}

static int f7188x_gpio_direction_out(struct gpio_chip *chip,
				     unsigned offset, int value)
{
	int err;
	struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
	struct f7188x_sio *sio = bank->data->sio;
	u8 dir, data_out;

	err = superio_enter(sio->addr);
	if (err)
		return err;
	superio_select(sio->addr, SIO_LD_GPIO);

	data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
	if (value)
		data_out |= (1 << offset);
	else
		data_out &= ~(1 << offset);
	superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);

	dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
	dir |= (1 << offset);
	superio_outb(sio->addr, gpio_dir(bank->regbase), dir);

	superio_exit(sio->addr);

	return 0;
}

static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
{
	int err;
	struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
	struct f7188x_sio *sio = bank->data->sio;
	u8 data_out;

	err = superio_enter(sio->addr);
	if (err)
		return;
	superio_select(sio->addr, SIO_LD_GPIO);

	data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
	if (value)
		data_out |= (1 << offset);
	else
		data_out &= ~(1 << offset);
	superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);

	superio_exit(sio->addr);
}

/*
 * Platform device and driver.
 */

static int f7188x_gpio_probe(struct platform_device *pdev)
{
	int err;
	int i;
	struct f7188x_sio *sio = dev_get_platdata(&pdev->dev);
	struct f7188x_gpio_data *data;

	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	switch (sio->type) {
	case f71869:
		data->nr_bank = ARRAY_SIZE(f71869_gpio_bank);
		data->bank = f71869_gpio_bank;
		break;
	case f71869a:
		data->nr_bank = ARRAY_SIZE(f71869a_gpio_bank);
		data->bank = f71869a_gpio_bank;
		break;
	case f71882fg:
		data->nr_bank = ARRAY_SIZE(f71882_gpio_bank);
		data->bank = f71882_gpio_bank;
		break;
	case f71889f:
		data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
		data->bank = f71889_gpio_bank;
		break;
	default:
		return -ENODEV;
	}
	data->sio = sio;

	platform_set_drvdata(pdev, data);

	/* For each GPIO bank, register a GPIO chip. */
	for (i = 0; i < data->nr_bank; i++) {
		struct f7188x_gpio_bank *bank = &data->bank[i];

		bank->chip.parent = &pdev->dev;
		bank->data = data;

		err = gpiochip_add_data(&bank->chip, bank);
		if (err) {
			dev_err(&pdev->dev,
				"Failed to register gpiochip %d: %d\n",
				i, err);
			goto err_gpiochip;
		}
	}

	return 0;

err_gpiochip:
	for (i = i - 1; i >= 0; i--) {
		struct f7188x_gpio_bank *bank = &data->bank[i];
		gpiochip_remove(&bank->chip);
	}

	return err;
}

static int f7188x_gpio_remove(struct platform_device *pdev)
{
	int i;
	struct f7188x_gpio_data *data = platform_get_drvdata(pdev);

	for (i = 0; i < data->nr_bank; i++) {
		struct f7188x_gpio_bank *bank = &data->bank[i];
		gpiochip_remove(&bank->chip);
	}

	return 0;
}

static int __init f7188x_find(int addr, struct f7188x_sio *sio)
{
	int err;
	u16 devid;

	err = superio_enter(addr);
	if (err)
		return err;

	err = -ENODEV;
	devid = superio_inw(addr, SIO_MANID);
	if (devid != SIO_FINTEK_ID) {
		pr_debug(DRVNAME ": Not a Fintek device at 0x%08x\n", addr);
		goto err;
	}

	devid = superio_inw(addr, SIO_DEVID);
	switch (devid) {
	case SIO_F71869_ID:
		sio->type = f71869;
		break;
	case SIO_F71869A_ID:
		sio->type = f71869a;
		break;
	case SIO_F71882_ID:
		sio->type = f71882fg;
		break;
	case SIO_F71889_ID:
		sio->type = f71889f;
		break;
	default:
		pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
		goto err;
	}
	sio->addr = addr;
	err = 0;

	pr_info(DRVNAME ": Found %s at %#x, revision %d\n",
		f7188x_names[sio->type],
		(unsigned int) addr,
		(int) superio_inb(addr, SIO_DEVREV));

err:
	superio_exit(addr);
	return err;
}

static struct platform_device *f7188x_gpio_pdev;

static int __init
f7188x_gpio_device_add(const struct f7188x_sio *sio)
{
	int err;

	f7188x_gpio_pdev = platform_device_alloc(DRVNAME, -1);
	if (!f7188x_gpio_pdev)
		return -ENOMEM;

	err = platform_device_add_data(f7188x_gpio_pdev,
				       sio, sizeof(*sio));
	if (err) {
		pr_err(DRVNAME "Platform data allocation failed\n");
		goto err;
	}

	err = platform_device_add(f7188x_gpio_pdev);
	if (err) {
		pr_err(DRVNAME "Device addition failed\n");
		goto err;
	}

	return 0;

err:
	platform_device_put(f7188x_gpio_pdev);

	return err;
}

/*
 * Try to match a supported Fintek device by reading the (hard-wired)
 * configuration I/O ports. If available, then register both the platform
 * device and driver to support the GPIOs.
 */

static struct platform_driver f7188x_gpio_driver = {
	.driver = {
		.name	= DRVNAME,
	},
	.probe		= f7188x_gpio_probe,
	.remove		= f7188x_gpio_remove,
};

static int __init f7188x_gpio_init(void)
{
	int err;
	struct f7188x_sio sio;

	if (f7188x_find(0x2e, &sio) &&
	    f7188x_find(0x4e, &sio))
		return -ENODEV;

	err = platform_driver_register(&f7188x_gpio_driver);
	if (!err) {
		err = f7188x_gpio_device_add(&sio);
		if (err)
			platform_driver_unregister(&f7188x_gpio_driver);
	}

	return err;
}
subsys_initcall(f7188x_gpio_init);

static void __exit f7188x_gpio_exit(void)
{
	platform_device_unregister(f7188x_gpio_pdev);
	platform_driver_unregister(&f7188x_gpio_driver);
}
module_exit(f7188x_gpio_exit);

MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG and F71889F");
MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
MODULE_LICENSE("GPL");
Commit	Line	Data
6c17aa01	1	/*
7e960363	2	* GPIO driver for Fintek Super-I/O F71869, F71869A, F71882 and F71889
6c17aa01 SG	3	*
	4	* Copyright (C) 2010-2013 LaCie
	5	*
	6	* Author: Simon Guinot <simon.guinot@sequanux.org>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*/
	13
	14	#include <linux/module.h>
	15	#include <linux/init.h>
	16	#include <linux/platform_device.h>
	17	#include <linux/io.h>
	18	#include <linux/gpio.h>
	19
	20	#define DRVNAME "gpio-f7188x"
	21
	22	/*
	23	* Super-I/O registers
	24	*/
	25	#define SIO_LDSEL 0x07 /* Logical device select */
	26	#define SIO_DEVID 0x20 /* Device ID (2 bytes) */
	27	#define SIO_DEVREV 0x22 /* Device revision */
	28	#define SIO_MANID 0x23 /* Fintek ID (2 bytes) */
	29
	30	#define SIO_LD_GPIO 0x06 /* GPIO logical device */
	31	#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
	32	#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
	33
	34	#define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
24ccef35	35	#define SIO_F71869_ID 0x0814 /* F71869 chipset ID */
7e960363	36	#define SIO_F71869A_ID 0x1007 /* F71869A chipset ID */
6c17aa01 SG	37	#define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
	38	#define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
	39
7e960363	40	enum chips { f71869, f71869a, f71882fg, f71889f };
6c17aa01 SG	41
6c17aa01 SG	42	static const char * const f7188x_names[] = {
24ccef35	43	"f71869",
7e960363	44	"f71869a",
6c17aa01 SG	45	"f71882fg",
	46	"f71889f",
	47	};
	48
	49	struct f7188x_sio {
	50	int addr;
	51	enum chips type;
	52	};
	53
	54	struct f7188x_gpio_bank {
	55	struct gpio_chip chip;
	56	unsigned int regbase;
	57	struct f7188x_gpio_data *data;
	58	};
	59
	60	struct f7188x_gpio_data {
	61	struct f7188x_sio *sio;
	62	int nr_bank;
	63	struct f7188x_gpio_bank *bank;
	64	};
	65
	66	/*
	67	* Super-I/O functions.
	68	*/
	69
	70	static inline int superio_inb(int base, int reg)
	71	{
	72	outb(reg, base);
	73	return inb(base + 1);
	74	}
	75
	76	static int superio_inw(int base, int reg)
	77	{
	78	int val;
	79
	80	outb(reg++, base);
	81	val = inb(base + 1) << 8;
	82	outb(reg, base);
	83	val \|= inb(base + 1);
	84
	85	return val;
	86	}
	87
	88	static inline void superio_outb(int base, int reg, int val)
	89	{
	90	outb(reg, base);
	91	outb(val, base + 1);
	92	}
	93
	94	static inline int superio_enter(int base)
	95	{
	96	/* Don't step on other drivers' I/O space by accident. */
	97	if (!request_muxed_region(base, 2, DRVNAME)) {
	98	pr_err(DRVNAME "I/O address 0x%04x already in use\n", base);
	99	return -EBUSY;
	100	}
	101
	102	/* According to the datasheet the key must be send twice. */
	103	outb(SIO_UNLOCK_KEY, base);
	104	outb(SIO_UNLOCK_KEY, base);
	105
	106	return 0;
	107	}
	108
109	static inline void superio_select(int base, int ld)
110	{
111	outb(SIO_LDSEL, base);
112	outb(ld, base + 1);
113	}
114
115	static inline void superio_exit(int base)
116	{
117	outb(SIO_LOCK_KEY, base);
118	release_region(base, 2);
119	}
120
121	/*
122	* GPIO chip.
123	*/
124
125	static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset);
126	static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset);
127	static int f7188x_gpio_direction_out(struct gpio_chip *chip,
128	unsigned offset, int value);
129	static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
130
131	#define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \
132	{ \
133	.chip = { \
134	.label = DRVNAME, \
135	.owner = THIS_MODULE, \
136	.direction_input = f7188x_gpio_direction_in, \
137	.get = f7188x_gpio_get, \
138	.direction_output = f7188x_gpio_direction_out, \
139	.set = f7188x_gpio_set, \
140	.base = _base, \
141	.ngpio = _ngpio, \
aeccc1b4	142	.can_sleep = true, \
6c17aa01 SG	143	}, \
	144	.regbase = _regbase, \
	145	}
	146
	147	#define gpio_dir(base) (base + 0)
	148	#define gpio_data_out(base) (base + 1)
	149	#define gpio_data_in(base) (base + 2)
	150	/* Output mode register (0:open drain 1:push-pull). */
	151	#define gpio_out_mode(base) (base + 3)
	152
24ccef35 AB	153	static struct f7188x_gpio_bank f71869_gpio_bank[] = {
	154	F7188X_GPIO_BANK(0, 6, 0xF0),
	155	F7188X_GPIO_BANK(10, 8, 0xE0),
	156	F7188X_GPIO_BANK(20, 8, 0xD0),
	157	F7188X_GPIO_BANK(30, 8, 0xC0),
	158	F7188X_GPIO_BANK(40, 8, 0xB0),
	159	F7188X_GPIO_BANK(50, 5, 0xA0),
	160	F7188X_GPIO_BANK(60, 6, 0x90),
	161	};
	162
7e960363 AB	163	static struct f7188x_gpio_bank f71869a_gpio_bank[] = {
	164	F7188X_GPIO_BANK(0, 6, 0xF0),
	165	F7188X_GPIO_BANK(10, 8, 0xE0),
	166	F7188X_GPIO_BANK(20, 8, 0xD0),
	167	F7188X_GPIO_BANK(30, 8, 0xC0),
	168	F7188X_GPIO_BANK(40, 8, 0xB0),
	169	F7188X_GPIO_BANK(50, 5, 0xA0),
	170	F7188X_GPIO_BANK(60, 8, 0x90),
	171	F7188X_GPIO_BANK(70, 8, 0x80),
	172	};
	173
6c17aa01	174	static struct f7188x_gpio_bank f71882_gpio_bank[] = {
38e003f4	175	F7188X_GPIO_BANK(0, 8, 0xF0),
6c17aa01 SG	176	F7188X_GPIO_BANK(10, 8, 0xE0),
	177	F7188X_GPIO_BANK(20, 8, 0xD0),
	178	F7188X_GPIO_BANK(30, 4, 0xC0),
	179	F7188X_GPIO_BANK(40, 4, 0xB0),
	180	};
	181
	182	static struct f7188x_gpio_bank f71889_gpio_bank[] = {
38e003f4	183	F7188X_GPIO_BANK(0, 7, 0xF0),
6c17aa01 SG	184	F7188X_GPIO_BANK(10, 7, 0xE0),
	185	F7188X_GPIO_BANK(20, 8, 0xD0),
	186	F7188X_GPIO_BANK(30, 8, 0xC0),
	187	F7188X_GPIO_BANK(40, 8, 0xB0),
	188	F7188X_GPIO_BANK(50, 5, 0xA0),
	189	F7188X_GPIO_BANK(60, 8, 0x90),
	190	F7188X_GPIO_BANK(70, 8, 0x80),
	191	};
	192
	193	static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
	194	{
	195	int err;
f372d5f5	196	struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
6c17aa01 SG	197	struct f7188x_sio *sio = bank->data->sio;
	198	u8 dir;
	199
	200	err = superio_enter(sio->addr);
	201	if (err)
	202	return err;
	203	superio_select(sio->addr, SIO_LD_GPIO);
	204
	205	dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
	206	dir &= ~(1 << offset);
	207	superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
	208
	209	superio_exit(sio->addr);
	210
	211	return 0;
	212	}
	213
	214	static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset)
	215	{
	216	int err;
f372d5f5	217	struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
6c17aa01 SG	218	struct f7188x_sio *sio = bank->data->sio;
	219	u8 dir, data;
	220
	221	err = superio_enter(sio->addr);
	222	if (err)
	223	return err;
	224	superio_select(sio->addr, SIO_LD_GPIO);
	225
	226	dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
	227	dir = !!(dir & (1 << offset));
	228	if (dir)
	229	data = superio_inb(sio->addr, gpio_data_out(bank->regbase));
	230	else
	231	data = superio_inb(sio->addr, gpio_data_in(bank->regbase));
	232
	233	superio_exit(sio->addr);
	234
	235	return !!(data & 1 << offset);
	236	}
	237
	238	static int f7188x_gpio_direction_out(struct gpio_chip *chip,
	239	unsigned offset, int value)
	240	{
	241	int err;
f372d5f5	242	struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
6c17aa01 SG	243	struct f7188x_sio *sio = bank->data->sio;
	244	u8 dir, data_out;
	245
	246	err = superio_enter(sio->addr);
	247	if (err)
	248	return err;
	249	superio_select(sio->addr, SIO_LD_GPIO);
	250
	251	data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
	252	if (value)
	253	data_out \|= (1 << offset);
	254	else
	255	data_out &= ~(1 << offset);
	256	superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
	257
	258	dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
	259	dir \|= (1 << offset);
	260	superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
	261
	262	superio_exit(sio->addr);
	263
	264	return 0;
	265	}
	266
	267	static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
	268	{
	269	int err;
f372d5f5	270	struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
6c17aa01 SG	271	struct f7188x_sio *sio = bank->data->sio;
	272	u8 data_out;
	273
	274	err = superio_enter(sio->addr);
	275	if (err)
	276	return;
	277	superio_select(sio->addr, SIO_LD_GPIO);
	278
	279	data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
	280	if (value)
	281	data_out \|= (1 << offset);
	282	else
	283	data_out &= ~(1 << offset);
	284	superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
	285
	286	superio_exit(sio->addr);
	287	}
	288
	289	/*
	290	* Platform device and driver.
	291	*/
	292
	293	static int f7188x_gpio_probe(struct platform_device *pdev)
	294	{
	295	int err;
	296	int i;
ab128afc	297	struct f7188x_sio *sio = dev_get_platdata(&pdev->dev);
6c17aa01 SG	298	struct f7188x_gpio_data *data;
	299
	300	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
	301	if (!data)
	302	return -ENOMEM;
	303
	304	switch (sio->type) {
24ccef35 AB	305	case f71869:
	306	data->nr_bank = ARRAY_SIZE(f71869_gpio_bank);
	307	data->bank = f71869_gpio_bank;
	308	break;
7e960363 AB	309	case f71869a:
	310	data->nr_bank = ARRAY_SIZE(f71869a_gpio_bank);
	311	data->bank = f71869a_gpio_bank;
	312	break;
6c17aa01 SG	313	case f71882fg:
	314	data->nr_bank = ARRAY_SIZE(f71882_gpio_bank);
	315	data->bank = f71882_gpio_bank;
	316	break;
	317	case f71889f:
	318	data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
	319	data->bank = f71889_gpio_bank;
	320	break;
	321	default:
	322	return -ENODEV;
	323	}
	324	data->sio = sio;
	325
	326	platform_set_drvdata(pdev, data);
	327
	328	/* For each GPIO bank, register a GPIO chip. */
	329	for (i = 0; i < data->nr_bank; i++) {
	330	struct f7188x_gpio_bank *bank = &data->bank[i];
	331
58383c78	332	bank->chip.parent = &pdev->dev;
6c17aa01 SG	333	bank->data = data;
6c17aa01 SG	334
f372d5f5	335	err = gpiochip_add_data(&bank->chip, bank);
6c17aa01 SG	336	if (err) {
	337	dev_err(&pdev->dev,
	338	"Failed to register gpiochip %d: %d\n",
	339	i, err);
	340	goto err_gpiochip;
	341	}
	342	}
	343
	344	return 0;
	345
	346	err_gpiochip:
	347	for (i = i - 1; i >= 0; i--) {
	348	struct f7188x_gpio_bank *bank = &data->bank[i];
9f5132ae	349	gpiochip_remove(&bank->chip);
6c17aa01 SG	350	}
	351
	352	return err;
	353	}
	354
	355	static int f7188x_gpio_remove(struct platform_device *pdev)
	356	{
6c17aa01 SG	357	int i;
	358	struct f7188x_gpio_data *data = platform_get_drvdata(pdev);
	359
	360	for (i = 0; i < data->nr_bank; i++) {
	361	struct f7188x_gpio_bank *bank = &data->bank[i];
9f5132ae	362	gpiochip_remove(&bank->chip);
6c17aa01 SG	363	}
	364
	365	return 0;
	366	}
	367
	368	static int __init f7188x_find(int addr, struct f7188x_sio *sio)
	369	{
	370	int err;
	371	u16 devid;
	372
	373	err = superio_enter(addr);
	374	if (err)
	375	return err;
	376
	377	err = -ENODEV;
	378	devid = superio_inw(addr, SIO_MANID);
	379	if (devid != SIO_FINTEK_ID) {
	380	pr_debug(DRVNAME ": Not a Fintek device at 0x%08x\n", addr);
	381	goto err;
	382	}
	383
	384	devid = superio_inw(addr, SIO_DEVID);
	385	switch (devid) {
24ccef35 AB	386	case SIO_F71869_ID:
	387	sio->type = f71869;
	388	break;
7e960363 AB	389	case SIO_F71869A_ID:
	390	sio->type = f71869a;
	391	break;
6c17aa01 SG	392	case SIO_F71882_ID:
	393	sio->type = f71882fg;
	394	break;
	395	case SIO_F71889_ID:
	396	sio->type = f71889f;
	397	break;
	398	default:
	399	pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
	400	goto err;
	401	}
	402	sio->addr = addr;
	403	err = 0;
	404
	405	pr_info(DRVNAME ": Found %s at %#x, revision %d\n",
	406	f7188x_names[sio->type],
	407	(unsigned int) addr,
	408	(int) superio_inb(addr, SIO_DEVREV));
	409
	410	err:
	411	superio_exit(addr);
	412	return err;
	413	}
	414
	415	static struct platform_device *f7188x_gpio_pdev;
	416
	417	static int __init
	418	f7188x_gpio_device_add(const struct f7188x_sio *sio)
	419	{
	420	int err;
	421
	422	f7188x_gpio_pdev = platform_device_alloc(DRVNAME, -1);
	423	if (!f7188x_gpio_pdev)
	424	return -ENOMEM;
	425
	426	err = platform_device_add_data(f7188x_gpio_pdev,
	427	sio, sizeof(*sio));
	428	if (err) {
	429	pr_err(DRVNAME "Platform data allocation failed\n");
	430	goto err;
	431	}
	432
	433	err = platform_device_add(f7188x_gpio_pdev);
	434	if (err) {
	435	pr_err(DRVNAME "Device addition failed\n");
	436	goto err;
	437	}
	438
	439	return 0;
	440
	441	err:
	442	platform_device_put(f7188x_gpio_pdev);
	443
	444	return err;
	445	}
	446
	447	/*
3f8f4f19	448	* Try to match a supported Fintek device by reading the (hard-wired)
6c17aa01 SG	449	* configuration I/O ports. If available, then register both the platform
	450	* device and driver to support the GPIOs.
	451	*/
	452
	453	static struct platform_driver f7188x_gpio_driver = {
	454	.driver = {
6c17aa01 SG	455	.name = DRVNAME,
	456	},
	457	.probe = f7188x_gpio_probe,
	458	.remove = f7188x_gpio_remove,
	459	};
	460
	461	static int __init f7188x_gpio_init(void)
	462	{
	463	int err;
	464	struct f7188x_sio sio;
	465
	466	if (f7188x_find(0x2e, &sio) &&
	467	f7188x_find(0x4e, &sio))
	468	return -ENODEV;
	469
	470	err = platform_driver_register(&f7188x_gpio_driver);
	471	if (!err) {
	472	err = f7188x_gpio_device_add(&sio);
	473	if (err)
	474	platform_driver_unregister(&f7188x_gpio_driver);
	475	}
	476
	477	return err;
	478	}
	479	subsys_initcall(f7188x_gpio_init);
	480
	481	static void __exit f7188x_gpio_exit(void)
	482	{
	483	platform_device_unregister(f7188x_gpio_pdev);
	484	platform_driver_unregister(&f7188x_gpio_driver);
	485	}
	486	module_exit(f7188x_gpio_exit);
	487
7e960363	488	MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG and F71889F");
6c17aa01 SG	489	MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
6c17aa01 SG	490	MODULE_LICENSE("GPL");