Commit | Line | Data |
---|---|---|
e58b9e27 | 1 | /* |
752ad5e8 | 2 | * MCP23S08 SPI/GPIO gpio expander driver |
e58b9e27 DB |
3 | */ |
4 | ||
5 | #include <linux/kernel.h> | |
6 | #include <linux/device.h> | |
e58b9e27 | 7 | #include <linux/mutex.h> |
bb207ef1 | 8 | #include <linux/module.h> |
d120c17f | 9 | #include <linux/gpio.h> |
752ad5e8 | 10 | #include <linux/i2c.h> |
e58b9e27 DB |
11 | #include <linux/spi/spi.h> |
12 | #include <linux/spi/mcp23s08.h> | |
5a0e3ad6 | 13 | #include <linux/slab.h> |
0b7bb77f | 14 | #include <asm/byteorder.h> |
e58b9e27 | 15 | |
0b7bb77f PK |
16 | /** |
17 | * MCP types supported by driver | |
18 | */ | |
19 | #define MCP_TYPE_S08 0 | |
20 | #define MCP_TYPE_S17 1 | |
752ad5e8 PK |
21 | #define MCP_TYPE_008 2 |
22 | #define MCP_TYPE_017 3 | |
e58b9e27 DB |
23 | |
24 | /* Registers are all 8 bits wide. | |
25 | * | |
26 | * The mcp23s17 has twice as many bits, and can be configured to work | |
27 | * with either 16 bit registers or with two adjacent 8 bit banks. | |
e58b9e27 DB |
28 | */ |
29 | #define MCP_IODIR 0x00 /* init/reset: all ones */ | |
30 | #define MCP_IPOL 0x01 | |
31 | #define MCP_GPINTEN 0x02 | |
32 | #define MCP_DEFVAL 0x03 | |
33 | #define MCP_INTCON 0x04 | |
34 | #define MCP_IOCON 0x05 | |
35 | # define IOCON_SEQOP (1 << 5) | |
36 | # define IOCON_HAEN (1 << 3) | |
37 | # define IOCON_ODR (1 << 2) | |
38 | # define IOCON_INTPOL (1 << 1) | |
39 | #define MCP_GPPU 0x06 | |
40 | #define MCP_INTF 0x07 | |
41 | #define MCP_INTCAP 0x08 | |
42 | #define MCP_GPIO 0x09 | |
43 | #define MCP_OLAT 0x0a | |
44 | ||
0b7bb77f PK |
45 | struct mcp23s08; |
46 | ||
47 | struct mcp23s08_ops { | |
48 | int (*read)(struct mcp23s08 *mcp, unsigned reg); | |
49 | int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val); | |
50 | int (*read_regs)(struct mcp23s08 *mcp, unsigned reg, | |
51 | u16 *vals, unsigned n); | |
52 | }; | |
53 | ||
e58b9e27 | 54 | struct mcp23s08 { |
e58b9e27 DB |
55 | u8 addr; |
56 | ||
0b7bb77f | 57 | u16 cache[11]; |
e58b9e27 DB |
58 | /* lock protects the cached values */ |
59 | struct mutex lock; | |
e58b9e27 DB |
60 | |
61 | struct gpio_chip chip; | |
62 | ||
0b7bb77f | 63 | const struct mcp23s08_ops *ops; |
d62b98f3 | 64 | void *data; /* ops specific data */ |
e58b9e27 DB |
65 | }; |
66 | ||
0b7bb77f | 67 | /* A given spi_device can represent up to eight mcp23sxx chips |
8f1cc3b1 DB |
68 | * sharing the same chipselect but using different addresses |
69 | * (e.g. chips #0 and #3 might be populated, but not #1 or $2). | |
70 | * Driver data holds all the per-chip data. | |
71 | */ | |
72 | struct mcp23s08_driver_data { | |
73 | unsigned ngpio; | |
0b7bb77f | 74 | struct mcp23s08 *mcp[8]; |
8f1cc3b1 DB |
75 | struct mcp23s08 chip[]; |
76 | }; | |
77 | ||
752ad5e8 PK |
78 | /*----------------------------------------------------------------------*/ |
79 | ||
80 | #ifdef CONFIG_I2C | |
81 | ||
82 | static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg) | |
83 | { | |
84 | return i2c_smbus_read_byte_data(mcp->data, reg); | |
85 | } | |
86 | ||
87 | static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val) | |
88 | { | |
89 | return i2c_smbus_write_byte_data(mcp->data, reg, val); | |
90 | } | |
91 | ||
92 | static int | |
93 | mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n) | |
94 | { | |
95 | while (n--) { | |
96 | int ret = mcp23008_read(mcp, reg++); | |
97 | if (ret < 0) | |
98 | return ret; | |
99 | *vals++ = ret; | |
100 | } | |
101 | ||
102 | return 0; | |
103 | } | |
104 | ||
105 | static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg) | |
106 | { | |
107 | return i2c_smbus_read_word_data(mcp->data, reg << 1); | |
108 | } | |
109 | ||
110 | static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val) | |
111 | { | |
112 | return i2c_smbus_write_word_data(mcp->data, reg << 1, val); | |
113 | } | |
114 | ||
115 | static int | |
116 | mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n) | |
117 | { | |
118 | while (n--) { | |
119 | int ret = mcp23017_read(mcp, reg++); | |
120 | if (ret < 0) | |
121 | return ret; | |
122 | *vals++ = ret; | |
123 | } | |
124 | ||
125 | return 0; | |
126 | } | |
127 | ||
128 | static const struct mcp23s08_ops mcp23008_ops = { | |
129 | .read = mcp23008_read, | |
130 | .write = mcp23008_write, | |
131 | .read_regs = mcp23008_read_regs, | |
132 | }; | |
133 | ||
134 | static const struct mcp23s08_ops mcp23017_ops = { | |
135 | .read = mcp23017_read, | |
136 | .write = mcp23017_write, | |
137 | .read_regs = mcp23017_read_regs, | |
138 | }; | |
139 | ||
140 | #endif /* CONFIG_I2C */ | |
141 | ||
142 | /*----------------------------------------------------------------------*/ | |
143 | ||
d62b98f3 PK |
144 | #ifdef CONFIG_SPI_MASTER |
145 | ||
e58b9e27 DB |
146 | static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg) |
147 | { | |
148 | u8 tx[2], rx[1]; | |
149 | int status; | |
150 | ||
151 | tx[0] = mcp->addr | 0x01; | |
152 | tx[1] = reg; | |
d62b98f3 | 153 | status = spi_write_then_read(mcp->data, tx, sizeof tx, rx, sizeof rx); |
e58b9e27 DB |
154 | return (status < 0) ? status : rx[0]; |
155 | } | |
156 | ||
0b7bb77f | 157 | static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val) |
e58b9e27 DB |
158 | { |
159 | u8 tx[3]; | |
160 | ||
161 | tx[0] = mcp->addr; | |
162 | tx[1] = reg; | |
163 | tx[2] = val; | |
d62b98f3 | 164 | return spi_write_then_read(mcp->data, tx, sizeof tx, NULL, 0); |
e58b9e27 DB |
165 | } |
166 | ||
167 | static int | |
0b7bb77f | 168 | mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n) |
e58b9e27 | 169 | { |
0b7bb77f PK |
170 | u8 tx[2], *tmp; |
171 | int status; | |
e58b9e27 DB |
172 | |
173 | if ((n + reg) > sizeof mcp->cache) | |
174 | return -EINVAL; | |
175 | tx[0] = mcp->addr | 0x01; | |
176 | tx[1] = reg; | |
0b7bb77f PK |
177 | |
178 | tmp = (u8 *)vals; | |
d62b98f3 | 179 | status = spi_write_then_read(mcp->data, tx, sizeof tx, tmp, n); |
0b7bb77f PK |
180 | if (status >= 0) { |
181 | while (n--) | |
182 | vals[n] = tmp[n]; /* expand to 16bit */ | |
183 | } | |
184 | return status; | |
185 | } | |
186 | ||
187 | static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg) | |
188 | { | |
189 | u8 tx[2], rx[2]; | |
190 | int status; | |
191 | ||
192 | tx[0] = mcp->addr | 0x01; | |
193 | tx[1] = reg << 1; | |
d62b98f3 | 194 | status = spi_write_then_read(mcp->data, tx, sizeof tx, rx, sizeof rx); |
0b7bb77f PK |
195 | return (status < 0) ? status : (rx[0] | (rx[1] << 8)); |
196 | } | |
197 | ||
198 | static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val) | |
199 | { | |
200 | u8 tx[4]; | |
201 | ||
202 | tx[0] = mcp->addr; | |
203 | tx[1] = reg << 1; | |
204 | tx[2] = val; | |
205 | tx[3] = val >> 8; | |
d62b98f3 | 206 | return spi_write_then_read(mcp->data, tx, sizeof tx, NULL, 0); |
0b7bb77f PK |
207 | } |
208 | ||
209 | static int | |
210 | mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n) | |
211 | { | |
212 | u8 tx[2]; | |
213 | int status; | |
214 | ||
215 | if ((n + reg) > sizeof mcp->cache) | |
216 | return -EINVAL; | |
217 | tx[0] = mcp->addr | 0x01; | |
218 | tx[1] = reg << 1; | |
219 | ||
d62b98f3 | 220 | status = spi_write_then_read(mcp->data, tx, sizeof tx, |
0b7bb77f PK |
221 | (u8 *)vals, n * 2); |
222 | if (status >= 0) { | |
223 | while (n--) | |
224 | vals[n] = __le16_to_cpu((__le16)vals[n]); | |
225 | } | |
226 | ||
227 | return status; | |
e58b9e27 DB |
228 | } |
229 | ||
0b7bb77f PK |
230 | static const struct mcp23s08_ops mcp23s08_ops = { |
231 | .read = mcp23s08_read, | |
232 | .write = mcp23s08_write, | |
233 | .read_regs = mcp23s08_read_regs, | |
234 | }; | |
235 | ||
236 | static const struct mcp23s08_ops mcp23s17_ops = { | |
237 | .read = mcp23s17_read, | |
238 | .write = mcp23s17_write, | |
239 | .read_regs = mcp23s17_read_regs, | |
240 | }; | |
241 | ||
d62b98f3 | 242 | #endif /* CONFIG_SPI_MASTER */ |
0b7bb77f | 243 | |
e58b9e27 DB |
244 | /*----------------------------------------------------------------------*/ |
245 | ||
246 | static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset) | |
247 | { | |
248 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); | |
249 | int status; | |
250 | ||
251 | mutex_lock(&mcp->lock); | |
252 | mcp->cache[MCP_IODIR] |= (1 << offset); | |
0b7bb77f | 253 | status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]); |
e58b9e27 DB |
254 | mutex_unlock(&mcp->lock); |
255 | return status; | |
256 | } | |
257 | ||
258 | static int mcp23s08_get(struct gpio_chip *chip, unsigned offset) | |
259 | { | |
260 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); | |
261 | int status; | |
262 | ||
263 | mutex_lock(&mcp->lock); | |
264 | ||
265 | /* REVISIT reading this clears any IRQ ... */ | |
0b7bb77f | 266 | status = mcp->ops->read(mcp, MCP_GPIO); |
e58b9e27 DB |
267 | if (status < 0) |
268 | status = 0; | |
269 | else { | |
270 | mcp->cache[MCP_GPIO] = status; | |
271 | status = !!(status & (1 << offset)); | |
272 | } | |
273 | mutex_unlock(&mcp->lock); | |
274 | return status; | |
275 | } | |
276 | ||
277 | static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value) | |
278 | { | |
0b7bb77f | 279 | unsigned olat = mcp->cache[MCP_OLAT]; |
e58b9e27 DB |
280 | |
281 | if (value) | |
282 | olat |= mask; | |
283 | else | |
284 | olat &= ~mask; | |
285 | mcp->cache[MCP_OLAT] = olat; | |
0b7bb77f | 286 | return mcp->ops->write(mcp, MCP_OLAT, olat); |
e58b9e27 DB |
287 | } |
288 | ||
289 | static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value) | |
290 | { | |
291 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); | |
0b7bb77f | 292 | unsigned mask = 1 << offset; |
e58b9e27 DB |
293 | |
294 | mutex_lock(&mcp->lock); | |
295 | __mcp23s08_set(mcp, mask, value); | |
296 | mutex_unlock(&mcp->lock); | |
297 | } | |
298 | ||
299 | static int | |
300 | mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value) | |
301 | { | |
302 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); | |
0b7bb77f | 303 | unsigned mask = 1 << offset; |
e58b9e27 DB |
304 | int status; |
305 | ||
306 | mutex_lock(&mcp->lock); | |
307 | status = __mcp23s08_set(mcp, mask, value); | |
308 | if (status == 0) { | |
309 | mcp->cache[MCP_IODIR] &= ~mask; | |
0b7bb77f | 310 | status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]); |
e58b9e27 DB |
311 | } |
312 | mutex_unlock(&mcp->lock); | |
313 | return status; | |
314 | } | |
315 | ||
316 | /*----------------------------------------------------------------------*/ | |
317 | ||
318 | #ifdef CONFIG_DEBUG_FS | |
319 | ||
320 | #include <linux/seq_file.h> | |
321 | ||
322 | /* | |
323 | * This shows more info than the generic gpio dump code: | |
324 | * pullups, deglitching, open drain drive. | |
325 | */ | |
326 | static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip) | |
327 | { | |
328 | struct mcp23s08 *mcp; | |
329 | char bank; | |
1d1c1d9b | 330 | int t; |
e58b9e27 DB |
331 | unsigned mask; |
332 | ||
333 | mcp = container_of(chip, struct mcp23s08, chip); | |
334 | ||
335 | /* NOTE: we only handle one bank for now ... */ | |
0b7bb77f | 336 | bank = '0' + ((mcp->addr >> 1) & 0x7); |
e58b9e27 DB |
337 | |
338 | mutex_lock(&mcp->lock); | |
0b7bb77f | 339 | t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache)); |
e58b9e27 DB |
340 | if (t < 0) { |
341 | seq_printf(s, " I/O ERROR %d\n", t); | |
342 | goto done; | |
343 | } | |
344 | ||
0b7bb77f | 345 | for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) { |
e58b9e27 DB |
346 | const char *label; |
347 | ||
348 | label = gpiochip_is_requested(chip, t); | |
349 | if (!label) | |
350 | continue; | |
351 | ||
352 | seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s", | |
353 | chip->base + t, bank, t, label, | |
354 | (mcp->cache[MCP_IODIR] & mask) ? "in " : "out", | |
355 | (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo", | |
eb1567f7 | 356 | (mcp->cache[MCP_GPPU] & mask) ? "up" : " "); |
e58b9e27 DB |
357 | /* NOTE: ignoring the irq-related registers */ |
358 | seq_printf(s, "\n"); | |
359 | } | |
360 | done: | |
361 | mutex_unlock(&mcp->lock); | |
362 | } | |
363 | ||
364 | #else | |
365 | #define mcp23s08_dbg_show NULL | |
366 | #endif | |
367 | ||
368 | /*----------------------------------------------------------------------*/ | |
369 | ||
d62b98f3 PK |
370 | static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, |
371 | void *data, unsigned addr, | |
0b7bb77f | 372 | unsigned type, unsigned base, unsigned pullups) |
e58b9e27 | 373 | { |
d62b98f3 | 374 | int status; |
e58b9e27 | 375 | |
e58b9e27 DB |
376 | mutex_init(&mcp->lock); |
377 | ||
d62b98f3 PK |
378 | mcp->data = data; |
379 | mcp->addr = addr; | |
e58b9e27 | 380 | |
e58b9e27 DB |
381 | mcp->chip.direction_input = mcp23s08_direction_input; |
382 | mcp->chip.get = mcp23s08_get; | |
383 | mcp->chip.direction_output = mcp23s08_direction_output; | |
384 | mcp->chip.set = mcp23s08_set; | |
385 | mcp->chip.dbg_show = mcp23s08_dbg_show; | |
386 | ||
d62b98f3 PK |
387 | switch (type) { |
388 | #ifdef CONFIG_SPI_MASTER | |
389 | case MCP_TYPE_S08: | |
0b7bb77f PK |
390 | mcp->ops = &mcp23s08_ops; |
391 | mcp->chip.ngpio = 8; | |
392 | mcp->chip.label = "mcp23s08"; | |
d62b98f3 PK |
393 | break; |
394 | ||
395 | case MCP_TYPE_S17: | |
396 | mcp->ops = &mcp23s17_ops; | |
397 | mcp->chip.ngpio = 16; | |
398 | mcp->chip.label = "mcp23s17"; | |
399 | break; | |
400 | #endif /* CONFIG_SPI_MASTER */ | |
401 | ||
752ad5e8 PK |
402 | #ifdef CONFIG_I2C |
403 | case MCP_TYPE_008: | |
404 | mcp->ops = &mcp23008_ops; | |
405 | mcp->chip.ngpio = 8; | |
406 | mcp->chip.label = "mcp23008"; | |
407 | break; | |
408 | ||
409 | case MCP_TYPE_017: | |
410 | mcp->ops = &mcp23017_ops; | |
411 | mcp->chip.ngpio = 16; | |
412 | mcp->chip.label = "mcp23017"; | |
413 | break; | |
414 | #endif /* CONFIG_I2C */ | |
415 | ||
d62b98f3 PK |
416 | default: |
417 | dev_err(dev, "invalid device type (%d)\n", type); | |
418 | return -EINVAL; | |
0b7bb77f | 419 | } |
d62b98f3 | 420 | |
8f1cc3b1 | 421 | mcp->chip.base = base; |
e58b9e27 | 422 | mcp->chip.can_sleep = 1; |
d62b98f3 | 423 | mcp->chip.dev = dev; |
d72cbed0 | 424 | mcp->chip.owner = THIS_MODULE; |
e58b9e27 | 425 | |
8f1cc3b1 DB |
426 | /* verify MCP_IOCON.SEQOP = 0, so sequential reads work, |
427 | * and MCP_IOCON.HAEN = 1, so we work with all chips. | |
428 | */ | |
0b7bb77f | 429 | status = mcp->ops->read(mcp, MCP_IOCON); |
e58b9e27 DB |
430 | if (status < 0) |
431 | goto fail; | |
8f1cc3b1 | 432 | if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN)) { |
0b7bb77f PK |
433 | /* mcp23s17 has IOCON twice, make sure they are in sync */ |
434 | status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8)); | |
435 | status |= IOCON_HAEN | (IOCON_HAEN << 8); | |
436 | status = mcp->ops->write(mcp, MCP_IOCON, status); | |
e58b9e27 DB |
437 | if (status < 0) |
438 | goto fail; | |
439 | } | |
440 | ||
441 | /* configure ~100K pullups */ | |
0b7bb77f | 442 | status = mcp->ops->write(mcp, MCP_GPPU, pullups); |
e58b9e27 DB |
443 | if (status < 0) |
444 | goto fail; | |
445 | ||
0b7bb77f | 446 | status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache)); |
e58b9e27 DB |
447 | if (status < 0) |
448 | goto fail; | |
449 | ||
450 | /* disable inverter on input */ | |
451 | if (mcp->cache[MCP_IPOL] != 0) { | |
452 | mcp->cache[MCP_IPOL] = 0; | |
0b7bb77f PK |
453 | status = mcp->ops->write(mcp, MCP_IPOL, 0); |
454 | if (status < 0) | |
455 | goto fail; | |
e58b9e27 DB |
456 | } |
457 | ||
458 | /* disable irqs */ | |
459 | if (mcp->cache[MCP_GPINTEN] != 0) { | |
460 | mcp->cache[MCP_GPINTEN] = 0; | |
0b7bb77f | 461 | status = mcp->ops->write(mcp, MCP_GPINTEN, 0); |
8f1cc3b1 DB |
462 | if (status < 0) |
463 | goto fail; | |
e58b9e27 DB |
464 | } |
465 | ||
466 | status = gpiochip_add(&mcp->chip); | |
8f1cc3b1 DB |
467 | fail: |
468 | if (status < 0) | |
d62b98f3 PK |
469 | dev_dbg(dev, "can't setup chip %d, --> %d\n", |
470 | addr, status); | |
8f1cc3b1 DB |
471 | return status; |
472 | } | |
473 | ||
752ad5e8 PK |
474 | /*----------------------------------------------------------------------*/ |
475 | ||
476 | #ifdef CONFIG_I2C | |
477 | ||
478 | static int __devinit mcp230xx_probe(struct i2c_client *client, | |
479 | const struct i2c_device_id *id) | |
480 | { | |
481 | struct mcp23s08_platform_data *pdata; | |
482 | struct mcp23s08 *mcp; | |
483 | int status; | |
484 | ||
485 | pdata = client->dev.platform_data; | |
486 | if (!pdata || !gpio_is_valid(pdata->base)) { | |
487 | dev_dbg(&client->dev, "invalid or missing platform data\n"); | |
488 | return -EINVAL; | |
489 | } | |
490 | ||
491 | mcp = kzalloc(sizeof *mcp, GFP_KERNEL); | |
492 | if (!mcp) | |
493 | return -ENOMEM; | |
494 | ||
495 | status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr, | |
496 | id->driver_data, pdata->base, | |
497 | pdata->chip[0].pullups); | |
498 | if (status) | |
499 | goto fail; | |
500 | ||
501 | i2c_set_clientdata(client, mcp); | |
502 | ||
503 | return 0; | |
504 | ||
505 | fail: | |
506 | kfree(mcp); | |
507 | ||
508 | return status; | |
509 | } | |
510 | ||
511 | static int __devexit mcp230xx_remove(struct i2c_client *client) | |
512 | { | |
513 | struct mcp23s08 *mcp = i2c_get_clientdata(client); | |
514 | int status; | |
515 | ||
516 | status = gpiochip_remove(&mcp->chip); | |
517 | if (status == 0) | |
518 | kfree(mcp); | |
519 | ||
520 | return status; | |
521 | } | |
522 | ||
523 | static const struct i2c_device_id mcp230xx_id[] = { | |
524 | { "mcp23008", MCP_TYPE_008 }, | |
525 | { "mcp23017", MCP_TYPE_017 }, | |
526 | { }, | |
527 | }; | |
528 | MODULE_DEVICE_TABLE(i2c, mcp230xx_id); | |
529 | ||
530 | static struct i2c_driver mcp230xx_driver = { | |
531 | .driver = { | |
532 | .name = "mcp230xx", | |
533 | .owner = THIS_MODULE, | |
534 | }, | |
535 | .probe = mcp230xx_probe, | |
536 | .remove = __devexit_p(mcp230xx_remove), | |
537 | .id_table = mcp230xx_id, | |
538 | }; | |
539 | ||
540 | static int __init mcp23s08_i2c_init(void) | |
541 | { | |
542 | return i2c_add_driver(&mcp230xx_driver); | |
543 | } | |
544 | ||
545 | static void mcp23s08_i2c_exit(void) | |
546 | { | |
547 | i2c_del_driver(&mcp230xx_driver); | |
548 | } | |
549 | ||
550 | #else | |
551 | ||
552 | static int __init mcp23s08_i2c_init(void) { return 0; } | |
553 | static void mcp23s08_i2c_exit(void) { } | |
554 | ||
555 | #endif /* CONFIG_I2C */ | |
556 | ||
557 | /*----------------------------------------------------------------------*/ | |
558 | ||
d62b98f3 PK |
559 | #ifdef CONFIG_SPI_MASTER |
560 | ||
8f1cc3b1 DB |
561 | static int mcp23s08_probe(struct spi_device *spi) |
562 | { | |
563 | struct mcp23s08_platform_data *pdata; | |
564 | unsigned addr; | |
565 | unsigned chips = 0; | |
566 | struct mcp23s08_driver_data *data; | |
0b7bb77f | 567 | int status, type; |
8f1cc3b1 DB |
568 | unsigned base; |
569 | ||
0b7bb77f PK |
570 | type = spi_get_device_id(spi)->driver_data; |
571 | ||
8f1cc3b1 | 572 | pdata = spi->dev.platform_data; |
a342d215 BD |
573 | if (!pdata || !gpio_is_valid(pdata->base)) { |
574 | dev_dbg(&spi->dev, "invalid or missing platform data\n"); | |
575 | return -EINVAL; | |
576 | } | |
8f1cc3b1 | 577 | |
0b7bb77f | 578 | for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) { |
8f1cc3b1 DB |
579 | if (!pdata->chip[addr].is_present) |
580 | continue; | |
581 | chips++; | |
0b7bb77f PK |
582 | if ((type == MCP_TYPE_S08) && (addr > 3)) { |
583 | dev_err(&spi->dev, | |
584 | "mcp23s08 only supports address 0..3\n"); | |
585 | return -EINVAL; | |
586 | } | |
8f1cc3b1 DB |
587 | } |
588 | if (!chips) | |
589 | return -ENODEV; | |
590 | ||
591 | data = kzalloc(sizeof *data + chips * sizeof(struct mcp23s08), | |
592 | GFP_KERNEL); | |
593 | if (!data) | |
594 | return -ENOMEM; | |
595 | spi_set_drvdata(spi, data); | |
596 | ||
597 | base = pdata->base; | |
0b7bb77f | 598 | for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) { |
8f1cc3b1 DB |
599 | if (!pdata->chip[addr].is_present) |
600 | continue; | |
601 | chips--; | |
602 | data->mcp[addr] = &data->chip[chips]; | |
d62b98f3 PK |
603 | status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi, |
604 | 0x40 | (addr << 1), type, base, | |
0b7bb77f | 605 | pdata->chip[addr].pullups); |
8f1cc3b1 DB |
606 | if (status < 0) |
607 | goto fail; | |
0b7bb77f PK |
608 | |
609 | base += (type == MCP_TYPE_S17) ? 16 : 8; | |
8f1cc3b1 DB |
610 | } |
611 | data->ngpio = base - pdata->base; | |
e58b9e27 DB |
612 | |
613 | /* NOTE: these chips have a relatively sane IRQ framework, with | |
614 | * per-signal masking and level/edge triggering. It's not yet | |
615 | * handled here... | |
616 | */ | |
617 | ||
e58b9e27 DB |
618 | return 0; |
619 | ||
620 | fail: | |
0b7bb77f | 621 | for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) { |
8f1cc3b1 DB |
622 | int tmp; |
623 | ||
624 | if (!data->mcp[addr]) | |
625 | continue; | |
626 | tmp = gpiochip_remove(&data->mcp[addr]->chip); | |
627 | if (tmp < 0) | |
628 | dev_err(&spi->dev, "%s --> %d\n", "remove", tmp); | |
629 | } | |
630 | kfree(data); | |
e58b9e27 DB |
631 | return status; |
632 | } | |
633 | ||
634 | static int mcp23s08_remove(struct spi_device *spi) | |
635 | { | |
8f1cc3b1 | 636 | struct mcp23s08_driver_data *data = spi_get_drvdata(spi); |
8f1cc3b1 | 637 | unsigned addr; |
e58b9e27 DB |
638 | int status = 0; |
639 | ||
0b7bb77f | 640 | for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) { |
8f1cc3b1 DB |
641 | int tmp; |
642 | ||
643 | if (!data->mcp[addr]) | |
644 | continue; | |
645 | ||
646 | tmp = gpiochip_remove(&data->mcp[addr]->chip); | |
647 | if (tmp < 0) { | |
648 | dev_err(&spi->dev, "%s --> %d\n", "remove", tmp); | |
649 | status = tmp; | |
650 | } | |
651 | } | |
e58b9e27 | 652 | if (status == 0) |
8f1cc3b1 | 653 | kfree(data); |
e58b9e27 DB |
654 | return status; |
655 | } | |
656 | ||
0b7bb77f PK |
657 | static const struct spi_device_id mcp23s08_ids[] = { |
658 | { "mcp23s08", MCP_TYPE_S08 }, | |
659 | { "mcp23s17", MCP_TYPE_S17 }, | |
660 | { }, | |
661 | }; | |
662 | MODULE_DEVICE_TABLE(spi, mcp23s08_ids); | |
663 | ||
e58b9e27 DB |
664 | static struct spi_driver mcp23s08_driver = { |
665 | .probe = mcp23s08_probe, | |
666 | .remove = mcp23s08_remove, | |
0b7bb77f | 667 | .id_table = mcp23s08_ids, |
e58b9e27 DB |
668 | .driver = { |
669 | .name = "mcp23s08", | |
670 | .owner = THIS_MODULE, | |
671 | }, | |
672 | }; | |
673 | ||
d62b98f3 PK |
674 | static int __init mcp23s08_spi_init(void) |
675 | { | |
676 | return spi_register_driver(&mcp23s08_driver); | |
677 | } | |
678 | ||
679 | static void mcp23s08_spi_exit(void) | |
680 | { | |
681 | spi_unregister_driver(&mcp23s08_driver); | |
682 | } | |
683 | ||
684 | #else | |
685 | ||
686 | static int __init mcp23s08_spi_init(void) { return 0; } | |
687 | static void mcp23s08_spi_exit(void) { } | |
688 | ||
689 | #endif /* CONFIG_SPI_MASTER */ | |
690 | ||
e58b9e27 DB |
691 | /*----------------------------------------------------------------------*/ |
692 | ||
693 | static int __init mcp23s08_init(void) | |
694 | { | |
752ad5e8 PK |
695 | int ret; |
696 | ||
697 | ret = mcp23s08_spi_init(); | |
698 | if (ret) | |
699 | goto spi_fail; | |
700 | ||
701 | ret = mcp23s08_i2c_init(); | |
702 | if (ret) | |
703 | goto i2c_fail; | |
704 | ||
705 | return 0; | |
706 | ||
707 | i2c_fail: | |
708 | mcp23s08_spi_exit(); | |
709 | spi_fail: | |
710 | return ret; | |
e58b9e27 | 711 | } |
752ad5e8 | 712 | /* register after spi/i2c postcore initcall and before |
673c0c00 DB |
713 | * subsys initcalls that may rely on these GPIOs |
714 | */ | |
715 | subsys_initcall(mcp23s08_init); | |
e58b9e27 DB |
716 | |
717 | static void __exit mcp23s08_exit(void) | |
718 | { | |
d62b98f3 | 719 | mcp23s08_spi_exit(); |
752ad5e8 | 720 | mcp23s08_i2c_exit(); |
e58b9e27 DB |
721 | } |
722 | module_exit(mcp23s08_exit); | |
723 | ||
724 | MODULE_LICENSE("GPL"); |