Commit | Line | Data |
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9e60fdcf | 1 | /* |
c103de24 | 2 | * PCA953x 4/8/16 bit I/O ports |
9e60fdcf | 3 | * |
4 | * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> | |
5 | * Copyright (C) 2007 Marvell International Ltd. | |
6 | * | |
7 | * Derived from drivers/i2c/chips/pca9539.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; version 2 of the License. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/init.h> | |
d120c17f | 16 | #include <linux/gpio.h> |
89ea8bbe MZ |
17 | #include <linux/interrupt.h> |
18 | #include <linux/irq.h> | |
9e60fdcf | 19 | #include <linux/i2c.h> |
d1c057e3 | 20 | #include <linux/i2c/pca953x.h> |
5a0e3ad6 | 21 | #include <linux/slab.h> |
1965d303 NC |
22 | #ifdef CONFIG_OF_GPIO |
23 | #include <linux/of_platform.h> | |
24 | #include <linux/of_gpio.h> | |
25 | #endif | |
9e60fdcf | 26 | |
33226ffd HZ |
27 | #define PCA953X_INPUT 0 |
28 | #define PCA953X_OUTPUT 1 | |
29 | #define PCA953X_INVERT 2 | |
30 | #define PCA953X_DIRECTION 3 | |
31 | ||
32 | #define PCA957X_IN 0 | |
33 | #define PCA957X_INVRT 1 | |
34 | #define PCA957X_BKEN 2 | |
35 | #define PCA957X_PUPD 3 | |
36 | #define PCA957X_CFG 4 | |
37 | #define PCA957X_OUT 5 | |
38 | #define PCA957X_MSK 6 | |
39 | #define PCA957X_INTS 7 | |
40 | ||
41 | #define PCA_GPIO_MASK 0x00FF | |
42 | #define PCA_INT 0x0100 | |
43 | #define PCA953X_TYPE 0x1000 | |
44 | #define PCA957X_TYPE 0x2000 | |
89ea8bbe | 45 | |
3760f736 | 46 | static const struct i2c_device_id pca953x_id[] = { |
33226ffd HZ |
47 | { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, |
48 | { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, | |
49 | { "pca9536", 4 | PCA953X_TYPE, }, | |
50 | { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, | |
51 | { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, | |
52 | { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, | |
53 | { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, | |
54 | { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, | |
55 | { "pca9556", 8 | PCA953X_TYPE, }, | |
56 | { "pca9557", 8 | PCA953X_TYPE, }, | |
57 | { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, | |
58 | { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, | |
59 | ||
60 | { "max7310", 8 | PCA953X_TYPE, }, | |
61 | { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, | |
62 | { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, | |
63 | { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, | |
64 | { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, | |
65 | { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, | |
66 | { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, | |
ab5dc372 | 67 | /* NYET: { "tca6424", 24, }, */ |
3760f736 | 68 | { } |
f5e8ff48 | 69 | }; |
3760f736 | 70 | MODULE_DEVICE_TABLE(i2c, pca953x_id); |
9e60fdcf | 71 | |
f3dc3630 | 72 | struct pca953x_chip { |
9e60fdcf | 73 | unsigned gpio_start; |
74 | uint16_t reg_output; | |
75 | uint16_t reg_direction; | |
6e20fb18 | 76 | struct mutex i2c_lock; |
9e60fdcf | 77 | |
89ea8bbe MZ |
78 | #ifdef CONFIG_GPIO_PCA953X_IRQ |
79 | struct mutex irq_lock; | |
80 | uint16_t irq_mask; | |
81 | uint16_t irq_stat; | |
82 | uint16_t irq_trig_raise; | |
83 | uint16_t irq_trig_fall; | |
84 | int irq_base; | |
85 | #endif | |
86 | ||
9e60fdcf | 87 | struct i2c_client *client; |
1965d303 | 88 | struct pca953x_platform_data *dyn_pdata; |
9e60fdcf | 89 | struct gpio_chip gpio_chip; |
62154991 | 90 | const char *const *names; |
33226ffd | 91 | int chip_type; |
9e60fdcf | 92 | }; |
93 | ||
f3dc3630 | 94 | static int pca953x_write_reg(struct pca953x_chip *chip, int reg, uint16_t val) |
9e60fdcf | 95 | { |
33226ffd | 96 | int ret = 0; |
f5e8ff48 GL |
97 | |
98 | if (chip->gpio_chip.ngpio <= 8) | |
99 | ret = i2c_smbus_write_byte_data(chip->client, reg, val); | |
33226ffd HZ |
100 | else { |
101 | switch (chip->chip_type) { | |
102 | case PCA953X_TYPE: | |
103 | ret = i2c_smbus_write_word_data(chip->client, | |
104 | reg << 1, val); | |
105 | break; | |
106 | case PCA957X_TYPE: | |
107 | ret = i2c_smbus_write_byte_data(chip->client, reg << 1, | |
108 | val & 0xff); | |
109 | if (ret < 0) | |
110 | break; | |
111 | ret = i2c_smbus_write_byte_data(chip->client, | |
112 | (reg << 1) + 1, | |
113 | (val & 0xff00) >> 8); | |
114 | break; | |
115 | } | |
116 | } | |
f5e8ff48 GL |
117 | |
118 | if (ret < 0) { | |
119 | dev_err(&chip->client->dev, "failed writing register\n"); | |
ab5dc372 | 120 | return ret; |
f5e8ff48 GL |
121 | } |
122 | ||
123 | return 0; | |
9e60fdcf | 124 | } |
125 | ||
f3dc3630 | 126 | static int pca953x_read_reg(struct pca953x_chip *chip, int reg, uint16_t *val) |
9e60fdcf | 127 | { |
128 | int ret; | |
129 | ||
f5e8ff48 GL |
130 | if (chip->gpio_chip.ngpio <= 8) |
131 | ret = i2c_smbus_read_byte_data(chip->client, reg); | |
132 | else | |
133 | ret = i2c_smbus_read_word_data(chip->client, reg << 1); | |
134 | ||
9e60fdcf | 135 | if (ret < 0) { |
136 | dev_err(&chip->client->dev, "failed reading register\n"); | |
ab5dc372 | 137 | return ret; |
9e60fdcf | 138 | } |
139 | ||
140 | *val = (uint16_t)ret; | |
141 | return 0; | |
142 | } | |
143 | ||
f3dc3630 | 144 | static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) |
9e60fdcf | 145 | { |
f3dc3630 | 146 | struct pca953x_chip *chip; |
9e60fdcf | 147 | uint16_t reg_val; |
33226ffd | 148 | int ret, offset = 0; |
9e60fdcf | 149 | |
f3dc3630 | 150 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
9e60fdcf | 151 | |
6e20fb18 | 152 | mutex_lock(&chip->i2c_lock); |
9e60fdcf | 153 | reg_val = chip->reg_direction | (1u << off); |
33226ffd HZ |
154 | |
155 | switch (chip->chip_type) { | |
156 | case PCA953X_TYPE: | |
157 | offset = PCA953X_DIRECTION; | |
158 | break; | |
159 | case PCA957X_TYPE: | |
160 | offset = PCA957X_CFG; | |
161 | break; | |
162 | } | |
163 | ret = pca953x_write_reg(chip, offset, reg_val); | |
9e60fdcf | 164 | if (ret) |
6e20fb18 | 165 | goto exit; |
9e60fdcf | 166 | |
167 | chip->reg_direction = reg_val; | |
6e20fb18 RS |
168 | ret = 0; |
169 | exit: | |
170 | mutex_unlock(&chip->i2c_lock); | |
171 | return ret; | |
9e60fdcf | 172 | } |
173 | ||
f3dc3630 | 174 | static int pca953x_gpio_direction_output(struct gpio_chip *gc, |
9e60fdcf | 175 | unsigned off, int val) |
176 | { | |
f3dc3630 | 177 | struct pca953x_chip *chip; |
9e60fdcf | 178 | uint16_t reg_val; |
33226ffd | 179 | int ret, offset = 0; |
9e60fdcf | 180 | |
f3dc3630 | 181 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
9e60fdcf | 182 | |
6e20fb18 | 183 | mutex_lock(&chip->i2c_lock); |
9e60fdcf | 184 | /* set output level */ |
185 | if (val) | |
186 | reg_val = chip->reg_output | (1u << off); | |
187 | else | |
188 | reg_val = chip->reg_output & ~(1u << off); | |
189 | ||
33226ffd HZ |
190 | switch (chip->chip_type) { |
191 | case PCA953X_TYPE: | |
192 | offset = PCA953X_OUTPUT; | |
193 | break; | |
194 | case PCA957X_TYPE: | |
195 | offset = PCA957X_OUT; | |
196 | break; | |
197 | } | |
198 | ret = pca953x_write_reg(chip, offset, reg_val); | |
9e60fdcf | 199 | if (ret) |
6e20fb18 | 200 | goto exit; |
9e60fdcf | 201 | |
202 | chip->reg_output = reg_val; | |
203 | ||
204 | /* then direction */ | |
205 | reg_val = chip->reg_direction & ~(1u << off); | |
33226ffd HZ |
206 | switch (chip->chip_type) { |
207 | case PCA953X_TYPE: | |
208 | offset = PCA953X_DIRECTION; | |
209 | break; | |
210 | case PCA957X_TYPE: | |
211 | offset = PCA957X_CFG; | |
212 | break; | |
213 | } | |
214 | ret = pca953x_write_reg(chip, offset, reg_val); | |
9e60fdcf | 215 | if (ret) |
6e20fb18 | 216 | goto exit; |
9e60fdcf | 217 | |
218 | chip->reg_direction = reg_val; | |
6e20fb18 RS |
219 | ret = 0; |
220 | exit: | |
221 | mutex_unlock(&chip->i2c_lock); | |
222 | return ret; | |
9e60fdcf | 223 | } |
224 | ||
f3dc3630 | 225 | static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) |
9e60fdcf | 226 | { |
f3dc3630 | 227 | struct pca953x_chip *chip; |
9e60fdcf | 228 | uint16_t reg_val; |
33226ffd | 229 | int ret, offset = 0; |
9e60fdcf | 230 | |
f3dc3630 | 231 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
9e60fdcf | 232 | |
6e20fb18 | 233 | mutex_lock(&chip->i2c_lock); |
33226ffd HZ |
234 | switch (chip->chip_type) { |
235 | case PCA953X_TYPE: | |
236 | offset = PCA953X_INPUT; | |
237 | break; | |
238 | case PCA957X_TYPE: | |
239 | offset = PCA957X_IN; | |
240 | break; | |
241 | } | |
242 | ret = pca953x_read_reg(chip, offset, ®_val); | |
6e20fb18 | 243 | mutex_unlock(&chip->i2c_lock); |
9e60fdcf | 244 | if (ret < 0) { |
245 | /* NOTE: diagnostic already emitted; that's all we should | |
246 | * do unless gpio_*_value_cansleep() calls become different | |
247 | * from their nonsleeping siblings (and report faults). | |
248 | */ | |
249 | return 0; | |
250 | } | |
251 | ||
252 | return (reg_val & (1u << off)) ? 1 : 0; | |
253 | } | |
254 | ||
f3dc3630 | 255 | static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) |
9e60fdcf | 256 | { |
f3dc3630 | 257 | struct pca953x_chip *chip; |
9e60fdcf | 258 | uint16_t reg_val; |
33226ffd | 259 | int ret, offset = 0; |
9e60fdcf | 260 | |
f3dc3630 | 261 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
9e60fdcf | 262 | |
6e20fb18 | 263 | mutex_lock(&chip->i2c_lock); |
9e60fdcf | 264 | if (val) |
265 | reg_val = chip->reg_output | (1u << off); | |
266 | else | |
267 | reg_val = chip->reg_output & ~(1u << off); | |
268 | ||
33226ffd HZ |
269 | switch (chip->chip_type) { |
270 | case PCA953X_TYPE: | |
271 | offset = PCA953X_OUTPUT; | |
272 | break; | |
273 | case PCA957X_TYPE: | |
274 | offset = PCA957X_OUT; | |
275 | break; | |
276 | } | |
277 | ret = pca953x_write_reg(chip, offset, reg_val); | |
9e60fdcf | 278 | if (ret) |
6e20fb18 | 279 | goto exit; |
9e60fdcf | 280 | |
281 | chip->reg_output = reg_val; | |
6e20fb18 RS |
282 | exit: |
283 | mutex_unlock(&chip->i2c_lock); | |
9e60fdcf | 284 | } |
285 | ||
f5e8ff48 | 286 | static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) |
9e60fdcf | 287 | { |
288 | struct gpio_chip *gc; | |
289 | ||
290 | gc = &chip->gpio_chip; | |
291 | ||
f3dc3630 GL |
292 | gc->direction_input = pca953x_gpio_direction_input; |
293 | gc->direction_output = pca953x_gpio_direction_output; | |
294 | gc->get = pca953x_gpio_get_value; | |
295 | gc->set = pca953x_gpio_set_value; | |
84207805 | 296 | gc->can_sleep = 1; |
9e60fdcf | 297 | |
298 | gc->base = chip->gpio_start; | |
f5e8ff48 GL |
299 | gc->ngpio = gpios; |
300 | gc->label = chip->client->name; | |
d8f388d8 | 301 | gc->dev = &chip->client->dev; |
d72cbed0 | 302 | gc->owner = THIS_MODULE; |
77906a54 | 303 | gc->names = chip->names; |
9e60fdcf | 304 | } |
305 | ||
89ea8bbe MZ |
306 | #ifdef CONFIG_GPIO_PCA953X_IRQ |
307 | static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off) | |
308 | { | |
309 | struct pca953x_chip *chip; | |
310 | ||
311 | chip = container_of(gc, struct pca953x_chip, gpio_chip); | |
312 | return chip->irq_base + off; | |
313 | } | |
314 | ||
6f5cfc0e | 315 | static void pca953x_irq_mask(struct irq_data *d) |
89ea8bbe | 316 | { |
6f5cfc0e | 317 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
89ea8bbe | 318 | |
6f5cfc0e | 319 | chip->irq_mask &= ~(1 << (d->irq - chip->irq_base)); |
89ea8bbe MZ |
320 | } |
321 | ||
6f5cfc0e | 322 | static void pca953x_irq_unmask(struct irq_data *d) |
89ea8bbe | 323 | { |
6f5cfc0e | 324 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
89ea8bbe | 325 | |
6f5cfc0e | 326 | chip->irq_mask |= 1 << (d->irq - chip->irq_base); |
89ea8bbe MZ |
327 | } |
328 | ||
6f5cfc0e | 329 | static void pca953x_irq_bus_lock(struct irq_data *d) |
89ea8bbe | 330 | { |
6f5cfc0e | 331 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
89ea8bbe MZ |
332 | |
333 | mutex_lock(&chip->irq_lock); | |
334 | } | |
335 | ||
6f5cfc0e | 336 | static void pca953x_irq_bus_sync_unlock(struct irq_data *d) |
89ea8bbe | 337 | { |
6f5cfc0e | 338 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
a2cb9aeb MZ |
339 | uint16_t new_irqs; |
340 | uint16_t level; | |
341 | ||
342 | /* Look for any newly setup interrupt */ | |
343 | new_irqs = chip->irq_trig_fall | chip->irq_trig_raise; | |
344 | new_irqs &= ~chip->reg_direction; | |
345 | ||
346 | while (new_irqs) { | |
347 | level = __ffs(new_irqs); | |
348 | pca953x_gpio_direction_input(&chip->gpio_chip, level); | |
349 | new_irqs &= ~(1 << level); | |
350 | } | |
89ea8bbe MZ |
351 | |
352 | mutex_unlock(&chip->irq_lock); | |
353 | } | |
354 | ||
6f5cfc0e | 355 | static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) |
89ea8bbe | 356 | { |
6f5cfc0e LB |
357 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
358 | uint16_t level = d->irq - chip->irq_base; | |
89ea8bbe MZ |
359 | uint16_t mask = 1 << level; |
360 | ||
361 | if (!(type & IRQ_TYPE_EDGE_BOTH)) { | |
362 | dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", | |
6f5cfc0e | 363 | d->irq, type); |
89ea8bbe MZ |
364 | return -EINVAL; |
365 | } | |
366 | ||
367 | if (type & IRQ_TYPE_EDGE_FALLING) | |
368 | chip->irq_trig_fall |= mask; | |
369 | else | |
370 | chip->irq_trig_fall &= ~mask; | |
371 | ||
372 | if (type & IRQ_TYPE_EDGE_RISING) | |
373 | chip->irq_trig_raise |= mask; | |
374 | else | |
375 | chip->irq_trig_raise &= ~mask; | |
376 | ||
a2cb9aeb | 377 | return 0; |
89ea8bbe MZ |
378 | } |
379 | ||
380 | static struct irq_chip pca953x_irq_chip = { | |
381 | .name = "pca953x", | |
6f5cfc0e LB |
382 | .irq_mask = pca953x_irq_mask, |
383 | .irq_unmask = pca953x_irq_unmask, | |
384 | .irq_bus_lock = pca953x_irq_bus_lock, | |
385 | .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock, | |
386 | .irq_set_type = pca953x_irq_set_type, | |
89ea8bbe MZ |
387 | }; |
388 | ||
389 | static uint16_t pca953x_irq_pending(struct pca953x_chip *chip) | |
390 | { | |
391 | uint16_t cur_stat; | |
392 | uint16_t old_stat; | |
393 | uint16_t pending; | |
394 | uint16_t trigger; | |
33226ffd HZ |
395 | int ret, offset = 0; |
396 | ||
397 | switch (chip->chip_type) { | |
398 | case PCA953X_TYPE: | |
399 | offset = PCA953X_INPUT; | |
400 | break; | |
401 | case PCA957X_TYPE: | |
402 | offset = PCA957X_IN; | |
403 | break; | |
404 | } | |
405 | ret = pca953x_read_reg(chip, offset, &cur_stat); | |
89ea8bbe MZ |
406 | if (ret) |
407 | return 0; | |
408 | ||
409 | /* Remove output pins from the equation */ | |
410 | cur_stat &= chip->reg_direction; | |
411 | ||
412 | old_stat = chip->irq_stat; | |
413 | trigger = (cur_stat ^ old_stat) & chip->irq_mask; | |
414 | ||
415 | if (!trigger) | |
416 | return 0; | |
417 | ||
418 | chip->irq_stat = cur_stat; | |
419 | ||
420 | pending = (old_stat & chip->irq_trig_fall) | | |
421 | (cur_stat & chip->irq_trig_raise); | |
422 | pending &= trigger; | |
423 | ||
424 | return pending; | |
425 | } | |
426 | ||
427 | static irqreturn_t pca953x_irq_handler(int irq, void *devid) | |
428 | { | |
429 | struct pca953x_chip *chip = devid; | |
430 | uint16_t pending; | |
431 | uint16_t level; | |
432 | ||
433 | pending = pca953x_irq_pending(chip); | |
434 | ||
435 | if (!pending) | |
436 | return IRQ_HANDLED; | |
437 | ||
438 | do { | |
439 | level = __ffs(pending); | |
6dd599f8 | 440 | handle_nested_irq(level + chip->irq_base); |
89ea8bbe MZ |
441 | |
442 | pending &= ~(1 << level); | |
443 | } while (pending); | |
444 | ||
445 | return IRQ_HANDLED; | |
446 | } | |
447 | ||
448 | static int pca953x_irq_setup(struct pca953x_chip *chip, | |
449 | const struct i2c_device_id *id) | |
450 | { | |
451 | struct i2c_client *client = chip->client; | |
452 | struct pca953x_platform_data *pdata = client->dev.platform_data; | |
33226ffd | 453 | int ret, offset = 0; |
89ea8bbe | 454 | |
8a233f01 | 455 | if (pdata->irq_base != -1 |
33226ffd | 456 | && (id->driver_data & PCA_INT)) { |
89ea8bbe MZ |
457 | int lvl; |
458 | ||
33226ffd HZ |
459 | switch (chip->chip_type) { |
460 | case PCA953X_TYPE: | |
461 | offset = PCA953X_INPUT; | |
462 | break; | |
463 | case PCA957X_TYPE: | |
464 | offset = PCA957X_IN; | |
465 | break; | |
466 | } | |
467 | ret = pca953x_read_reg(chip, offset, &chip->irq_stat); | |
89ea8bbe MZ |
468 | if (ret) |
469 | goto out_failed; | |
470 | ||
471 | /* | |
472 | * There is no way to know which GPIO line generated the | |
473 | * interrupt. We have to rely on the previous read for | |
474 | * this purpose. | |
475 | */ | |
476 | chip->irq_stat &= chip->reg_direction; | |
89ea8bbe MZ |
477 | mutex_init(&chip->irq_lock); |
478 | ||
910c8fb6 DJ |
479 | chip->irq_base = irq_alloc_descs(-1, pdata->irq_base, chip->gpio_chip.ngpio, -1); |
480 | if (chip->irq_base < 0) | |
481 | goto out_failed; | |
482 | ||
89ea8bbe MZ |
483 | for (lvl = 0; lvl < chip->gpio_chip.ngpio; lvl++) { |
484 | int irq = lvl + chip->irq_base; | |
485 | ||
910c8fb6 | 486 | irq_clear_status_flags(irq, IRQ_NOREQUEST); |
b51804bc | 487 | irq_set_chip_data(irq, chip); |
6dd599f8 DJ |
488 | irq_set_chip(irq, &pca953x_irq_chip); |
489 | irq_set_nested_thread(irq, true); | |
89ea8bbe MZ |
490 | #ifdef CONFIG_ARM |
491 | set_irq_flags(irq, IRQF_VALID); | |
492 | #else | |
b51804bc | 493 | irq_set_noprobe(irq); |
89ea8bbe MZ |
494 | #endif |
495 | } | |
496 | ||
497 | ret = request_threaded_irq(client->irq, | |
498 | NULL, | |
499 | pca953x_irq_handler, | |
17e8b42c | 500 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, |
89ea8bbe MZ |
501 | dev_name(&client->dev), chip); |
502 | if (ret) { | |
503 | dev_err(&client->dev, "failed to request irq %d\n", | |
504 | client->irq); | |
505 | goto out_failed; | |
506 | } | |
507 | ||
508 | chip->gpio_chip.to_irq = pca953x_gpio_to_irq; | |
509 | } | |
510 | ||
511 | return 0; | |
512 | ||
513 | out_failed: | |
8a233f01 | 514 | chip->irq_base = -1; |
89ea8bbe MZ |
515 | return ret; |
516 | } | |
517 | ||
518 | static void pca953x_irq_teardown(struct pca953x_chip *chip) | |
519 | { | |
8a233f01 | 520 | if (chip->irq_base != -1) |
89ea8bbe MZ |
521 | free_irq(chip->client->irq, chip); |
522 | } | |
523 | #else /* CONFIG_GPIO_PCA953X_IRQ */ | |
524 | static int pca953x_irq_setup(struct pca953x_chip *chip, | |
525 | const struct i2c_device_id *id) | |
526 | { | |
527 | struct i2c_client *client = chip->client; | |
528 | struct pca953x_platform_data *pdata = client->dev.platform_data; | |
529 | ||
33226ffd | 530 | if (pdata->irq_base != -1 && (id->driver_data & PCA_INT)) |
89ea8bbe MZ |
531 | dev_warn(&client->dev, "interrupt support not compiled in\n"); |
532 | ||
533 | return 0; | |
534 | } | |
535 | ||
536 | static void pca953x_irq_teardown(struct pca953x_chip *chip) | |
537 | { | |
538 | } | |
539 | #endif | |
540 | ||
1965d303 NC |
541 | /* |
542 | * Handlers for alternative sources of platform_data | |
543 | */ | |
544 | #ifdef CONFIG_OF_GPIO | |
545 | /* | |
546 | * Translate OpenFirmware node properties into platform_data | |
547 | */ | |
548 | static struct pca953x_platform_data * | |
549 | pca953x_get_alt_pdata(struct i2c_client *client) | |
550 | { | |
551 | struct pca953x_platform_data *pdata; | |
552 | struct device_node *node; | |
1648237d DE |
553 | const __be32 *val; |
554 | int size; | |
1965d303 | 555 | |
61c7a080 | 556 | node = client->dev.of_node; |
1965d303 NC |
557 | if (node == NULL) |
558 | return NULL; | |
559 | ||
560 | pdata = kzalloc(sizeof(struct pca953x_platform_data), GFP_KERNEL); | |
561 | if (pdata == NULL) { | |
562 | dev_err(&client->dev, "Unable to allocate platform_data\n"); | |
563 | return NULL; | |
564 | } | |
565 | ||
566 | pdata->gpio_base = -1; | |
1648237d | 567 | val = of_get_property(node, "linux,gpio-base", &size); |
1965d303 | 568 | if (val) { |
1648237d DE |
569 | if (size != sizeof(*val)) |
570 | dev_warn(&client->dev, "%s: wrong linux,gpio-base\n", | |
571 | node->full_name); | |
1965d303 | 572 | else |
1648237d | 573 | pdata->gpio_base = be32_to_cpup(val); |
1965d303 NC |
574 | } |
575 | ||
576 | val = of_get_property(node, "polarity", NULL); | |
577 | if (val) | |
578 | pdata->invert = *val; | |
579 | ||
580 | return pdata; | |
581 | } | |
582 | #else | |
583 | static struct pca953x_platform_data * | |
584 | pca953x_get_alt_pdata(struct i2c_client *client) | |
585 | { | |
586 | return NULL; | |
587 | } | |
588 | #endif | |
589 | ||
33226ffd HZ |
590 | static int __devinit device_pca953x_init(struct pca953x_chip *chip, int invert) |
591 | { | |
592 | int ret; | |
593 | ||
594 | ret = pca953x_read_reg(chip, PCA953X_OUTPUT, &chip->reg_output); | |
595 | if (ret) | |
596 | goto out; | |
597 | ||
598 | ret = pca953x_read_reg(chip, PCA953X_DIRECTION, | |
599 | &chip->reg_direction); | |
600 | if (ret) | |
601 | goto out; | |
602 | ||
603 | /* set platform specific polarity inversion */ | |
604 | ret = pca953x_write_reg(chip, PCA953X_INVERT, invert); | |
605 | if (ret) | |
606 | goto out; | |
607 | return 0; | |
608 | out: | |
609 | return ret; | |
610 | } | |
611 | ||
612 | static int __devinit device_pca957x_init(struct pca953x_chip *chip, int invert) | |
613 | { | |
614 | int ret; | |
615 | uint16_t val = 0; | |
616 | ||
617 | /* Let every port in proper state, that could save power */ | |
618 | pca953x_write_reg(chip, PCA957X_PUPD, 0x0); | |
619 | pca953x_write_reg(chip, PCA957X_CFG, 0xffff); | |
620 | pca953x_write_reg(chip, PCA957X_OUT, 0x0); | |
621 | ||
622 | ret = pca953x_read_reg(chip, PCA957X_IN, &val); | |
623 | if (ret) | |
624 | goto out; | |
625 | ret = pca953x_read_reg(chip, PCA957X_OUT, &chip->reg_output); | |
626 | if (ret) | |
627 | goto out; | |
628 | ret = pca953x_read_reg(chip, PCA957X_CFG, &chip->reg_direction); | |
629 | if (ret) | |
630 | goto out; | |
631 | ||
632 | /* set platform specific polarity inversion */ | |
633 | pca953x_write_reg(chip, PCA957X_INVRT, invert); | |
634 | ||
635 | /* To enable register 6, 7 to controll pull up and pull down */ | |
636 | pca953x_write_reg(chip, PCA957X_BKEN, 0x202); | |
637 | ||
638 | return 0; | |
639 | out: | |
640 | return ret; | |
641 | } | |
642 | ||
d2653e92 | 643 | static int __devinit pca953x_probe(struct i2c_client *client, |
3760f736 | 644 | const struct i2c_device_id *id) |
9e60fdcf | 645 | { |
f3dc3630 GL |
646 | struct pca953x_platform_data *pdata; |
647 | struct pca953x_chip *chip; | |
33226ffd | 648 | int ret = 0; |
9e60fdcf | 649 | |
1965d303 NC |
650 | chip = kzalloc(sizeof(struct pca953x_chip), GFP_KERNEL); |
651 | if (chip == NULL) | |
652 | return -ENOMEM; | |
653 | ||
9e60fdcf | 654 | pdata = client->dev.platform_data; |
a342d215 | 655 | if (pdata == NULL) { |
1965d303 NC |
656 | pdata = pca953x_get_alt_pdata(client); |
657 | /* | |
658 | * Unlike normal platform_data, this is allocated | |
659 | * dynamically and must be freed in the driver | |
660 | */ | |
661 | chip->dyn_pdata = pdata; | |
a342d215 | 662 | } |
9e60fdcf | 663 | |
1965d303 NC |
664 | if (pdata == NULL) { |
665 | dev_dbg(&client->dev, "no platform data\n"); | |
666 | ret = -EINVAL; | |
667 | goto out_failed; | |
668 | } | |
9e60fdcf | 669 | |
670 | chip->client = client; | |
671 | ||
672 | chip->gpio_start = pdata->gpio_base; | |
673 | ||
77906a54 | 674 | chip->names = pdata->names; |
33226ffd | 675 | chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE); |
77906a54 | 676 | |
6e20fb18 RS |
677 | mutex_init(&chip->i2c_lock); |
678 | ||
9e60fdcf | 679 | /* initialize cached registers from their original values. |
680 | * we can't share this chip with another i2c master. | |
681 | */ | |
33226ffd | 682 | pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK); |
f5e8ff48 | 683 | |
33226ffd HZ |
684 | if (chip->chip_type == PCA953X_TYPE) |
685 | device_pca953x_init(chip, pdata->invert); | |
686 | else if (chip->chip_type == PCA957X_TYPE) | |
687 | device_pca957x_init(chip, pdata->invert); | |
688 | else | |
9e60fdcf | 689 | goto out_failed; |
690 | ||
89ea8bbe MZ |
691 | ret = pca953x_irq_setup(chip, id); |
692 | if (ret) | |
693 | goto out_failed; | |
f5e8ff48 GL |
694 | |
695 | ret = gpiochip_add(&chip->gpio_chip); | |
9e60fdcf | 696 | if (ret) |
272df502 | 697 | goto out_failed_irq; |
9e60fdcf | 698 | |
699 | if (pdata->setup) { | |
700 | ret = pdata->setup(client, chip->gpio_chip.base, | |
701 | chip->gpio_chip.ngpio, pdata->context); | |
702 | if (ret < 0) | |
703 | dev_warn(&client->dev, "setup failed, %d\n", ret); | |
704 | } | |
705 | ||
706 | i2c_set_clientdata(client, chip); | |
707 | return 0; | |
708 | ||
272df502 | 709 | out_failed_irq: |
89ea8bbe | 710 | pca953x_irq_teardown(chip); |
272df502 | 711 | out_failed: |
1965d303 | 712 | kfree(chip->dyn_pdata); |
9e60fdcf | 713 | kfree(chip); |
714 | return ret; | |
715 | } | |
716 | ||
f3dc3630 | 717 | static int pca953x_remove(struct i2c_client *client) |
9e60fdcf | 718 | { |
f3dc3630 GL |
719 | struct pca953x_platform_data *pdata = client->dev.platform_data; |
720 | struct pca953x_chip *chip = i2c_get_clientdata(client); | |
9e60fdcf | 721 | int ret = 0; |
722 | ||
723 | if (pdata->teardown) { | |
724 | ret = pdata->teardown(client, chip->gpio_chip.base, | |
725 | chip->gpio_chip.ngpio, pdata->context); | |
726 | if (ret < 0) { | |
727 | dev_err(&client->dev, "%s failed, %d\n", | |
728 | "teardown", ret); | |
729 | return ret; | |
730 | } | |
731 | } | |
732 | ||
733 | ret = gpiochip_remove(&chip->gpio_chip); | |
734 | if (ret) { | |
735 | dev_err(&client->dev, "%s failed, %d\n", | |
736 | "gpiochip_remove()", ret); | |
737 | return ret; | |
738 | } | |
739 | ||
89ea8bbe | 740 | pca953x_irq_teardown(chip); |
1965d303 | 741 | kfree(chip->dyn_pdata); |
9e60fdcf | 742 | kfree(chip); |
743 | return 0; | |
744 | } | |
745 | ||
f3dc3630 | 746 | static struct i2c_driver pca953x_driver = { |
9e60fdcf | 747 | .driver = { |
f3dc3630 | 748 | .name = "pca953x", |
9e60fdcf | 749 | }, |
f3dc3630 GL |
750 | .probe = pca953x_probe, |
751 | .remove = pca953x_remove, | |
3760f736 | 752 | .id_table = pca953x_id, |
9e60fdcf | 753 | }; |
754 | ||
f3dc3630 | 755 | static int __init pca953x_init(void) |
9e60fdcf | 756 | { |
f3dc3630 | 757 | return i2c_add_driver(&pca953x_driver); |
9e60fdcf | 758 | } |
2f8d1197 DB |
759 | /* register after i2c postcore initcall and before |
760 | * subsys initcalls that may rely on these GPIOs | |
761 | */ | |
762 | subsys_initcall(pca953x_init); | |
9e60fdcf | 763 | |
f3dc3630 | 764 | static void __exit pca953x_exit(void) |
9e60fdcf | 765 | { |
f3dc3630 | 766 | i2c_del_driver(&pca953x_driver); |
9e60fdcf | 767 | } |
f3dc3630 | 768 | module_exit(pca953x_exit); |
9e60fdcf | 769 | |
770 | MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); | |
f3dc3630 | 771 | MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); |
9e60fdcf | 772 | MODULE_LICENSE("GPL"); |