Commit | Line | Data |
---|---|---|
9e60fdcf | 1 | /* |
c103de24 | 2 | * PCA953x 4/8/16 bit I/O ports |
9e60fdcf | 3 | * |
4 | * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> | |
5 | * Copyright (C) 2007 Marvell International Ltd. | |
6 | * | |
7 | * Derived from drivers/i2c/chips/pca9539.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; version 2 of the License. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/init.h> | |
d120c17f | 16 | #include <linux/gpio.h> |
89ea8bbe MZ |
17 | #include <linux/interrupt.h> |
18 | #include <linux/irq.h> | |
9e60fdcf | 19 | #include <linux/i2c.h> |
d1c057e3 | 20 | #include <linux/i2c/pca953x.h> |
5a0e3ad6 | 21 | #include <linux/slab.h> |
1965d303 NC |
22 | #ifdef CONFIG_OF_GPIO |
23 | #include <linux/of_platform.h> | |
24 | #include <linux/of_gpio.h> | |
25 | #endif | |
9e60fdcf | 26 | |
33226ffd HZ |
27 | #define PCA953X_INPUT 0 |
28 | #define PCA953X_OUTPUT 1 | |
29 | #define PCA953X_INVERT 2 | |
30 | #define PCA953X_DIRECTION 3 | |
31 | ||
32 | #define PCA957X_IN 0 | |
33 | #define PCA957X_INVRT 1 | |
34 | #define PCA957X_BKEN 2 | |
35 | #define PCA957X_PUPD 3 | |
36 | #define PCA957X_CFG 4 | |
37 | #define PCA957X_OUT 5 | |
38 | #define PCA957X_MSK 6 | |
39 | #define PCA957X_INTS 7 | |
40 | ||
41 | #define PCA_GPIO_MASK 0x00FF | |
42 | #define PCA_INT 0x0100 | |
43 | #define PCA953X_TYPE 0x1000 | |
44 | #define PCA957X_TYPE 0x2000 | |
89ea8bbe | 45 | |
3760f736 | 46 | static const struct i2c_device_id pca953x_id[] = { |
33226ffd HZ |
47 | { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, |
48 | { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, | |
49 | { "pca9536", 4 | PCA953X_TYPE, }, | |
50 | { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, | |
51 | { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, | |
52 | { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, | |
53 | { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, | |
54 | { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, | |
55 | { "pca9556", 8 | PCA953X_TYPE, }, | |
56 | { "pca9557", 8 | PCA953X_TYPE, }, | |
57 | { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, | |
58 | { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, | |
59 | ||
60 | { "max7310", 8 | PCA953X_TYPE, }, | |
61 | { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, | |
62 | { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, | |
63 | { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, | |
64 | { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, | |
65 | { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, | |
66 | { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, | |
ab5dc372 | 67 | /* NYET: { "tca6424", 24, }, */ |
3760f736 | 68 | { } |
f5e8ff48 | 69 | }; |
3760f736 | 70 | MODULE_DEVICE_TABLE(i2c, pca953x_id); |
9e60fdcf | 71 | |
f3dc3630 | 72 | struct pca953x_chip { |
9e60fdcf | 73 | unsigned gpio_start; |
74 | uint16_t reg_output; | |
75 | uint16_t reg_direction; | |
6e20fb18 | 76 | struct mutex i2c_lock; |
9e60fdcf | 77 | |
89ea8bbe MZ |
78 | #ifdef CONFIG_GPIO_PCA953X_IRQ |
79 | struct mutex irq_lock; | |
80 | uint16_t irq_mask; | |
81 | uint16_t irq_stat; | |
82 | uint16_t irq_trig_raise; | |
83 | uint16_t irq_trig_fall; | |
84 | int irq_base; | |
85 | #endif | |
86 | ||
9e60fdcf | 87 | struct i2c_client *client; |
88 | struct gpio_chip gpio_chip; | |
62154991 | 89 | const char *const *names; |
33226ffd | 90 | int chip_type; |
9e60fdcf | 91 | }; |
92 | ||
f3dc3630 | 93 | static int pca953x_write_reg(struct pca953x_chip *chip, int reg, uint16_t val) |
9e60fdcf | 94 | { |
33226ffd | 95 | int ret = 0; |
f5e8ff48 GL |
96 | |
97 | if (chip->gpio_chip.ngpio <= 8) | |
98 | ret = i2c_smbus_write_byte_data(chip->client, reg, val); | |
33226ffd HZ |
99 | else { |
100 | switch (chip->chip_type) { | |
101 | case PCA953X_TYPE: | |
102 | ret = i2c_smbus_write_word_data(chip->client, | |
103 | reg << 1, val); | |
104 | break; | |
105 | case PCA957X_TYPE: | |
106 | ret = i2c_smbus_write_byte_data(chip->client, reg << 1, | |
107 | val & 0xff); | |
108 | if (ret < 0) | |
109 | break; | |
110 | ret = i2c_smbus_write_byte_data(chip->client, | |
111 | (reg << 1) + 1, | |
112 | (val & 0xff00) >> 8); | |
113 | break; | |
114 | } | |
115 | } | |
f5e8ff48 GL |
116 | |
117 | if (ret < 0) { | |
118 | dev_err(&chip->client->dev, "failed writing register\n"); | |
ab5dc372 | 119 | return ret; |
f5e8ff48 GL |
120 | } |
121 | ||
122 | return 0; | |
9e60fdcf | 123 | } |
124 | ||
f3dc3630 | 125 | static int pca953x_read_reg(struct pca953x_chip *chip, int reg, uint16_t *val) |
9e60fdcf | 126 | { |
127 | int ret; | |
128 | ||
f5e8ff48 GL |
129 | if (chip->gpio_chip.ngpio <= 8) |
130 | ret = i2c_smbus_read_byte_data(chip->client, reg); | |
131 | else | |
132 | ret = i2c_smbus_read_word_data(chip->client, reg << 1); | |
133 | ||
9e60fdcf | 134 | if (ret < 0) { |
135 | dev_err(&chip->client->dev, "failed reading register\n"); | |
ab5dc372 | 136 | return ret; |
9e60fdcf | 137 | } |
138 | ||
139 | *val = (uint16_t)ret; | |
140 | return 0; | |
141 | } | |
142 | ||
f3dc3630 | 143 | static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) |
9e60fdcf | 144 | { |
f3dc3630 | 145 | struct pca953x_chip *chip; |
9e60fdcf | 146 | uint16_t reg_val; |
33226ffd | 147 | int ret, offset = 0; |
9e60fdcf | 148 | |
f3dc3630 | 149 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
9e60fdcf | 150 | |
6e20fb18 | 151 | mutex_lock(&chip->i2c_lock); |
9e60fdcf | 152 | reg_val = chip->reg_direction | (1u << off); |
33226ffd HZ |
153 | |
154 | switch (chip->chip_type) { | |
155 | case PCA953X_TYPE: | |
156 | offset = PCA953X_DIRECTION; | |
157 | break; | |
158 | case PCA957X_TYPE: | |
159 | offset = PCA957X_CFG; | |
160 | break; | |
161 | } | |
162 | ret = pca953x_write_reg(chip, offset, reg_val); | |
9e60fdcf | 163 | if (ret) |
6e20fb18 | 164 | goto exit; |
9e60fdcf | 165 | |
166 | chip->reg_direction = reg_val; | |
6e20fb18 RS |
167 | ret = 0; |
168 | exit: | |
169 | mutex_unlock(&chip->i2c_lock); | |
170 | return ret; | |
9e60fdcf | 171 | } |
172 | ||
f3dc3630 | 173 | static int pca953x_gpio_direction_output(struct gpio_chip *gc, |
9e60fdcf | 174 | unsigned off, int val) |
175 | { | |
f3dc3630 | 176 | struct pca953x_chip *chip; |
9e60fdcf | 177 | uint16_t reg_val; |
33226ffd | 178 | int ret, offset = 0; |
9e60fdcf | 179 | |
f3dc3630 | 180 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
9e60fdcf | 181 | |
6e20fb18 | 182 | mutex_lock(&chip->i2c_lock); |
9e60fdcf | 183 | /* set output level */ |
184 | if (val) | |
185 | reg_val = chip->reg_output | (1u << off); | |
186 | else | |
187 | reg_val = chip->reg_output & ~(1u << off); | |
188 | ||
33226ffd HZ |
189 | switch (chip->chip_type) { |
190 | case PCA953X_TYPE: | |
191 | offset = PCA953X_OUTPUT; | |
192 | break; | |
193 | case PCA957X_TYPE: | |
194 | offset = PCA957X_OUT; | |
195 | break; | |
196 | } | |
197 | ret = pca953x_write_reg(chip, offset, reg_val); | |
9e60fdcf | 198 | if (ret) |
6e20fb18 | 199 | goto exit; |
9e60fdcf | 200 | |
201 | chip->reg_output = reg_val; | |
202 | ||
203 | /* then direction */ | |
204 | reg_val = chip->reg_direction & ~(1u << off); | |
33226ffd HZ |
205 | switch (chip->chip_type) { |
206 | case PCA953X_TYPE: | |
207 | offset = PCA953X_DIRECTION; | |
208 | break; | |
209 | case PCA957X_TYPE: | |
210 | offset = PCA957X_CFG; | |
211 | break; | |
212 | } | |
213 | ret = pca953x_write_reg(chip, offset, reg_val); | |
9e60fdcf | 214 | if (ret) |
6e20fb18 | 215 | goto exit; |
9e60fdcf | 216 | |
217 | chip->reg_direction = reg_val; | |
6e20fb18 RS |
218 | ret = 0; |
219 | exit: | |
220 | mutex_unlock(&chip->i2c_lock); | |
221 | return ret; | |
9e60fdcf | 222 | } |
223 | ||
f3dc3630 | 224 | static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) |
9e60fdcf | 225 | { |
f3dc3630 | 226 | struct pca953x_chip *chip; |
9e60fdcf | 227 | uint16_t reg_val; |
33226ffd | 228 | int ret, offset = 0; |
9e60fdcf | 229 | |
f3dc3630 | 230 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
9e60fdcf | 231 | |
6e20fb18 | 232 | mutex_lock(&chip->i2c_lock); |
33226ffd HZ |
233 | switch (chip->chip_type) { |
234 | case PCA953X_TYPE: | |
235 | offset = PCA953X_INPUT; | |
236 | break; | |
237 | case PCA957X_TYPE: | |
238 | offset = PCA957X_IN; | |
239 | break; | |
240 | } | |
241 | ret = pca953x_read_reg(chip, offset, ®_val); | |
6e20fb18 | 242 | mutex_unlock(&chip->i2c_lock); |
9e60fdcf | 243 | if (ret < 0) { |
244 | /* NOTE: diagnostic already emitted; that's all we should | |
245 | * do unless gpio_*_value_cansleep() calls become different | |
246 | * from their nonsleeping siblings (and report faults). | |
247 | */ | |
248 | return 0; | |
249 | } | |
250 | ||
251 | return (reg_val & (1u << off)) ? 1 : 0; | |
252 | } | |
253 | ||
f3dc3630 | 254 | static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) |
9e60fdcf | 255 | { |
f3dc3630 | 256 | struct pca953x_chip *chip; |
9e60fdcf | 257 | uint16_t reg_val; |
33226ffd | 258 | int ret, offset = 0; |
9e60fdcf | 259 | |
f3dc3630 | 260 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
9e60fdcf | 261 | |
6e20fb18 | 262 | mutex_lock(&chip->i2c_lock); |
9e60fdcf | 263 | if (val) |
264 | reg_val = chip->reg_output | (1u << off); | |
265 | else | |
266 | reg_val = chip->reg_output & ~(1u << off); | |
267 | ||
33226ffd HZ |
268 | switch (chip->chip_type) { |
269 | case PCA953X_TYPE: | |
270 | offset = PCA953X_OUTPUT; | |
271 | break; | |
272 | case PCA957X_TYPE: | |
273 | offset = PCA957X_OUT; | |
274 | break; | |
275 | } | |
276 | ret = pca953x_write_reg(chip, offset, reg_val); | |
9e60fdcf | 277 | if (ret) |
6e20fb18 | 278 | goto exit; |
9e60fdcf | 279 | |
280 | chip->reg_output = reg_val; | |
6e20fb18 RS |
281 | exit: |
282 | mutex_unlock(&chip->i2c_lock); | |
9e60fdcf | 283 | } |
284 | ||
f5e8ff48 | 285 | static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) |
9e60fdcf | 286 | { |
287 | struct gpio_chip *gc; | |
288 | ||
289 | gc = &chip->gpio_chip; | |
290 | ||
f3dc3630 GL |
291 | gc->direction_input = pca953x_gpio_direction_input; |
292 | gc->direction_output = pca953x_gpio_direction_output; | |
293 | gc->get = pca953x_gpio_get_value; | |
294 | gc->set = pca953x_gpio_set_value; | |
84207805 | 295 | gc->can_sleep = 1; |
9e60fdcf | 296 | |
297 | gc->base = chip->gpio_start; | |
f5e8ff48 GL |
298 | gc->ngpio = gpios; |
299 | gc->label = chip->client->name; | |
d8f388d8 | 300 | gc->dev = &chip->client->dev; |
d72cbed0 | 301 | gc->owner = THIS_MODULE; |
77906a54 | 302 | gc->names = chip->names; |
9e60fdcf | 303 | } |
304 | ||
89ea8bbe MZ |
305 | #ifdef CONFIG_GPIO_PCA953X_IRQ |
306 | static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off) | |
307 | { | |
308 | struct pca953x_chip *chip; | |
309 | ||
310 | chip = container_of(gc, struct pca953x_chip, gpio_chip); | |
311 | return chip->irq_base + off; | |
312 | } | |
313 | ||
6f5cfc0e | 314 | static void pca953x_irq_mask(struct irq_data *d) |
89ea8bbe | 315 | { |
6f5cfc0e | 316 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
89ea8bbe | 317 | |
6f5cfc0e | 318 | chip->irq_mask &= ~(1 << (d->irq - chip->irq_base)); |
89ea8bbe MZ |
319 | } |
320 | ||
6f5cfc0e | 321 | static void pca953x_irq_unmask(struct irq_data *d) |
89ea8bbe | 322 | { |
6f5cfc0e | 323 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
89ea8bbe | 324 | |
6f5cfc0e | 325 | chip->irq_mask |= 1 << (d->irq - chip->irq_base); |
89ea8bbe MZ |
326 | } |
327 | ||
6f5cfc0e | 328 | static void pca953x_irq_bus_lock(struct irq_data *d) |
89ea8bbe | 329 | { |
6f5cfc0e | 330 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
89ea8bbe MZ |
331 | |
332 | mutex_lock(&chip->irq_lock); | |
333 | } | |
334 | ||
6f5cfc0e | 335 | static void pca953x_irq_bus_sync_unlock(struct irq_data *d) |
89ea8bbe | 336 | { |
6f5cfc0e | 337 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
a2cb9aeb MZ |
338 | uint16_t new_irqs; |
339 | uint16_t level; | |
340 | ||
341 | /* Look for any newly setup interrupt */ | |
342 | new_irqs = chip->irq_trig_fall | chip->irq_trig_raise; | |
343 | new_irqs &= ~chip->reg_direction; | |
344 | ||
345 | while (new_irqs) { | |
346 | level = __ffs(new_irqs); | |
347 | pca953x_gpio_direction_input(&chip->gpio_chip, level); | |
348 | new_irqs &= ~(1 << level); | |
349 | } | |
89ea8bbe MZ |
350 | |
351 | mutex_unlock(&chip->irq_lock); | |
352 | } | |
353 | ||
6f5cfc0e | 354 | static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) |
89ea8bbe | 355 | { |
6f5cfc0e LB |
356 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
357 | uint16_t level = d->irq - chip->irq_base; | |
89ea8bbe MZ |
358 | uint16_t mask = 1 << level; |
359 | ||
360 | if (!(type & IRQ_TYPE_EDGE_BOTH)) { | |
361 | dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", | |
6f5cfc0e | 362 | d->irq, type); |
89ea8bbe MZ |
363 | return -EINVAL; |
364 | } | |
365 | ||
366 | if (type & IRQ_TYPE_EDGE_FALLING) | |
367 | chip->irq_trig_fall |= mask; | |
368 | else | |
369 | chip->irq_trig_fall &= ~mask; | |
370 | ||
371 | if (type & IRQ_TYPE_EDGE_RISING) | |
372 | chip->irq_trig_raise |= mask; | |
373 | else | |
374 | chip->irq_trig_raise &= ~mask; | |
375 | ||
a2cb9aeb | 376 | return 0; |
89ea8bbe MZ |
377 | } |
378 | ||
379 | static struct irq_chip pca953x_irq_chip = { | |
380 | .name = "pca953x", | |
6f5cfc0e LB |
381 | .irq_mask = pca953x_irq_mask, |
382 | .irq_unmask = pca953x_irq_unmask, | |
383 | .irq_bus_lock = pca953x_irq_bus_lock, | |
384 | .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock, | |
385 | .irq_set_type = pca953x_irq_set_type, | |
89ea8bbe MZ |
386 | }; |
387 | ||
388 | static uint16_t pca953x_irq_pending(struct pca953x_chip *chip) | |
389 | { | |
390 | uint16_t cur_stat; | |
391 | uint16_t old_stat; | |
392 | uint16_t pending; | |
393 | uint16_t trigger; | |
33226ffd HZ |
394 | int ret, offset = 0; |
395 | ||
396 | switch (chip->chip_type) { | |
397 | case PCA953X_TYPE: | |
398 | offset = PCA953X_INPUT; | |
399 | break; | |
400 | case PCA957X_TYPE: | |
401 | offset = PCA957X_IN; | |
402 | break; | |
403 | } | |
404 | ret = pca953x_read_reg(chip, offset, &cur_stat); | |
89ea8bbe MZ |
405 | if (ret) |
406 | return 0; | |
407 | ||
408 | /* Remove output pins from the equation */ | |
409 | cur_stat &= chip->reg_direction; | |
410 | ||
411 | old_stat = chip->irq_stat; | |
412 | trigger = (cur_stat ^ old_stat) & chip->irq_mask; | |
413 | ||
414 | if (!trigger) | |
415 | return 0; | |
416 | ||
417 | chip->irq_stat = cur_stat; | |
418 | ||
419 | pending = (old_stat & chip->irq_trig_fall) | | |
420 | (cur_stat & chip->irq_trig_raise); | |
421 | pending &= trigger; | |
422 | ||
423 | return pending; | |
424 | } | |
425 | ||
426 | static irqreturn_t pca953x_irq_handler(int irq, void *devid) | |
427 | { | |
428 | struct pca953x_chip *chip = devid; | |
429 | uint16_t pending; | |
430 | uint16_t level; | |
431 | ||
432 | pending = pca953x_irq_pending(chip); | |
433 | ||
434 | if (!pending) | |
435 | return IRQ_HANDLED; | |
436 | ||
437 | do { | |
438 | level = __ffs(pending); | |
6dd599f8 | 439 | handle_nested_irq(level + chip->irq_base); |
89ea8bbe MZ |
440 | |
441 | pending &= ~(1 << level); | |
442 | } while (pending); | |
443 | ||
444 | return IRQ_HANDLED; | |
445 | } | |
446 | ||
447 | static int pca953x_irq_setup(struct pca953x_chip *chip, | |
c6dcf592 DJ |
448 | const struct i2c_device_id *id, |
449 | int irq_base) | |
89ea8bbe MZ |
450 | { |
451 | struct i2c_client *client = chip->client; | |
33226ffd | 452 | int ret, offset = 0; |
89ea8bbe | 453 | |
c6dcf592 | 454 | if (irq_base != -1 |
33226ffd | 455 | && (id->driver_data & PCA_INT)) { |
89ea8bbe MZ |
456 | int lvl; |
457 | ||
33226ffd HZ |
458 | switch (chip->chip_type) { |
459 | case PCA953X_TYPE: | |
460 | offset = PCA953X_INPUT; | |
461 | break; | |
462 | case PCA957X_TYPE: | |
463 | offset = PCA957X_IN; | |
464 | break; | |
465 | } | |
466 | ret = pca953x_read_reg(chip, offset, &chip->irq_stat); | |
89ea8bbe MZ |
467 | if (ret) |
468 | goto out_failed; | |
469 | ||
470 | /* | |
471 | * There is no way to know which GPIO line generated the | |
472 | * interrupt. We have to rely on the previous read for | |
473 | * this purpose. | |
474 | */ | |
475 | chip->irq_stat &= chip->reg_direction; | |
89ea8bbe MZ |
476 | mutex_init(&chip->irq_lock); |
477 | ||
c6dcf592 | 478 | chip->irq_base = irq_alloc_descs(-1, irq_base, chip->gpio_chip.ngpio, -1); |
910c8fb6 DJ |
479 | if (chip->irq_base < 0) |
480 | goto out_failed; | |
481 | ||
89ea8bbe MZ |
482 | for (lvl = 0; lvl < chip->gpio_chip.ngpio; lvl++) { |
483 | int irq = lvl + chip->irq_base; | |
484 | ||
910c8fb6 | 485 | irq_clear_status_flags(irq, IRQ_NOREQUEST); |
b51804bc | 486 | irq_set_chip_data(irq, chip); |
6dd599f8 DJ |
487 | irq_set_chip(irq, &pca953x_irq_chip); |
488 | irq_set_nested_thread(irq, true); | |
89ea8bbe MZ |
489 | #ifdef CONFIG_ARM |
490 | set_irq_flags(irq, IRQF_VALID); | |
491 | #else | |
b51804bc | 492 | irq_set_noprobe(irq); |
89ea8bbe MZ |
493 | #endif |
494 | } | |
495 | ||
496 | ret = request_threaded_irq(client->irq, | |
497 | NULL, | |
498 | pca953x_irq_handler, | |
17e8b42c | 499 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, |
89ea8bbe MZ |
500 | dev_name(&client->dev), chip); |
501 | if (ret) { | |
502 | dev_err(&client->dev, "failed to request irq %d\n", | |
503 | client->irq); | |
504 | goto out_failed; | |
505 | } | |
506 | ||
507 | chip->gpio_chip.to_irq = pca953x_gpio_to_irq; | |
508 | } | |
509 | ||
510 | return 0; | |
511 | ||
512 | out_failed: | |
8a233f01 | 513 | chip->irq_base = -1; |
89ea8bbe MZ |
514 | return ret; |
515 | } | |
516 | ||
517 | static void pca953x_irq_teardown(struct pca953x_chip *chip) | |
518 | { | |
c609c05d DJ |
519 | if (chip->irq_base != -1) { |
520 | irq_free_descs(chip->irq_base, chip->gpio_chip.ngpio); | |
89ea8bbe | 521 | free_irq(chip->client->irq, chip); |
c609c05d | 522 | } |
89ea8bbe MZ |
523 | } |
524 | #else /* CONFIG_GPIO_PCA953X_IRQ */ | |
525 | static int pca953x_irq_setup(struct pca953x_chip *chip, | |
c6dcf592 DJ |
526 | const struct i2c_device_id *id, |
527 | int irq_base) | |
89ea8bbe MZ |
528 | { |
529 | struct i2c_client *client = chip->client; | |
89ea8bbe | 530 | |
c6dcf592 | 531 | if (irq_base != -1 && (id->driver_data & PCA_INT)) |
89ea8bbe MZ |
532 | dev_warn(&client->dev, "interrupt support not compiled in\n"); |
533 | ||
534 | return 0; | |
535 | } | |
536 | ||
537 | static void pca953x_irq_teardown(struct pca953x_chip *chip) | |
538 | { | |
539 | } | |
540 | #endif | |
541 | ||
1965d303 NC |
542 | /* |
543 | * Handlers for alternative sources of platform_data | |
544 | */ | |
545 | #ifdef CONFIG_OF_GPIO | |
546 | /* | |
547 | * Translate OpenFirmware node properties into platform_data | |
548 | */ | |
c6dcf592 DJ |
549 | void |
550 | pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, int *invert) | |
1965d303 | 551 | { |
1965d303 | 552 | struct device_node *node; |
1648237d DE |
553 | const __be32 *val; |
554 | int size; | |
1965d303 | 555 | |
61c7a080 | 556 | node = client->dev.of_node; |
1965d303 | 557 | if (node == NULL) |
c6dcf592 | 558 | return; |
1965d303 | 559 | |
c6dcf592 | 560 | *gpio_base = -1; |
1648237d | 561 | val = of_get_property(node, "linux,gpio-base", &size); |
1965d303 | 562 | if (val) { |
1648237d DE |
563 | if (size != sizeof(*val)) |
564 | dev_warn(&client->dev, "%s: wrong linux,gpio-base\n", | |
565 | node->full_name); | |
1965d303 | 566 | else |
c6dcf592 | 567 | *gpio_base = be32_to_cpup(val); |
1965d303 NC |
568 | } |
569 | ||
570 | val = of_get_property(node, "polarity", NULL); | |
571 | if (val) | |
c6dcf592 | 572 | *invert = *val; |
1965d303 NC |
573 | } |
574 | #else | |
c6dcf592 DJ |
575 | void |
576 | pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, int *invert) | |
1965d303 | 577 | { |
1965d303 NC |
578 | } |
579 | #endif | |
580 | ||
33226ffd HZ |
581 | static int __devinit device_pca953x_init(struct pca953x_chip *chip, int invert) |
582 | { | |
583 | int ret; | |
584 | ||
585 | ret = pca953x_read_reg(chip, PCA953X_OUTPUT, &chip->reg_output); | |
586 | if (ret) | |
587 | goto out; | |
588 | ||
589 | ret = pca953x_read_reg(chip, PCA953X_DIRECTION, | |
590 | &chip->reg_direction); | |
591 | if (ret) | |
592 | goto out; | |
593 | ||
594 | /* set platform specific polarity inversion */ | |
595 | ret = pca953x_write_reg(chip, PCA953X_INVERT, invert); | |
596 | if (ret) | |
597 | goto out; | |
598 | return 0; | |
599 | out: | |
600 | return ret; | |
601 | } | |
602 | ||
603 | static int __devinit device_pca957x_init(struct pca953x_chip *chip, int invert) | |
604 | { | |
605 | int ret; | |
606 | uint16_t val = 0; | |
607 | ||
608 | /* Let every port in proper state, that could save power */ | |
609 | pca953x_write_reg(chip, PCA957X_PUPD, 0x0); | |
610 | pca953x_write_reg(chip, PCA957X_CFG, 0xffff); | |
611 | pca953x_write_reg(chip, PCA957X_OUT, 0x0); | |
612 | ||
613 | ret = pca953x_read_reg(chip, PCA957X_IN, &val); | |
614 | if (ret) | |
615 | goto out; | |
616 | ret = pca953x_read_reg(chip, PCA957X_OUT, &chip->reg_output); | |
617 | if (ret) | |
618 | goto out; | |
619 | ret = pca953x_read_reg(chip, PCA957X_CFG, &chip->reg_direction); | |
620 | if (ret) | |
621 | goto out; | |
622 | ||
623 | /* set platform specific polarity inversion */ | |
624 | pca953x_write_reg(chip, PCA957X_INVRT, invert); | |
625 | ||
626 | /* To enable register 6, 7 to controll pull up and pull down */ | |
627 | pca953x_write_reg(chip, PCA957X_BKEN, 0x202); | |
628 | ||
629 | return 0; | |
630 | out: | |
631 | return ret; | |
632 | } | |
633 | ||
d2653e92 | 634 | static int __devinit pca953x_probe(struct i2c_client *client, |
3760f736 | 635 | const struct i2c_device_id *id) |
9e60fdcf | 636 | { |
f3dc3630 GL |
637 | struct pca953x_platform_data *pdata; |
638 | struct pca953x_chip *chip; | |
c6dcf592 | 639 | int irq_base=-1, invert=0; |
33226ffd | 640 | int ret = 0; |
9e60fdcf | 641 | |
1965d303 NC |
642 | chip = kzalloc(sizeof(struct pca953x_chip), GFP_KERNEL); |
643 | if (chip == NULL) | |
644 | return -ENOMEM; | |
645 | ||
9e60fdcf | 646 | pdata = client->dev.platform_data; |
c6dcf592 DJ |
647 | if (pdata) { |
648 | irq_base = pdata->irq_base; | |
649 | chip->gpio_start = pdata->gpio_base; | |
650 | invert = pdata->invert; | |
651 | chip->names = pdata->names; | |
652 | } else { | |
653 | pca953x_get_alt_pdata(client, &chip->gpio_start, &invert); | |
1965d303 | 654 | } |
9e60fdcf | 655 | |
656 | chip->client = client; | |
657 | ||
33226ffd | 658 | chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE); |
77906a54 | 659 | |
6e20fb18 RS |
660 | mutex_init(&chip->i2c_lock); |
661 | ||
9e60fdcf | 662 | /* initialize cached registers from their original values. |
663 | * we can't share this chip with another i2c master. | |
664 | */ | |
33226ffd | 665 | pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK); |
f5e8ff48 | 666 | |
33226ffd | 667 | if (chip->chip_type == PCA953X_TYPE) |
c6dcf592 | 668 | device_pca953x_init(chip, invert); |
33226ffd | 669 | else if (chip->chip_type == PCA957X_TYPE) |
c6dcf592 | 670 | device_pca957x_init(chip, invert); |
33226ffd | 671 | else |
9e60fdcf | 672 | goto out_failed; |
673 | ||
c6dcf592 | 674 | ret = pca953x_irq_setup(chip, id, irq_base); |
89ea8bbe MZ |
675 | if (ret) |
676 | goto out_failed; | |
f5e8ff48 GL |
677 | |
678 | ret = gpiochip_add(&chip->gpio_chip); | |
9e60fdcf | 679 | if (ret) |
272df502 | 680 | goto out_failed_irq; |
9e60fdcf | 681 | |
c6dcf592 | 682 | if (pdata && pdata->setup) { |
9e60fdcf | 683 | ret = pdata->setup(client, chip->gpio_chip.base, |
684 | chip->gpio_chip.ngpio, pdata->context); | |
685 | if (ret < 0) | |
686 | dev_warn(&client->dev, "setup failed, %d\n", ret); | |
687 | } | |
688 | ||
689 | i2c_set_clientdata(client, chip); | |
690 | return 0; | |
691 | ||
272df502 | 692 | out_failed_irq: |
89ea8bbe | 693 | pca953x_irq_teardown(chip); |
272df502 | 694 | out_failed: |
9e60fdcf | 695 | kfree(chip); |
696 | return ret; | |
697 | } | |
698 | ||
f3dc3630 | 699 | static int pca953x_remove(struct i2c_client *client) |
9e60fdcf | 700 | { |
f3dc3630 GL |
701 | struct pca953x_platform_data *pdata = client->dev.platform_data; |
702 | struct pca953x_chip *chip = i2c_get_clientdata(client); | |
9e60fdcf | 703 | int ret = 0; |
704 | ||
c6dcf592 | 705 | if (pdata && pdata->teardown) { |
9e60fdcf | 706 | ret = pdata->teardown(client, chip->gpio_chip.base, |
707 | chip->gpio_chip.ngpio, pdata->context); | |
708 | if (ret < 0) { | |
709 | dev_err(&client->dev, "%s failed, %d\n", | |
710 | "teardown", ret); | |
711 | return ret; | |
712 | } | |
713 | } | |
714 | ||
715 | ret = gpiochip_remove(&chip->gpio_chip); | |
716 | if (ret) { | |
717 | dev_err(&client->dev, "%s failed, %d\n", | |
718 | "gpiochip_remove()", ret); | |
719 | return ret; | |
720 | } | |
721 | ||
89ea8bbe | 722 | pca953x_irq_teardown(chip); |
9e60fdcf | 723 | kfree(chip); |
724 | return 0; | |
725 | } | |
726 | ||
f3dc3630 | 727 | static struct i2c_driver pca953x_driver = { |
9e60fdcf | 728 | .driver = { |
f3dc3630 | 729 | .name = "pca953x", |
9e60fdcf | 730 | }, |
f3dc3630 GL |
731 | .probe = pca953x_probe, |
732 | .remove = pca953x_remove, | |
3760f736 | 733 | .id_table = pca953x_id, |
9e60fdcf | 734 | }; |
735 | ||
f3dc3630 | 736 | static int __init pca953x_init(void) |
9e60fdcf | 737 | { |
f3dc3630 | 738 | return i2c_add_driver(&pca953x_driver); |
9e60fdcf | 739 | } |
2f8d1197 DB |
740 | /* register after i2c postcore initcall and before |
741 | * subsys initcalls that may rely on these GPIOs | |
742 | */ | |
743 | subsys_initcall(pca953x_init); | |
9e60fdcf | 744 | |
f3dc3630 | 745 | static void __exit pca953x_exit(void) |
9e60fdcf | 746 | { |
f3dc3630 | 747 | i2c_del_driver(&pca953x_driver); |
9e60fdcf | 748 | } |
f3dc3630 | 749 | module_exit(pca953x_exit); |
9e60fdcf | 750 | |
751 | MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); | |
f3dc3630 | 752 | MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); |
9e60fdcf | 753 | MODULE_LICENSE("GPL"); |