Merge tag 'mmc-merge-for-3.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / drivers / gpio / gpio-pcf857x.c
CommitLineData
15fae37d 1/*
c103de24 2 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
15fae37d
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3 *
4 * Copyright (C) 2007 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/kernel.h>
22#include <linux/slab.h>
d120c17f 23#include <linux/gpio.h>
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24#include <linux/i2c.h>
25#include <linux/i2c/pcf857x.h>
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26#include <linux/interrupt.h>
27#include <linux/irq.h>
28#include <linux/irqdomain.h>
bb207ef1 29#include <linux/module.h>
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30#include <linux/spinlock.h>
31#include <linux/workqueue.h>
15fae37d 32
15fae37d 33
3760f736
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34static const struct i2c_device_id pcf857x_id[] = {
35 { "pcf8574", 8 },
4ba2ccb8 36 { "pcf8574a", 8 },
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37 { "pca8574", 8 },
38 { "pca9670", 8 },
39 { "pca9672", 8 },
40 { "pca9674", 8 },
41 { "pcf8575", 16 },
42 { "pca8575", 16 },
43 { "pca9671", 16 },
44 { "pca9673", 16 },
45 { "pca9675", 16 },
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DB
46 { "max7328", 8 },
47 { "max7329", 8 },
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48 { }
49};
50MODULE_DEVICE_TABLE(i2c, pcf857x_id);
51
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52/*
53 * The pcf857x, pca857x, and pca967x chips only expose one read and one
54 * write register. Writing a "one" bit (to match the reset state) lets
55 * that pin be used as an input; it's not an open-drain model, but acts
56 * a bit like one. This is described as "quasi-bidirectional"; read the
57 * chip documentation for details.
58 *
59 * Many other I2C GPIO expander chips (like the pca953x models) have
60 * more complex register models and more conventional circuitry using
61 * push/pull drivers. They often use the same 0x20..0x27 addresses as
62 * pcf857x parts, making the "legacy" I2C driver model problematic.
63 */
64struct pcf857x {
65 struct gpio_chip chip;
66 struct i2c_client *client;
1673ad52 67 struct mutex lock; /* protect 'out' */
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68 struct work_struct work; /* irq demux work */
69 struct irq_domain *irq_domain; /* for irq demux */
70 spinlock_t slock; /* protect irq demux */
15fae37d 71 unsigned out; /* software latch */
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72 unsigned status; /* current status */
73 int irq; /* real irq number */
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74
75 int (*write)(struct i2c_client *client, unsigned data);
76 int (*read)(struct i2c_client *client);
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77};
78
79/*-------------------------------------------------------------------------*/
80
81/* Talk to 8-bit I/O expander */
82
0c65ddd4 83static int i2c_write_le8(struct i2c_client *client, unsigned data)
15fae37d 84{
0c65ddd4 85 return i2c_smbus_write_byte(client, data);
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DB
86}
87
0c65ddd4 88static int i2c_read_le8(struct i2c_client *client)
15fae37d 89{
0c65ddd4 90 return (int)i2c_smbus_read_byte(client);
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91}
92
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93/* Talk to 16-bit I/O expander */
94
0c65ddd4 95static int i2c_write_le16(struct i2c_client *client, unsigned word)
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96{
97 u8 buf[2] = { word & 0xff, word >> 8, };
98 int status;
99
100 status = i2c_master_send(client, buf, 2);
101 return (status < 0) ? status : 0;
102}
103
104static int i2c_read_le16(struct i2c_client *client)
105{
106 u8 buf[2];
107 int status;
108
109 status = i2c_master_recv(client, buf, 2);
110 if (status < 0)
111 return status;
112 return (buf[1] << 8) | buf[0];
113}
114
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115/*-------------------------------------------------------------------------*/
116
117static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
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118{
119 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
1673ad52 120 int status;
15fae37d 121
1673ad52 122 mutex_lock(&gpio->lock);
15fae37d 123 gpio->out |= (1 << offset);
0c65ddd4 124 status = gpio->write(gpio->client, gpio->out);
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125 mutex_unlock(&gpio->lock);
126
127 return status;
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128}
129
0c65ddd4 130static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
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131{
132 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
133 int value;
134
0c65ddd4 135 value = gpio->read(gpio->client);
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136 return (value < 0) ? 0 : (value & (1 << offset));
137}
138
0c65ddd4 139static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
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DB
140{
141 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
142 unsigned bit = 1 << offset;
1673ad52 143 int status;
15fae37d 144
1673ad52 145 mutex_lock(&gpio->lock);
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146 if (value)
147 gpio->out |= bit;
148 else
149 gpio->out &= ~bit;
0c65ddd4 150 status = gpio->write(gpio->client, gpio->out);
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151 mutex_unlock(&gpio->lock);
152
153 return status;
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154}
155
0c65ddd4 156static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
15fae37d 157{
0c65ddd4 158 pcf857x_output(chip, offset, value);
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159}
160
161/*-------------------------------------------------------------------------*/
162
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163static int pcf857x_to_irq(struct gpio_chip *chip, unsigned offset)
164{
165 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
166
167 return irq_create_mapping(gpio->irq_domain, offset);
168}
169
170static void pcf857x_irq_demux_work(struct work_struct *work)
171{
172 struct pcf857x *gpio = container_of(work,
173 struct pcf857x,
174 work);
175 unsigned long change, i, status, flags;
176
177 status = gpio->read(gpio->client);
178
179 spin_lock_irqsave(&gpio->slock, flags);
180
181 change = gpio->status ^ status;
182 for_each_set_bit(i, &change, gpio->chip.ngpio)
183 generic_handle_irq(irq_find_mapping(gpio->irq_domain, i));
184 gpio->status = status;
185
186 spin_unlock_irqrestore(&gpio->slock, flags);
187}
188
189static irqreturn_t pcf857x_irq_demux(int irq, void *data)
190{
191 struct pcf857x *gpio = data;
192
193 /*
194 * pcf857x can't read/write data here,
195 * since i2c data access might go to sleep.
196 */
197 schedule_work(&gpio->work);
198
199 return IRQ_HANDLED;
200}
201
202static int pcf857x_irq_domain_map(struct irq_domain *domain, unsigned int virq,
203 irq_hw_number_t hw)
204{
205 irq_set_chip_and_handler(virq,
206 &dummy_irq_chip,
207 handle_level_irq);
208 return 0;
209}
210
211static struct irq_domain_ops pcf857x_irq_domain_ops = {
212 .map = pcf857x_irq_domain_map,
213};
214
215static void pcf857x_irq_domain_cleanup(struct pcf857x *gpio)
216{
217 if (gpio->irq_domain)
218 irq_domain_remove(gpio->irq_domain);
219
220 if (gpio->irq)
221 free_irq(gpio->irq, gpio);
222}
223
224static int pcf857x_irq_domain_init(struct pcf857x *gpio,
225 struct pcf857x_platform_data *pdata,
226 struct device *dev)
227{
228 int status;
229
230 gpio->irq_domain = irq_domain_add_linear(dev->of_node,
231 gpio->chip.ngpio,
232 &pcf857x_irq_domain_ops,
233 NULL);
234 if (!gpio->irq_domain)
235 goto fail;
236
237 /* enable real irq */
238 status = request_irq(pdata->irq, pcf857x_irq_demux, 0,
239 dev_name(dev), gpio);
240 if (status)
241 goto fail;
242
243 /* enable gpio_to_irq() */
244 INIT_WORK(&gpio->work, pcf857x_irq_demux_work);
245 gpio->chip.to_irq = pcf857x_to_irq;
246 gpio->irq = pdata->irq;
247
248 return 0;
249
250fail:
251 pcf857x_irq_domain_cleanup(gpio);
252 return -EINVAL;
253}
254
255/*-------------------------------------------------------------------------*/
256
d2653e92
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257static int pcf857x_probe(struct i2c_client *client,
258 const struct i2c_device_id *id)
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259{
260 struct pcf857x_platform_data *pdata;
261 struct pcf857x *gpio;
262 int status;
263
264 pdata = client->dev.platform_data;
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265 if (!pdata) {
266 dev_dbg(&client->dev, "no platform data\n");
a342d215 267 }
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268
269 /* Allocate, initialize, and register this gpio_chip. */
270 gpio = kzalloc(sizeof *gpio, GFP_KERNEL);
271 if (!gpio)
272 return -ENOMEM;
273
1673ad52 274 mutex_init(&gpio->lock);
6e20a0a4 275 spin_lock_init(&gpio->slock);
1673ad52 276
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277 gpio->chip.base = pdata ? pdata->gpio_base : -1;
278 gpio->chip.can_sleep = 1;
279 gpio->chip.dev = &client->dev;
280 gpio->chip.owner = THIS_MODULE;
281 gpio->chip.get = pcf857x_get;
282 gpio->chip.set = pcf857x_set;
283 gpio->chip.direction_input = pcf857x_input;
284 gpio->chip.direction_output = pcf857x_output;
285 gpio->chip.ngpio = id->driver_data;
15fae37d 286
6e20a0a4 287 /* enable gpio_to_irq() if platform has settings */
3c052881 288 if (pdata && pdata->irq) {
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289 status = pcf857x_irq_domain_init(gpio, pdata, &client->dev);
290 if (status < 0) {
291 dev_err(&client->dev, "irq_domain init failed\n");
292 goto fail;
293 }
294 }
295
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296 /* NOTE: the OnSemi jlc1562b is also largely compatible with
297 * these parts, notably for output. It has a low-resolution
298 * DAC instead of pin change IRQs; and its inputs can be the
299 * result of comparators.
300 */
301
302 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
303 * 9670, 9672, 9764, and 9764a use quite a variety.
304 *
305 * NOTE: we don't distinguish here between *4 and *4a parts.
306 */
3760f736 307 if (gpio->chip.ngpio == 8) {
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308 gpio->write = i2c_write_le8;
309 gpio->read = i2c_read_le8;
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310
311 if (!i2c_check_functionality(client->adapter,
312 I2C_FUNC_SMBUS_BYTE))
313 status = -EIO;
314
315 /* fail if there's no chip present */
316 else
317 status = i2c_smbus_read_byte(client);
318
319 /* '75/'75c addresses are 0x20..0x27, just like the '74;
320 * the '75c doesn't have a current source pulling high.
321 * 9671, 9673, and 9765 use quite a variety of addresses.
322 *
323 * NOTE: we don't distinguish here between '75 and '75c parts.
324 */
3760f736 325 } else if (gpio->chip.ngpio == 16) {
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326 gpio->write = i2c_write_le16;
327 gpio->read = i2c_read_le16;
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328
329 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
330 status = -EIO;
331
332 /* fail if there's no chip present */
333 else
334 status = i2c_read_le16(client);
335
a342d215
BD
336 } else {
337 dev_dbg(&client->dev, "unsupported number of gpios\n");
338 status = -EINVAL;
339 }
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340
341 if (status < 0)
342 goto fail;
343
344 gpio->chip.label = client->name;
345
346 gpio->client = client;
347 i2c_set_clientdata(client, gpio);
348
349 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
350 * We can't actually know whether a pin is configured (a) as output
351 * and driving the signal low, or (b) as input and reporting a low
352 * value ... without knowing the last value written since the chip
353 * came out of reset (if any). We can't read the latched output.
354 *
355 * In short, the only reliable solution for setting up pin direction
356 * is to do it explicitly. The setup() method can do that, but it
357 * may cause transient glitching since it can't know the last value
358 * written (some pins may need to be driven low).
359 *
360 * Using pdata->n_latch avoids that trouble. When left initialized
361 * to zero, our software copy of the "latch" then matches the chip's
362 * all-ones reset state. Otherwise it flags pins to be driven low.
363 */
49946f68 364 gpio->out = pdata ? ~pdata->n_latch : ~0;
6e20a0a4 365 gpio->status = gpio->out;
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366
367 status = gpiochip_add(&gpio->chip);
368 if (status < 0)
369 goto fail;
370
371 /* NOTE: these chips can issue "some pin-changed" IRQs, which we
372 * don't yet even try to use. Among other issues, the relevant
373 * genirq state isn't available to modular drivers; and most irq
374 * methods can't be called from sleeping contexts.
375 */
376
64842aad 377 dev_info(&client->dev, "%s\n",
15fae37d
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378 client->irq ? " (irq ignored)" : "");
379
380 /* Let platform code set up the GPIOs and their users.
381 * Now is the first time anyone could use them.
382 */
49946f68 383 if (pdata && pdata->setup) {
15fae37d
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384 status = pdata->setup(client,
385 gpio->chip.base, gpio->chip.ngpio,
386 pdata->context);
387 if (status < 0)
388 dev_warn(&client->dev, "setup --> %d\n", status);
389 }
390
391 return 0;
392
393fail:
394 dev_dbg(&client->dev, "probe error %d for '%s'\n",
395 status, client->name);
6e20a0a4 396
3c052881 397 if (pdata && pdata->irq)
6e20a0a4
KM
398 pcf857x_irq_domain_cleanup(gpio);
399
15fae37d
DB
400 kfree(gpio);
401 return status;
402}
403
404static int pcf857x_remove(struct i2c_client *client)
405{
406 struct pcf857x_platform_data *pdata = client->dev.platform_data;
407 struct pcf857x *gpio = i2c_get_clientdata(client);
408 int status = 0;
409
49946f68 410 if (pdata && pdata->teardown) {
15fae37d
DB
411 status = pdata->teardown(client,
412 gpio->chip.base, gpio->chip.ngpio,
413 pdata->context);
414 if (status < 0) {
415 dev_err(&client->dev, "%s --> %d\n",
416 "teardown", status);
417 return status;
418 }
419 }
420
3c052881 421 if (pdata && pdata->irq)
6e20a0a4
KM
422 pcf857x_irq_domain_cleanup(gpio);
423
15fae37d
DB
424 status = gpiochip_remove(&gpio->chip);
425 if (status == 0)
426 kfree(gpio);
427 else
428 dev_err(&client->dev, "%s --> %d\n", "remove", status);
429 return status;
430}
431
432static struct i2c_driver pcf857x_driver = {
433 .driver = {
434 .name = "pcf857x",
435 .owner = THIS_MODULE,
436 },
437 .probe = pcf857x_probe,
438 .remove = pcf857x_remove,
3760f736 439 .id_table = pcf857x_id,
15fae37d
DB
440};
441
442static int __init pcf857x_init(void)
443{
444 return i2c_add_driver(&pcf857x_driver);
445}
2f8d1197
DB
446/* register after i2c postcore initcall and before
447 * subsys initcalls that may rely on these GPIOs
448 */
449subsys_initcall(pcf857x_init);
15fae37d
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450
451static void __exit pcf857x_exit(void)
452{
453 i2c_del_driver(&pcf857x_driver);
454}
455module_exit(pcf857x_exit);
456
457MODULE_LICENSE("GPL");
458MODULE_AUTHOR("David Brownell");
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