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c34f16b7 GB |
1 | /* Copyright (c) 2010, Code Aurora Forum. All rights reserved. |
2 | * | |
3 | * This program is free software; you can redistribute it and/or modify | |
4 | * it under the terms of the GNU General Public License version 2 and | |
5 | * only version 2 as published by the Free Software Foundation. | |
6 | * | |
7 | * This program is distributed in the hope that it will be useful, | |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
10 | * GNU General Public License for more details. | |
11 | * | |
12 | * You should have received a copy of the GNU General Public License | |
13 | * along with this program; if not, write to the Free Software | |
14 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
15 | * 02110-1301, USA. | |
16 | */ | |
17 | #include <linux/gpio.h> | |
18 | #include <linux/i2c.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/irq.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/mutex.h> | |
24 | #include <linux/slab.h> | |
c34f16b7 GB |
25 | #include <linux/i2c/sx150x.h> |
26 | ||
0ff56cd8 TG |
27 | #define NO_UPDATE_PENDING -1 |
28 | ||
ae9ca493 WC |
29 | /* The chip models of sx150x */ |
30 | #define SX150X_456 0 | |
31 | #define SX150X_789 1 | |
32 | ||
33 | struct sx150x_456_pri { | |
34 | u8 reg_pld_mode; | |
35 | u8 reg_pld_table0; | |
36 | u8 reg_pld_table1; | |
37 | u8 reg_pld_table2; | |
38 | u8 reg_pld_table3; | |
39 | u8 reg_pld_table4; | |
40 | u8 reg_advance; | |
41 | }; | |
42 | ||
43 | struct sx150x_789_pri { | |
44 | u8 reg_drain; | |
45 | u8 reg_polarity; | |
46 | u8 reg_clock; | |
47 | u8 reg_misc; | |
48 | u8 reg_reset; | |
49 | u8 ngpios; | |
50 | }; | |
51 | ||
c34f16b7 | 52 | struct sx150x_device_data { |
ae9ca493 | 53 | u8 model; |
c34f16b7 GB |
54 | u8 reg_pullup; |
55 | u8 reg_pulldn; | |
c34f16b7 GB |
56 | u8 reg_dir; |
57 | u8 reg_data; | |
58 | u8 reg_irq_mask; | |
59 | u8 reg_irq_src; | |
60 | u8 reg_sense; | |
c34f16b7 | 61 | u8 ngpios; |
ae9ca493 WC |
62 | union { |
63 | struct sx150x_456_pri x456; | |
64 | struct sx150x_789_pri x789; | |
65 | } pri; | |
c34f16b7 GB |
66 | }; |
67 | ||
68 | struct sx150x_chip { | |
69 | struct gpio_chip gpio_chip; | |
70 | struct i2c_client *client; | |
71 | const struct sx150x_device_data *dev_cfg; | |
72 | int irq_summary; | |
73 | int irq_base; | |
0ff56cd8 | 74 | int irq_update; |
c34f16b7 | 75 | u32 irq_sense; |
0ff56cd8 TG |
76 | u32 irq_masked; |
77 | u32 dev_sense; | |
78 | u32 dev_masked; | |
c34f16b7 GB |
79 | struct irq_chip irq_chip; |
80 | struct mutex lock; | |
81 | }; | |
82 | ||
83 | static const struct sx150x_device_data sx150x_devices[] = { | |
84 | [0] = { /* sx1508q */ | |
ae9ca493 WC |
85 | .model = SX150X_789, |
86 | .reg_pullup = 0x03, | |
87 | .reg_pulldn = 0x04, | |
88 | .reg_dir = 0x07, | |
89 | .reg_data = 0x08, | |
90 | .reg_irq_mask = 0x09, | |
91 | .reg_irq_src = 0x0c, | |
92 | .reg_sense = 0x0b, | |
93 | .pri.x789 = { | |
94 | .reg_drain = 0x05, | |
95 | .reg_polarity = 0x06, | |
96 | .reg_clock = 0x0f, | |
97 | .reg_misc = 0x10, | |
98 | .reg_reset = 0x7d, | |
99 | }, | |
100 | .ngpios = 8, | |
c34f16b7 GB |
101 | }, |
102 | [1] = { /* sx1509q */ | |
ae9ca493 WC |
103 | .model = SX150X_789, |
104 | .reg_pullup = 0x07, | |
105 | .reg_pulldn = 0x09, | |
106 | .reg_dir = 0x0f, | |
107 | .reg_data = 0x11, | |
108 | .reg_irq_mask = 0x13, | |
109 | .reg_irq_src = 0x19, | |
110 | .reg_sense = 0x17, | |
111 | .pri.x789 = { | |
112 | .reg_drain = 0x0b, | |
113 | .reg_polarity = 0x0d, | |
114 | .reg_clock = 0x1e, | |
115 | .reg_misc = 0x1f, | |
116 | .reg_reset = 0x7d, | |
117 | }, | |
118 | .ngpios = 16 | |
119 | }, | |
120 | [2] = { /* sx1506q */ | |
121 | .model = SX150X_456, | |
122 | .reg_pullup = 0x05, | |
123 | .reg_pulldn = 0x07, | |
124 | .reg_dir = 0x03, | |
125 | .reg_data = 0x01, | |
126 | .reg_irq_mask = 0x09, | |
127 | .reg_irq_src = 0x0f, | |
128 | .reg_sense = 0x0d, | |
129 | .pri.x456 = { | |
130 | .reg_pld_mode = 0x21, | |
131 | .reg_pld_table0 = 0x23, | |
132 | .reg_pld_table1 = 0x25, | |
133 | .reg_pld_table2 = 0x27, | |
134 | .reg_pld_table3 = 0x29, | |
135 | .reg_pld_table4 = 0x2b, | |
136 | .reg_advance = 0xad, | |
137 | }, | |
138 | .ngpios = 16 | |
c34f16b7 GB |
139 | }, |
140 | }; | |
141 | ||
142 | static const struct i2c_device_id sx150x_id[] = { | |
143 | {"sx1508q", 0}, | |
144 | {"sx1509q", 1}, | |
ae9ca493 | 145 | {"sx1506q", 2}, |
c34f16b7 GB |
146 | {} |
147 | }; | |
148 | MODULE_DEVICE_TABLE(i2c, sx150x_id); | |
149 | ||
150 | static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val) | |
151 | { | |
152 | s32 err = i2c_smbus_write_byte_data(client, reg, val); | |
153 | ||
154 | if (err < 0) | |
155 | dev_warn(&client->dev, | |
156 | "i2c write fail: can't write %02x to %02x: %d\n", | |
157 | val, reg, err); | |
158 | return err; | |
159 | } | |
160 | ||
161 | static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val) | |
162 | { | |
163 | s32 err = i2c_smbus_read_byte_data(client, reg); | |
164 | ||
165 | if (err >= 0) | |
166 | *val = err; | |
167 | else | |
168 | dev_warn(&client->dev, | |
169 | "i2c read fail: can't read from %02x: %d\n", | |
170 | reg, err); | |
171 | return err; | |
172 | } | |
173 | ||
174 | static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset) | |
175 | { | |
176 | return (chip->dev_cfg->ngpios == offset); | |
177 | } | |
178 | ||
179 | /* | |
180 | * These utility functions solve the common problem of locating and setting | |
181 | * configuration bits. Configuration bits are grouped into registers | |
182 | * whose indexes increase downwards. For example, with eight-bit registers, | |
183 | * sixteen gpios would have their config bits grouped in the following order: | |
184 | * REGISTER N-1 [ f e d c b a 9 8 ] | |
185 | * N [ 7 6 5 4 3 2 1 0 ] | |
186 | * | |
187 | * For multi-bit configurations, the pattern gets wider: | |
188 | * REGISTER N-3 [ f f e e d d c c ] | |
189 | * N-2 [ b b a a 9 9 8 8 ] | |
190 | * N-1 [ 7 7 6 6 5 5 4 4 ] | |
191 | * N [ 3 3 2 2 1 1 0 0 ] | |
192 | * | |
193 | * Given the address of the starting register 'N', the index of the gpio | |
194 | * whose configuration we seek to change, and the width in bits of that | |
195 | * configuration, these functions allow us to locate the correct | |
196 | * register and mask the correct bits. | |
197 | */ | |
198 | static inline void sx150x_find_cfg(u8 offset, u8 width, | |
199 | u8 *reg, u8 *mask, u8 *shift) | |
200 | { | |
201 | *reg -= offset * width / 8; | |
202 | *mask = (1 << width) - 1; | |
203 | *shift = (offset * width) % 8; | |
204 | *mask <<= *shift; | |
205 | } | |
206 | ||
207 | static s32 sx150x_write_cfg(struct sx150x_chip *chip, | |
208 | u8 offset, u8 width, u8 reg, u8 val) | |
209 | { | |
210 | u8 mask; | |
211 | u8 data; | |
212 | u8 shift; | |
213 | s32 err; | |
214 | ||
215 | sx150x_find_cfg(offset, width, ®, &mask, &shift); | |
216 | err = sx150x_i2c_read(chip->client, reg, &data); | |
217 | if (err < 0) | |
218 | return err; | |
219 | ||
220 | data &= ~mask; | |
221 | data |= (val << shift) & mask; | |
222 | return sx150x_i2c_write(chip->client, reg, data); | |
223 | } | |
224 | ||
225 | static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset) | |
226 | { | |
227 | u8 reg = chip->dev_cfg->reg_data; | |
228 | u8 mask; | |
229 | u8 data; | |
230 | u8 shift; | |
231 | s32 err; | |
232 | ||
233 | sx150x_find_cfg(offset, 1, ®, &mask, &shift); | |
234 | err = sx150x_i2c_read(chip->client, reg, &data); | |
235 | if (err >= 0) | |
236 | err = (data & mask) != 0 ? 1 : 0; | |
237 | ||
238 | return err; | |
239 | } | |
240 | ||
241 | static void sx150x_set_oscio(struct sx150x_chip *chip, int val) | |
242 | { | |
243 | sx150x_i2c_write(chip->client, | |
ae9ca493 | 244 | chip->dev_cfg->pri.x789.reg_clock, |
c34f16b7 GB |
245 | (val ? 0x1f : 0x10)); |
246 | } | |
247 | ||
248 | static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val) | |
249 | { | |
250 | sx150x_write_cfg(chip, | |
251 | offset, | |
252 | 1, | |
253 | chip->dev_cfg->reg_data, | |
254 | (val ? 1 : 0)); | |
255 | } | |
256 | ||
257 | static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset) | |
258 | { | |
259 | return sx150x_write_cfg(chip, | |
260 | offset, | |
261 | 1, | |
262 | chip->dev_cfg->reg_dir, | |
263 | 1); | |
264 | } | |
265 | ||
266 | static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val) | |
267 | { | |
268 | int err; | |
269 | ||
270 | err = sx150x_write_cfg(chip, | |
271 | offset, | |
272 | 1, | |
273 | chip->dev_cfg->reg_data, | |
274 | (val ? 1 : 0)); | |
275 | if (err >= 0) | |
276 | err = sx150x_write_cfg(chip, | |
277 | offset, | |
278 | 1, | |
279 | chip->dev_cfg->reg_dir, | |
280 | 0); | |
281 | return err; | |
282 | } | |
283 | ||
284 | static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset) | |
285 | { | |
286 | struct sx150x_chip *chip; | |
287 | int status = -EINVAL; | |
288 | ||
289 | chip = container_of(gc, struct sx150x_chip, gpio_chip); | |
290 | ||
291 | if (!offset_is_oscio(chip, offset)) { | |
292 | mutex_lock(&chip->lock); | |
293 | status = sx150x_get_io(chip, offset); | |
294 | mutex_unlock(&chip->lock); | |
295 | } | |
296 | ||
297 | return status; | |
298 | } | |
299 | ||
300 | static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val) | |
301 | { | |
302 | struct sx150x_chip *chip; | |
303 | ||
304 | chip = container_of(gc, struct sx150x_chip, gpio_chip); | |
305 | ||
306 | mutex_lock(&chip->lock); | |
307 | if (offset_is_oscio(chip, offset)) | |
308 | sx150x_set_oscio(chip, val); | |
309 | else | |
310 | sx150x_set_io(chip, offset, val); | |
311 | mutex_unlock(&chip->lock); | |
312 | } | |
313 | ||
314 | static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset) | |
315 | { | |
316 | struct sx150x_chip *chip; | |
317 | int status = -EINVAL; | |
318 | ||
319 | chip = container_of(gc, struct sx150x_chip, gpio_chip); | |
320 | ||
321 | if (!offset_is_oscio(chip, offset)) { | |
322 | mutex_lock(&chip->lock); | |
323 | status = sx150x_io_input(chip, offset); | |
324 | mutex_unlock(&chip->lock); | |
325 | } | |
326 | return status; | |
327 | } | |
328 | ||
329 | static int sx150x_gpio_direction_output(struct gpio_chip *gc, | |
330 | unsigned offset, | |
331 | int val) | |
332 | { | |
333 | struct sx150x_chip *chip; | |
334 | int status = 0; | |
335 | ||
336 | chip = container_of(gc, struct sx150x_chip, gpio_chip); | |
337 | ||
338 | if (!offset_is_oscio(chip, offset)) { | |
339 | mutex_lock(&chip->lock); | |
340 | status = sx150x_io_output(chip, offset, val); | |
341 | mutex_unlock(&chip->lock); | |
342 | } | |
343 | return status; | |
344 | } | |
345 | ||
673860c1 | 346 | static void sx150x_irq_mask(struct irq_data *d) |
c34f16b7 | 347 | { |
a3b93081 | 348 | struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); |
093e9435 | 349 | unsigned n = d->hwirq; |
c34f16b7 | 350 | |
0ff56cd8 TG |
351 | chip->irq_masked |= (1 << n); |
352 | chip->irq_update = n; | |
c34f16b7 GB |
353 | } |
354 | ||
673860c1 | 355 | static void sx150x_irq_unmask(struct irq_data *d) |
c34f16b7 | 356 | { |
a3b93081 | 357 | struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); |
093e9435 | 358 | unsigned n = d->hwirq; |
c34f16b7 | 359 | |
0ff56cd8 TG |
360 | chip->irq_masked &= ~(1 << n); |
361 | chip->irq_update = n; | |
c34f16b7 GB |
362 | } |
363 | ||
673860c1 | 364 | static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type) |
c34f16b7 | 365 | { |
a3b93081 | 366 | struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); |
c34f16b7 GB |
367 | unsigned n, val = 0; |
368 | ||
369 | if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) | |
370 | return -EINVAL; | |
371 | ||
093e9435 | 372 | n = d->hwirq; |
c34f16b7 GB |
373 | |
374 | if (flow_type & IRQ_TYPE_EDGE_RISING) | |
375 | val |= 0x1; | |
376 | if (flow_type & IRQ_TYPE_EDGE_FALLING) | |
377 | val |= 0x2; | |
378 | ||
379 | chip->irq_sense &= ~(3UL << (n * 2)); | |
380 | chip->irq_sense |= val << (n * 2); | |
0ff56cd8 | 381 | chip->irq_update = n; |
c34f16b7 GB |
382 | return 0; |
383 | } | |
384 | ||
385 | static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id) | |
386 | { | |
387 | struct sx150x_chip *chip = (struct sx150x_chip *)dev_id; | |
388 | unsigned nhandled = 0; | |
389 | unsigned sub_irq; | |
390 | unsigned n; | |
391 | s32 err; | |
392 | u8 val; | |
393 | int i; | |
394 | ||
395 | for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) { | |
396 | err = sx150x_i2c_read(chip->client, | |
397 | chip->dev_cfg->reg_irq_src - i, | |
398 | &val); | |
399 | if (err < 0) | |
400 | continue; | |
401 | ||
402 | sx150x_i2c_write(chip->client, | |
403 | chip->dev_cfg->reg_irq_src - i, | |
404 | val); | |
405 | for (n = 0; n < 8; ++n) { | |
406 | if (val & (1 << n)) { | |
093e9435 WC |
407 | sub_irq = irq_find_mapping( |
408 | chip->gpio_chip.irqdomain, | |
409 | (i * 8) + n); | |
c34f16b7 GB |
410 | handle_nested_irq(sub_irq); |
411 | ++nhandled; | |
412 | } | |
413 | } | |
414 | } | |
415 | ||
416 | return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE); | |
417 | } | |
418 | ||
673860c1 | 419 | static void sx150x_irq_bus_lock(struct irq_data *d) |
c34f16b7 | 420 | { |
a3b93081 | 421 | struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); |
c34f16b7 GB |
422 | |
423 | mutex_lock(&chip->lock); | |
424 | } | |
425 | ||
673860c1 | 426 | static void sx150x_irq_bus_sync_unlock(struct irq_data *d) |
c34f16b7 | 427 | { |
a3b93081 | 428 | struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); |
c34f16b7 GB |
429 | unsigned n; |
430 | ||
0ff56cd8 TG |
431 | if (chip->irq_update == NO_UPDATE_PENDING) |
432 | goto out; | |
433 | ||
434 | n = chip->irq_update; | |
435 | chip->irq_update = NO_UPDATE_PENDING; | |
c34f16b7 | 436 | |
0ff56cd8 TG |
437 | /* Avoid updates if nothing changed */ |
438 | if (chip->dev_sense == chip->irq_sense && | |
aab0b129 | 439 | chip->dev_masked == chip->irq_masked) |
0ff56cd8 TG |
440 | goto out; |
441 | ||
442 | chip->dev_sense = chip->irq_sense; | |
443 | chip->dev_masked = chip->irq_masked; | |
444 | ||
445 | if (chip->irq_masked & (1 << n)) { | |
446 | sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1); | |
447 | sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0); | |
448 | } else { | |
449 | sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0); | |
450 | sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, | |
451 | chip->irq_sense >> (n * 2)); | |
452 | } | |
453 | out: | |
c34f16b7 GB |
454 | mutex_unlock(&chip->lock); |
455 | } | |
456 | ||
457 | static void sx150x_init_chip(struct sx150x_chip *chip, | |
458 | struct i2c_client *client, | |
459 | kernel_ulong_t driver_data, | |
460 | struct sx150x_platform_data *pdata) | |
461 | { | |
462 | mutex_init(&chip->lock); | |
463 | ||
464 | chip->client = client; | |
465 | chip->dev_cfg = &sx150x_devices[driver_data]; | |
093e9435 | 466 | chip->gpio_chip.dev = &client->dev; |
c34f16b7 GB |
467 | chip->gpio_chip.label = client->name; |
468 | chip->gpio_chip.direction_input = sx150x_gpio_direction_input; | |
469 | chip->gpio_chip.direction_output = sx150x_gpio_direction_output; | |
470 | chip->gpio_chip.get = sx150x_gpio_get; | |
471 | chip->gpio_chip.set = sx150x_gpio_set; | |
c34f16b7 | 472 | chip->gpio_chip.base = pdata->gpio_base; |
9fb1f39e | 473 | chip->gpio_chip.can_sleep = true; |
c34f16b7 GB |
474 | chip->gpio_chip.ngpio = chip->dev_cfg->ngpios; |
475 | if (pdata->oscio_is_gpo) | |
476 | ++chip->gpio_chip.ngpio; | |
477 | ||
673860c1 LB |
478 | chip->irq_chip.name = client->name; |
479 | chip->irq_chip.irq_mask = sx150x_irq_mask; | |
480 | chip->irq_chip.irq_unmask = sx150x_irq_unmask; | |
481 | chip->irq_chip.irq_set_type = sx150x_irq_set_type; | |
482 | chip->irq_chip.irq_bus_lock = sx150x_irq_bus_lock; | |
483 | chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock; | |
484 | chip->irq_summary = -1; | |
485 | chip->irq_base = -1; | |
0ff56cd8 | 486 | chip->irq_masked = ~0; |
673860c1 | 487 | chip->irq_sense = 0; |
0ff56cd8 TG |
488 | chip->dev_masked = ~0; |
489 | chip->dev_sense = 0; | |
490 | chip->irq_update = NO_UPDATE_PENDING; | |
c34f16b7 GB |
491 | } |
492 | ||
493 | static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg) | |
494 | { | |
495 | int err = 0; | |
496 | unsigned n; | |
497 | ||
498 | for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n) | |
499 | err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8)); | |
500 | return err; | |
501 | } | |
502 | ||
5affb607 | 503 | static int sx150x_reset(struct sx150x_chip *chip) |
c34f16b7 | 504 | { |
5affb607 | 505 | int err; |
c34f16b7 | 506 | |
5affb607 | 507 | err = i2c_smbus_write_byte_data(chip->client, |
ae9ca493 | 508 | chip->dev_cfg->pri.x789.reg_reset, |
5affb607 | 509 | 0x12); |
c34f16b7 GB |
510 | if (err < 0) |
511 | return err; | |
512 | ||
5affb607 | 513 | err = i2c_smbus_write_byte_data(chip->client, |
ae9ca493 | 514 | chip->dev_cfg->pri.x789.reg_reset, |
5affb607 GB |
515 | 0x34); |
516 | return err; | |
517 | } | |
518 | ||
519 | static int sx150x_init_hw(struct sx150x_chip *chip, | |
520 | struct sx150x_platform_data *pdata) | |
521 | { | |
522 | int err = 0; | |
523 | ||
524 | if (pdata->reset_during_probe) { | |
525 | err = sx150x_reset(chip); | |
526 | if (err < 0) | |
527 | return err; | |
528 | } | |
529 | ||
ae9ca493 WC |
530 | if (chip->dev_cfg->model == SX150X_789) |
531 | err = sx150x_i2c_write(chip->client, | |
532 | chip->dev_cfg->pri.x789.reg_misc, | |
533 | 0x01); | |
534 | else | |
535 | err = sx150x_i2c_write(chip->client, | |
536 | chip->dev_cfg->pri.x456.reg_advance, | |
537 | 0x04); | |
c34f16b7 GB |
538 | if (err < 0) |
539 | return err; | |
540 | ||
541 | err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup, | |
542 | pdata->io_pullup_ena); | |
543 | if (err < 0) | |
544 | return err; | |
545 | ||
546 | err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn, | |
547 | pdata->io_pulldn_ena); | |
548 | if (err < 0) | |
549 | return err; | |
550 | ||
ae9ca493 WC |
551 | if (chip->dev_cfg->model == SX150X_789) { |
552 | err = sx150x_init_io(chip, | |
553 | chip->dev_cfg->pri.x789.reg_drain, | |
554 | pdata->io_open_drain_ena); | |
555 | if (err < 0) | |
556 | return err; | |
557 | ||
558 | err = sx150x_init_io(chip, | |
559 | chip->dev_cfg->pri.x789.reg_polarity, | |
560 | pdata->io_polarity); | |
561 | if (err < 0) | |
562 | return err; | |
563 | } else { | |
564 | /* Set all pins to work in normal mode */ | |
565 | err = sx150x_init_io(chip, | |
566 | chip->dev_cfg->pri.x456.reg_pld_mode, | |
567 | 0); | |
568 | if (err < 0) | |
569 | return err; | |
570 | } | |
c34f16b7 | 571 | |
c34f16b7 GB |
572 | |
573 | if (pdata->oscio_is_gpo) | |
574 | sx150x_set_oscio(chip, 0); | |
575 | ||
576 | return err; | |
577 | } | |
578 | ||
579 | static int sx150x_install_irq_chip(struct sx150x_chip *chip, | |
580 | int irq_summary, | |
581 | int irq_base) | |
582 | { | |
583 | int err; | |
c34f16b7 GB |
584 | |
585 | chip->irq_summary = irq_summary; | |
586 | chip->irq_base = irq_base; | |
587 | ||
093e9435 WC |
588 | /* Add gpio chip to irq subsystem */ |
589 | err = gpiochip_irqchip_add(&chip->gpio_chip, | |
590 | &chip->irq_chip, chip->irq_base, | |
591 | handle_edge_irq, IRQ_TYPE_EDGE_BOTH); | |
592 | if (err) { | |
593 | dev_err(&chip->client->dev, | |
594 | "could not connect irqchip to gpiochip\n"); | |
595 | return err; | |
c34f16b7 GB |
596 | } |
597 | ||
644c8df2 | 598 | err = devm_request_threaded_irq(&chip->client->dev, |
093e9435 WC |
599 | irq_summary, NULL, sx150x_irq_thread_fn, |
600 | IRQF_ONESHOT | IRQF_SHARED | IRQF_TRIGGER_FALLING, | |
601 | chip->irq_chip.name, chip); | |
c34f16b7 GB |
602 | if (err < 0) { |
603 | chip->irq_summary = -1; | |
604 | chip->irq_base = -1; | |
605 | } | |
606 | ||
607 | return err; | |
608 | } | |
609 | ||
3836309d | 610 | static int sx150x_probe(struct i2c_client *client, |
c34f16b7 GB |
611 | const struct i2c_device_id *id) |
612 | { | |
613 | static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA | | |
614 | I2C_FUNC_SMBUS_WRITE_WORD_DATA; | |
615 | struct sx150x_platform_data *pdata; | |
616 | struct sx150x_chip *chip; | |
617 | int rc; | |
618 | ||
e56aee18 | 619 | pdata = dev_get_platdata(&client->dev); |
c34f16b7 GB |
620 | if (!pdata) |
621 | return -EINVAL; | |
622 | ||
623 | if (!i2c_check_functionality(client->adapter, i2c_funcs)) | |
624 | return -ENOSYS; | |
625 | ||
644c8df2 NB |
626 | chip = devm_kzalloc(&client->dev, |
627 | sizeof(struct sx150x_chip), GFP_KERNEL); | |
c34f16b7 GB |
628 | if (!chip) |
629 | return -ENOMEM; | |
630 | ||
631 | sx150x_init_chip(chip, client, id->driver_data, pdata); | |
632 | rc = sx150x_init_hw(chip, pdata); | |
633 | if (rc < 0) | |
644c8df2 | 634 | return rc; |
c34f16b7 GB |
635 | |
636 | rc = gpiochip_add(&chip->gpio_chip); | |
644c8df2 NB |
637 | if (rc) |
638 | return rc; | |
c34f16b7 GB |
639 | |
640 | if (pdata->irq_summary >= 0) { | |
641 | rc = sx150x_install_irq_chip(chip, | |
642 | pdata->irq_summary, | |
643 | pdata->irq_base); | |
644 | if (rc < 0) | |
645 | goto probe_fail_post_gpiochip_add; | |
646 | } | |
647 | ||
648 | i2c_set_clientdata(client, chip); | |
649 | ||
650 | return 0; | |
651 | probe_fail_post_gpiochip_add: | |
9f5132ae | 652 | gpiochip_remove(&chip->gpio_chip); |
c34f16b7 GB |
653 | return rc; |
654 | } | |
655 | ||
206210ce | 656 | static int sx150x_remove(struct i2c_client *client) |
c34f16b7 GB |
657 | { |
658 | struct sx150x_chip *chip; | |
c34f16b7 GB |
659 | |
660 | chip = i2c_get_clientdata(client); | |
9f5132ae | 661 | gpiochip_remove(&chip->gpio_chip); |
c34f16b7 | 662 | |
c34f16b7 GB |
663 | return 0; |
664 | } | |
665 | ||
666 | static struct i2c_driver sx150x_driver = { | |
667 | .driver = { | |
668 | .name = "sx150x", | |
669 | .owner = THIS_MODULE | |
670 | }, | |
671 | .probe = sx150x_probe, | |
8283c4ff | 672 | .remove = sx150x_remove, |
c34f16b7 GB |
673 | .id_table = sx150x_id, |
674 | }; | |
675 | ||
676 | static int __init sx150x_init(void) | |
677 | { | |
678 | return i2c_add_driver(&sx150x_driver); | |
679 | } | |
680 | subsys_initcall(sx150x_init); | |
681 | ||
682 | static void __exit sx150x_exit(void) | |
683 | { | |
684 | return i2c_del_driver(&sx150x_driver); | |
685 | } | |
686 | module_exit(sx150x_exit); | |
687 | ||
688 | MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>"); | |
689 | MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders"); | |
690 | MODULE_LICENSE("GPL v2"); | |
691 | MODULE_ALIAS("i2c:sx150x"); |