Commit | Line | Data |
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0bcb6069 | 1 | /* |
74600ee0 | 2 | * Xilinx gpio driver for xps/axi_gpio IP. |
0bcb6069 | 3 | * |
74600ee0 | 4 | * Copyright 2008 - 2013 Xilinx, Inc. |
0bcb6069 JL |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 | |
8 | * as published by the Free Software Foundation. | |
9 | * | |
10 | * You should have received a copy of the GNU General Public License | |
11 | * along with this program; if not, write to the Free Software | |
12 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
13 | */ | |
14 | ||
74600ee0 | 15 | #include <linux/bitops.h> |
0bcb6069 JL |
16 | #include <linux/init.h> |
17 | #include <linux/errno.h> | |
bb207ef1 | 18 | #include <linux/module.h> |
0bcb6069 JL |
19 | #include <linux/of_device.h> |
20 | #include <linux/of_platform.h> | |
21 | #include <linux/of_gpio.h> | |
22 | #include <linux/io.h> | |
23 | #include <linux/gpio.h> | |
5a0e3ad6 | 24 | #include <linux/slab.h> |
0bcb6069 JL |
25 | |
26 | /* Register Offset Definitions */ | |
27 | #define XGPIO_DATA_OFFSET (0x0) /* Data register */ | |
28 | #define XGPIO_TRI_OFFSET (0x4) /* I/O direction register */ | |
29 | ||
74600ee0 MS |
30 | #define XGPIO_CHANNEL_OFFSET 0x8 |
31 | ||
32 | /* Read/Write access to the GPIO registers */ | |
c54c58ba | 33 | #if defined(CONFIG_ARCH_ZYNQ) || defined(CONFIG_X86) |
cc090d61 MS |
34 | # define xgpio_readreg(offset) readl(offset) |
35 | # define xgpio_writereg(offset, val) writel(val, offset) | |
36 | #else | |
37 | # define xgpio_readreg(offset) __raw_readl(offset) | |
38 | # define xgpio_writereg(offset, val) __raw_writel(val, offset) | |
39 | #endif | |
74600ee0 MS |
40 | |
41 | /** | |
42 | * struct xgpio_instance - Stores information about GPIO device | |
4ae798fa | 43 | * @mmchip: OF GPIO chip for memory mapped banks |
3c1b5c9b | 44 | * @gpio_width: GPIO width for every channel |
4ae798fa RRD |
45 | * @gpio_state: GPIO state shadow register |
46 | * @gpio_dir: GPIO direction shadow register | |
47 | * @gpio_lock: Lock used for synchronization | |
74600ee0 | 48 | */ |
0bcb6069 JL |
49 | struct xgpio_instance { |
50 | struct of_mm_gpio_chip mmchip; | |
1d6902d3 RRD |
51 | unsigned int gpio_width[2]; |
52 | u32 gpio_state[2]; | |
53 | u32 gpio_dir[2]; | |
54 | spinlock_t gpio_lock[2]; | |
749564ff RRD |
55 | }; |
56 | ||
1d6902d3 RRD |
57 | static inline int xgpio_index(struct xgpio_instance *chip, int gpio) |
58 | { | |
59 | if (gpio >= chip->gpio_width[0]) | |
60 | return 1; | |
61 | ||
62 | return 0; | |
63 | } | |
64 | ||
65 | static inline int xgpio_regoffset(struct xgpio_instance *chip, int gpio) | |
66 | { | |
67 | if (xgpio_index(chip, gpio)) | |
68 | return XGPIO_CHANNEL_OFFSET; | |
69 | ||
70 | return 0; | |
71 | } | |
72 | ||
73 | static inline int xgpio_offset(struct xgpio_instance *chip, int gpio) | |
74 | { | |
75 | if (xgpio_index(chip, gpio)) | |
76 | return gpio - chip->gpio_width[0]; | |
77 | ||
78 | return gpio; | |
79 | } | |
0bcb6069 JL |
80 | |
81 | /** | |
82 | * xgpio_get - Read the specified signal of the GPIO device. | |
83 | * @gc: Pointer to gpio_chip device structure. | |
84 | * @gpio: GPIO signal number. | |
85 | * | |
4ae798fa RRD |
86 | * This function reads the specified signal of the GPIO device. |
87 | * | |
88 | * Return: | |
89 | * 0 if direction of GPIO signals is set as input otherwise it | |
90 | * returns negative error value. | |
0bcb6069 JL |
91 | */ |
92 | static int xgpio_get(struct gpio_chip *gc, unsigned int gpio) | |
93 | { | |
94 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | |
097d88e9 | 95 | struct xgpio_instance *chip = gpiochip_get_data(gc); |
1d6902d3 | 96 | u32 val; |
0bcb6069 | 97 | |
1d6902d3 RRD |
98 | val = xgpio_readreg(mm_gc->regs + XGPIO_DATA_OFFSET + |
99 | xgpio_regoffset(chip, gpio)); | |
100 | ||
101 | return !!(val & BIT(xgpio_offset(chip, gpio))); | |
0bcb6069 JL |
102 | } |
103 | ||
104 | /** | |
105 | * xgpio_set - Write the specified signal of the GPIO device. | |
106 | * @gc: Pointer to gpio_chip device structure. | |
107 | * @gpio: GPIO signal number. | |
108 | * @val: Value to be written to specified signal. | |
109 | * | |
110 | * This function writes the specified value in to the specified signal of the | |
111 | * GPIO device. | |
112 | */ | |
113 | static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | |
114 | { | |
115 | unsigned long flags; | |
116 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | |
097d88e9 | 117 | struct xgpio_instance *chip = gpiochip_get_data(gc); |
1d6902d3 RRD |
118 | int index = xgpio_index(chip, gpio); |
119 | int offset = xgpio_offset(chip, gpio); | |
0bcb6069 | 120 | |
1d6902d3 | 121 | spin_lock_irqsave(&chip->gpio_lock[index], flags); |
0bcb6069 JL |
122 | |
123 | /* Write to GPIO signal and set its direction to output */ | |
124 | if (val) | |
1d6902d3 | 125 | chip->gpio_state[index] |= BIT(offset); |
0bcb6069 | 126 | else |
1d6902d3 | 127 | chip->gpio_state[index] &= ~BIT(offset); |
74600ee0 | 128 | |
1d6902d3 RRD |
129 | xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET + |
130 | xgpio_regoffset(chip, gpio), chip->gpio_state[index]); | |
0bcb6069 | 131 | |
1d6902d3 | 132 | spin_unlock_irqrestore(&chip->gpio_lock[index], flags); |
0bcb6069 JL |
133 | } |
134 | ||
135 | /** | |
136 | * xgpio_dir_in - Set the direction of the specified GPIO signal as input. | |
137 | * @gc: Pointer to gpio_chip device structure. | |
138 | * @gpio: GPIO signal number. | |
139 | * | |
4ae798fa RRD |
140 | * Return: |
141 | * 0 - if direction of GPIO signals is set as input | |
142 | * otherwise it returns negative error value. | |
0bcb6069 JL |
143 | */ |
144 | static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) | |
145 | { | |
146 | unsigned long flags; | |
147 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | |
097d88e9 | 148 | struct xgpio_instance *chip = gpiochip_get_data(gc); |
1d6902d3 RRD |
149 | int index = xgpio_index(chip, gpio); |
150 | int offset = xgpio_offset(chip, gpio); | |
0bcb6069 | 151 | |
1d6902d3 | 152 | spin_lock_irqsave(&chip->gpio_lock[index], flags); |
0bcb6069 JL |
153 | |
154 | /* Set the GPIO bit in shadow register and set direction as input */ | |
1d6902d3 RRD |
155 | chip->gpio_dir[index] |= BIT(offset); |
156 | xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET + | |
157 | xgpio_regoffset(chip, gpio), chip->gpio_dir[index]); | |
0bcb6069 | 158 | |
1d6902d3 | 159 | spin_unlock_irqrestore(&chip->gpio_lock[index], flags); |
0bcb6069 JL |
160 | |
161 | return 0; | |
162 | } | |
163 | ||
164 | /** | |
165 | * xgpio_dir_out - Set the direction of the specified GPIO signal as output. | |
166 | * @gc: Pointer to gpio_chip device structure. | |
167 | * @gpio: GPIO signal number. | |
168 | * @val: Value to be written to specified signal. | |
169 | * | |
4ae798fa RRD |
170 | * This function sets the direction of specified GPIO signal as output. |
171 | * | |
172 | * Return: | |
173 | * If all GPIO signals of GPIO chip is configured as input then it returns | |
0bcb6069 JL |
174 | * error otherwise it returns 0. |
175 | */ | |
176 | static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | |
177 | { | |
178 | unsigned long flags; | |
179 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | |
097d88e9 | 180 | struct xgpio_instance *chip = gpiochip_get_data(gc); |
1d6902d3 RRD |
181 | int index = xgpio_index(chip, gpio); |
182 | int offset = xgpio_offset(chip, gpio); | |
0bcb6069 | 183 | |
1d6902d3 | 184 | spin_lock_irqsave(&chip->gpio_lock[index], flags); |
0bcb6069 JL |
185 | |
186 | /* Write state of GPIO signal */ | |
187 | if (val) | |
1d6902d3 | 188 | chip->gpio_state[index] |= BIT(offset); |
0bcb6069 | 189 | else |
1d6902d3 RRD |
190 | chip->gpio_state[index] &= ~BIT(offset); |
191 | xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET + | |
192 | xgpio_regoffset(chip, gpio), chip->gpio_state[index]); | |
0bcb6069 JL |
193 | |
194 | /* Clear the GPIO bit in shadow register and set direction as output */ | |
1d6902d3 RRD |
195 | chip->gpio_dir[index] &= ~BIT(offset); |
196 | xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET + | |
197 | xgpio_regoffset(chip, gpio), chip->gpio_dir[index]); | |
0bcb6069 | 198 | |
1d6902d3 | 199 | spin_unlock_irqrestore(&chip->gpio_lock[index], flags); |
0bcb6069 JL |
200 | |
201 | return 0; | |
202 | } | |
203 | ||
204 | /** | |
205 | * xgpio_save_regs - Set initial values of GPIO pins | |
4ae798fa | 206 | * @mm_gc: Pointer to memory mapped GPIO chip structure |
0bcb6069 JL |
207 | */ |
208 | static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc) | |
209 | { | |
de06c1db GR |
210 | struct xgpio_instance *chip = |
211 | container_of(mm_gc, struct xgpio_instance, mmchip); | |
0bcb6069 | 212 | |
1d6902d3 RRD |
213 | xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state[0]); |
214 | xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir[0]); | |
215 | ||
216 | if (!chip->gpio_width[1]) | |
217 | return; | |
218 | ||
5b2c9121 | 219 | xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET + XGPIO_CHANNEL_OFFSET, |
1d6902d3 | 220 | chip->gpio_state[1]); |
5b2c9121 | 221 | xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET + XGPIO_CHANNEL_OFFSET, |
1d6902d3 | 222 | chip->gpio_dir[1]); |
0bcb6069 JL |
223 | } |
224 | ||
749564ff RRD |
225 | /** |
226 | * xgpio_remove - Remove method for the GPIO device. | |
227 | * @pdev: pointer to the platform device | |
228 | * | |
229 | * This function remove gpiochips and frees all the allocated resources. | |
3c1b5c9b MS |
230 | * |
231 | * Return: 0 always | |
749564ff RRD |
232 | */ |
233 | static int xgpio_remove(struct platform_device *pdev) | |
234 | { | |
1d6902d3 | 235 | struct xgpio_instance *chip = platform_get_drvdata(pdev); |
749564ff | 236 | |
c458e450 | 237 | of_mm_gpiochip_remove(&chip->mmchip); |
749564ff RRD |
238 | |
239 | return 0; | |
240 | } | |
241 | ||
0bcb6069 JL |
242 | /** |
243 | * xgpio_of_probe - Probe method for the GPIO device. | |
749564ff | 244 | * @pdev: pointer to the platform device |
0bcb6069 | 245 | * |
4ae798fa RRD |
246 | * Return: |
247 | * It returns 0, if the driver is bound to the GPIO device, or | |
248 | * a negative value if there is an error. | |
0bcb6069 | 249 | */ |
749564ff | 250 | static int xgpio_probe(struct platform_device *pdev) |
0bcb6069 JL |
251 | { |
252 | struct xgpio_instance *chip; | |
0bcb6069 | 253 | int status = 0; |
749564ff | 254 | struct device_node *np = pdev->dev.of_node; |
1d6902d3 | 255 | u32 is_dual; |
0bcb6069 | 256 | |
1d6902d3 RRD |
257 | chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); |
258 | if (!chip) | |
0bcb6069 | 259 | return -ENOMEM; |
0bcb6069 | 260 | |
1d6902d3 | 261 | platform_set_drvdata(pdev, chip); |
749564ff | 262 | |
0bcb6069 | 263 | /* Update GPIO state shadow register with default value */ |
1d6902d3 | 264 | of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state[0]); |
0bcb6069 JL |
265 | |
266 | /* Update GPIO direction shadow register with default value */ | |
1d6902d3 RRD |
267 | if (of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir[0])) |
268 | chip->gpio_dir[0] = 0xFFFFFFFF; | |
6f8bf500 | 269 | |
1b4c5a6e GV |
270 | /* |
271 | * Check device node and parent device node for device width | |
272 | * and assume default width of 32 | |
273 | */ | |
1d6902d3 RRD |
274 | if (of_property_read_u32(np, "xlnx,gpio-width", &chip->gpio_width[0])) |
275 | chip->gpio_width[0] = 32; | |
276 | ||
277 | spin_lock_init(&chip->gpio_lock[0]); | |
278 | ||
279 | if (of_property_read_u32(np, "xlnx,is-dual", &is_dual)) | |
280 | is_dual = 0; | |
0bcb6069 | 281 | |
1d6902d3 RRD |
282 | if (is_dual) { |
283 | /* Update GPIO state shadow register with default value */ | |
284 | of_property_read_u32(np, "xlnx,dout-default-2", | |
285 | &chip->gpio_state[1]); | |
286 | ||
287 | /* Update GPIO direction shadow register with default value */ | |
288 | if (of_property_read_u32(np, "xlnx,tri-default-2", | |
289 | &chip->gpio_dir[1])) | |
290 | chip->gpio_dir[1] = 0xFFFFFFFF; | |
0bcb6069 | 291 | |
1d6902d3 RRD |
292 | /* |
293 | * Check device node and parent device node for device width | |
294 | * and assume default width of 32 | |
295 | */ | |
296 | if (of_property_read_u32(np, "xlnx,gpio2-width", | |
297 | &chip->gpio_width[1])) | |
298 | chip->gpio_width[1] = 32; | |
299 | ||
300 | spin_lock_init(&chip->gpio_lock[1]); | |
301 | } | |
302 | ||
303 | chip->mmchip.gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1]; | |
58383c78 | 304 | chip->mmchip.gc.parent = &pdev->dev; |
a19e3da5 AV |
305 | chip->mmchip.gc.direction_input = xgpio_dir_in; |
306 | chip->mmchip.gc.direction_output = xgpio_dir_out; | |
307 | chip->mmchip.gc.get = xgpio_get; | |
308 | chip->mmchip.gc.set = xgpio_set; | |
0bcb6069 JL |
309 | |
310 | chip->mmchip.save_regs = xgpio_save_regs; | |
311 | ||
312 | /* Call the OF gpio helper to setup and register the GPIO device */ | |
097d88e9 | 313 | status = of_mm_gpiochip_add_data(np, &chip->mmchip, chip); |
0bcb6069 | 314 | if (status) { |
0bcb6069 JL |
315 | pr_err("%s: error in probe function with status %d\n", |
316 | np->full_name, status); | |
317 | return status; | |
318 | } | |
74600ee0 | 319 | |
0bcb6069 JL |
320 | return 0; |
321 | } | |
322 | ||
9992bc95 | 323 | static const struct of_device_id xgpio_of_match[] = { |
0bcb6069 JL |
324 | { .compatible = "xlnx,xps-gpio-1.00.a", }, |
325 | { /* end of list */ }, | |
326 | }; | |
327 | ||
749564ff | 328 | MODULE_DEVICE_TABLE(of, xgpio_of_match); |
0bcb6069 | 329 | |
749564ff RRD |
330 | static struct platform_driver xgpio_plat_driver = { |
331 | .probe = xgpio_probe, | |
332 | .remove = xgpio_remove, | |
333 | .driver = { | |
334 | .name = "gpio-xilinx", | |
335 | .of_match_table = xgpio_of_match, | |
336 | }, | |
337 | }; | |
0bcb6069 | 338 | |
749564ff RRD |
339 | static int __init xgpio_init(void) |
340 | { | |
341 | return platform_driver_register(&xgpio_plat_driver); | |
0bcb6069 JL |
342 | } |
343 | ||
0bcb6069 | 344 | subsys_initcall(xgpio_init); |
749564ff RRD |
345 | |
346 | static void __exit xgpio_exit(void) | |
347 | { | |
348 | platform_driver_unregister(&xgpio_plat_driver); | |
349 | } | |
350 | module_exit(xgpio_exit); | |
0bcb6069 JL |
351 | |
352 | MODULE_AUTHOR("Xilinx, Inc."); | |
353 | MODULE_DESCRIPTION("Xilinx GPIO driver"); | |
354 | MODULE_LICENSE("GPL"); |