Commit | Line | Data |
---|---|---|
15fae37d DB |
1 | /* |
2 | * pcf857x - driver for pcf857x, pca857x, and pca967x I2C GPIO expanders | |
3 | * | |
4 | * Copyright (C) 2007 David Brownell | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | */ | |
20 | ||
21 | #include <linux/kernel.h> | |
22 | #include <linux/slab.h> | |
d120c17f | 23 | #include <linux/gpio.h> |
15fae37d DB |
24 | #include <linux/i2c.h> |
25 | #include <linux/i2c/pcf857x.h> | |
26 | ||
15fae37d | 27 | |
3760f736 JD |
28 | static const struct i2c_device_id pcf857x_id[] = { |
29 | { "pcf8574", 8 }, | |
4ba2ccb8 | 30 | { "pcf8574a", 8 }, |
3760f736 JD |
31 | { "pca8574", 8 }, |
32 | { "pca9670", 8 }, | |
33 | { "pca9672", 8 }, | |
34 | { "pca9674", 8 }, | |
35 | { "pcf8575", 16 }, | |
36 | { "pca8575", 16 }, | |
37 | { "pca9671", 16 }, | |
38 | { "pca9673", 16 }, | |
39 | { "pca9675", 16 }, | |
1673ad52 DB |
40 | { "max7328", 8 }, |
41 | { "max7329", 8 }, | |
3760f736 JD |
42 | { } |
43 | }; | |
44 | MODULE_DEVICE_TABLE(i2c, pcf857x_id); | |
45 | ||
15fae37d DB |
46 | /* |
47 | * The pcf857x, pca857x, and pca967x chips only expose one read and one | |
48 | * write register. Writing a "one" bit (to match the reset state) lets | |
49 | * that pin be used as an input; it's not an open-drain model, but acts | |
50 | * a bit like one. This is described as "quasi-bidirectional"; read the | |
51 | * chip documentation for details. | |
52 | * | |
53 | * Many other I2C GPIO expander chips (like the pca953x models) have | |
54 | * more complex register models and more conventional circuitry using | |
55 | * push/pull drivers. They often use the same 0x20..0x27 addresses as | |
56 | * pcf857x parts, making the "legacy" I2C driver model problematic. | |
57 | */ | |
58 | struct pcf857x { | |
59 | struct gpio_chip chip; | |
60 | struct i2c_client *client; | |
1673ad52 | 61 | struct mutex lock; /* protect 'out' */ |
15fae37d DB |
62 | unsigned out; /* software latch */ |
63 | }; | |
64 | ||
65 | /*-------------------------------------------------------------------------*/ | |
66 | ||
67 | /* Talk to 8-bit I/O expander */ | |
68 | ||
69 | static int pcf857x_input8(struct gpio_chip *chip, unsigned offset) | |
70 | { | |
71 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
1673ad52 | 72 | int status; |
15fae37d | 73 | |
1673ad52 | 74 | mutex_lock(&gpio->lock); |
15fae37d | 75 | gpio->out |= (1 << offset); |
1673ad52 DB |
76 | status = i2c_smbus_write_byte(gpio->client, gpio->out); |
77 | mutex_unlock(&gpio->lock); | |
78 | ||
79 | return status; | |
15fae37d DB |
80 | } |
81 | ||
82 | static int pcf857x_get8(struct gpio_chip *chip, unsigned offset) | |
83 | { | |
84 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
85 | s32 value; | |
86 | ||
87 | value = i2c_smbus_read_byte(gpio->client); | |
88 | return (value < 0) ? 0 : (value & (1 << offset)); | |
89 | } | |
90 | ||
91 | static int pcf857x_output8(struct gpio_chip *chip, unsigned offset, int value) | |
92 | { | |
93 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
94 | unsigned bit = 1 << offset; | |
1673ad52 | 95 | int status; |
15fae37d | 96 | |
1673ad52 | 97 | mutex_lock(&gpio->lock); |
15fae37d DB |
98 | if (value) |
99 | gpio->out |= bit; | |
100 | else | |
101 | gpio->out &= ~bit; | |
1673ad52 DB |
102 | status = i2c_smbus_write_byte(gpio->client, gpio->out); |
103 | mutex_unlock(&gpio->lock); | |
104 | ||
105 | return status; | |
15fae37d DB |
106 | } |
107 | ||
108 | static void pcf857x_set8(struct gpio_chip *chip, unsigned offset, int value) | |
109 | { | |
110 | pcf857x_output8(chip, offset, value); | |
111 | } | |
112 | ||
113 | /*-------------------------------------------------------------------------*/ | |
114 | ||
115 | /* Talk to 16-bit I/O expander */ | |
116 | ||
117 | static int i2c_write_le16(struct i2c_client *client, u16 word) | |
118 | { | |
119 | u8 buf[2] = { word & 0xff, word >> 8, }; | |
120 | int status; | |
121 | ||
122 | status = i2c_master_send(client, buf, 2); | |
123 | return (status < 0) ? status : 0; | |
124 | } | |
125 | ||
126 | static int i2c_read_le16(struct i2c_client *client) | |
127 | { | |
128 | u8 buf[2]; | |
129 | int status; | |
130 | ||
131 | status = i2c_master_recv(client, buf, 2); | |
132 | if (status < 0) | |
133 | return status; | |
134 | return (buf[1] << 8) | buf[0]; | |
135 | } | |
136 | ||
137 | static int pcf857x_input16(struct gpio_chip *chip, unsigned offset) | |
138 | { | |
139 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
1673ad52 | 140 | int status; |
15fae37d | 141 | |
1673ad52 | 142 | mutex_lock(&gpio->lock); |
15fae37d | 143 | gpio->out |= (1 << offset); |
1673ad52 DB |
144 | status = i2c_write_le16(gpio->client, gpio->out); |
145 | mutex_unlock(&gpio->lock); | |
146 | ||
147 | return status; | |
15fae37d DB |
148 | } |
149 | ||
150 | static int pcf857x_get16(struct gpio_chip *chip, unsigned offset) | |
151 | { | |
152 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
153 | int value; | |
154 | ||
155 | value = i2c_read_le16(gpio->client); | |
156 | return (value < 0) ? 0 : (value & (1 << offset)); | |
157 | } | |
158 | ||
159 | static int pcf857x_output16(struct gpio_chip *chip, unsigned offset, int value) | |
160 | { | |
161 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
162 | unsigned bit = 1 << offset; | |
1673ad52 | 163 | int status; |
15fae37d | 164 | |
1673ad52 | 165 | mutex_lock(&gpio->lock); |
15fae37d DB |
166 | if (value) |
167 | gpio->out |= bit; | |
168 | else | |
169 | gpio->out &= ~bit; | |
1673ad52 DB |
170 | status = i2c_write_le16(gpio->client, gpio->out); |
171 | mutex_unlock(&gpio->lock); | |
172 | ||
173 | return status; | |
15fae37d DB |
174 | } |
175 | ||
176 | static void pcf857x_set16(struct gpio_chip *chip, unsigned offset, int value) | |
177 | { | |
178 | pcf857x_output16(chip, offset, value); | |
179 | } | |
180 | ||
181 | /*-------------------------------------------------------------------------*/ | |
182 | ||
d2653e92 JD |
183 | static int pcf857x_probe(struct i2c_client *client, |
184 | const struct i2c_device_id *id) | |
15fae37d DB |
185 | { |
186 | struct pcf857x_platform_data *pdata; | |
187 | struct pcf857x *gpio; | |
188 | int status; | |
189 | ||
190 | pdata = client->dev.platform_data; | |
a342d215 BD |
191 | if (!pdata) { |
192 | dev_dbg(&client->dev, "no platform data\n"); | |
a342d215 | 193 | } |
15fae37d DB |
194 | |
195 | /* Allocate, initialize, and register this gpio_chip. */ | |
196 | gpio = kzalloc(sizeof *gpio, GFP_KERNEL); | |
197 | if (!gpio) | |
198 | return -ENOMEM; | |
199 | ||
1673ad52 DB |
200 | mutex_init(&gpio->lock); |
201 | ||
49946f68 | 202 | gpio->chip.base = pdata ? pdata->gpio_base : -1; |
15fae37d | 203 | gpio->chip.can_sleep = 1; |
d8f388d8 | 204 | gpio->chip.dev = &client->dev; |
d72cbed0 | 205 | gpio->chip.owner = THIS_MODULE; |
15fae37d DB |
206 | |
207 | /* NOTE: the OnSemi jlc1562b is also largely compatible with | |
208 | * these parts, notably for output. It has a low-resolution | |
209 | * DAC instead of pin change IRQs; and its inputs can be the | |
210 | * result of comparators. | |
211 | */ | |
212 | ||
213 | /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f; | |
214 | * 9670, 9672, 9764, and 9764a use quite a variety. | |
215 | * | |
216 | * NOTE: we don't distinguish here between *4 and *4a parts. | |
217 | */ | |
3760f736 JD |
218 | gpio->chip.ngpio = id->driver_data; |
219 | if (gpio->chip.ngpio == 8) { | |
15fae37d DB |
220 | gpio->chip.direction_input = pcf857x_input8; |
221 | gpio->chip.get = pcf857x_get8; | |
222 | gpio->chip.direction_output = pcf857x_output8; | |
223 | gpio->chip.set = pcf857x_set8; | |
224 | ||
225 | if (!i2c_check_functionality(client->adapter, | |
226 | I2C_FUNC_SMBUS_BYTE)) | |
227 | status = -EIO; | |
228 | ||
229 | /* fail if there's no chip present */ | |
230 | else | |
231 | status = i2c_smbus_read_byte(client); | |
232 | ||
233 | /* '75/'75c addresses are 0x20..0x27, just like the '74; | |
234 | * the '75c doesn't have a current source pulling high. | |
235 | * 9671, 9673, and 9765 use quite a variety of addresses. | |
236 | * | |
237 | * NOTE: we don't distinguish here between '75 and '75c parts. | |
238 | */ | |
3760f736 | 239 | } else if (gpio->chip.ngpio == 16) { |
15fae37d DB |
240 | gpio->chip.direction_input = pcf857x_input16; |
241 | gpio->chip.get = pcf857x_get16; | |
242 | gpio->chip.direction_output = pcf857x_output16; | |
243 | gpio->chip.set = pcf857x_set16; | |
244 | ||
245 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) | |
246 | status = -EIO; | |
247 | ||
248 | /* fail if there's no chip present */ | |
249 | else | |
250 | status = i2c_read_le16(client); | |
251 | ||
a342d215 BD |
252 | } else { |
253 | dev_dbg(&client->dev, "unsupported number of gpios\n"); | |
254 | status = -EINVAL; | |
255 | } | |
15fae37d DB |
256 | |
257 | if (status < 0) | |
258 | goto fail; | |
259 | ||
260 | gpio->chip.label = client->name; | |
261 | ||
262 | gpio->client = client; | |
263 | i2c_set_clientdata(client, gpio); | |
264 | ||
265 | /* NOTE: these chips have strange "quasi-bidirectional" I/O pins. | |
266 | * We can't actually know whether a pin is configured (a) as output | |
267 | * and driving the signal low, or (b) as input and reporting a low | |
268 | * value ... without knowing the last value written since the chip | |
269 | * came out of reset (if any). We can't read the latched output. | |
270 | * | |
271 | * In short, the only reliable solution for setting up pin direction | |
272 | * is to do it explicitly. The setup() method can do that, but it | |
273 | * may cause transient glitching since it can't know the last value | |
274 | * written (some pins may need to be driven low). | |
275 | * | |
276 | * Using pdata->n_latch avoids that trouble. When left initialized | |
277 | * to zero, our software copy of the "latch" then matches the chip's | |
278 | * all-ones reset state. Otherwise it flags pins to be driven low. | |
279 | */ | |
49946f68 | 280 | gpio->out = pdata ? ~pdata->n_latch : ~0; |
15fae37d DB |
281 | |
282 | status = gpiochip_add(&gpio->chip); | |
283 | if (status < 0) | |
284 | goto fail; | |
285 | ||
286 | /* NOTE: these chips can issue "some pin-changed" IRQs, which we | |
287 | * don't yet even try to use. Among other issues, the relevant | |
288 | * genirq state isn't available to modular drivers; and most irq | |
289 | * methods can't be called from sleeping contexts. | |
290 | */ | |
291 | ||
292 | dev_info(&client->dev, "gpios %d..%d on a %s%s\n", | |
293 | gpio->chip.base, | |
294 | gpio->chip.base + gpio->chip.ngpio - 1, | |
295 | client->name, | |
296 | client->irq ? " (irq ignored)" : ""); | |
297 | ||
298 | /* Let platform code set up the GPIOs and their users. | |
299 | * Now is the first time anyone could use them. | |
300 | */ | |
49946f68 | 301 | if (pdata && pdata->setup) { |
15fae37d DB |
302 | status = pdata->setup(client, |
303 | gpio->chip.base, gpio->chip.ngpio, | |
304 | pdata->context); | |
305 | if (status < 0) | |
306 | dev_warn(&client->dev, "setup --> %d\n", status); | |
307 | } | |
308 | ||
309 | return 0; | |
310 | ||
311 | fail: | |
312 | dev_dbg(&client->dev, "probe error %d for '%s'\n", | |
313 | status, client->name); | |
314 | kfree(gpio); | |
315 | return status; | |
316 | } | |
317 | ||
318 | static int pcf857x_remove(struct i2c_client *client) | |
319 | { | |
320 | struct pcf857x_platform_data *pdata = client->dev.platform_data; | |
321 | struct pcf857x *gpio = i2c_get_clientdata(client); | |
322 | int status = 0; | |
323 | ||
49946f68 | 324 | if (pdata && pdata->teardown) { |
15fae37d DB |
325 | status = pdata->teardown(client, |
326 | gpio->chip.base, gpio->chip.ngpio, | |
327 | pdata->context); | |
328 | if (status < 0) { | |
329 | dev_err(&client->dev, "%s --> %d\n", | |
330 | "teardown", status); | |
331 | return status; | |
332 | } | |
333 | } | |
334 | ||
335 | status = gpiochip_remove(&gpio->chip); | |
336 | if (status == 0) | |
337 | kfree(gpio); | |
338 | else | |
339 | dev_err(&client->dev, "%s --> %d\n", "remove", status); | |
340 | return status; | |
341 | } | |
342 | ||
343 | static struct i2c_driver pcf857x_driver = { | |
344 | .driver = { | |
345 | .name = "pcf857x", | |
346 | .owner = THIS_MODULE, | |
347 | }, | |
348 | .probe = pcf857x_probe, | |
349 | .remove = pcf857x_remove, | |
3760f736 | 350 | .id_table = pcf857x_id, |
15fae37d DB |
351 | }; |
352 | ||
353 | static int __init pcf857x_init(void) | |
354 | { | |
355 | return i2c_add_driver(&pcf857x_driver); | |
356 | } | |
2f8d1197 DB |
357 | /* register after i2c postcore initcall and before |
358 | * subsys initcalls that may rely on these GPIOs | |
359 | */ | |
360 | subsys_initcall(pcf857x_init); | |
15fae37d DB |
361 | |
362 | static void __exit pcf857x_exit(void) | |
363 | { | |
364 | i2c_del_driver(&pcf857x_driver); | |
365 | } | |
366 | module_exit(pcf857x_exit); | |
367 | ||
368 | MODULE_LICENSE("GPL"); | |
369 | MODULE_AUTHOR("David Brownell"); |