drm/amdgpu: add command submission workflow tracepoint
[deliverable/linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_trace.h
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1#if !defined(_AMDGPU_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
2#define _AMDGPU_TRACE_H_
3
4#include <linux/stringify.h>
5#include <linux/types.h>
6#include <linux/tracepoint.h>
7
8#include <drm/drmP.h>
9
10#undef TRACE_SYSTEM
11#define TRACE_SYSTEM amdgpu
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12#define TRACE_INCLUDE_FILE amdgpu_trace
13
14TRACE_EVENT(amdgpu_bo_create,
15 TP_PROTO(struct amdgpu_bo *bo),
16 TP_ARGS(bo),
17 TP_STRUCT__entry(
18 __field(struct amdgpu_bo *, bo)
19 __field(u32, pages)
20 ),
21
22 TP_fast_assign(
23 __entry->bo = bo;
24 __entry->pages = bo->tbo.num_pages;
25 ),
26 TP_printk("bo=%p, pages=%u", __entry->bo, __entry->pages)
27);
28
29TRACE_EVENT(amdgpu_cs,
30 TP_PROTO(struct amdgpu_cs_parser *p, int i),
31 TP_ARGS(p, i),
32 TP_STRUCT__entry(
e30590e6 33 __field(struct amdgpu_bo_list *, bo_list)
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34 __field(u32, ring)
35 __field(u32, dw)
36 __field(u32, fences)
37 ),
38
39 TP_fast_assign(
e30590e6 40 __entry->bo_list = p->bo_list;
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41 __entry->ring = p->ibs[i].ring->idx;
42 __entry->dw = p->ibs[i].length_dw;
43 __entry->fences = amdgpu_fence_count_emitted(
44 p->ibs[i].ring);
45 ),
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46 TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u",
47 __entry->bo_list, __entry->ring, __entry->dw,
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48 __entry->fences)
49);
50
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51TRACE_EVENT(amdgpu_cs_ioctl,
52 TP_PROTO(struct amdgpu_job *job),
53 TP_ARGS(job),
54 TP_STRUCT__entry(
55 __field(struct amdgpu_device *, adev)
56 __field(struct amd_sched_job *, sched_job)
57 __field(struct amdgpu_ib *, ib)
58 __field(struct fence *, fence)
59 __field(char *, ring_name)
60 __field(u32, num_ibs)
61 ),
62
63 TP_fast_assign(
64 __entry->adev = job->adev;
65 __entry->sched_job = &job->base;
66 __entry->ib = job->ibs;
67 __entry->fence = &job->base.s_fence->base;
68 __entry->ring_name = job->ibs[0].ring->name;
69 __entry->num_ibs = job->num_ibs;
70 ),
71 TP_printk("adev=%p, sched_job=%p, first ib=%p, sched fence=%p, ring name:%s, num_ibs:%u",
72 __entry->adev, __entry->sched_job, __entry->ib,
73 __entry->fence, __entry->ring_name, __entry->num_ibs)
74);
75
76TRACE_EVENT(amdgpu_sched_run_job,
77 TP_PROTO(struct amdgpu_job *job),
78 TP_ARGS(job),
79 TP_STRUCT__entry(
80 __field(struct amdgpu_device *, adev)
81 __field(struct amd_sched_job *, sched_job)
82 __field(struct amdgpu_ib *, ib)
83 __field(struct fence *, fence)
84 __field(char *, ring_name)
85 __field(u32, num_ibs)
86 ),
87
88 TP_fast_assign(
89 __entry->adev = job->adev;
90 __entry->sched_job = &job->base;
91 __entry->ib = job->ibs;
92 __entry->fence = &job->base.s_fence->base;
93 __entry->ring_name = job->ibs[0].ring->name;
94 __entry->num_ibs = job->num_ibs;
95 ),
96 TP_printk("adev=%p, sched_job=%p, first ib=%p, sched fence=%p, ring name:%s, num_ibs:%u",
97 __entry->adev, __entry->sched_job, __entry->ib,
98 __entry->fence, __entry->ring_name, __entry->num_ibs)
99);
100
101
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102TRACE_EVENT(amdgpu_vm_grab_id,
103 TP_PROTO(unsigned vmid, int ring),
104 TP_ARGS(vmid, ring),
105 TP_STRUCT__entry(
106 __field(u32, vmid)
107 __field(u32, ring)
108 ),
109
110 TP_fast_assign(
111 __entry->vmid = vmid;
112 __entry->ring = ring;
113 ),
114 TP_printk("vmid=%u, ring=%u", __entry->vmid, __entry->ring)
115);
116
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117TRACE_EVENT(amdgpu_vm_bo_map,
118 TP_PROTO(struct amdgpu_bo_va *bo_va,
119 struct amdgpu_bo_va_mapping *mapping),
120 TP_ARGS(bo_va, mapping),
121 TP_STRUCT__entry(
122 __field(struct amdgpu_bo *, bo)
123 __field(long, start)
124 __field(long, last)
125 __field(u64, offset)
126 __field(u32, flags)
127 ),
128
129 TP_fast_assign(
130 __entry->bo = bo_va->bo;
131 __entry->start = mapping->it.start;
132 __entry->last = mapping->it.last;
133 __entry->offset = mapping->offset;
134 __entry->flags = mapping->flags;
135 ),
136 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%08x",
137 __entry->bo, __entry->start, __entry->last,
138 __entry->offset, __entry->flags)
139);
140
141TRACE_EVENT(amdgpu_vm_bo_unmap,
142 TP_PROTO(struct amdgpu_bo_va *bo_va,
143 struct amdgpu_bo_va_mapping *mapping),
144 TP_ARGS(bo_va, mapping),
145 TP_STRUCT__entry(
146 __field(struct amdgpu_bo *, bo)
147 __field(long, start)
148 __field(long, last)
149 __field(u64, offset)
150 __field(u32, flags)
151 ),
152
153 TP_fast_assign(
154 __entry->bo = bo_va->bo;
155 __entry->start = mapping->it.start;
156 __entry->last = mapping->it.last;
157 __entry->offset = mapping->offset;
158 __entry->flags = mapping->flags;
159 ),
160 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%08x",
161 __entry->bo, __entry->start, __entry->last,
162 __entry->offset, __entry->flags)
163);
164
d6c10f6b 165DECLARE_EVENT_CLASS(amdgpu_vm_mapping,
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166 TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
167 TP_ARGS(mapping),
168 TP_STRUCT__entry(
169 __field(u64, soffset)
170 __field(u64, eoffset)
171 __field(u32, flags)
172 ),
173
174 TP_fast_assign(
175 __entry->soffset = mapping->it.start;
176 __entry->eoffset = mapping->it.last + 1;
177 __entry->flags = mapping->flags;
178 ),
179 TP_printk("soffs=%010llx, eoffs=%010llx, flags=%08x",
180 __entry->soffset, __entry->eoffset, __entry->flags)
181);
182
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183DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update,
184 TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
185 TP_ARGS(mapping)
186);
187
188DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping,
189 TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
190 TP_ARGS(mapping)
191);
192
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193TRACE_EVENT(amdgpu_vm_set_page,
194 TP_PROTO(uint64_t pe, uint64_t addr, unsigned count,
195 uint32_t incr, uint32_t flags),
196 TP_ARGS(pe, addr, count, incr, flags),
197 TP_STRUCT__entry(
198 __field(u64, pe)
199 __field(u64, addr)
200 __field(u32, count)
201 __field(u32, incr)
202 __field(u32, flags)
203 ),
204
205 TP_fast_assign(
206 __entry->pe = pe;
207 __entry->addr = addr;
208 __entry->count = count;
209 __entry->incr = incr;
210 __entry->flags = flags;
211 ),
212 TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%08x, count=%u",
213 __entry->pe, __entry->addr, __entry->incr,
214 __entry->flags, __entry->count)
215);
216
217TRACE_EVENT(amdgpu_vm_flush,
218 TP_PROTO(uint64_t pd_addr, unsigned ring, unsigned id),
219 TP_ARGS(pd_addr, ring, id),
220 TP_STRUCT__entry(
221 __field(u64, pd_addr)
222 __field(u32, ring)
223 __field(u32, id)
224 ),
225
226 TP_fast_assign(
227 __entry->pd_addr = pd_addr;
228 __entry->ring = ring;
229 __entry->id = id;
230 ),
231 TP_printk("pd_addr=%010Lx, ring=%u, id=%u",
232 __entry->pd_addr, __entry->ring, __entry->id)
233);
234
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235TRACE_EVENT(amdgpu_bo_list_set,
236 TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo),
237 TP_ARGS(list, bo),
238 TP_STRUCT__entry(
239 __field(struct amdgpu_bo_list *, list)
240 __field(struct amdgpu_bo *, bo)
241 ),
242
243 TP_fast_assign(
244 __entry->list = list;
245 __entry->bo = bo;
246 ),
247 TP_printk("list=%p, bo=%p", __entry->list, __entry->bo)
248);
249
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250DECLARE_EVENT_CLASS(amdgpu_semaphore_request,
251
252 TP_PROTO(int ring, struct amdgpu_semaphore *sem),
253
254 TP_ARGS(ring, sem),
255
256 TP_STRUCT__entry(
257 __field(int, ring)
258 __field(signed, waiters)
259 __field(uint64_t, gpu_addr)
260 ),
261
262 TP_fast_assign(
263 __entry->ring = ring;
264 __entry->waiters = sem->waiters;
265 __entry->gpu_addr = sem->gpu_addr;
266 ),
267
268 TP_printk("ring=%u, waiters=%d, addr=%010Lx", __entry->ring,
269 __entry->waiters, __entry->gpu_addr)
270);
271
272DEFINE_EVENT(amdgpu_semaphore_request, amdgpu_semaphore_signale,
273
274 TP_PROTO(int ring, struct amdgpu_semaphore *sem),
275
276 TP_ARGS(ring, sem)
277);
278
279DEFINE_EVENT(amdgpu_semaphore_request, amdgpu_semaphore_wait,
280
281 TP_PROTO(int ring, struct amdgpu_semaphore *sem),
282
283 TP_ARGS(ring, sem)
284);
285
286#endif
287
288/* This part must be outside protection */
289#undef TRACE_INCLUDE_PATH
290#define TRACE_INCLUDE_PATH .
291#include <trace/define_trace.h>
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