[deliverable/linux.git] / drivers / gpu / drm / arm / malidp_drv.c

/*
 * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
 * Author: Liviu Dudau <Liviu.Dudau@arm.com>
 *
 * This program is free software and is provided to you under the terms of the
 * GNU General Public License version 2 as published by the Free Software
 * Foundation, and any use by you of this program is subject to the terms
 * of such GNU licence.
 *
 * ARM Mali DP500/DP550/DP650 KMS/DRM driver
 */

#include <linux/module.h>
#include <linux/clk.h>
#include <linux/component.h>
#include <linux/of_device.h>
#include <linux/of_graph.h>
#include <linux/of_reserved_mem.h>

#include <drm/drmP.h>
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_fb_helper.h>
#include <drm/drm_fb_cma_helper.h>
#include <drm/drm_gem_cma_helper.h>
#include <drm/drm_of.h>

#include "malidp_drv.h"
#include "malidp_regs.h"
#include "malidp_hw.h"

#define MALIDP_CONF_VALID_TIMEOUT	250

/*
 * set the "config valid" bit and wait until the hardware acts on it
 */
static int malidp_set_and_wait_config_valid(struct drm_device *drm)
{
	struct malidp_drm *malidp = drm->dev_private;
	struct malidp_hw_device *hwdev = malidp->dev;
	int ret;

	hwdev->set_config_valid(hwdev);
	/* don't wait for config_valid flag if we are in config mode */
	if (hwdev->in_config_mode(hwdev))
		return 0;

	ret = wait_event_interruptible_timeout(malidp->wq,
			atomic_read(&malidp->config_valid) == 1,
			msecs_to_jiffies(MALIDP_CONF_VALID_TIMEOUT));

	return (ret > 0) ? 0 : -ETIMEDOUT;
}

static void malidp_output_poll_changed(struct drm_device *drm)
{
	struct malidp_drm *malidp = drm->dev_private;

	drm_fbdev_cma_hotplug_event(malidp->fbdev);
}

static void malidp_atomic_commit_hw_done(struct drm_atomic_state *state)
{
	struct drm_pending_vblank_event *event;
	struct drm_device *drm = state->dev;
	struct malidp_drm *malidp = drm->dev_private;
	int ret = malidp_set_and_wait_config_valid(drm);

	if (ret)
		DRM_DEBUG_DRIVER("timed out waiting for updated configuration\n");

	event = malidp->crtc.state->event;
	if (event) {
		malidp->crtc.state->event = NULL;

		spin_lock_irq(&drm->event_lock);
		if (drm_crtc_vblank_get(&malidp->crtc) == 0)
			drm_crtc_arm_vblank_event(&malidp->crtc, event);
		else
			drm_crtc_send_vblank_event(&malidp->crtc, event);
		spin_unlock_irq(&drm->event_lock);
	}
	drm_atomic_helper_commit_hw_done(state);
}

static void malidp_atomic_commit_tail(struct drm_atomic_state *state)
{
	struct drm_device *drm = state->dev;

	drm_atomic_helper_commit_modeset_disables(drm, state);
	drm_atomic_helper_commit_modeset_enables(drm, state);
	drm_atomic_helper_commit_planes(drm, state, true);

	malidp_atomic_commit_hw_done(state);

	drm_atomic_helper_wait_for_vblanks(drm, state);

	drm_atomic_helper_cleanup_planes(drm, state);
}

static struct drm_mode_config_helper_funcs malidp_mode_config_helpers = {
	.atomic_commit_tail = malidp_atomic_commit_tail,
};

static const struct drm_mode_config_funcs malidp_mode_config_funcs = {
	.fb_create = drm_fb_cma_create,
	.output_poll_changed = malidp_output_poll_changed,
	.atomic_check = drm_atomic_helper_check,
	.atomic_commit = drm_atomic_helper_commit,
};

static int malidp_enable_vblank(struct drm_device *drm, unsigned int crtc)
{
	struct malidp_drm *malidp = drm->dev_private;
	struct malidp_hw_device *hwdev = malidp->dev;

	malidp_hw_enable_irq(hwdev, MALIDP_DE_BLOCK,
			     hwdev->map.de_irq_map.vsync_irq);
	return 0;
}

static void malidp_disable_vblank(struct drm_device *drm, unsigned int pipe)
{
	struct malidp_drm *malidp = drm->dev_private;
	struct malidp_hw_device *hwdev = malidp->dev;

	malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK,
			      hwdev->map.de_irq_map.vsync_irq);
}

static int malidp_init(struct drm_device *drm)
{
	int ret;
	struct malidp_drm *malidp = drm->dev_private;
	struct malidp_hw_device *hwdev = malidp->dev;

	drm_mode_config_init(drm);

	drm->mode_config.min_width = hwdev->min_line_size;
	drm->mode_config.min_height = hwdev->min_line_size;
	drm->mode_config.max_width = hwdev->max_line_size;
	drm->mode_config.max_height = hwdev->max_line_size;
	drm->mode_config.funcs = &malidp_mode_config_funcs;
	drm->mode_config.helper_private = &malidp_mode_config_helpers;

	ret = malidp_crtc_init(drm);
	if (ret) {
		drm_mode_config_cleanup(drm);
		return ret;
	}

	return 0;
}

static int malidp_irq_init(struct platform_device *pdev)
{
	int irq_de, irq_se, ret = 0;
	struct drm_device *drm = dev_get_drvdata(&pdev->dev);

	/* fetch the interrupts from DT */
	irq_de = platform_get_irq_byname(pdev, "DE");
	if (irq_de < 0) {
		DRM_ERROR("no 'DE' IRQ specified!\n");
		return irq_de;
	}
	irq_se = platform_get_irq_byname(pdev, "SE");
	if (irq_se < 0) {
		DRM_ERROR("no 'SE' IRQ specified!\n");
		return irq_se;
	}

	ret = malidp_de_irq_init(drm, irq_de);
	if (ret)
		return ret;

	ret = malidp_se_irq_init(drm, irq_se);
	if (ret) {
		malidp_de_irq_fini(drm);
		return ret;
	}

	return 0;
}

static void malidp_lastclose(struct drm_device *drm)
{
	struct malidp_drm *malidp = drm->dev_private;

	drm_fbdev_cma_restore_mode(malidp->fbdev);
}

static const struct file_operations fops = {
	.owner = THIS_MODULE,
	.open = drm_open,
	.release = drm_release,
	.unlocked_ioctl = drm_ioctl,
#ifdef CONFIG_COMPAT
	.compat_ioctl = drm_compat_ioctl,
#endif
	.poll = drm_poll,
	.read = drm_read,
	.llseek = noop_llseek,
	.mmap = drm_gem_cma_mmap,
};

static struct drm_driver malidp_driver = {
	.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC |
			   DRIVER_PRIME,
	.lastclose = malidp_lastclose,
	.get_vblank_counter = drm_vblank_no_hw_counter,
	.enable_vblank = malidp_enable_vblank,
	.disable_vblank = malidp_disable_vblank,
	.gem_free_object_unlocked = drm_gem_cma_free_object,
	.gem_vm_ops = &drm_gem_cma_vm_ops,
	.dumb_create = drm_gem_cma_dumb_create,
	.dumb_map_offset = drm_gem_cma_dumb_map_offset,
	.dumb_destroy = drm_gem_dumb_destroy,
	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	.gem_prime_export = drm_gem_prime_export,
	.gem_prime_import = drm_gem_prime_import,
	.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
	.gem_prime_vmap = drm_gem_cma_prime_vmap,
	.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
	.gem_prime_mmap = drm_gem_cma_prime_mmap,
	.fops = &fops,
	.name = "mali-dp",
	.desc = "ARM Mali Display Processor driver",
	.date = "20160106",
	.major = 1,
	.minor = 0,
};

static const struct of_device_id  malidp_drm_of_match[] = {
	{
		.compatible = "arm,mali-dp500",
		.data = &malidp_device[MALIDP_500]
	},
	{
		.compatible = "arm,mali-dp550",
		.data = &malidp_device[MALIDP_550]
	},
	{
		.compatible = "arm,mali-dp650",
		.data = &malidp_device[MALIDP_650]
	},
	{},
};
MODULE_DEVICE_TABLE(of, malidp_drm_of_match);

#define MAX_OUTPUT_CHANNELS	3

static int malidp_bind(struct device *dev)
{
	struct resource *res;
	struct drm_device *drm;
	struct device_node *ep;
	struct malidp_drm *malidp;
	struct malidp_hw_device *hwdev;
	struct platform_device *pdev = to_platform_device(dev);
	/* number of lines for the R, G and B output */
	u8 output_width[MAX_OUTPUT_CHANNELS];
	int ret = 0, i;
	u32 version, out_depth = 0;

	malidp = devm_kzalloc(dev, sizeof(*malidp), GFP_KERNEL);
	if (!malidp)
		return -ENOMEM;

	hwdev = devm_kzalloc(dev, sizeof(*hwdev), GFP_KERNEL);
	if (!hwdev)
		return -ENOMEM;

	/*
	 * copy the associated data from malidp_drm_of_match to avoid
	 * having to keep a reference to the OF node after binding
	 */
	memcpy(hwdev, of_device_get_match_data(dev), sizeof(*hwdev));
	malidp->dev = hwdev;

	INIT_LIST_HEAD(&malidp->event_list);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	hwdev->regs = devm_ioremap_resource(dev, res);
	if (IS_ERR(hwdev->regs))
		return PTR_ERR(hwdev->regs);

	hwdev->pclk = devm_clk_get(dev, "pclk");
	if (IS_ERR(hwdev->pclk))
		return PTR_ERR(hwdev->pclk);

	hwdev->aclk = devm_clk_get(dev, "aclk");
	if (IS_ERR(hwdev->aclk))
		return PTR_ERR(hwdev->aclk);

	hwdev->mclk = devm_clk_get(dev, "mclk");
	if (IS_ERR(hwdev->mclk))
		return PTR_ERR(hwdev->mclk);

	hwdev->pxlclk = devm_clk_get(dev, "pxlclk");
	if (IS_ERR(hwdev->pxlclk))
		return PTR_ERR(hwdev->pxlclk);

	/* Get the optional framebuffer memory resource */
	ret = of_reserved_mem_device_init(dev);
	if (ret && ret != -ENODEV)
		return ret;

	drm = drm_dev_alloc(&malidp_driver, dev);
	if (!drm) {
		ret = -ENOMEM;
		goto alloc_fail;
	}

	/* Enable APB clock in order to get access to the registers */
	clk_prepare_enable(hwdev->pclk);
	/*
	 * Enable AXI clock and main clock so that prefetch can start once
	 * the registers are set
	 */
	clk_prepare_enable(hwdev->aclk);
	clk_prepare_enable(hwdev->mclk);

	ret = hwdev->query_hw(hwdev);
	if (ret) {
		DRM_ERROR("Invalid HW configuration\n");
		goto query_hw_fail;
	}

	version = malidp_hw_read(hwdev, hwdev->map.dc_base + MALIDP_DE_CORE_ID);
	DRM_INFO("found ARM Mali-DP%3x version r%dp%d\n", version >> 16,
		 (version >> 12) & 0xf, (version >> 8) & 0xf);

	/* set the number of lines used for output of RGB data */
	ret = of_property_read_u8_array(dev->of_node,
					"arm,malidp-output-port-lines",
					output_width, MAX_OUTPUT_CHANNELS);
	if (ret)
		goto query_hw_fail;

	for (i = 0; i < MAX_OUTPUT_CHANNELS; i++)
		out_depth = (out_depth << 8) | (output_width[i] & 0xf);
	malidp_hw_write(hwdev, out_depth, hwdev->map.out_depth_base);

	drm->dev_private = malidp;
	dev_set_drvdata(dev, drm);
	atomic_set(&malidp->config_valid, 0);
	init_waitqueue_head(&malidp->wq);

	ret = malidp_init(drm);
	if (ret < 0)
		goto init_fail;

	ret = drm_dev_register(drm, 0);
	if (ret)
		goto register_fail;

	/* Set the CRTC's port so that the encoder component can find it */
	ep = of_graph_get_next_endpoint(dev->of_node, NULL);
	if (!ep)
		goto port_fail;
	malidp->crtc.port = of_get_next_parent(ep);

	ret = component_bind_all(dev, drm);
	if (ret) {
		DRM_ERROR("Failed to bind all components\n");
		goto bind_fail;
	}

	ret = malidp_irq_init(pdev);
	if (ret < 0)
		goto irq_init_fail;

	ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
	if (ret < 0) {
		DRM_ERROR("failed to initialise vblank\n");
		goto vblank_fail;
	}

	drm_mode_config_reset(drm);

	malidp->fbdev = drm_fbdev_cma_init(drm, 32, drm->mode_config.num_crtc,
					   drm->mode_config.num_connector);

	if (IS_ERR(malidp->fbdev)) {
		ret = PTR_ERR(malidp->fbdev);
		malidp->fbdev = NULL;
		goto fbdev_fail;
	}

	drm_kms_helper_poll_init(drm);
	return 0;

fbdev_fail:
	drm_vblank_cleanup(drm);
vblank_fail:
	malidp_se_irq_fini(drm);
	malidp_de_irq_fini(drm);
irq_init_fail:
	component_unbind_all(dev, drm);
bind_fail:
	of_node_put(malidp->crtc.port);
	malidp->crtc.port = NULL;
port_fail:
	drm_dev_unregister(drm);
register_fail:
	malidp_de_planes_destroy(drm);
	drm_mode_config_cleanup(drm);
init_fail:
	drm->dev_private = NULL;
	dev_set_drvdata(dev, NULL);
query_hw_fail:
	clk_disable_unprepare(hwdev->mclk);
	clk_disable_unprepare(hwdev->aclk);
	clk_disable_unprepare(hwdev->pclk);
	drm_dev_unref(drm);
alloc_fail:
	of_reserved_mem_device_release(dev);

	return ret;
}

static void malidp_unbind(struct device *dev)
{
	struct drm_device *drm = dev_get_drvdata(dev);
	struct malidp_drm *malidp = drm->dev_private;
	struct malidp_hw_device *hwdev = malidp->dev;

	if (malidp->fbdev) {
		drm_fbdev_cma_fini(malidp->fbdev);
		malidp->fbdev = NULL;
	}
	drm_kms_helper_poll_fini(drm);
	malidp_se_irq_fini(drm);
	malidp_de_irq_fini(drm);
	drm_vblank_cleanup(drm);
	component_unbind_all(dev, drm);
	of_node_put(malidp->crtc.port);
	malidp->crtc.port = NULL;
	drm_dev_unregister(drm);
	malidp_de_planes_destroy(drm);
	drm_mode_config_cleanup(drm);
	drm->dev_private = NULL;
	dev_set_drvdata(dev, NULL);
	clk_disable_unprepare(hwdev->mclk);
	clk_disable_unprepare(hwdev->aclk);
	clk_disable_unprepare(hwdev->pclk);
	drm_dev_unref(drm);
	of_reserved_mem_device_release(dev);
}

static const struct component_master_ops malidp_master_ops = {
	.bind = malidp_bind,
	.unbind = malidp_unbind,
};

static int malidp_compare_dev(struct device *dev, void *data)
{
	struct device_node *np = data;

	return dev->of_node == np;
}

static int malidp_platform_probe(struct platform_device *pdev)
{
	struct device_node *port, *ep;
	struct component_match *match = NULL;

	if (!pdev->dev.of_node)
		return -ENODEV;

	/* there is only one output port inside each device, find it */
	ep = of_graph_get_next_endpoint(pdev->dev.of_node, NULL);
	if (!ep)
		return -ENODEV;

	if (!of_device_is_available(ep)) {
		of_node_put(ep);
		return -ENODEV;
	}

	/* add the remote encoder port as component */
	port = of_graph_get_remote_port_parent(ep);
	of_node_put(ep);
	if (!port || !of_device_is_available(port)) {
		of_node_put(port);
		return -EAGAIN;
	}

	component_match_add(&pdev->dev, &match, malidp_compare_dev, port);
	return component_master_add_with_match(&pdev->dev, &malidp_master_ops,
					       match);
}

static int malidp_platform_remove(struct platform_device *pdev)
{
	component_master_del(&pdev->dev, &malidp_master_ops);
	return 0;
}

static struct platform_driver malidp_platform_driver = {
	.probe		= malidp_platform_probe,
	.remove		= malidp_platform_remove,
	.driver	= {
		.name = "mali-dp",
		.of_match_table	= malidp_drm_of_match,
	},
};

module_platform_driver(malidp_platform_driver);

MODULE_AUTHOR("Liviu Dudau <Liviu.Dudau@arm.com>");
MODULE_DESCRIPTION("ARM Mali DP DRM driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
ad49f860 LD	1	/*
	2	* (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
	3	* Author: Liviu Dudau <Liviu.Dudau@arm.com>
	4	*
	5	* This program is free software and is provided to you under the terms of the
	6	* GNU General Public License version 2 as published by the Free Software
	7	* Foundation, and any use by you of this program is subject to the terms
	8	* of such GNU licence.
	9	*
	10	* ARM Mali DP500/DP550/DP650 KMS/DRM driver
	11	*/
	12
	13	#include <linux/module.h>
	14	#include <linux/clk.h>
	15	#include <linux/component.h>
	16	#include <linux/of_device.h>
	17	#include <linux/of_graph.h>
	18	#include <linux/of_reserved_mem.h>
	19
	20	#include <drm/drmP.h>
	21	#include <drm/drm_atomic.h>
	22	#include <drm/drm_atomic_helper.h>
	23	#include <drm/drm_crtc.h>
	24	#include <drm/drm_crtc_helper.h>
	25	#include <drm/drm_fb_helper.h>
	26	#include <drm/drm_fb_cma_helper.h>
	27	#include <drm/drm_gem_cma_helper.h>
	28	#include <drm/drm_of.h>
	29
	30	#include "malidp_drv.h"
	31	#include "malidp_regs.h"
	32	#include "malidp_hw.h"
	33
	34	#define MALIDP_CONF_VALID_TIMEOUT 250
	35
	36	/*
	37	* set the "config valid" bit and wait until the hardware acts on it
	38	*/
	39	static int malidp_set_and_wait_config_valid(struct drm_device *drm)
	40	{
	41	struct malidp_drm *malidp = drm->dev_private;
	42	struct malidp_hw_device *hwdev = malidp->dev;
	43	int ret;
	44
	45	hwdev->set_config_valid(hwdev);
	46	/* don't wait for config_valid flag if we are in config mode */
	47	if (hwdev->in_config_mode(hwdev))
	48	return 0;
	49
	50	ret = wait_event_interruptible_timeout(malidp->wq,
	51	atomic_read(&malidp->config_valid) == 1,
	52	msecs_to_jiffies(MALIDP_CONF_VALID_TIMEOUT));
	53
	54	return (ret > 0) ? 0 : -ETIMEDOUT;
	55	}
	56
	57	static void malidp_output_poll_changed(struct drm_device *drm)
	58	{
	59	struct malidp_drm *malidp = drm->dev_private;
	60
	61	drm_fbdev_cma_hotplug_event(malidp->fbdev);
	62	}
	63
	64	static void malidp_atomic_commit_hw_done(struct drm_atomic_state *state)
65	{
66	struct drm_pending_vblank_event *event;
67	struct drm_device *drm = state->dev;
68	struct malidp_drm *malidp = drm->dev_private;
69	int ret = malidp_set_and_wait_config_valid(drm);
70
71	if (ret)
72	DRM_DEBUG_DRIVER("timed out waiting for updated configuration\n");
73
74	event = malidp->crtc.state->event;
75	if (event) {
76	malidp->crtc.state->event = NULL;
77
78	spin_lock_irq(&drm->event_lock);
79	if (drm_crtc_vblank_get(&malidp->crtc) == 0)
80	drm_crtc_arm_vblank_event(&malidp->crtc, event);
81	else
82	drm_crtc_send_vblank_event(&malidp->crtc, event);
83	spin_unlock_irq(&drm->event_lock);
84	}
85	drm_atomic_helper_commit_hw_done(state);
86	}
87
88	static void malidp_atomic_commit_tail(struct drm_atomic_state *state)
89	{
90	struct drm_device *drm = state->dev;
91
92	drm_atomic_helper_commit_modeset_disables(drm, state);
93	drm_atomic_helper_commit_modeset_enables(drm, state);
94	drm_atomic_helper_commit_planes(drm, state, true);
95
96	malidp_atomic_commit_hw_done(state);
97
98	drm_atomic_helper_wait_for_vblanks(drm, state);
99
100	drm_atomic_helper_cleanup_planes(drm, state);
101	}
102
103	static struct drm_mode_config_helper_funcs malidp_mode_config_helpers = {
104	.atomic_commit_tail = malidp_atomic_commit_tail,
105	};
106
107	static const struct drm_mode_config_funcs malidp_mode_config_funcs = {
108	.fb_create = drm_fb_cma_create,
109	.output_poll_changed = malidp_output_poll_changed,
110	.atomic_check = drm_atomic_helper_check,
111	.atomic_commit = drm_atomic_helper_commit,
112	};
113
114	static int malidp_enable_vblank(struct drm_device *drm, unsigned int crtc)
115	{
116	struct malidp_drm *malidp = drm->dev_private;
117	struct malidp_hw_device *hwdev = malidp->dev;
118
119	malidp_hw_enable_irq(hwdev, MALIDP_DE_BLOCK,
120	hwdev->map.de_irq_map.vsync_irq);
121	return 0;
122	}
123
124	static void malidp_disable_vblank(struct drm_device *drm, unsigned int pipe)
125	{
126	struct malidp_drm *malidp = drm->dev_private;
127	struct malidp_hw_device *hwdev = malidp->dev;
128
129	malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK,
130	hwdev->map.de_irq_map.vsync_irq);
131	}
132
133	static int malidp_init(struct drm_device *drm)
134	{
135	int ret;
136	struct malidp_drm *malidp = drm->dev_private;
137	struct malidp_hw_device *hwdev = malidp->dev;
138
139	drm_mode_config_init(drm);
140
141	drm->mode_config.min_width = hwdev->min_line_size;
142	drm->mode_config.min_height = hwdev->min_line_size;
143	drm->mode_config.max_width = hwdev->max_line_size;
144	drm->mode_config.max_height = hwdev->max_line_size;
145	drm->mode_config.funcs = &malidp_mode_config_funcs;
146	drm->mode_config.helper_private = &malidp_mode_config_helpers;
147
148	ret = malidp_crtc_init(drm);
149	if (ret) {
150	drm_mode_config_cleanup(drm);
151	return ret;
152	}
153
154	return 0;
155	}
156
157	static int malidp_irq_init(struct platform_device *pdev)
158	{
159	int irq_de, irq_se, ret = 0;
160	struct drm_device *drm = dev_get_drvdata(&pdev->dev);
161
162	/* fetch the interrupts from DT */
163	irq_de = platform_get_irq_byname(pdev, "DE");
164	if (irq_de < 0) {
165	DRM_ERROR("no 'DE' IRQ specified!\n");
166	return irq_de;
167	}
168	irq_se = platform_get_irq_byname(pdev, "SE");
169	if (irq_se < 0) {
170	DRM_ERROR("no 'SE' IRQ specified!\n");
171	return irq_se;
172	}
173
174	ret = malidp_de_irq_init(drm, irq_de);
175	if (ret)
176	return ret;
177
178	ret = malidp_se_irq_init(drm, irq_se);
179	if (ret) {
180	malidp_de_irq_fini(drm);
181	return ret;
182	}
183
184	return 0;
185	}
186
187	static void malidp_lastclose(struct drm_device *drm)
188	{
189	struct malidp_drm *malidp = drm->dev_private;
190
191	drm_fbdev_cma_restore_mode(malidp->fbdev);
192	}
193
194	static const struct file_operations fops = {
195	.owner = THIS_MODULE,
196	.open = drm_open,
197	.release = drm_release,
198	.unlocked_ioctl = drm_ioctl,
199	#ifdef CONFIG_COMPAT
200	.compat_ioctl = drm_compat_ioctl,
201	#endif
202	.poll = drm_poll,
203	.read = drm_read,
204	.llseek = noop_llseek,
205	.mmap = drm_gem_cma_mmap,
206	};
207
208	static struct drm_driver malidp_driver = {
209	.driver_features = DRIVER_GEM \| DRIVER_MODESET \| DRIVER_ATOMIC \|
210	DRIVER_PRIME,
211	.lastclose = malidp_lastclose,
212	.get_vblank_counter = drm_vblank_no_hw_counter,
213	.enable_vblank = malidp_enable_vblank,
214	.disable_vblank = malidp_disable_vblank,
215	.gem_free_object_unlocked = drm_gem_cma_free_object,
216	.gem_vm_ops = &drm_gem_cma_vm_ops,
217	.dumb_create = drm_gem_cma_dumb_create,
218	.dumb_map_offset = drm_gem_cma_dumb_map_offset,
219	.dumb_destroy = drm_gem_dumb_destroy,
220	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
221	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
222	.gem_prime_export = drm_gem_prime_export,
223	.gem_prime_import = drm_gem_prime_import,
224	.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
225	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
226	.gem_prime_vmap = drm_gem_cma_prime_vmap,
227	.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
228	.gem_prime_mmap = drm_gem_cma_prime_mmap,
229	.fops = &fops,
230	.name = "mali-dp",
231	.desc = "ARM Mali Display Processor driver",
232	.date = "20160106",
233	.major = 1,
234	.minor = 0,
235	};
236
237	static const struct of_device_id malidp_drm_of_match[] = {
238	{
239	.compatible = "arm,mali-dp500",
240	.data = &malidp_device[MALIDP_500]
241	},
242	{
243	.compatible = "arm,mali-dp550",
244	.data = &malidp_device[MALIDP_550]
245	},
246	{
247	.compatible = "arm,mali-dp650",
248	.data = &malidp_device[MALIDP_650]
249	},
250	{},
251	};
252	MODULE_DEVICE_TABLE(of, malidp_drm_of_match);
253
254	#define MAX_OUTPUT_CHANNELS 3
255
256	static int malidp_bind(struct device *dev)
257	{
258	struct resource *res;
259	struct drm_device *drm;
3c31760e	260	struct device_node *ep;
ad49f860 LD	261	struct malidp_drm *malidp;
	262	struct malidp_hw_device *hwdev;
	263	struct platform_device *pdev = to_platform_device(dev);
	264	/* number of lines for the R, G and B output */
	265	u8 output_width[MAX_OUTPUT_CHANNELS];
	266	int ret = 0, i;
	267	u32 version, out_depth = 0;
	268
	269	malidp = devm_kzalloc(dev, sizeof(*malidp), GFP_KERNEL);
	270	if (!malidp)
	271	return -ENOMEM;
	272
	273	hwdev = devm_kzalloc(dev, sizeof(*hwdev), GFP_KERNEL);
	274	if (!hwdev)
	275	return -ENOMEM;
	276
	277	/*
	278	* copy the associated data from malidp_drm_of_match to avoid
	279	* having to keep a reference to the OF node after binding
	280	*/
	281	memcpy(hwdev, of_device_get_match_data(dev), sizeof(*hwdev));
	282	malidp->dev = hwdev;
	283
	284	INIT_LIST_HEAD(&malidp->event_list);
	285
	286	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	287	hwdev->regs = devm_ioremap_resource(dev, res);
1a9d71f8	288	if (IS_ERR(hwdev->regs))
ad49f860	289	return PTR_ERR(hwdev->regs);
ad49f860 LD	290
	291	hwdev->pclk = devm_clk_get(dev, "pclk");
	292	if (IS_ERR(hwdev->pclk))
	293	return PTR_ERR(hwdev->pclk);
	294
	295	hwdev->aclk = devm_clk_get(dev, "aclk");
	296	if (IS_ERR(hwdev->aclk))
	297	return PTR_ERR(hwdev->aclk);
	298
	299	hwdev->mclk = devm_clk_get(dev, "mclk");
	300	if (IS_ERR(hwdev->mclk))
	301	return PTR_ERR(hwdev->mclk);
	302
	303	hwdev->pxlclk = devm_clk_get(dev, "pxlclk");
	304	if (IS_ERR(hwdev->pxlclk))
	305	return PTR_ERR(hwdev->pxlclk);
	306
	307	/* Get the optional framebuffer memory resource */
	308	ret = of_reserved_mem_device_init(dev);
	309	if (ret && ret != -ENODEV)
	310	return ret;
	311
	312	drm = drm_dev_alloc(&malidp_driver, dev);
	313	if (!drm) {
	314	ret = -ENOMEM;
	315	goto alloc_fail;
	316	}
	317
	318	/* Enable APB clock in order to get access to the registers */
	319	clk_prepare_enable(hwdev->pclk);
	320	/*
	321	* Enable AXI clock and main clock so that prefetch can start once
	322	* the registers are set
	323	*/
	324	clk_prepare_enable(hwdev->aclk);
	325	clk_prepare_enable(hwdev->mclk);
	326
	327	ret = hwdev->query_hw(hwdev);
	328	if (ret) {
	329	DRM_ERROR("Invalid HW configuration\n");
	330	goto query_hw_fail;
	331	}
	332
	333	version = malidp_hw_read(hwdev, hwdev->map.dc_base + MALIDP_DE_CORE_ID);
	334	DRM_INFO("found ARM Mali-DP%3x version r%dp%d\n", version >> 16,
	335	(version >> 12) & 0xf, (version >> 8) & 0xf);
	336
	337	/* set the number of lines used for output of RGB data */
	338	ret = of_property_read_u8_array(dev->of_node,
	339	"arm,malidp-output-port-lines",
	340	output_width, MAX_OUTPUT_CHANNELS);
	341	if (ret)
	342	goto query_hw_fail;
	343
	344	for (i = 0; i < MAX_OUTPUT_CHANNELS; i++)
	345	out_depth = (out_depth << 8) \| (output_width[i] & 0xf);
	346	malidp_hw_write(hwdev, out_depth, hwdev->map.out_depth_base);
	347
	348	drm->dev_private = malidp;
	349	dev_set_drvdata(dev, drm);
	350	atomic_set(&malidp->config_valid, 0);
	351	init_waitqueue_head(&malidp->wq);
	352
	353	ret = malidp_init(drm);
354	if (ret < 0)
355	goto init_fail;
356
357	ret = drm_dev_register(drm, 0);
358	if (ret)
359	goto register_fail;
360
361	/* Set the CRTC's port so that the encoder component can find it */
3c31760e BS	362	ep = of_graph_get_next_endpoint(dev->of_node, NULL);
	363	if (!ep)
	364	goto port_fail;
	365	malidp->crtc.port = of_get_next_parent(ep);
ad49f860 LD	366
ad49f860 LD	367	ret = component_bind_all(dev, drm);
ad49f860 LD	368	if (ret) {
	369	DRM_ERROR("Failed to bind all components\n");
	370	goto bind_fail;
	371	}
	372
	373	ret = malidp_irq_init(pdev);
	374	if (ret < 0)
	375	goto irq_init_fail;
	376
	377	ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
	378	if (ret < 0) {
	379	DRM_ERROR("failed to initialise vblank\n");
	380	goto vblank_fail;
	381	}
	382
	383	drm_mode_config_reset(drm);
	384
	385	malidp->fbdev = drm_fbdev_cma_init(drm, 32, drm->mode_config.num_crtc,
	386	drm->mode_config.num_connector);
	387
	388	if (IS_ERR(malidp->fbdev)) {
	389	ret = PTR_ERR(malidp->fbdev);
	390	malidp->fbdev = NULL;
	391	goto fbdev_fail;
	392	}
	393
	394	drm_kms_helper_poll_init(drm);
	395	return 0;
	396
	397	fbdev_fail:
	398	drm_vblank_cleanup(drm);
	399	vblank_fail:
	400	malidp_se_irq_fini(drm);
	401	malidp_de_irq_fini(drm);
	402	irq_init_fail:
	403	component_unbind_all(dev, drm);
	404	bind_fail:
3c31760e BS	405	of_node_put(malidp->crtc.port);
	406	malidp->crtc.port = NULL;
	407	port_fail:
ad49f860 LD	408	drm_dev_unregister(drm);
	409	register_fail:
	410	malidp_de_planes_destroy(drm);
	411	drm_mode_config_cleanup(drm);
	412	init_fail:
	413	drm->dev_private = NULL;
	414	dev_set_drvdata(dev, NULL);
	415	query_hw_fail:
	416	clk_disable_unprepare(hwdev->mclk);
	417	clk_disable_unprepare(hwdev->aclk);
	418	clk_disable_unprepare(hwdev->pclk);
	419	drm_dev_unref(drm);
	420	alloc_fail:
	421	of_reserved_mem_device_release(dev);
	422
	423	return ret;
	424	}
	425
	426	static void malidp_unbind(struct device *dev)
	427	{
	428	struct drm_device *drm = dev_get_drvdata(dev);
	429	struct malidp_drm *malidp = drm->dev_private;
	430	struct malidp_hw_device *hwdev = malidp->dev;
	431
	432	if (malidp->fbdev) {
	433	drm_fbdev_cma_fini(malidp->fbdev);
	434	malidp->fbdev = NULL;
	435	}
	436	drm_kms_helper_poll_fini(drm);
	437	malidp_se_irq_fini(drm);
	438	malidp_de_irq_fini(drm);
	439	drm_vblank_cleanup(drm);
	440	component_unbind_all(dev, drm);
3c31760e BS	441	of_node_put(malidp->crtc.port);
3c31760e BS	442	malidp->crtc.port = NULL;
ad49f860 LD	443	drm_dev_unregister(drm);
	444	malidp_de_planes_destroy(drm);
	445	drm_mode_config_cleanup(drm);
	446	drm->dev_private = NULL;
	447	dev_set_drvdata(dev, NULL);
	448	clk_disable_unprepare(hwdev->mclk);
	449	clk_disable_unprepare(hwdev->aclk);
	450	clk_disable_unprepare(hwdev->pclk);
	451	drm_dev_unref(drm);
	452	of_reserved_mem_device_release(dev);
	453	}
	454
	455	static const struct component_master_ops malidp_master_ops = {
	456	.bind = malidp_bind,
	457	.unbind = malidp_unbind,
	458	};
	459
	460	static int malidp_compare_dev(struct device dev, void data)
	461	{
	462	struct device_node *np = data;
	463
	464	return dev->of_node == np;
	465	}
	466
	467	static int malidp_platform_probe(struct platform_device *pdev)
	468	{
	469	struct device_node port, ep;
	470	struct component_match *match = NULL;
	471
	472	if (!pdev->dev.of_node)
	473	return -ENODEV;
	474
	475	/* there is only one output port inside each device, find it */
	476	ep = of_graph_get_next_endpoint(pdev->dev.of_node, NULL);
	477	if (!ep)
	478	return -ENODEV;
	479
	480	if (!of_device_is_available(ep)) {
	481	of_node_put(ep);
	482	return -ENODEV;
	483	}
	484
	485	/* add the remote encoder port as component */
	486	port = of_graph_get_remote_port_parent(ep);
	487	of_node_put(ep);
	488	if (!port \|\| !of_device_is_available(port)) {
	489	of_node_put(port);
	490	return -EAGAIN;
	491	}
	492
	493	component_match_add(&pdev->dev, &match, malidp_compare_dev, port);
	494	return component_master_add_with_match(&pdev->dev, &malidp_master_ops,
	495	match);
	496	}
	497
	498	static int malidp_platform_remove(struct platform_device *pdev)
	499	{
	500	component_master_del(&pdev->dev, &malidp_master_ops);
	501	return 0;
	502	}
	503
	504	static struct platform_driver malidp_platform_driver = {
	505	.probe = malidp_platform_probe,
	506	.remove = malidp_platform_remove,
507	.driver = {
508	.name = "mali-dp",
509	.of_match_table = malidp_drm_of_match,
510	},
511	};
512
513	module_platform_driver(malidp_platform_driver);
514
515	MODULE_AUTHOR("Liviu Dudau <Liviu.Dudau@arm.com>");
516	MODULE_DESCRIPTION("ARM Mali DP DRM driver");
517	MODULE_LICENSE("GPL v2");