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f9aa76a8 DA |
1 | /* |
2 | * Copyright 2012 Red Hat | |
3 | * | |
4 | * This file is subject to the terms and conditions of the GNU General | |
5 | * Public License version 2. See the file COPYING in the main | |
6 | * directory of this archive for more details. | |
7 | * | |
8 | * Authors: Matthew Garrett | |
9 | * Dave Airlie | |
10 | */ | |
760285e7 DH |
11 | #include <drm/drmP.h> |
12 | #include <drm/drm_crtc_helper.h> | |
f9aa76a8 DA |
13 | |
14 | #include "cirrus_drv.h" | |
15 | ||
16 | ||
17 | static void cirrus_user_framebuffer_destroy(struct drm_framebuffer *fb) | |
18 | { | |
19 | struct cirrus_framebuffer *cirrus_fb = to_cirrus_framebuffer(fb); | |
20 | if (cirrus_fb->obj) | |
21 | drm_gem_object_unreference_unlocked(cirrus_fb->obj); | |
22 | drm_framebuffer_cleanup(fb); | |
23 | kfree(fb); | |
24 | } | |
25 | ||
f9aa76a8 DA |
26 | static const struct drm_framebuffer_funcs cirrus_fb_funcs = { |
27 | .destroy = cirrus_user_framebuffer_destroy, | |
f9aa76a8 DA |
28 | }; |
29 | ||
30 | int cirrus_framebuffer_init(struct drm_device *dev, | |
31 | struct cirrus_framebuffer *gfb, | |
32 | struct drm_mode_fb_cmd2 *mode_cmd, | |
33 | struct drm_gem_object *obj) | |
34 | { | |
35 | int ret; | |
36 | ||
c7d73f6a DV |
37 | drm_helper_mode_fill_fb_struct(&gfb->base, mode_cmd); |
38 | gfb->obj = obj; | |
f9aa76a8 DA |
39 | ret = drm_framebuffer_init(dev, &gfb->base, &cirrus_fb_funcs); |
40 | if (ret) { | |
41 | DRM_ERROR("drm_framebuffer_init failed: %d\n", ret); | |
42 | return ret; | |
43 | } | |
f9aa76a8 DA |
44 | return 0; |
45 | } | |
46 | ||
47 | static struct drm_framebuffer * | |
48 | cirrus_user_framebuffer_create(struct drm_device *dev, | |
49 | struct drm_file *filp, | |
50 | struct drm_mode_fb_cmd2 *mode_cmd) | |
51 | { | |
52 | struct drm_gem_object *obj; | |
53 | struct cirrus_framebuffer *cirrus_fb; | |
54 | int ret; | |
55 | u32 bpp, depth; | |
56 | ||
57 | drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp); | |
58 | /* cirrus can't handle > 24bpp framebuffers at all */ | |
59 | if (bpp > 24) | |
60 | return ERR_PTR(-EINVAL); | |
61 | ||
62 | obj = drm_gem_object_lookup(dev, filp, mode_cmd->handles[0]); | |
63 | if (obj == NULL) | |
64 | return ERR_PTR(-ENOENT); | |
65 | ||
66 | cirrus_fb = kzalloc(sizeof(*cirrus_fb), GFP_KERNEL); | |
67 | if (!cirrus_fb) { | |
68 | drm_gem_object_unreference_unlocked(obj); | |
69 | return ERR_PTR(-ENOMEM); | |
70 | } | |
71 | ||
72 | ret = cirrus_framebuffer_init(dev, cirrus_fb, mode_cmd, obj); | |
73 | if (ret) { | |
74 | drm_gem_object_unreference_unlocked(obj); | |
75 | kfree(cirrus_fb); | |
76 | return ERR_PTR(ret); | |
77 | } | |
78 | return &cirrus_fb->base; | |
79 | } | |
80 | ||
81 | static const struct drm_mode_config_funcs cirrus_mode_funcs = { | |
82 | .fb_create = cirrus_user_framebuffer_create, | |
83 | }; | |
84 | ||
85 | /* Unmap the framebuffer from the core and release the memory */ | |
86 | static void cirrus_vram_fini(struct cirrus_device *cdev) | |
87 | { | |
88 | iounmap(cdev->rmmio); | |
89 | cdev->rmmio = NULL; | |
90 | if (cdev->mc.vram_base) | |
91 | release_mem_region(cdev->mc.vram_base, cdev->mc.vram_size); | |
92 | } | |
93 | ||
94 | /* Map the framebuffer from the card and configure the core */ | |
95 | static int cirrus_vram_init(struct cirrus_device *cdev) | |
96 | { | |
97 | /* BAR 0 is VRAM */ | |
98 | cdev->mc.vram_base = pci_resource_start(cdev->dev->pdev, 0); | |
99 | /* We have 4MB of VRAM */ | |
100 | cdev->mc.vram_size = 4 * 1024 * 1024; | |
101 | ||
102 | if (!request_mem_region(cdev->mc.vram_base, cdev->mc.vram_size, | |
103 | "cirrusdrmfb_vram")) { | |
104 | DRM_ERROR("can't reserve VRAM\n"); | |
105 | return -ENXIO; | |
106 | } | |
107 | ||
108 | return 0; | |
109 | } | |
110 | ||
111 | /* | |
112 | * Our emulated hardware has two sets of memory. One is video RAM and can | |
113 | * simply be used as a linear framebuffer - the other provides mmio access | |
114 | * to the display registers. The latter can also be accessed via IO port | |
115 | * access, but we map the range and use mmio to program them instead | |
116 | */ | |
117 | ||
118 | int cirrus_device_init(struct cirrus_device *cdev, | |
119 | struct drm_device *ddev, | |
120 | struct pci_dev *pdev, uint32_t flags) | |
121 | { | |
122 | int ret; | |
123 | ||
124 | cdev->dev = ddev; | |
125 | cdev->flags = flags; | |
126 | ||
127 | /* Hardcode the number of CRTCs to 1 */ | |
128 | cdev->num_crtc = 1; | |
129 | ||
130 | /* BAR 0 is the framebuffer, BAR 1 contains registers */ | |
131 | cdev->rmmio_base = pci_resource_start(cdev->dev->pdev, 1); | |
132 | cdev->rmmio_size = pci_resource_len(cdev->dev->pdev, 1); | |
133 | ||
134 | if (!request_mem_region(cdev->rmmio_base, cdev->rmmio_size, | |
135 | "cirrusdrmfb_mmio")) { | |
136 | DRM_ERROR("can't reserve mmio registers\n"); | |
137 | return -ENOMEM; | |
138 | } | |
139 | ||
140 | cdev->rmmio = ioremap(cdev->rmmio_base, cdev->rmmio_size); | |
141 | ||
142 | if (cdev->rmmio == NULL) | |
143 | return -ENOMEM; | |
144 | ||
145 | ret = cirrus_vram_init(cdev); | |
146 | if (ret) { | |
147 | release_mem_region(cdev->rmmio_base, cdev->rmmio_size); | |
148 | return ret; | |
149 | } | |
150 | ||
151 | return 0; | |
152 | } | |
153 | ||
154 | void cirrus_device_fini(struct cirrus_device *cdev) | |
155 | { | |
156 | release_mem_region(cdev->rmmio_base, cdev->rmmio_size); | |
157 | cirrus_vram_fini(cdev); | |
158 | } | |
159 | ||
160 | /* | |
161 | * Functions here will be called by the core once it's bound the driver to | |
162 | * a PCI device | |
163 | */ | |
164 | ||
165 | int cirrus_driver_load(struct drm_device *dev, unsigned long flags) | |
166 | { | |
167 | struct cirrus_device *cdev; | |
168 | int r; | |
169 | ||
170 | cdev = kzalloc(sizeof(struct cirrus_device), GFP_KERNEL); | |
171 | if (cdev == NULL) | |
172 | return -ENOMEM; | |
173 | dev->dev_private = (void *)cdev; | |
174 | ||
175 | r = cirrus_device_init(cdev, dev, dev->pdev, flags); | |
176 | if (r) { | |
177 | dev_err(&dev->pdev->dev, "Fatal error during GPU init: %d\n", r); | |
178 | goto out; | |
179 | } | |
180 | ||
181 | r = cirrus_mm_init(cdev); | |
a7ca52e1 | 182 | if (r) { |
f9aa76a8 | 183 | dev_err(&dev->pdev->dev, "fatal err on mm init\n"); |
a7ca52e1 ZR |
184 | goto out; |
185 | } | |
f9aa76a8 DA |
186 | |
187 | r = cirrus_modeset_init(cdev); | |
a7ca52e1 | 188 | if (r) { |
f9aa76a8 | 189 | dev_err(&dev->pdev->dev, "Fatal error during modeset init: %d\n", r); |
a7ca52e1 ZR |
190 | goto out; |
191 | } | |
f9aa76a8 DA |
192 | |
193 | dev->mode_config.funcs = (void *)&cirrus_mode_funcs; | |
a7ca52e1 ZR |
194 | |
195 | return 0; | |
f9aa76a8 | 196 | out: |
a7ca52e1 | 197 | cirrus_driver_unload(dev); |
f9aa76a8 DA |
198 | return r; |
199 | } | |
200 | ||
201 | int cirrus_driver_unload(struct drm_device *dev) | |
202 | { | |
203 | struct cirrus_device *cdev = dev->dev_private; | |
204 | ||
205 | if (cdev == NULL) | |
206 | return 0; | |
207 | cirrus_modeset_fini(cdev); | |
208 | cirrus_mm_fini(cdev); | |
209 | cirrus_device_fini(cdev); | |
210 | kfree(cdev); | |
211 | dev->dev_private = NULL; | |
212 | return 0; | |
213 | } | |
214 | ||
215 | int cirrus_gem_create(struct drm_device *dev, | |
216 | u32 size, bool iskernel, | |
217 | struct drm_gem_object **obj) | |
218 | { | |
219 | struct cirrus_bo *cirrusbo; | |
220 | int ret; | |
221 | ||
222 | *obj = NULL; | |
223 | ||
224 | size = roundup(size, PAGE_SIZE); | |
225 | if (size == 0) | |
226 | return -EINVAL; | |
227 | ||
228 | ret = cirrus_bo_create(dev, size, 0, 0, &cirrusbo); | |
229 | if (ret) { | |
230 | if (ret != -ERESTARTSYS) | |
231 | DRM_ERROR("failed to allocate GEM object\n"); | |
232 | return ret; | |
233 | } | |
234 | *obj = &cirrusbo->gem; | |
235 | return 0; | |
236 | } | |
237 | ||
238 | int cirrus_dumb_create(struct drm_file *file, | |
239 | struct drm_device *dev, | |
240 | struct drm_mode_create_dumb *args) | |
241 | { | |
242 | int ret; | |
243 | struct drm_gem_object *gobj; | |
244 | u32 handle; | |
245 | ||
246 | args->pitch = args->width * ((args->bpp + 7) / 8); | |
247 | args->size = args->pitch * args->height; | |
248 | ||
249 | ret = cirrus_gem_create(dev, args->size, false, | |
250 | &gobj); | |
251 | if (ret) | |
252 | return ret; | |
253 | ||
254 | ret = drm_gem_handle_create(file, gobj, &handle); | |
255 | drm_gem_object_unreference_unlocked(gobj); | |
256 | if (ret) | |
257 | return ret; | |
258 | ||
259 | args->handle = handle; | |
260 | return 0; | |
261 | } | |
262 | ||
70d5422b | 263 | static void cirrus_bo_unref(struct cirrus_bo **bo) |
f9aa76a8 DA |
264 | { |
265 | struct ttm_buffer_object *tbo; | |
266 | ||
267 | if ((*bo) == NULL) | |
268 | return; | |
269 | ||
270 | tbo = &((*bo)->bo); | |
271 | ttm_bo_unref(&tbo); | |
275c6322 | 272 | *bo = NULL; |
f9aa76a8 DA |
273 | } |
274 | ||
275 | void cirrus_gem_free_object(struct drm_gem_object *obj) | |
276 | { | |
277 | struct cirrus_bo *cirrus_bo = gem_to_cirrus_bo(obj); | |
278 | ||
f9aa76a8 DA |
279 | cirrus_bo_unref(&cirrus_bo); |
280 | } | |
281 | ||
282 | ||
283 | static inline u64 cirrus_bo_mmap_offset(struct cirrus_bo *bo) | |
284 | { | |
72525b3f | 285 | return drm_vma_node_offset_addr(&bo->bo.vma_node); |
f9aa76a8 DA |
286 | } |
287 | ||
288 | int | |
289 | cirrus_dumb_mmap_offset(struct drm_file *file, | |
290 | struct drm_device *dev, | |
291 | uint32_t handle, | |
292 | uint64_t *offset) | |
293 | { | |
294 | struct drm_gem_object *obj; | |
295 | int ret; | |
296 | struct cirrus_bo *bo; | |
297 | ||
298 | mutex_lock(&dev->struct_mutex); | |
299 | obj = drm_gem_object_lookup(dev, file, handle); | |
300 | if (obj == NULL) { | |
301 | ret = -ENOENT; | |
302 | goto out_unlock; | |
303 | } | |
304 | ||
305 | bo = gem_to_cirrus_bo(obj); | |
306 | *offset = cirrus_bo_mmap_offset(bo); | |
307 | ||
308 | drm_gem_object_unreference(obj); | |
309 | ret = 0; | |
310 | out_unlock: | |
311 | mutex_unlock(&dev->struct_mutex); | |
312 | return ret; | |
313 | ||
314 | } |