Merge remote branch 'nouveau/drm-nouveau-next' of ../drm-nouveau-next into drm-core...
[deliverable/linux.git] / drivers / gpu / drm / drm_edid.c
CommitLineData
f453ba04
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1/*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
61e57a8d 5 * Copyright 2010 Red Hat, Inc.
f453ba04
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6 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30#include <linux/kernel.h>
5a0e3ad6 31#include <linux/slab.h>
f453ba04 32#include <linux/i2c.h>
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33#include "drmP.h"
34#include "drm_edid.h"
38fcbb67 35#include "drm_edid_modes.h"
f453ba04 36
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37#define version_greater(edid, maj, min) \
38 (((edid)->version > (maj)) || \
39 ((edid)->version == (maj) && (edid)->revision > (min)))
f453ba04 40
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41#define EDID_EST_TIMINGS 16
42#define EDID_STD_TIMINGS 8
43#define EDID_DETAILED_TIMINGS 4
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44
45/*
46 * EDID blocks out in the wild have a variety of bugs, try to collect
47 * them here (note that userspace may work around broken monitors first,
48 * but fixes should make their way here so that the kernel "just works"
49 * on as many displays as possible).
50 */
51
52/* First detailed mode wrong, use largest 60Hz mode */
53#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
54/* Reported 135MHz pixel clock is too high, needs adjustment */
55#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
56/* Prefer the largest mode at 75 Hz */
57#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
58/* Detail timing is in cm not mm */
59#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
60/* Detailed timing descriptors have bogus size values, so just take the
61 * maximum size and use that.
62 */
63#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
64/* Monitor forgot to set the first detailed is preferred bit. */
65#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
66/* use +hsync +vsync for detailed mode */
67#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
3c537889 68
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69struct detailed_mode_closure {
70 struct drm_connector *connector;
71 struct edid *edid;
72 bool preferred;
73 u32 quirks;
74 int modes;
75};
f453ba04 76
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77#define LEVEL_DMT 0
78#define LEVEL_GTF 1
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79#define LEVEL_GTF2 2
80#define LEVEL_CVT 3
5c61259e 81
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82static struct edid_quirk {
83 char *vendor;
84 int product_id;
85 u32 quirks;
86} edid_quirk_list[] = {
87 /* Acer AL1706 */
88 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
89 /* Acer F51 */
90 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
91 /* Unknown Acer */
92 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
93
94 /* Belinea 10 15 55 */
95 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
96 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
97
98 /* Envision Peripherals, Inc. EN-7100e */
99 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
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100 /* Envision EN2028 */
101 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
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102
103 /* Funai Electronics PM36B */
104 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
105 EDID_QUIRK_DETAILED_IN_CM },
106
107 /* LG Philips LCD LP154W01-A5 */
108 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
109 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
110
111 /* Philips 107p5 CRT */
112 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
113
114 /* Proview AY765C */
115 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
116
117 /* Samsung SyncMaster 205BW. Note: irony */
118 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
119 /* Samsung SyncMaster 22[5-6]BW */
120 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
121 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
122};
123
61e57a8d 124/*** DDC fetch and block validation ***/
f453ba04 125
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126static const u8 edid_header[] = {
127 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
128};
f453ba04 129
61e57a8d
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130/*
131 * Sanity check the EDID block (base or extension). Return 0 if the block
132 * doesn't check out, or 1 if it's valid.
f453ba04 133 */
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134static bool
135drm_edid_block_valid(u8 *raw_edid)
f453ba04 136{
61e57a8d 137 int i;
f453ba04 138 u8 csum = 0;
61e57a8d 139 struct edid *edid = (struct edid *)raw_edid;
f453ba04 140
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141 if (raw_edid[0] == 0x00) {
142 int score = 0;
862b89c0 143
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144 for (i = 0; i < sizeof(edid_header); i++)
145 if (raw_edid[i] == edid_header[i])
146 score++;
147
148 if (score == 8) ;
149 else if (score >= 6) {
150 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
151 memcpy(raw_edid, edid_header, sizeof(edid_header));
152 } else {
153 goto bad;
154 }
155 }
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156
157 for (i = 0; i < EDID_LENGTH; i++)
158 csum += raw_edid[i];
159 if (csum) {
160 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
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161
162 /* allow CEA to slide through, switches mangle this */
163 if (raw_edid[0] != 0x02)
164 goto bad;
f453ba04
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165 }
166
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167 /* per-block-type checks */
168 switch (raw_edid[0]) {
169 case 0: /* base */
170 if (edid->version != 1) {
171 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
172 goto bad;
173 }
862b89c0 174
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175 if (edid->revision > 4)
176 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
177 break;
862b89c0 178
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179 default:
180 break;
181 }
47ee4ccf 182
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183 return 1;
184
185bad:
186 if (raw_edid) {
187 DRM_ERROR("Raw EDID:\n");
188 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
189 printk("\n");
190 }
191 return 0;
192}
61e57a8d
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193
194/**
195 * drm_edid_is_valid - sanity check EDID data
196 * @edid: EDID data
197 *
198 * Sanity-check an entire EDID record (including extensions)
199 */
200bool drm_edid_is_valid(struct edid *edid)
201{
202 int i;
203 u8 *raw = (u8 *)edid;
204
205 if (!edid)
206 return false;
207
208 for (i = 0; i <= edid->extensions; i++)
209 if (!drm_edid_block_valid(raw + i * EDID_LENGTH))
210 return false;
211
212 return true;
213}
3c537889 214EXPORT_SYMBOL(drm_edid_is_valid);
f453ba04 215
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216#define DDC_ADDR 0x50
217#define DDC_SEGMENT_ADDR 0x30
218/**
219 * Get EDID information via I2C.
220 *
221 * \param adapter : i2c device adaptor
222 * \param buf : EDID data buffer to be filled
223 * \param len : EDID data buffer length
224 * \return 0 on success or -1 on failure.
225 *
226 * Try to fetch EDID information by calling i2c driver function.
227 */
228static int
229drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
230 int block, int len)
231{
232 unsigned char start = block * EDID_LENGTH;
233 struct i2c_msg msgs[] = {
234 {
235 .addr = DDC_ADDR,
236 .flags = 0,
237 .len = 1,
238 .buf = &start,
239 }, {
240 .addr = DDC_ADDR,
241 .flags = I2C_M_RD,
242 .len = len,
0ea75e23 243 .buf = buf,
61e57a8d
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244 }
245 };
246
247 if (i2c_transfer(adapter, msgs, 2) == 2)
248 return 0;
249
250 return -1;
251}
252
253static u8 *
254drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
255{
0ea75e23 256 int i, j = 0, valid_extensions = 0;
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257 u8 *block, *new;
258
259 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
260 return NULL;
261
262 /* base block fetch */
263 for (i = 0; i < 4; i++) {
264 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
265 goto out;
266 if (drm_edid_block_valid(block))
267 break;
268 }
269 if (i == 4)
270 goto carp;
271
272 /* if there's no extensions, we're done */
273 if (block[0x7e] == 0)
274 return block;
275
276 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
277 if (!new)
278 goto out;
279 block = new;
280
281 for (j = 1; j <= block[0x7e]; j++) {
282 for (i = 0; i < 4; i++) {
0ea75e23
ST
283 if (drm_do_probe_ddc_edid(adapter,
284 block + (valid_extensions + 1) * EDID_LENGTH,
285 j, EDID_LENGTH))
61e57a8d 286 goto out;
0ea75e23
ST
287 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH)) {
288 valid_extensions++;
61e57a8d 289 break;
0ea75e23 290 }
61e57a8d
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291 }
292 if (i == 4)
0ea75e23
ST
293 dev_warn(connector->dev->dev,
294 "%s: Ignoring invalid EDID block %d.\n",
295 drm_get_connector_name(connector), j);
296 }
297
298 if (valid_extensions != block[0x7e]) {
299 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
300 block[0x7e] = valid_extensions;
301 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
302 if (!new)
303 goto out;
304 block = new;
61e57a8d
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305 }
306
307 return block;
308
309carp:
dcdb1674 310 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
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311 drm_get_connector_name(connector), j);
312
313out:
314 kfree(block);
315 return NULL;
316}
317
318/**
319 * Probe DDC presence.
320 *
321 * \param adapter : i2c device adaptor
322 * \return 1 on success
323 */
324static bool
325drm_probe_ddc(struct i2c_adapter *adapter)
326{
327 unsigned char out;
328
329 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
330}
331
332/**
333 * drm_get_edid - get EDID data, if available
334 * @connector: connector we're probing
335 * @adapter: i2c adapter to use for DDC
336 *
337 * Poke the given i2c channel to grab EDID data if possible. If found,
338 * attach it to the connector.
339 *
340 * Return edid data or NULL if we couldn't find any.
341 */
342struct edid *drm_get_edid(struct drm_connector *connector,
343 struct i2c_adapter *adapter)
344{
345 struct edid *edid = NULL;
346
347 if (drm_probe_ddc(adapter))
348 edid = (struct edid *)drm_do_get_edid(connector, adapter);
349
350 connector->display_info.raw_edid = (char *)edid;
351
352 return edid;
353
354}
355EXPORT_SYMBOL(drm_get_edid);
356
357/*** EDID parsing ***/
358
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359/**
360 * edid_vendor - match a string against EDID's obfuscated vendor field
361 * @edid: EDID to match
362 * @vendor: vendor string
363 *
364 * Returns true if @vendor is in @edid, false otherwise
365 */
366static bool edid_vendor(struct edid *edid, char *vendor)
367{
368 char edid_vendor[3];
369
370 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
371 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
372 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
16456c87 373 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
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374
375 return !strncmp(edid_vendor, vendor, 3);
376}
377
378/**
379 * edid_get_quirks - return quirk flags for a given EDID
380 * @edid: EDID to process
381 *
382 * This tells subsequent routines what fixes they need to apply.
383 */
384static u32 edid_get_quirks(struct edid *edid)
385{
386 struct edid_quirk *quirk;
387 int i;
388
389 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
390 quirk = &edid_quirk_list[i];
391
392 if (edid_vendor(edid, quirk->vendor) &&
393 (EDID_PRODUCT_ID(edid) == quirk->product_id))
394 return quirk->quirks;
395 }
396
397 return 0;
398}
399
400#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
401#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
402
f453ba04
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403/**
404 * edid_fixup_preferred - set preferred modes based on quirk list
405 * @connector: has mode list to fix up
406 * @quirks: quirks list
407 *
408 * Walk the mode list for @connector, clearing the preferred status
409 * on existing modes and setting it anew for the right mode ala @quirks.
410 */
411static void edid_fixup_preferred(struct drm_connector *connector,
412 u32 quirks)
413{
414 struct drm_display_mode *t, *cur_mode, *preferred_mode;
f890607b 415 int target_refresh = 0;
f453ba04
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416
417 if (list_empty(&connector->probed_modes))
418 return;
419
420 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
421 target_refresh = 60;
422 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
423 target_refresh = 75;
424
425 preferred_mode = list_first_entry(&connector->probed_modes,
426 struct drm_display_mode, head);
427
428 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
429 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
430
431 if (cur_mode == preferred_mode)
432 continue;
433
434 /* Largest mode is preferred */
435 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
436 preferred_mode = cur_mode;
437
438 /* At a given size, try to get closest to target refresh */
439 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
440 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
441 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
442 preferred_mode = cur_mode;
443 }
444 }
445
446 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
447}
448
1d42bbc8
DA
449struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
450 int hsize, int vsize, int fresh)
559ee21d 451{
07a5e632 452 int i;
559ee21d
ZY
453 struct drm_display_mode *ptr, *mode;
454
559ee21d 455 mode = NULL;
07a5e632 456 for (i = 0; i < drm_num_dmt_modes; i++) {
559ee21d
ZY
457 ptr = &drm_dmt_modes[i];
458 if (hsize == ptr->hdisplay &&
459 vsize == ptr->vdisplay &&
460 fresh == drm_mode_vrefresh(ptr)) {
461 /* get the expected default mode */
462 mode = drm_mode_duplicate(dev, ptr);
463 break;
464 }
465 }
466 return mode;
467}
1d42bbc8 468EXPORT_SYMBOL(drm_mode_find_dmt);
23425cae 469
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470typedef void detailed_cb(struct detailed_timing *timing, void *closure);
471
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472static void
473cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
474{
475 int i, n = 0;
476 u8 rev = ext[0x01], d = ext[0x02];
477 u8 *det_base = ext + d;
478
479 switch (rev) {
480 case 0:
481 /* can't happen */
482 return;
483 case 1:
484 /* have to infer how many blocks we have, check pixel clock */
485 for (i = 0; i < 6; i++)
486 if (det_base[18*i] || det_base[18*i+1])
487 n++;
488 break;
489 default:
490 /* explicit count */
491 n = min(ext[0x03] & 0x0f, 6);
492 break;
493 }
494
495 for (i = 0; i < n; i++)
496 cb((struct detailed_timing *)(det_base + 18 * i), closure);
497}
498
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499static void
500vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
501{
502 unsigned int i, n = min((int)ext[0x02], 6);
503 u8 *det_base = ext + 5;
504
505 if (ext[0x01] != 1)
506 return; /* unknown version */
507
508 for (i = 0; i < n; i++)
509 cb((struct detailed_timing *)(det_base + 18 * i), closure);
510}
511
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512static void
513drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
514{
515 int i;
516 struct edid *edid = (struct edid *)raw_edid;
517
518 if (edid == NULL)
519 return;
520
521 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
522 cb(&(edid->detailed_timings[i]), closure);
523
4d76a221
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524 for (i = 1; i <= raw_edid[0x7e]; i++) {
525 u8 *ext = raw_edid + (i * EDID_LENGTH);
526 switch (*ext) {
527 case CEA_EXT:
528 cea_for_each_detailed_block(ext, cb, closure);
529 break;
cbba98f8
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530 case VTB_EXT:
531 vtb_for_each_detailed_block(ext, cb, closure);
532 break;
4d76a221
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533 default:
534 break;
535 }
536 }
d1ff6409
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537}
538
539static void
540is_rb(struct detailed_timing *t, void *data)
541{
542 u8 *r = (u8 *)t;
543 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
544 if (r[15] & 0x10)
545 *(bool *)data = true;
546}
547
548/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
549static bool
550drm_monitor_supports_rb(struct edid *edid)
551{
552 if (edid->revision >= 4) {
553 bool ret;
554 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
555 return ret;
556 }
557
558 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
559}
560
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561static void
562find_gtf2(struct detailed_timing *t, void *data)
563{
564 u8 *r = (u8 *)t;
565 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
566 *(u8 **)data = r;
567}
568
569/* Secondary GTF curve kicks in above some break frequency */
570static int
571drm_gtf2_hbreak(struct edid *edid)
572{
573 u8 *r = NULL;
574 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
575 return r ? (r[12] * 2) : 0;
576}
577
578static int
579drm_gtf2_2c(struct edid *edid)
580{
581 u8 *r = NULL;
582 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
583 return r ? r[13] : 0;
584}
585
586static int
587drm_gtf2_m(struct edid *edid)
588{
589 u8 *r = NULL;
590 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
591 return r ? (r[15] << 8) + r[14] : 0;
592}
593
594static int
595drm_gtf2_k(struct edid *edid)
596{
597 u8 *r = NULL;
598 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
599 return r ? r[16] : 0;
600}
601
602static int
603drm_gtf2_2j(struct edid *edid)
604{
605 u8 *r = NULL;
606 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
607 return r ? r[17] : 0;
608}
609
610/**
611 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
612 * @edid: EDID block to scan
613 */
614static int standard_timing_level(struct edid *edid)
615{
616 if (edid->revision >= 2) {
617 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
618 return LEVEL_CVT;
619 if (drm_gtf2_hbreak(edid))
620 return LEVEL_GTF2;
621 return LEVEL_GTF;
622 }
623 return LEVEL_DMT;
624}
625
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626/*
627 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
628 * monitors fill with ascii space (0x20) instead.
629 */
630static int
631bad_std_timing(u8 a, u8 b)
632{
633 return (a == 0x00 && b == 0x00) ||
634 (a == 0x01 && b == 0x01) ||
635 (a == 0x20 && b == 0x20);
636}
637
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638/**
639 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
640 * @t: standard timing params
5c61259e 641 * @timing_level: standard timing level
f453ba04
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642 *
643 * Take the standard timing params (in this case width, aspect, and refresh)
5c61259e 644 * and convert them into a real mode using CVT/GTF/DMT.
f453ba04 645 */
7ca6adb3 646static struct drm_display_mode *
7a374350
AJ
647drm_mode_std(struct drm_connector *connector, struct edid *edid,
648 struct std_timing *t, int revision)
f453ba04 649{
7ca6adb3
AJ
650 struct drm_device *dev = connector->dev;
651 struct drm_display_mode *m, *mode = NULL;
5c61259e
ZY
652 int hsize, vsize;
653 int vrefresh_rate;
0454beab
MD
654 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
655 >> EDID_TIMING_ASPECT_SHIFT;
5c61259e
ZY
656 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
657 >> EDID_TIMING_VFREQ_SHIFT;
7a374350 658 int timing_level = standard_timing_level(edid);
5c61259e 659
23425cae
AJ
660 if (bad_std_timing(t->hsize, t->vfreq_aspect))
661 return NULL;
662
5c61259e
ZY
663 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
664 hsize = t->hsize * 8 + 248;
665 /* vrefresh_rate = vfreq + 60 */
666 vrefresh_rate = vfreq + 60;
667 /* the vdisplay is calculated based on the aspect ratio */
f066a17d
AJ
668 if (aspect_ratio == 0) {
669 if (revision < 3)
670 vsize = hsize;
671 else
672 vsize = (hsize * 10) / 16;
673 } else if (aspect_ratio == 1)
f453ba04 674 vsize = (hsize * 3) / 4;
0454beab 675 else if (aspect_ratio == 2)
f453ba04
DA
676 vsize = (hsize * 4) / 5;
677 else
678 vsize = (hsize * 9) / 16;
a0910c8e
AJ
679
680 /* HDTV hack, part 1 */
681 if (vrefresh_rate == 60 &&
682 ((hsize == 1360 && vsize == 765) ||
683 (hsize == 1368 && vsize == 769))) {
684 hsize = 1366;
685 vsize = 768;
686 }
687
7ca6adb3
AJ
688 /*
689 * If this connector already has a mode for this size and refresh
690 * rate (because it came from detailed or CVT info), use that
691 * instead. This way we don't have to guess at interlace or
692 * reduced blanking.
693 */
522032da 694 list_for_each_entry(m, &connector->probed_modes, head)
7ca6adb3
AJ
695 if (m->hdisplay == hsize && m->vdisplay == vsize &&
696 drm_mode_vrefresh(m) == vrefresh_rate)
697 return NULL;
698
a0910c8e
AJ
699 /* HDTV hack, part 2 */
700 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
701 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
d50ba256 702 false);
559ee21d 703 mode->hdisplay = 1366;
a4967de6
AJ
704 mode->hsync_start = mode->hsync_start - 1;
705 mode->hsync_end = mode->hsync_end - 1;
559ee21d
ZY
706 return mode;
707 }
a0910c8e 708
559ee21d 709 /* check whether it can be found in default mode table */
1d42bbc8 710 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate);
559ee21d
ZY
711 if (mode)
712 return mode;
713
5c61259e
ZY
714 switch (timing_level) {
715 case LEVEL_DMT:
5c61259e
ZY
716 break;
717 case LEVEL_GTF:
718 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
719 break;
7a374350
AJ
720 case LEVEL_GTF2:
721 /*
722 * This is potentially wrong if there's ever a monitor with
723 * more than one ranges section, each claiming a different
724 * secondary GTF curve. Please don't do that.
725 */
726 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
727 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
728 kfree(mode);
729 mode = drm_gtf_mode_complex(dev, hsize, vsize,
730 vrefresh_rate, 0, 0,
731 drm_gtf2_m(edid),
732 drm_gtf2_2c(edid),
733 drm_gtf2_k(edid),
734 drm_gtf2_2j(edid));
735 }
736 break;
5c61259e 737 case LEVEL_CVT:
d50ba256
DA
738 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
739 false);
5c61259e
ZY
740 break;
741 }
f453ba04
DA
742 return mode;
743}
744
b58db2c6
AJ
745/*
746 * EDID is delightfully ambiguous about how interlaced modes are to be
747 * encoded. Our internal representation is of frame height, but some
748 * HDTV detailed timings are encoded as field height.
749 *
750 * The format list here is from CEA, in frame size. Technically we
751 * should be checking refresh rate too. Whatever.
752 */
753static void
754drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
755 struct detailed_pixel_timing *pt)
756{
757 int i;
758 static const struct {
759 int w, h;
760 } cea_interlaced[] = {
761 { 1920, 1080 },
762 { 720, 480 },
763 { 1440, 480 },
764 { 2880, 480 },
765 { 720, 576 },
766 { 1440, 576 },
767 { 2880, 576 },
768 };
b58db2c6
AJ
769
770 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
771 return;
772
3c581411 773 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
b58db2c6
AJ
774 if ((mode->hdisplay == cea_interlaced[i].w) &&
775 (mode->vdisplay == cea_interlaced[i].h / 2)) {
776 mode->vdisplay *= 2;
777 mode->vsync_start *= 2;
778 mode->vsync_end *= 2;
779 mode->vtotal *= 2;
780 mode->vtotal |= 1;
781 }
782 }
783
784 mode->flags |= DRM_MODE_FLAG_INTERLACE;
785}
786
f453ba04
DA
787/**
788 * drm_mode_detailed - create a new mode from an EDID detailed timing section
789 * @dev: DRM device (needed to create new mode)
790 * @edid: EDID block
791 * @timing: EDID detailed timing info
792 * @quirks: quirks to apply
793 *
794 * An EDID detailed timing block contains enough info for us to create and
795 * return a new struct drm_display_mode.
796 */
797static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
798 struct edid *edid,
799 struct detailed_timing *timing,
800 u32 quirks)
801{
802 struct drm_display_mode *mode;
803 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
0454beab
MD
804 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
805 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
806 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
807 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
e14cbee4
MD
808 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
809 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
810 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
811 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
f453ba04 812
fc438966 813 /* ignore tiny modes */
0454beab 814 if (hactive < 64 || vactive < 64)
fc438966
AJ
815 return NULL;
816
0454beab 817 if (pt->misc & DRM_EDID_PT_STEREO) {
f453ba04
DA
818 printk(KERN_WARNING "stereo mode not supported\n");
819 return NULL;
820 }
0454beab 821 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
79b7dcb2 822 printk(KERN_WARNING "composite sync not supported\n");
f453ba04
DA
823 }
824
fcb45611
ZY
825 /* it is incorrect if hsync/vsync width is zero */
826 if (!hsync_pulse_width || !vsync_pulse_width) {
827 DRM_DEBUG_KMS("Incorrect Detailed timing. "
828 "Wrong Hsync/Vsync pulse width\n");
829 return NULL;
830 }
f453ba04
DA
831 mode = drm_mode_create(dev);
832 if (!mode)
833 return NULL;
834
835 mode->type = DRM_MODE_TYPE_DRIVER;
836
837 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
0454beab
MD
838 timing->pixel_clock = cpu_to_le16(1088);
839
840 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
841
842 mode->hdisplay = hactive;
843 mode->hsync_start = mode->hdisplay + hsync_offset;
844 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
845 mode->htotal = mode->hdisplay + hblank;
846
847 mode->vdisplay = vactive;
848 mode->vsync_start = mode->vdisplay + vsync_offset;
849 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
850 mode->vtotal = mode->vdisplay + vblank;
f453ba04 851
7064fef5
JB
852 /* Some EDIDs have bogus h/vtotal values */
853 if (mode->hsync_end > mode->htotal)
854 mode->htotal = mode->hsync_end + 1;
855 if (mode->vsync_end > mode->vtotal)
856 mode->vtotal = mode->vsync_end + 1;
857
b58db2c6 858 drm_mode_do_interlace_quirk(mode, pt);
f453ba04 859
171fdd89
AJ
860 drm_mode_set_name(mode);
861
f453ba04 862 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
0454beab 863 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
f453ba04
DA
864 }
865
0454beab
MD
866 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
867 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
868 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
869 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
f453ba04 870
e14cbee4
MD
871 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
872 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
f453ba04
DA
873
874 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
875 mode->width_mm *= 10;
876 mode->height_mm *= 10;
877 }
878
879 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
880 mode->width_mm = edid->width_cm * 10;
881 mode->height_mm = edid->height_cm * 10;
882 }
883
884 return mode;
885}
886
07a5e632 887static bool
b17e52ef 888mode_is_rb(struct drm_display_mode *mode)
07a5e632 889{
b17e52ef
AJ
890 return (mode->htotal - mode->hdisplay == 160) &&
891 (mode->hsync_end - mode->hdisplay == 80) &&
892 (mode->hsync_end - mode->hsync_start == 32) &&
893 (mode->vsync_start - mode->vdisplay == 3);
894}
07a5e632 895
b17e52ef
AJ
896static bool
897mode_in_hsync_range(struct drm_display_mode *mode, struct edid *edid, u8 *t)
898{
899 int hsync, hmin, hmax;
900
901 hmin = t[7];
902 if (edid->revision >= 4)
903 hmin += ((t[4] & 0x04) ? 255 : 0);
904 hmax = t[8];
905 if (edid->revision >= 4)
906 hmax += ((t[4] & 0x08) ? 255 : 0);
07a5e632 907 hsync = drm_mode_hsync(mode);
07a5e632 908
b17e52ef
AJ
909 return (hsync <= hmax && hsync >= hmin);
910}
911
912static bool
913mode_in_vsync_range(struct drm_display_mode *mode, struct edid *edid, u8 *t)
914{
915 int vsync, vmin, vmax;
916
917 vmin = t[5];
918 if (edid->revision >= 4)
919 vmin += ((t[4] & 0x01) ? 255 : 0);
920 vmax = t[6];
921 if (edid->revision >= 4)
922 vmax += ((t[4] & 0x02) ? 255 : 0);
923 vsync = drm_mode_vrefresh(mode);
924
925 return (vsync <= vmax && vsync >= vmin);
926}
927
928static u32
929range_pixel_clock(struct edid *edid, u8 *t)
930{
931 /* unspecified */
932 if (t[9] == 0 || t[9] == 255)
933 return 0;
934
935 /* 1.4 with CVT support gives us real precision, yay */
936 if (edid->revision >= 4 && t[10] == 0x04)
937 return (t[9] * 10000) - ((t[12] >> 2) * 250);
938
939 /* 1.3 is pathetic, so fuzz up a bit */
940 return t[9] * 10000 + 5001;
941}
942
b17e52ef
AJ
943static bool
944mode_in_range(struct drm_display_mode *mode, struct edid *edid,
945 struct detailed_timing *timing)
946{
947 u32 max_clock;
948 u8 *t = (u8 *)timing;
949
950 if (!mode_in_hsync_range(mode, edid, t))
07a5e632
AJ
951 return false;
952
b17e52ef 953 if (!mode_in_vsync_range(mode, edid, t))
07a5e632
AJ
954 return false;
955
b17e52ef 956 if ((max_clock = range_pixel_clock(edid, t)))
07a5e632
AJ
957 if (mode->clock > max_clock)
958 return false;
b17e52ef
AJ
959
960 /* 1.4 max horizontal check */
961 if (edid->revision >= 4 && t[10] == 0x04)
962 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
963 return false;
964
965 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
966 return false;
07a5e632
AJ
967
968 return true;
969}
970
971/*
972 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
973 * need to account for them.
974 */
b17e52ef
AJ
975static int
976drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
977 struct detailed_timing *timing)
07a5e632
AJ
978{
979 int i, modes = 0;
980 struct drm_display_mode *newmode;
981 struct drm_device *dev = connector->dev;
982
983 for (i = 0; i < drm_num_dmt_modes; i++) {
b17e52ef 984 if (mode_in_range(drm_dmt_modes + i, edid, timing)) {
07a5e632
AJ
985 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
986 if (newmode) {
987 drm_mode_probed_add(connector, newmode);
988 modes++;
989 }
990 }
991 }
992
993 return modes;
994}
995
13931579
AJ
996static void
997do_inferred_modes(struct detailed_timing *timing, void *c)
9340d8cf 998{
13931579
AJ
999 struct detailed_mode_closure *closure = c;
1000 struct detailed_non_pixel *data = &timing->data.other_data;
1001 int gtf = (closure->edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
9340d8cf 1002
13931579
AJ
1003 if (gtf && data->type == EDID_DETAIL_MONITOR_RANGE)
1004 closure->modes += drm_gtf_modes_for_range(closure->connector,
1005 closure->edid,
1006 timing);
1007}
69da3015 1008
13931579
AJ
1009static int
1010add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1011{
1012 struct detailed_mode_closure closure = {
1013 connector, edid, 0, 0, 0
1014 };
9340d8cf 1015
13931579
AJ
1016 if (version_greater(edid, 1, 0))
1017 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1018 &closure);
9340d8cf 1019
13931579 1020 return closure.modes;
9340d8cf
AJ
1021}
1022
2255be14
AJ
1023static int
1024drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1025{
1026 int i, j, m, modes = 0;
1027 struct drm_display_mode *mode;
1028 u8 *est = ((u8 *)timing) + 5;
1029
1030 for (i = 0; i < 6; i++) {
1031 for (j = 7; j > 0; j--) {
1032 m = (i * 8) + (7 - j);
3c581411 1033 if (m >= ARRAY_SIZE(est3_modes))
2255be14
AJ
1034 break;
1035 if (est[i] & (1 << j)) {
1d42bbc8
DA
1036 mode = drm_mode_find_dmt(connector->dev,
1037 est3_modes[m].w,
1038 est3_modes[m].h,
1039 est3_modes[m].r
1040 /*, est3_modes[m].rb */);
2255be14
AJ
1041 if (mode) {
1042 drm_mode_probed_add(connector, mode);
1043 modes++;
1044 }
1045 }
1046 }
1047 }
1048
1049 return modes;
1050}
1051
13931579
AJ
1052static void
1053do_established_modes(struct detailed_timing *timing, void *c)
9cf00977 1054{
13931579 1055 struct detailed_mode_closure *closure = c;
9cf00977 1056 struct detailed_non_pixel *data = &timing->data.other_data;
9cf00977 1057
13931579
AJ
1058 if (data->type == EDID_DETAIL_EST_TIMINGS)
1059 closure->modes += drm_est3_modes(closure->connector, timing);
1060}
9cf00977 1061
13931579
AJ
1062/**
1063 * add_established_modes - get est. modes from EDID and add them
1064 * @edid: EDID block to scan
1065 *
1066 * Each EDID block contains a bitmap of the supported "established modes" list
1067 * (defined above). Tease them out and add them to the global modes list.
1068 */
1069static int
1070add_established_modes(struct drm_connector *connector, struct edid *edid)
1071{
1072 struct drm_device *dev = connector->dev;
1073 unsigned long est_bits = edid->established_timings.t1 |
1074 (edid->established_timings.t2 << 8) |
1075 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1076 int i, modes = 0;
1077 struct detailed_mode_closure closure = {
1078 connector, edid, 0, 0, 0
1079 };
9cf00977 1080
13931579
AJ
1081 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1082 if (est_bits & (1<<i)) {
1083 struct drm_display_mode *newmode;
1084 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1085 if (newmode) {
1086 drm_mode_probed_add(connector, newmode);
1087 modes++;
1088 }
1089 }
9cf00977
AJ
1090 }
1091
13931579
AJ
1092 if (version_greater(edid, 1, 0))
1093 drm_for_each_detailed_block((u8 *)edid,
1094 do_established_modes, &closure);
1095
1096 return modes + closure.modes;
1097}
1098
1099static void
1100do_standard_modes(struct detailed_timing *timing, void *c)
1101{
1102 struct detailed_mode_closure *closure = c;
1103 struct detailed_non_pixel *data = &timing->data.other_data;
1104 struct drm_connector *connector = closure->connector;
1105 struct edid *edid = closure->edid;
1106
1107 if (data->type == EDID_DETAIL_STD_MODES) {
1108 int i;
9cf00977
AJ
1109 for (i = 0; i < 6; i++) {
1110 struct std_timing *std;
1111 struct drm_display_mode *newmode;
1112
1113 std = &data->data.timings[i];
7a374350
AJ
1114 newmode = drm_mode_std(connector, edid, std,
1115 edid->revision);
9cf00977
AJ
1116 if (newmode) {
1117 drm_mode_probed_add(connector, newmode);
13931579 1118 closure->modes++;
9cf00977
AJ
1119 }
1120 }
9cf00977 1121 }
9cf00977
AJ
1122}
1123
f453ba04 1124/**
13931579 1125 * add_standard_modes - get std. modes from EDID and add them
f453ba04 1126 * @edid: EDID block to scan
f453ba04 1127 *
13931579
AJ
1128 * Standard modes can be calculated using the appropriate standard (DMT,
1129 * GTF or CVT. Grab them from @edid and add them to the list.
f453ba04 1130 */
13931579
AJ
1131static int
1132add_standard_modes(struct drm_connector *connector, struct edid *edid)
f453ba04 1133{
9cf00977 1134 int i, modes = 0;
13931579
AJ
1135 struct detailed_mode_closure closure = {
1136 connector, edid, 0, 0, 0
1137 };
1138
1139 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1140 struct drm_display_mode *newmode;
1141
1142 newmode = drm_mode_std(connector, edid,
1143 &edid->standard_timings[i],
1144 edid->revision);
1145 if (newmode) {
1146 drm_mode_probed_add(connector, newmode);
1147 modes++;
1148 }
1149 }
1150
1151 if (version_greater(edid, 1, 0))
1152 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
1153 &closure);
1154
1155 /* XXX should also look for standard codes in VTB blocks */
1156
1157 return modes + closure.modes;
1158}
f453ba04 1159
13931579
AJ
1160static int drm_cvt_modes(struct drm_connector *connector,
1161 struct detailed_timing *timing)
1162{
1163 int i, j, modes = 0;
1164 struct drm_display_mode *newmode;
1165 struct drm_device *dev = connector->dev;
1166 struct cvt_timing *cvt;
1167 const int rates[] = { 60, 85, 75, 60, 50 };
1168 const u8 empty[3] = { 0, 0, 0 };
a327f6b8 1169
13931579
AJ
1170 for (i = 0; i < 4; i++) {
1171 int uninitialized_var(width), height;
1172 cvt = &(timing->data.other_data.data.cvt[i]);
f453ba04 1173
13931579 1174 if (!memcmp(cvt->code, empty, 3))
9cf00977 1175 continue;
f453ba04 1176
13931579
AJ
1177 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1178 switch (cvt->code[1] & 0x0c) {
1179 case 0x00:
1180 width = height * 4 / 3;
1181 break;
1182 case 0x04:
1183 width = height * 16 / 9;
1184 break;
1185 case 0x08:
1186 width = height * 16 / 10;
1187 break;
1188 case 0x0c:
1189 width = height * 15 / 9;
1190 break;
1191 }
1192
1193 for (j = 1; j < 5; j++) {
1194 if (cvt->code[2] & (1 << j)) {
1195 newmode = drm_cvt_mode(dev, width, height,
1196 rates[j], j == 0,
1197 false, false);
1198 if (newmode) {
1199 drm_mode_probed_add(connector, newmode);
1200 modes++;
1201 }
1202 }
1203 }
f453ba04
DA
1204 }
1205
1206 return modes;
1207}
9cf00977 1208
13931579
AJ
1209static void
1210do_cvt_mode(struct detailed_timing *timing, void *c)
882f0219 1211{
13931579
AJ
1212 struct detailed_mode_closure *closure = c;
1213 struct detailed_non_pixel *data = &timing->data.other_data;
882f0219 1214
13931579
AJ
1215 if (data->type == EDID_DETAIL_CVT_3BYTE)
1216 closure->modes += drm_cvt_modes(closure->connector, timing);
1217}
882f0219 1218
13931579
AJ
1219static int
1220add_cvt_modes(struct drm_connector *connector, struct edid *edid)
1221{
1222 struct detailed_mode_closure closure = {
1223 connector, edid, 0, 0, 0
1224 };
882f0219 1225
13931579
AJ
1226 if (version_greater(edid, 1, 2))
1227 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
882f0219 1228
13931579 1229 /* XXX should also look for CVT codes in VTB blocks */
882f0219 1230
13931579
AJ
1231 return closure.modes;
1232}
1233
1234static void
1235do_detailed_mode(struct detailed_timing *timing, void *c)
1236{
1237 struct detailed_mode_closure *closure = c;
1238 struct drm_display_mode *newmode;
1239
1240 if (timing->pixel_clock) {
1241 newmode = drm_mode_detailed(closure->connector->dev,
1242 closure->edid, timing,
1243 closure->quirks);
1244 if (!newmode)
1245 return;
1246
1247 if (closure->preferred)
1248 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1249
1250 drm_mode_probed_add(closure->connector, newmode);
1251 closure->modes++;
1252 closure->preferred = 0;
882f0219 1253 }
13931579 1254}
882f0219 1255
13931579
AJ
1256/*
1257 * add_detailed_modes - Add modes from detailed timings
1258 * @connector: attached connector
1259 * @edid: EDID block to scan
1260 * @quirks: quirks to apply
1261 */
1262static int
1263add_detailed_modes(struct drm_connector *connector, struct edid *edid,
1264 u32 quirks)
1265{
1266 struct detailed_mode_closure closure = {
1267 connector,
1268 edid,
1269 1,
1270 quirks,
1271 0
1272 };
1273
1274 if (closure.preferred && !version_greater(edid, 1, 3))
1275 closure.preferred =
1276 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1277
1278 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1279
1280 return closure.modes;
882f0219 1281}
f453ba04 1282
f23c20c8 1283#define HDMI_IDENTIFIER 0x000C03
8fe9790d 1284#define AUDIO_BLOCK 0x01
f23c20c8 1285#define VENDOR_BLOCK 0x03
8fe9790d
ZW
1286#define EDID_BASIC_AUDIO (1 << 6)
1287
f23c20c8 1288/**
8fe9790d 1289 * Search EDID for CEA extension block.
f23c20c8 1290 */
8fe9790d 1291static u8 *drm_find_cea_extension(struct edid *edid)
f23c20c8 1292{
8fe9790d
ZW
1293 u8 *edid_ext = NULL;
1294 int i;
f23c20c8
ML
1295
1296 /* No EDID or EDID extensions */
1297 if (edid == NULL || edid->extensions == 0)
8fe9790d 1298 return NULL;
f23c20c8 1299
f23c20c8 1300 /* Find CEA extension */
7466f4cc 1301 for (i = 0; i < edid->extensions; i++) {
8fe9790d
ZW
1302 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
1303 if (edid_ext[0] == CEA_EXT)
f23c20c8
ML
1304 break;
1305 }
1306
7466f4cc 1307 if (i == edid->extensions)
8fe9790d
ZW
1308 return NULL;
1309
1310 return edid_ext;
1311}
1312
1313/**
1314 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1315 * @edid: monitor EDID information
1316 *
1317 * Parse the CEA extension according to CEA-861-B.
1318 * Return true if HDMI, false if not or unknown.
1319 */
1320bool drm_detect_hdmi_monitor(struct edid *edid)
1321{
1322 u8 *edid_ext;
1323 int i, hdmi_id;
1324 int start_offset, end_offset;
1325 bool is_hdmi = false;
1326
1327 edid_ext = drm_find_cea_extension(edid);
1328 if (!edid_ext)
f23c20c8
ML
1329 goto end;
1330
1331 /* Data block offset in CEA extension block */
1332 start_offset = 4;
1333 end_offset = edid_ext[2];
1334
1335 /*
1336 * Because HDMI identifier is in Vendor Specific Block,
1337 * search it from all data blocks of CEA extension.
1338 */
1339 for (i = start_offset; i < end_offset;
1340 /* Increased by data block len */
1341 i += ((edid_ext[i] & 0x1f) + 1)) {
1342 /* Find vendor specific block */
1343 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1344 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1345 edid_ext[i + 3] << 16;
1346 /* Find HDMI identifier */
1347 if (hdmi_id == HDMI_IDENTIFIER)
1348 is_hdmi = true;
1349 break;
1350 }
1351 }
1352
1353end:
1354 return is_hdmi;
1355}
1356EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1357
8fe9790d
ZW
1358/**
1359 * drm_detect_monitor_audio - check monitor audio capability
1360 *
1361 * Monitor should have CEA extension block.
1362 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
1363 * audio' only. If there is any audio extension block and supported
1364 * audio format, assume at least 'basic audio' support, even if 'basic
1365 * audio' is not defined in EDID.
1366 *
1367 */
1368bool drm_detect_monitor_audio(struct edid *edid)
1369{
1370 u8 *edid_ext;
1371 int i, j;
1372 bool has_audio = false;
1373 int start_offset, end_offset;
1374
1375 edid_ext = drm_find_cea_extension(edid);
1376 if (!edid_ext)
1377 goto end;
1378
1379 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
1380
1381 if (has_audio) {
1382 DRM_DEBUG_KMS("Monitor has basic audio support\n");
1383 goto end;
1384 }
1385
1386 /* Data block offset in CEA extension block */
1387 start_offset = 4;
1388 end_offset = edid_ext[2];
1389
1390 for (i = start_offset; i < end_offset;
1391 i += ((edid_ext[i] & 0x1f) + 1)) {
1392 if ((edid_ext[i] >> 5) == AUDIO_BLOCK) {
1393 has_audio = true;
1394 for (j = 1; j < (edid_ext[i] & 0x1f); j += 3)
1395 DRM_DEBUG_KMS("CEA audio format %d\n",
1396 (edid_ext[i + j] >> 3) & 0xf);
1397 goto end;
1398 }
1399 }
1400end:
1401 return has_audio;
1402}
1403EXPORT_SYMBOL(drm_detect_monitor_audio);
1404
f453ba04
DA
1405/**
1406 * drm_add_edid_modes - add modes from EDID data, if available
1407 * @connector: connector we're probing
1408 * @edid: edid data
1409 *
1410 * Add the specified modes to the connector's mode list.
1411 *
1412 * Return number of modes added or 0 if we couldn't find any.
1413 */
1414int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1415{
1416 int num_modes = 0;
1417 u32 quirks;
1418
1419 if (edid == NULL) {
1420 return 0;
1421 }
3c537889 1422 if (!drm_edid_is_valid(edid)) {
dcdb1674 1423 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
f453ba04
DA
1424 drm_get_connector_name(connector));
1425 return 0;
1426 }
1427
1428 quirks = edid_get_quirks(edid);
1429
c867df70
AJ
1430 /*
1431 * EDID spec says modes should be preferred in this order:
1432 * - preferred detailed mode
1433 * - other detailed modes from base block
1434 * - detailed modes from extension blocks
1435 * - CVT 3-byte code modes
1436 * - standard timing codes
1437 * - established timing codes
1438 * - modes inferred from GTF or CVT range information
1439 *
13931579 1440 * We get this pretty much right.
c867df70
AJ
1441 *
1442 * XXX order for additional mode types in extension blocks?
1443 */
13931579
AJ
1444 num_modes += add_detailed_modes(connector, edid, quirks);
1445 num_modes += add_cvt_modes(connector, edid);
c867df70
AJ
1446 num_modes += add_standard_modes(connector, edid);
1447 num_modes += add_established_modes(connector, edid);
13931579 1448 num_modes += add_inferred_modes(connector, edid);
f453ba04
DA
1449
1450 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1451 edid_fixup_preferred(connector, quirks);
1452
f453ba04
DA
1453 connector->display_info.width_mm = edid->width_cm * 10;
1454 connector->display_info.height_mm = edid->height_cm * 10;
f453ba04
DA
1455
1456 return num_modes;
1457}
1458EXPORT_SYMBOL(drm_add_edid_modes);
f0fda0a4
ZY
1459
1460/**
1461 * drm_add_modes_noedid - add modes for the connectors without EDID
1462 * @connector: connector we're probing
1463 * @hdisplay: the horizontal display limit
1464 * @vdisplay: the vertical display limit
1465 *
1466 * Add the specified modes to the connector's mode list. Only when the
1467 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1468 *
1469 * Return number of modes added or 0 if we couldn't find any.
1470 */
1471int drm_add_modes_noedid(struct drm_connector *connector,
1472 int hdisplay, int vdisplay)
1473{
1474 int i, count, num_modes = 0;
1475 struct drm_display_mode *mode, *ptr;
1476 struct drm_device *dev = connector->dev;
1477
1478 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1479 if (hdisplay < 0)
1480 hdisplay = 0;
1481 if (vdisplay < 0)
1482 vdisplay = 0;
1483
1484 for (i = 0; i < count; i++) {
1485 ptr = &drm_dmt_modes[i];
1486 if (hdisplay && vdisplay) {
1487 /*
1488 * Only when two are valid, they will be used to check
1489 * whether the mode should be added to the mode list of
1490 * the connector.
1491 */
1492 if (ptr->hdisplay > hdisplay ||
1493 ptr->vdisplay > vdisplay)
1494 continue;
1495 }
f985dedb
AJ
1496 if (drm_mode_vrefresh(ptr) > 61)
1497 continue;
f0fda0a4
ZY
1498 mode = drm_mode_duplicate(dev, ptr);
1499 if (mode) {
1500 drm_mode_probed_add(connector, mode);
1501 num_modes++;
1502 }
1503 }
1504 return num_modes;
1505}
1506EXPORT_SYMBOL(drm_add_modes_noedid);
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