Commit | Line | Data |
---|---|---|
f453ba04 | 1 | /* |
f453ba04 DA |
2 | * Copyright © 1997-2003 by The XFree86 Project, Inc. |
3 | * Copyright © 2007 Dave Airlie | |
4 | * Copyright © 2007-2008 Intel Corporation | |
5 | * Jesse Barnes <jesse.barnes@intel.com> | |
d782c3f9 | 6 | * Copyright 2005-2006 Luc Verhaegen |
26bbdada | 7 | * Copyright (c) 2001, Andy Ritger aritger@nvidia.com |
f453ba04 DA |
8 | * |
9 | * Permission is hereby granted, free of charge, to any person obtaining a | |
10 | * copy of this software and associated documentation files (the "Software"), | |
11 | * to deal in the Software without restriction, including without limitation | |
12 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
13 | * and/or sell copies of the Software, and to permit persons to whom the | |
14 | * Software is furnished to do so, subject to the following conditions: | |
15 | * | |
16 | * The above copyright notice and this permission notice shall be included in | |
17 | * all copies or substantial portions of the Software. | |
18 | * | |
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
22 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
23 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
24 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
25 | * OTHER DEALINGS IN THE SOFTWARE. | |
26 | * | |
27 | * Except as contained in this notice, the name of the copyright holder(s) | |
28 | * and author(s) shall not be used in advertising or otherwise to promote | |
29 | * the sale, use or other dealings in this Software without prior written | |
30 | * authorization from the copyright holder(s) and author(s). | |
31 | */ | |
32 | ||
33 | #include <linux/list.h> | |
2c761270 | 34 | #include <linux/list_sort.h> |
2d1a8a48 | 35 | #include <linux/export.h> |
760285e7 DH |
36 | #include <drm/drmP.h> |
37 | #include <drm/drm_crtc.h> | |
edb37a95 | 38 | #include <video/of_videomode.h> |
ebc64e45 | 39 | #include <video/videomode.h> |
f453ba04 DA |
40 | |
41 | /** | |
42 | * drm_mode_debug_printmodeline - debug print a mode | |
43 | * @dev: DRM device | |
44 | * @mode: mode to print | |
45 | * | |
46 | * LOCKING: | |
47 | * None. | |
48 | * | |
49 | * Describe @mode using DRM_DEBUG. | |
50 | */ | |
0b3904ab | 51 | void drm_mode_debug_printmodeline(const struct drm_display_mode *mode) |
f453ba04 | 52 | { |
f940f37f | 53 | DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " |
8a4c47f3 | 54 | "0x%x 0x%x\n", |
f0531859 | 55 | mode->base.id, mode->name, mode->vrefresh, mode->clock, |
56 | mode->hdisplay, mode->hsync_start, | |
57 | mode->hsync_end, mode->htotal, | |
58 | mode->vdisplay, mode->vsync_start, | |
59 | mode->vsync_end, mode->vtotal, mode->type, mode->flags); | |
f453ba04 DA |
60 | } |
61 | EXPORT_SYMBOL(drm_mode_debug_printmodeline); | |
62 | ||
d782c3f9 ZY |
63 | /** |
64 | * drm_cvt_mode -create a modeline based on CVT algorithm | |
65 | * @dev: DRM device | |
66 | * @hdisplay: hdisplay size | |
67 | * @vdisplay: vdisplay size | |
68 | * @vrefresh : vrefresh rate | |
69 | * @reduced : Whether the GTF calculation is simplified | |
70 | * @interlaced:Whether the interlace is supported | |
71 | * | |
72 | * LOCKING: | |
73 | * none. | |
74 | * | |
75 | * return the modeline based on CVT algorithm | |
76 | * | |
77 | * This function is called to generate the modeline based on CVT algorithm | |
78 | * according to the hdisplay, vdisplay, vrefresh. | |
79 | * It is based from the VESA(TM) Coordinated Video Timing Generator by | |
80 | * Graham Loveridge April 9, 2003 available at | |
631dd1a8 | 81 | * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls |
d782c3f9 ZY |
82 | * |
83 | * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. | |
84 | * What I have done is to translate it by using integer calculation. | |
85 | */ | |
86 | #define HV_FACTOR 1000 | |
87 | struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, | |
88 | int vdisplay, int vrefresh, | |
d50ba256 | 89 | bool reduced, bool interlaced, bool margins) |
d782c3f9 ZY |
90 | { |
91 | /* 1) top/bottom margin size (% of height) - default: 1.8, */ | |
92 | #define CVT_MARGIN_PERCENTAGE 18 | |
93 | /* 2) character cell horizontal granularity (pixels) - default 8 */ | |
94 | #define CVT_H_GRANULARITY 8 | |
95 | /* 3) Minimum vertical porch (lines) - default 3 */ | |
96 | #define CVT_MIN_V_PORCH 3 | |
97 | /* 4) Minimum number of vertical back porch lines - default 6 */ | |
98 | #define CVT_MIN_V_BPORCH 6 | |
99 | /* Pixel Clock step (kHz) */ | |
100 | #define CVT_CLOCK_STEP 250 | |
101 | struct drm_display_mode *drm_mode; | |
d782c3f9 ZY |
102 | unsigned int vfieldrate, hperiod; |
103 | int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; | |
104 | int interlace; | |
105 | ||
106 | /* allocate the drm_display_mode structure. If failure, we will | |
107 | * return directly | |
108 | */ | |
109 | drm_mode = drm_mode_create(dev); | |
110 | if (!drm_mode) | |
111 | return NULL; | |
112 | ||
113 | /* the CVT default refresh rate is 60Hz */ | |
114 | if (!vrefresh) | |
115 | vrefresh = 60; | |
116 | ||
117 | /* the required field fresh rate */ | |
118 | if (interlaced) | |
119 | vfieldrate = vrefresh * 2; | |
120 | else | |
121 | vfieldrate = vrefresh; | |
122 | ||
123 | /* horizontal pixels */ | |
124 | hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); | |
125 | ||
126 | /* determine the left&right borders */ | |
127 | hmargin = 0; | |
128 | if (margins) { | |
129 | hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; | |
130 | hmargin -= hmargin % CVT_H_GRANULARITY; | |
131 | } | |
132 | /* find the total active pixels */ | |
133 | drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; | |
134 | ||
135 | /* find the number of lines per field */ | |
136 | if (interlaced) | |
137 | vdisplay_rnd = vdisplay / 2; | |
138 | else | |
139 | vdisplay_rnd = vdisplay; | |
140 | ||
141 | /* find the top & bottom borders */ | |
142 | vmargin = 0; | |
143 | if (margins) | |
144 | vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; | |
145 | ||
841b4117 | 146 | drm_mode->vdisplay = vdisplay + 2 * vmargin; |
d782c3f9 ZY |
147 | |
148 | /* Interlaced */ | |
149 | if (interlaced) | |
150 | interlace = 1; | |
151 | else | |
152 | interlace = 0; | |
153 | ||
154 | /* Determine VSync Width from aspect ratio */ | |
155 | if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) | |
156 | vsync = 4; | |
157 | else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) | |
158 | vsync = 5; | |
159 | else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) | |
160 | vsync = 6; | |
161 | else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) | |
162 | vsync = 7; | |
163 | else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) | |
164 | vsync = 7; | |
165 | else /* custom */ | |
166 | vsync = 10; | |
167 | ||
168 | if (!reduced) { | |
169 | /* simplify the GTF calculation */ | |
170 | /* 4) Minimum time of vertical sync + back porch interval (µs) | |
171 | * default 550.0 | |
172 | */ | |
173 | int tmp1, tmp2; | |
174 | #define CVT_MIN_VSYNC_BP 550 | |
175 | /* 3) Nominal HSync width (% of line period) - default 8 */ | |
176 | #define CVT_HSYNC_PERCENTAGE 8 | |
177 | unsigned int hblank_percentage; | |
178 | int vsyncandback_porch, vback_porch, hblank; | |
179 | ||
180 | /* estimated the horizontal period */ | |
181 | tmp1 = HV_FACTOR * 1000000 - | |
182 | CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; | |
183 | tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + | |
184 | interlace; | |
185 | hperiod = tmp1 * 2 / (tmp2 * vfieldrate); | |
186 | ||
187 | tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; | |
188 | /* 9. Find number of lines in sync + backporch */ | |
189 | if (tmp1 < (vsync + CVT_MIN_V_PORCH)) | |
190 | vsyncandback_porch = vsync + CVT_MIN_V_PORCH; | |
191 | else | |
192 | vsyncandback_porch = tmp1; | |
193 | /* 10. Find number of lines in back porch */ | |
194 | vback_porch = vsyncandback_porch - vsync; | |
195 | drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + | |
196 | vsyncandback_porch + CVT_MIN_V_PORCH; | |
197 | /* 5) Definition of Horizontal blanking time limitation */ | |
198 | /* Gradient (%/kHz) - default 600 */ | |
199 | #define CVT_M_FACTOR 600 | |
200 | /* Offset (%) - default 40 */ | |
201 | #define CVT_C_FACTOR 40 | |
202 | /* Blanking time scaling factor - default 128 */ | |
203 | #define CVT_K_FACTOR 128 | |
204 | /* Scaling factor weighting - default 20 */ | |
205 | #define CVT_J_FACTOR 20 | |
206 | #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) | |
207 | #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ | |
208 | CVT_J_FACTOR) | |
209 | /* 12. Find ideal blanking duty cycle from formula */ | |
210 | hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * | |
211 | hperiod / 1000; | |
212 | /* 13. Blanking time */ | |
213 | if (hblank_percentage < 20 * HV_FACTOR) | |
214 | hblank_percentage = 20 * HV_FACTOR; | |
215 | hblank = drm_mode->hdisplay * hblank_percentage / | |
216 | (100 * HV_FACTOR - hblank_percentage); | |
217 | hblank -= hblank % (2 * CVT_H_GRANULARITY); | |
218 | /* 14. find the total pixes per line */ | |
219 | drm_mode->htotal = drm_mode->hdisplay + hblank; | |
220 | drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; | |
221 | drm_mode->hsync_start = drm_mode->hsync_end - | |
222 | (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; | |
223 | drm_mode->hsync_start += CVT_H_GRANULARITY - | |
224 | drm_mode->hsync_start % CVT_H_GRANULARITY; | |
225 | /* fill the Vsync values */ | |
226 | drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; | |
227 | drm_mode->vsync_end = drm_mode->vsync_start + vsync; | |
228 | } else { | |
229 | /* Reduced blanking */ | |
230 | /* Minimum vertical blanking interval time (µs)- default 460 */ | |
231 | #define CVT_RB_MIN_VBLANK 460 | |
232 | /* Fixed number of clocks for horizontal sync */ | |
233 | #define CVT_RB_H_SYNC 32 | |
234 | /* Fixed number of clocks for horizontal blanking */ | |
235 | #define CVT_RB_H_BLANK 160 | |
236 | /* Fixed number of lines for vertical front porch - default 3*/ | |
237 | #define CVT_RB_VFPORCH 3 | |
238 | int vbilines; | |
239 | int tmp1, tmp2; | |
240 | /* 8. Estimate Horizontal period. */ | |
241 | tmp1 = HV_FACTOR * 1000000 - | |
242 | CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; | |
243 | tmp2 = vdisplay_rnd + 2 * vmargin; | |
244 | hperiod = tmp1 / (tmp2 * vfieldrate); | |
245 | /* 9. Find number of lines in vertical blanking */ | |
246 | vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; | |
247 | /* 10. Check if vertical blanking is sufficient */ | |
248 | if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) | |
249 | vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; | |
250 | /* 11. Find total number of lines in vertical field */ | |
251 | drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; | |
252 | /* 12. Find total number of pixels in a line */ | |
253 | drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; | |
254 | /* Fill in HSync values */ | |
255 | drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; | |
adde0f23 AJ |
256 | drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; |
257 | /* Fill in VSync values */ | |
258 | drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; | |
259 | drm_mode->vsync_end = drm_mode->vsync_start + vsync; | |
d782c3f9 ZY |
260 | } |
261 | /* 15/13. Find pixel clock frequency (kHz for xf86) */ | |
262 | drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; | |
263 | drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; | |
264 | /* 18/16. Find actual vertical frame frequency */ | |
265 | /* ignore - just set the mode flag for interlaced */ | |
171fdd89 | 266 | if (interlaced) { |
d782c3f9 | 267 | drm_mode->vtotal *= 2; |
171fdd89 AJ |
268 | drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; |
269 | } | |
d782c3f9 ZY |
270 | /* Fill the mode line name */ |
271 | drm_mode_set_name(drm_mode); | |
272 | if (reduced) | |
273 | drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | | |
274 | DRM_MODE_FLAG_NVSYNC); | |
275 | else | |
276 | drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | | |
277 | DRM_MODE_FLAG_NHSYNC); | |
d782c3f9 | 278 | |
171fdd89 | 279 | return drm_mode; |
d782c3f9 ZY |
280 | } |
281 | EXPORT_SYMBOL(drm_cvt_mode); | |
282 | ||
26bbdada | 283 | /** |
7a374350 | 284 | * drm_gtf_mode_complex - create the modeline based on full GTF algorithm |
26bbdada ZY |
285 | * |
286 | * @dev :drm device | |
287 | * @hdisplay :hdisplay size | |
288 | * @vdisplay :vdisplay size | |
289 | * @vrefresh :vrefresh rate. | |
290 | * @interlaced :whether the interlace is supported | |
7a374350 AJ |
291 | * @margins :desired margin size |
292 | * @GTF_[MCKJ] :extended GTF formula parameters | |
26bbdada ZY |
293 | * |
294 | * LOCKING. | |
295 | * none. | |
296 | * | |
7a374350 | 297 | * return the modeline based on full GTF algorithm. |
26bbdada | 298 | * |
7a374350 AJ |
299 | * GTF feature blocks specify C and J in multiples of 0.5, so we pass them |
300 | * in here multiplied by two. For a C of 40, pass in 80. | |
26bbdada | 301 | */ |
7a374350 AJ |
302 | struct drm_display_mode * |
303 | drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, | |
304 | int vrefresh, bool interlaced, int margins, | |
305 | int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) | |
306 | { /* 1) top/bottom margin size (% of height) - default: 1.8, */ | |
26bbdada ZY |
307 | #define GTF_MARGIN_PERCENTAGE 18 |
308 | /* 2) character cell horizontal granularity (pixels) - default 8 */ | |
309 | #define GTF_CELL_GRAN 8 | |
310 | /* 3) Minimum vertical porch (lines) - default 3 */ | |
311 | #define GTF_MIN_V_PORCH 1 | |
312 | /* width of vsync in lines */ | |
313 | #define V_SYNC_RQD 3 | |
314 | /* width of hsync as % of total line */ | |
315 | #define H_SYNC_PERCENT 8 | |
316 | /* min time of vsync + back porch (microsec) */ | |
317 | #define MIN_VSYNC_PLUS_BP 550 | |
26bbdada | 318 | /* C' and M' are part of the Blanking Duty Cycle computation */ |
7a374350 AJ |
319 | #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) |
320 | #define GTF_M_PRIME (GTF_K * GTF_M / 256) | |
26bbdada ZY |
321 | struct drm_display_mode *drm_mode; |
322 | unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; | |
323 | int top_margin, bottom_margin; | |
324 | int interlace; | |
325 | unsigned int hfreq_est; | |
326 | int vsync_plus_bp, vback_porch; | |
327 | unsigned int vtotal_lines, vfieldrate_est, hperiod; | |
328 | unsigned int vfield_rate, vframe_rate; | |
329 | int left_margin, right_margin; | |
330 | unsigned int total_active_pixels, ideal_duty_cycle; | |
331 | unsigned int hblank, total_pixels, pixel_freq; | |
332 | int hsync, hfront_porch, vodd_front_porch_lines; | |
333 | unsigned int tmp1, tmp2; | |
334 | ||
335 | drm_mode = drm_mode_create(dev); | |
336 | if (!drm_mode) | |
337 | return NULL; | |
338 | ||
339 | /* 1. In order to give correct results, the number of horizontal | |
340 | * pixels requested is first processed to ensure that it is divisible | |
341 | * by the character size, by rounding it to the nearest character | |
342 | * cell boundary: | |
343 | */ | |
344 | hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; | |
345 | hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; | |
346 | ||
347 | /* 2. If interlace is requested, the number of vertical lines assumed | |
348 | * by the calculation must be halved, as the computation calculates | |
349 | * the number of vertical lines per field. | |
350 | */ | |
351 | if (interlaced) | |
352 | vdisplay_rnd = vdisplay / 2; | |
353 | else | |
354 | vdisplay_rnd = vdisplay; | |
355 | ||
356 | /* 3. Find the frame rate required: */ | |
357 | if (interlaced) | |
358 | vfieldrate_rqd = vrefresh * 2; | |
359 | else | |
360 | vfieldrate_rqd = vrefresh; | |
361 | ||
362 | /* 4. Find number of lines in Top margin: */ | |
363 | top_margin = 0; | |
364 | if (margins) | |
365 | top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / | |
366 | 1000; | |
367 | /* 5. Find number of lines in bottom margin: */ | |
368 | bottom_margin = top_margin; | |
369 | ||
370 | /* 6. If interlace is required, then set variable interlace: */ | |
371 | if (interlaced) | |
372 | interlace = 1; | |
373 | else | |
374 | interlace = 0; | |
375 | ||
376 | /* 7. Estimate the Horizontal frequency */ | |
377 | { | |
378 | tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; | |
379 | tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * | |
380 | 2 + interlace; | |
381 | hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; | |
382 | } | |
383 | ||
384 | /* 8. Find the number of lines in V sync + back porch */ | |
385 | /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ | |
386 | vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; | |
387 | vsync_plus_bp = (vsync_plus_bp + 500) / 1000; | |
388 | /* 9. Find the number of lines in V back porch alone: */ | |
389 | vback_porch = vsync_plus_bp - V_SYNC_RQD; | |
390 | /* 10. Find the total number of lines in Vertical field period: */ | |
391 | vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + | |
392 | vsync_plus_bp + GTF_MIN_V_PORCH; | |
393 | /* 11. Estimate the Vertical field frequency: */ | |
394 | vfieldrate_est = hfreq_est / vtotal_lines; | |
395 | /* 12. Find the actual horizontal period: */ | |
396 | hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines); | |
397 | ||
398 | /* 13. Find the actual Vertical field frequency: */ | |
399 | vfield_rate = hfreq_est / vtotal_lines; | |
400 | /* 14. Find the Vertical frame frequency: */ | |
401 | if (interlaced) | |
402 | vframe_rate = vfield_rate / 2; | |
403 | else | |
404 | vframe_rate = vfield_rate; | |
405 | /* 15. Find number of pixels in left margin: */ | |
406 | if (margins) | |
407 | left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / | |
408 | 1000; | |
409 | else | |
410 | left_margin = 0; | |
411 | ||
412 | /* 16.Find number of pixels in right margin: */ | |
413 | right_margin = left_margin; | |
414 | /* 17.Find total number of active pixels in image and left and right */ | |
415 | total_active_pixels = hdisplay_rnd + left_margin + right_margin; | |
416 | /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ | |
417 | ideal_duty_cycle = GTF_C_PRIME * 1000 - | |
418 | (GTF_M_PRIME * 1000000 / hfreq_est); | |
419 | /* 19.Find the number of pixels in the blanking time to the nearest | |
420 | * double character cell: */ | |
421 | hblank = total_active_pixels * ideal_duty_cycle / | |
422 | (100000 - ideal_duty_cycle); | |
423 | hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); | |
424 | hblank = hblank * 2 * GTF_CELL_GRAN; | |
425 | /* 20.Find total number of pixels: */ | |
426 | total_pixels = total_active_pixels + hblank; | |
427 | /* 21.Find pixel clock frequency: */ | |
428 | pixel_freq = total_pixels * hfreq_est / 1000; | |
429 | /* Stage 1 computations are now complete; I should really pass | |
430 | * the results to another function and do the Stage 2 computations, | |
431 | * but I only need a few more values so I'll just append the | |
432 | * computations here for now */ | |
433 | /* 17. Find the number of pixels in the horizontal sync period: */ | |
434 | hsync = H_SYNC_PERCENT * total_pixels / 100; | |
435 | hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; | |
436 | hsync = hsync * GTF_CELL_GRAN; | |
437 | /* 18. Find the number of pixels in horizontal front porch period */ | |
438 | hfront_porch = hblank / 2 - hsync; | |
439 | /* 36. Find the number of lines in the odd front porch period: */ | |
440 | vodd_front_porch_lines = GTF_MIN_V_PORCH ; | |
441 | ||
442 | /* finally, pack the results in the mode struct */ | |
443 | drm_mode->hdisplay = hdisplay_rnd; | |
444 | drm_mode->hsync_start = hdisplay_rnd + hfront_porch; | |
445 | drm_mode->hsync_end = drm_mode->hsync_start + hsync; | |
446 | drm_mode->htotal = total_pixels; | |
447 | drm_mode->vdisplay = vdisplay_rnd; | |
448 | drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; | |
449 | drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; | |
450 | drm_mode->vtotal = vtotal_lines; | |
451 | ||
452 | drm_mode->clock = pixel_freq; | |
453 | ||
26bbdada ZY |
454 | if (interlaced) { |
455 | drm_mode->vtotal *= 2; | |
456 | drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; | |
457 | } | |
458 | ||
171fdd89 | 459 | drm_mode_set_name(drm_mode); |
c385e50c AJ |
460 | if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) |
461 | drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; | |
462 | else | |
463 | drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; | |
171fdd89 | 464 | |
26bbdada ZY |
465 | return drm_mode; |
466 | } | |
7a374350 AJ |
467 | EXPORT_SYMBOL(drm_gtf_mode_complex); |
468 | ||
469 | /** | |
470 | * drm_gtf_mode - create the modeline based on GTF algorithm | |
471 | * | |
472 | * @dev :drm device | |
473 | * @hdisplay :hdisplay size | |
474 | * @vdisplay :vdisplay size | |
475 | * @vrefresh :vrefresh rate. | |
476 | * @interlaced :whether the interlace is supported | |
477 | * @margins :whether the margin is supported | |
478 | * | |
479 | * LOCKING. | |
480 | * none. | |
481 | * | |
482 | * return the modeline based on GTF algorithm | |
483 | * | |
484 | * This function is to create the modeline based on the GTF algorithm. | |
485 | * Generalized Timing Formula is derived from: | |
486 | * GTF Spreadsheet by Andy Morrish (1/5/97) | |
487 | * available at http://www.vesa.org | |
488 | * | |
489 | * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. | |
490 | * What I have done is to translate it by using integer calculation. | |
491 | * I also refer to the function of fb_get_mode in the file of | |
492 | * drivers/video/fbmon.c | |
493 | * | |
494 | * Standard GTF parameters: | |
495 | * M = 600 | |
496 | * C = 40 | |
497 | * K = 128 | |
498 | * J = 20 | |
499 | */ | |
500 | struct drm_display_mode * | |
501 | drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, | |
502 | bool lace, int margins) | |
503 | { | |
504 | return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace, | |
505 | margins, 600, 40 * 2, 128, 20 * 2); | |
506 | } | |
26bbdada | 507 | EXPORT_SYMBOL(drm_gtf_mode); |
7a374350 | 508 | |
a38884f6 | 509 | #ifdef CONFIG_VIDEOMODE_HELPERS |
ebc64e45 ST |
510 | int drm_display_mode_from_videomode(const struct videomode *vm, |
511 | struct drm_display_mode *dmode) | |
512 | { | |
513 | dmode->hdisplay = vm->hactive; | |
514 | dmode->hsync_start = dmode->hdisplay + vm->hfront_porch; | |
515 | dmode->hsync_end = dmode->hsync_start + vm->hsync_len; | |
516 | dmode->htotal = dmode->hsync_end + vm->hback_porch; | |
517 | ||
518 | dmode->vdisplay = vm->vactive; | |
519 | dmode->vsync_start = dmode->vdisplay + vm->vfront_porch; | |
520 | dmode->vsync_end = dmode->vsync_start + vm->vsync_len; | |
521 | dmode->vtotal = dmode->vsync_end + vm->vback_porch; | |
522 | ||
523 | dmode->clock = vm->pixelclock / 1000; | |
524 | ||
525 | dmode->flags = 0; | |
06a33079 | 526 | if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH) |
ebc64e45 | 527 | dmode->flags |= DRM_MODE_FLAG_PHSYNC; |
06a33079 | 528 | else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW) |
ebc64e45 | 529 | dmode->flags |= DRM_MODE_FLAG_NHSYNC; |
06a33079 | 530 | if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH) |
ebc64e45 | 531 | dmode->flags |= DRM_MODE_FLAG_PVSYNC; |
06a33079 | 532 | else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW) |
ebc64e45 | 533 | dmode->flags |= DRM_MODE_FLAG_NVSYNC; |
06a33079 | 534 | if (vm->flags & DISPLAY_FLAGS_INTERLACED) |
ebc64e45 | 535 | dmode->flags |= DRM_MODE_FLAG_INTERLACE; |
06a33079 | 536 | if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN) |
ebc64e45 | 537 | dmode->flags |= DRM_MODE_FLAG_DBLSCAN; |
328a4719 ST |
538 | if (vm->flags & DISPLAY_FLAGS_DOUBLECLK) |
539 | dmode->flags |= DRM_MODE_FLAG_DBLCLK; | |
ebc64e45 ST |
540 | drm_mode_set_name(dmode); |
541 | ||
542 | return 0; | |
543 | } | |
544 | EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode); | |
ebc64e45 | 545 | |
a38884f6 | 546 | #ifdef CONFIG_OF |
edb37a95 ST |
547 | /** |
548 | * of_get_drm_display_mode - get a drm_display_mode from devicetree | |
549 | * @np: device_node with the timing specification | |
550 | * @dmode: will be set to the return value | |
551 | * @index: index into the list of display timings in devicetree | |
552 | * | |
553 | * This function is expensive and should only be used, if only one mode is to be | |
554 | * read from DT. To get multiple modes start with of_get_display_timings and | |
555 | * work with that instead. | |
556 | */ | |
557 | int of_get_drm_display_mode(struct device_node *np, | |
558 | struct drm_display_mode *dmode, int index) | |
559 | { | |
560 | struct videomode vm; | |
561 | int ret; | |
562 | ||
563 | ret = of_get_videomode(np, &vm, index); | |
564 | if (ret) | |
565 | return ret; | |
566 | ||
567 | drm_display_mode_from_videomode(&vm, dmode); | |
568 | ||
569 | pr_debug("%s: got %dx%d display mode from %s\n", | |
570 | of_node_full_name(np), vm.hactive, vm.vactive, np->name); | |
571 | drm_mode_debug_printmodeline(dmode); | |
572 | ||
573 | return 0; | |
574 | } | |
575 | EXPORT_SYMBOL_GPL(of_get_drm_display_mode); | |
a38884f6 TV |
576 | #endif /* CONFIG_OF */ |
577 | #endif /* CONFIG_VIDEOMODE_HELPERS */ | |
edb37a95 | 578 | |
f453ba04 DA |
579 | /** |
580 | * drm_mode_set_name - set the name on a mode | |
581 | * @mode: name will be set in this mode | |
582 | * | |
583 | * LOCKING: | |
584 | * None. | |
585 | * | |
586 | * Set the name of @mode to a standard format. | |
587 | */ | |
588 | void drm_mode_set_name(struct drm_display_mode *mode) | |
589 | { | |
171fdd89 AJ |
590 | bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); |
591 | ||
592 | snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", | |
593 | mode->hdisplay, mode->vdisplay, | |
594 | interlaced ? "i" : ""); | |
f453ba04 DA |
595 | } |
596 | EXPORT_SYMBOL(drm_mode_set_name); | |
597 | ||
598 | /** | |
599 | * drm_mode_list_concat - move modes from one list to another | |
600 | * @head: source list | |
601 | * @new: dst list | |
602 | * | |
603 | * LOCKING: | |
604 | * Caller must ensure both lists are locked. | |
605 | * | |
606 | * Move all the modes from @head to @new. | |
607 | */ | |
608 | void drm_mode_list_concat(struct list_head *head, struct list_head *new) | |
609 | { | |
610 | ||
611 | struct list_head *entry, *tmp; | |
612 | ||
613 | list_for_each_safe(entry, tmp, head) { | |
614 | list_move_tail(entry, new); | |
615 | } | |
616 | } | |
617 | EXPORT_SYMBOL(drm_mode_list_concat); | |
618 | ||
619 | /** | |
620 | * drm_mode_width - get the width of a mode | |
621 | * @mode: mode | |
622 | * | |
623 | * LOCKING: | |
624 | * None. | |
625 | * | |
626 | * Return @mode's width (hdisplay) value. | |
627 | * | |
628 | * FIXME: is this needed? | |
629 | * | |
630 | * RETURNS: | |
631 | * @mode->hdisplay | |
632 | */ | |
0b3904ab | 633 | int drm_mode_width(const struct drm_display_mode *mode) |
f453ba04 DA |
634 | { |
635 | return mode->hdisplay; | |
636 | ||
637 | } | |
638 | EXPORT_SYMBOL(drm_mode_width); | |
639 | ||
640 | /** | |
641 | * drm_mode_height - get the height of a mode | |
642 | * @mode: mode | |
643 | * | |
644 | * LOCKING: | |
645 | * None. | |
646 | * | |
647 | * Return @mode's height (vdisplay) value. | |
648 | * | |
649 | * FIXME: is this needed? | |
650 | * | |
651 | * RETURNS: | |
652 | * @mode->vdisplay | |
653 | */ | |
0b3904ab | 654 | int drm_mode_height(const struct drm_display_mode *mode) |
f453ba04 DA |
655 | { |
656 | return mode->vdisplay; | |
657 | } | |
658 | EXPORT_SYMBOL(drm_mode_height); | |
659 | ||
7ac96a9c AJ |
660 | /** drm_mode_hsync - get the hsync of a mode |
661 | * @mode: mode | |
662 | * | |
663 | * LOCKING: | |
664 | * None. | |
665 | * | |
666 | * Return @modes's hsync rate in kHz, rounded to the nearest int. | |
667 | */ | |
b1f559ec | 668 | int drm_mode_hsync(const struct drm_display_mode *mode) |
7ac96a9c AJ |
669 | { |
670 | unsigned int calc_val; | |
671 | ||
672 | if (mode->hsync) | |
673 | return mode->hsync; | |
674 | ||
675 | if (mode->htotal < 0) | |
676 | return 0; | |
677 | ||
678 | calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ | |
679 | calc_val += 500; /* round to 1000Hz */ | |
680 | calc_val /= 1000; /* truncate to kHz */ | |
681 | ||
682 | return calc_val; | |
683 | } | |
684 | EXPORT_SYMBOL(drm_mode_hsync); | |
685 | ||
f453ba04 DA |
686 | /** |
687 | * drm_mode_vrefresh - get the vrefresh of a mode | |
688 | * @mode: mode | |
689 | * | |
690 | * LOCKING: | |
691 | * None. | |
692 | * | |
7ac96a9c | 693 | * Return @mode's vrefresh rate in Hz or calculate it if necessary. |
f453ba04 DA |
694 | * |
695 | * FIXME: why is this needed? shouldn't vrefresh be set already? | |
696 | * | |
697 | * RETURNS: | |
559ee21d ZY |
698 | * Vertical refresh rate. It will be the result of actual value plus 0.5. |
699 | * If it is 70.288, it will return 70Hz. | |
700 | * If it is 59.6, it will return 60Hz. | |
f453ba04 | 701 | */ |
b1f559ec | 702 | int drm_mode_vrefresh(const struct drm_display_mode *mode) |
f453ba04 DA |
703 | { |
704 | int refresh = 0; | |
705 | unsigned int calc_val; | |
706 | ||
707 | if (mode->vrefresh > 0) | |
708 | refresh = mode->vrefresh; | |
709 | else if (mode->htotal > 0 && mode->vtotal > 0) { | |
559ee21d ZY |
710 | int vtotal; |
711 | vtotal = mode->vtotal; | |
f453ba04 DA |
712 | /* work out vrefresh the value will be x1000 */ |
713 | calc_val = (mode->clock * 1000); | |
f453ba04 | 714 | calc_val /= mode->htotal; |
559ee21d | 715 | refresh = (calc_val + vtotal / 2) / vtotal; |
f453ba04 | 716 | |
f453ba04 DA |
717 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
718 | refresh *= 2; | |
719 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | |
720 | refresh /= 2; | |
721 | if (mode->vscan > 1) | |
722 | refresh /= mode->vscan; | |
723 | } | |
724 | return refresh; | |
725 | } | |
726 | EXPORT_SYMBOL(drm_mode_vrefresh); | |
727 | ||
728 | /** | |
729 | * drm_mode_set_crtcinfo - set CRTC modesetting parameters | |
730 | * @p: mode | |
731 | * @adjust_flags: unused? (FIXME) | |
732 | * | |
733 | * LOCKING: | |
734 | * None. | |
735 | * | |
736 | * Setup the CRTC modesetting parameters for @p, adjusting if necessary. | |
737 | */ | |
738 | void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) | |
739 | { | |
740 | if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) | |
741 | return; | |
742 | ||
743 | p->crtc_hdisplay = p->hdisplay; | |
744 | p->crtc_hsync_start = p->hsync_start; | |
745 | p->crtc_hsync_end = p->hsync_end; | |
746 | p->crtc_htotal = p->htotal; | |
747 | p->crtc_hskew = p->hskew; | |
748 | p->crtc_vdisplay = p->vdisplay; | |
749 | p->crtc_vsync_start = p->vsync_start; | |
750 | p->crtc_vsync_end = p->vsync_end; | |
751 | p->crtc_vtotal = p->vtotal; | |
752 | ||
753 | if (p->flags & DRM_MODE_FLAG_INTERLACE) { | |
754 | if (adjust_flags & CRTC_INTERLACE_HALVE_V) { | |
755 | p->crtc_vdisplay /= 2; | |
756 | p->crtc_vsync_start /= 2; | |
757 | p->crtc_vsync_end /= 2; | |
758 | p->crtc_vtotal /= 2; | |
759 | } | |
f453ba04 DA |
760 | } |
761 | ||
762 | if (p->flags & DRM_MODE_FLAG_DBLSCAN) { | |
763 | p->crtc_vdisplay *= 2; | |
764 | p->crtc_vsync_start *= 2; | |
765 | p->crtc_vsync_end *= 2; | |
766 | p->crtc_vtotal *= 2; | |
767 | } | |
768 | ||
769 | if (p->vscan > 1) { | |
770 | p->crtc_vdisplay *= p->vscan; | |
771 | p->crtc_vsync_start *= p->vscan; | |
772 | p->crtc_vsync_end *= p->vscan; | |
773 | p->crtc_vtotal *= p->vscan; | |
774 | } | |
775 | ||
776 | p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); | |
777 | p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); | |
778 | p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); | |
779 | p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); | |
f453ba04 DA |
780 | } |
781 | EXPORT_SYMBOL(drm_mode_set_crtcinfo); | |
782 | ||
783 | ||
c3c50e8b VS |
784 | /** |
785 | * drm_mode_copy - copy the mode | |
786 | * @dst: mode to overwrite | |
787 | * @src: mode to copy | |
788 | * | |
789 | * LOCKING: | |
790 | * None. | |
791 | * | |
72e45e92 VS |
792 | * Copy an existing mode into another mode, preserving the object id and |
793 | * list head of the destination mode. | |
c3c50e8b VS |
794 | */ |
795 | void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src) | |
796 | { | |
797 | int id = dst->base.id; | |
72e45e92 | 798 | struct list_head head = dst->head; |
c3c50e8b VS |
799 | |
800 | *dst = *src; | |
801 | dst->base.id = id; | |
72e45e92 | 802 | dst->head = head; |
c3c50e8b VS |
803 | } |
804 | EXPORT_SYMBOL(drm_mode_copy); | |
805 | ||
f453ba04 DA |
806 | /** |
807 | * drm_mode_duplicate - allocate and duplicate an existing mode | |
808 | * @m: mode to duplicate | |
809 | * | |
810 | * LOCKING: | |
811 | * None. | |
812 | * | |
813 | * Just allocate a new mode, copy the existing mode into it, and return | |
814 | * a pointer to it. Used to create new instances of established modes. | |
815 | */ | |
816 | struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, | |
b1f559ec | 817 | const struct drm_display_mode *mode) |
f453ba04 DA |
818 | { |
819 | struct drm_display_mode *nmode; | |
f453ba04 DA |
820 | |
821 | nmode = drm_mode_create(dev); | |
822 | if (!nmode) | |
823 | return NULL; | |
824 | ||
c3c50e8b VS |
825 | drm_mode_copy(nmode, mode); |
826 | ||
f453ba04 DA |
827 | return nmode; |
828 | } | |
829 | EXPORT_SYMBOL(drm_mode_duplicate); | |
830 | ||
831 | /** | |
832 | * drm_mode_equal - test modes for equality | |
833 | * @mode1: first mode | |
834 | * @mode2: second mode | |
835 | * | |
836 | * LOCKING: | |
837 | * None. | |
838 | * | |
839 | * Check to see if @mode1 and @mode2 are equivalent. | |
840 | * | |
841 | * RETURNS: | |
842 | * True if the modes are equal, false otherwise. | |
843 | */ | |
0b3904ab | 844 | bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) |
f453ba04 DA |
845 | { |
846 | /* do clock check convert to PICOS so fb modes get matched | |
847 | * the same */ | |
848 | if (mode1->clock && mode2->clock) { | |
849 | if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) | |
850 | return false; | |
851 | } else if (mode1->clock != mode2->clock) | |
852 | return false; | |
853 | ||
8cc3f23c VS |
854 | return drm_mode_equal_no_clocks(mode1, mode2); |
855 | } | |
856 | EXPORT_SYMBOL(drm_mode_equal); | |
857 | ||
858 | /** | |
859 | * drm_mode_equal_no_clocks - test modes for equality | |
860 | * @mode1: first mode | |
861 | * @mode2: second mode | |
862 | * | |
863 | * LOCKING: | |
864 | * None. | |
865 | * | |
866 | * Check to see if @mode1 and @mode2 are equivalent, but | |
867 | * don't check the pixel clocks. | |
868 | * | |
869 | * RETURNS: | |
870 | * True if the modes are equal, false otherwise. | |
871 | */ | |
872 | bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) | |
873 | { | |
f453ba04 DA |
874 | if (mode1->hdisplay == mode2->hdisplay && |
875 | mode1->hsync_start == mode2->hsync_start && | |
876 | mode1->hsync_end == mode2->hsync_end && | |
877 | mode1->htotal == mode2->htotal && | |
878 | mode1->hskew == mode2->hskew && | |
879 | mode1->vdisplay == mode2->vdisplay && | |
880 | mode1->vsync_start == mode2->vsync_start && | |
881 | mode1->vsync_end == mode2->vsync_end && | |
882 | mode1->vtotal == mode2->vtotal && | |
883 | mode1->vscan == mode2->vscan && | |
884 | mode1->flags == mode2->flags) | |
885 | return true; | |
886 | ||
887 | return false; | |
888 | } | |
8cc3f23c | 889 | EXPORT_SYMBOL(drm_mode_equal_no_clocks); |
f453ba04 DA |
890 | |
891 | /** | |
892 | * drm_mode_validate_size - make sure modes adhere to size constraints | |
893 | * @dev: DRM device | |
894 | * @mode_list: list of modes to check | |
895 | * @maxX: maximum width | |
896 | * @maxY: maximum height | |
897 | * @maxPitch: max pitch | |
898 | * | |
899 | * LOCKING: | |
900 | * Caller must hold a lock protecting @mode_list. | |
901 | * | |
902 | * The DRM device (@dev) has size and pitch limits. Here we validate the | |
903 | * modes we probed for @dev against those limits and set their status as | |
904 | * necessary. | |
905 | */ | |
906 | void drm_mode_validate_size(struct drm_device *dev, | |
907 | struct list_head *mode_list, | |
908 | int maxX, int maxY, int maxPitch) | |
909 | { | |
910 | struct drm_display_mode *mode; | |
911 | ||
912 | list_for_each_entry(mode, mode_list, head) { | |
913 | if (maxPitch > 0 && mode->hdisplay > maxPitch) | |
914 | mode->status = MODE_BAD_WIDTH; | |
915 | ||
916 | if (maxX > 0 && mode->hdisplay > maxX) | |
917 | mode->status = MODE_VIRTUAL_X; | |
918 | ||
919 | if (maxY > 0 && mode->vdisplay > maxY) | |
920 | mode->status = MODE_VIRTUAL_Y; | |
921 | } | |
922 | } | |
923 | EXPORT_SYMBOL(drm_mode_validate_size); | |
924 | ||
925 | /** | |
926 | * drm_mode_validate_clocks - validate modes against clock limits | |
927 | * @dev: DRM device | |
928 | * @mode_list: list of modes to check | |
929 | * @min: minimum clock rate array | |
930 | * @max: maximum clock rate array | |
931 | * @n_ranges: number of clock ranges (size of arrays) | |
932 | * | |
933 | * LOCKING: | |
934 | * Caller must hold a lock protecting @mode_list. | |
935 | * | |
936 | * Some code may need to check a mode list against the clock limits of the | |
937 | * device in question. This function walks the mode list, testing to make | |
938 | * sure each mode falls within a given range (defined by @min and @max | |
939 | * arrays) and sets @mode->status as needed. | |
940 | */ | |
941 | void drm_mode_validate_clocks(struct drm_device *dev, | |
942 | struct list_head *mode_list, | |
943 | int *min, int *max, int n_ranges) | |
944 | { | |
945 | struct drm_display_mode *mode; | |
946 | int i; | |
947 | ||
948 | list_for_each_entry(mode, mode_list, head) { | |
949 | bool good = false; | |
950 | for (i = 0; i < n_ranges; i++) { | |
951 | if (mode->clock >= min[i] && mode->clock <= max[i]) { | |
952 | good = true; | |
953 | break; | |
954 | } | |
955 | } | |
956 | if (!good) | |
957 | mode->status = MODE_CLOCK_RANGE; | |
958 | } | |
959 | } | |
960 | EXPORT_SYMBOL(drm_mode_validate_clocks); | |
961 | ||
962 | /** | |
963 | * drm_mode_prune_invalid - remove invalid modes from mode list | |
964 | * @dev: DRM device | |
965 | * @mode_list: list of modes to check | |
966 | * @verbose: be verbose about it | |
967 | * | |
968 | * LOCKING: | |
969 | * Caller must hold a lock protecting @mode_list. | |
970 | * | |
971 | * Once mode list generation is complete, a caller can use this routine to | |
972 | * remove invalid modes from a mode list. If any of the modes have a | |
973 | * status other than %MODE_OK, they are removed from @mode_list and freed. | |
974 | */ | |
975 | void drm_mode_prune_invalid(struct drm_device *dev, | |
976 | struct list_head *mode_list, bool verbose) | |
977 | { | |
978 | struct drm_display_mode *mode, *t; | |
979 | ||
980 | list_for_each_entry_safe(mode, t, mode_list, head) { | |
981 | if (mode->status != MODE_OK) { | |
982 | list_del(&mode->head); | |
983 | if (verbose) { | |
984 | drm_mode_debug_printmodeline(mode); | |
f940f37f | 985 | DRM_DEBUG_KMS("Not using %s mode %d\n", |
f0531859 | 986 | mode->name, mode->status); |
f453ba04 DA |
987 | } |
988 | drm_mode_destroy(dev, mode); | |
989 | } | |
990 | } | |
991 | } | |
992 | EXPORT_SYMBOL(drm_mode_prune_invalid); | |
993 | ||
994 | /** | |
995 | * drm_mode_compare - compare modes for favorability | |
2c761270 | 996 | * @priv: unused |
f453ba04 DA |
997 | * @lh_a: list_head for first mode |
998 | * @lh_b: list_head for second mode | |
999 | * | |
1000 | * LOCKING: | |
1001 | * None. | |
1002 | * | |
1003 | * Compare two modes, given by @lh_a and @lh_b, returning a value indicating | |
1004 | * which is better. | |
1005 | * | |
1006 | * RETURNS: | |
1007 | * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or | |
1008 | * positive if @lh_b is better than @lh_a. | |
1009 | */ | |
2c761270 | 1010 | static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b) |
f453ba04 DA |
1011 | { |
1012 | struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); | |
1013 | struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); | |
1014 | int diff; | |
1015 | ||
1016 | diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - | |
1017 | ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); | |
1018 | if (diff) | |
1019 | return diff; | |
1020 | diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; | |
1021 | if (diff) | |
1022 | return diff; | |
9bc3cd56 VS |
1023 | |
1024 | diff = b->vrefresh - a->vrefresh; | |
1025 | if (diff) | |
1026 | return diff; | |
1027 | ||
f453ba04 DA |
1028 | diff = b->clock - a->clock; |
1029 | return diff; | |
1030 | } | |
1031 | ||
f453ba04 DA |
1032 | /** |
1033 | * drm_mode_sort - sort mode list | |
1034 | * @mode_list: list to sort | |
1035 | * | |
1036 | * LOCKING: | |
1037 | * Caller must hold a lock protecting @mode_list. | |
1038 | * | |
1039 | * Sort @mode_list by favorability, putting good modes first. | |
1040 | */ | |
1041 | void drm_mode_sort(struct list_head *mode_list) | |
1042 | { | |
2c761270 | 1043 | list_sort(NULL, mode_list, drm_mode_compare); |
f453ba04 DA |
1044 | } |
1045 | EXPORT_SYMBOL(drm_mode_sort); | |
1046 | ||
1047 | /** | |
1048 | * drm_mode_connector_list_update - update the mode list for the connector | |
1049 | * @connector: the connector to update | |
1050 | * | |
1051 | * LOCKING: | |
1052 | * Caller must hold a lock protecting @mode_list. | |
1053 | * | |
1054 | * This moves the modes from the @connector probed_modes list | |
1055 | * to the actual mode list. It compares the probed mode against the current | |
1056 | * list and only adds different modes. All modes unverified after this point | |
1057 | * will be removed by the prune invalid modes. | |
1058 | */ | |
1059 | void drm_mode_connector_list_update(struct drm_connector *connector) | |
1060 | { | |
1061 | struct drm_display_mode *mode; | |
1062 | struct drm_display_mode *pmode, *pt; | |
1063 | int found_it; | |
1064 | ||
1065 | list_for_each_entry_safe(pmode, pt, &connector->probed_modes, | |
1066 | head) { | |
1067 | found_it = 0; | |
1068 | /* go through current modes checking for the new probed mode */ | |
1069 | list_for_each_entry(mode, &connector->modes, head) { | |
1070 | if (drm_mode_equal(pmode, mode)) { | |
1071 | found_it = 1; | |
1072 | /* if equal delete the probed mode */ | |
1073 | mode->status = pmode->status; | |
38d5487d KP |
1074 | /* Merge type bits together */ |
1075 | mode->type |= pmode->type; | |
f453ba04 DA |
1076 | list_del(&pmode->head); |
1077 | drm_mode_destroy(connector->dev, pmode); | |
1078 | break; | |
1079 | } | |
1080 | } | |
1081 | ||
1082 | if (!found_it) { | |
1083 | list_move_tail(&pmode->head, &connector->modes); | |
1084 | } | |
1085 | } | |
1086 | } | |
1087 | EXPORT_SYMBOL(drm_mode_connector_list_update); | |
1794d257 CW |
1088 | |
1089 | /** | |
1090 | * drm_mode_parse_command_line_for_connector - parse command line for connector | |
1091 | * @mode_option - per connector mode option | |
1092 | * @connector - connector to parse line for | |
1093 | * | |
1094 | * This parses the connector specific then generic command lines for | |
1095 | * modes and options to configure the connector. | |
1096 | * | |
1097 | * This uses the same parameters as the fb modedb.c, except for extra | |
1098 | * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] | |
1099 | * | |
1100 | * enable/enable Digital/disable bit at the end | |
1101 | */ | |
1102 | bool drm_mode_parse_command_line_for_connector(const char *mode_option, | |
1103 | struct drm_connector *connector, | |
1104 | struct drm_cmdline_mode *mode) | |
1105 | { | |
1106 | const char *name; | |
1107 | unsigned int namelen; | |
04fee895 | 1108 | bool res_specified = false, bpp_specified = false, refresh_specified = false; |
1794d257 | 1109 | unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0; |
04fee895 REB |
1110 | bool yres_specified = false, cvt = false, rb = false; |
1111 | bool interlace = false, margins = false, was_digit = false; | |
1794d257 CW |
1112 | int i; |
1113 | enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; | |
1114 | ||
cb3c438e | 1115 | #ifdef CONFIG_FB |
1794d257 CW |
1116 | if (!mode_option) |
1117 | mode_option = fb_mode_option; | |
cb3c438e | 1118 | #endif |
1794d257 CW |
1119 | |
1120 | if (!mode_option) { | |
1121 | mode->specified = false; | |
1122 | return false; | |
1123 | } | |
1124 | ||
1125 | name = mode_option; | |
1126 | namelen = strlen(name); | |
1127 | for (i = namelen-1; i >= 0; i--) { | |
1128 | switch (name[i]) { | |
1129 | case '@': | |
1794d257 | 1130 | if (!refresh_specified && !bpp_specified && |
04fee895 | 1131 | !yres_specified && !cvt && !rb && was_digit) { |
1794d257 | 1132 | refresh = simple_strtol(&name[i+1], NULL, 10); |
04fee895 REB |
1133 | refresh_specified = true; |
1134 | was_digit = false; | |
1794d257 CW |
1135 | } else |
1136 | goto done; | |
1137 | break; | |
1138 | case '-': | |
04fee895 REB |
1139 | if (!bpp_specified && !yres_specified && !cvt && |
1140 | !rb && was_digit) { | |
1794d257 | 1141 | bpp = simple_strtol(&name[i+1], NULL, 10); |
04fee895 REB |
1142 | bpp_specified = true; |
1143 | was_digit = false; | |
1794d257 CW |
1144 | } else |
1145 | goto done; | |
1146 | break; | |
1147 | case 'x': | |
04fee895 | 1148 | if (!yres_specified && was_digit) { |
1794d257 | 1149 | yres = simple_strtol(&name[i+1], NULL, 10); |
04fee895 REB |
1150 | yres_specified = true; |
1151 | was_digit = false; | |
1794d257 CW |
1152 | } else |
1153 | goto done; | |
97fbfbf4 | 1154 | break; |
1794d257 | 1155 | case '0' ... '9': |
04fee895 | 1156 | was_digit = true; |
1794d257 CW |
1157 | break; |
1158 | case 'M': | |
04fee895 REB |
1159 | if (yres_specified || cvt || was_digit) |
1160 | goto done; | |
1161 | cvt = true; | |
1794d257 CW |
1162 | break; |
1163 | case 'R': | |
04fee895 REB |
1164 | if (yres_specified || cvt || rb || was_digit) |
1165 | goto done; | |
1166 | rb = true; | |
1794d257 CW |
1167 | break; |
1168 | case 'm': | |
04fee895 REB |
1169 | if (cvt || yres_specified || was_digit) |
1170 | goto done; | |
1171 | margins = true; | |
1794d257 CW |
1172 | break; |
1173 | case 'i': | |
04fee895 REB |
1174 | if (cvt || yres_specified || was_digit) |
1175 | goto done; | |
1176 | interlace = true; | |
1794d257 CW |
1177 | break; |
1178 | case 'e': | |
04fee895 REB |
1179 | if (yres_specified || bpp_specified || refresh_specified || |
1180 | was_digit || (force != DRM_FORCE_UNSPECIFIED)) | |
1181 | goto done; | |
1182 | ||
1794d257 CW |
1183 | force = DRM_FORCE_ON; |
1184 | break; | |
1185 | case 'D': | |
04fee895 REB |
1186 | if (yres_specified || bpp_specified || refresh_specified || |
1187 | was_digit || (force != DRM_FORCE_UNSPECIFIED)) | |
1188 | goto done; | |
1189 | ||
1794d257 CW |
1190 | if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) && |
1191 | (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) | |
1192 | force = DRM_FORCE_ON; | |
1193 | else | |
1194 | force = DRM_FORCE_ON_DIGITAL; | |
1195 | break; | |
1196 | case 'd': | |
04fee895 REB |
1197 | if (yres_specified || bpp_specified || refresh_specified || |
1198 | was_digit || (force != DRM_FORCE_UNSPECIFIED)) | |
1199 | goto done; | |
1200 | ||
1794d257 CW |
1201 | force = DRM_FORCE_OFF; |
1202 | break; | |
1203 | default: | |
1204 | goto done; | |
1205 | } | |
1206 | } | |
04fee895 | 1207 | |
1794d257 | 1208 | if (i < 0 && yres_specified) { |
04fee895 REB |
1209 | char *ch; |
1210 | xres = simple_strtol(name, &ch, 10); | |
1211 | if ((ch != NULL) && (*ch == 'x')) | |
1212 | res_specified = true; | |
1213 | else | |
1214 | i = ch - name; | |
1215 | } else if (!yres_specified && was_digit) { | |
1216 | /* catch mode that begins with digits but has no 'x' */ | |
1217 | i = 0; | |
1794d257 CW |
1218 | } |
1219 | done: | |
04fee895 REB |
1220 | if (i >= 0) { |
1221 | printk(KERN_WARNING | |
1222 | "parse error at position %i in video mode '%s'\n", | |
1223 | i, name); | |
1224 | mode->specified = false; | |
1225 | return false; | |
1226 | } | |
1227 | ||
1794d257 CW |
1228 | if (res_specified) { |
1229 | mode->specified = true; | |
1230 | mode->xres = xres; | |
1231 | mode->yres = yres; | |
1232 | } | |
1233 | ||
1234 | if (refresh_specified) { | |
1235 | mode->refresh_specified = true; | |
1236 | mode->refresh = refresh; | |
1237 | } | |
1238 | ||
1239 | if (bpp_specified) { | |
1240 | mode->bpp_specified = true; | |
1241 | mode->bpp = bpp; | |
1242 | } | |
04fee895 REB |
1243 | mode->rb = rb; |
1244 | mode->cvt = cvt; | |
1245 | mode->interlace = interlace; | |
1246 | mode->margins = margins; | |
1794d257 CW |
1247 | mode->force = force; |
1248 | ||
1249 | return true; | |
1250 | } | |
1251 | EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector); | |
1252 | ||
1253 | struct drm_display_mode * | |
1254 | drm_mode_create_from_cmdline_mode(struct drm_device *dev, | |
1255 | struct drm_cmdline_mode *cmd) | |
1256 | { | |
1257 | struct drm_display_mode *mode; | |
1258 | ||
1259 | if (cmd->cvt) | |
1260 | mode = drm_cvt_mode(dev, | |
1261 | cmd->xres, cmd->yres, | |
1262 | cmd->refresh_specified ? cmd->refresh : 60, | |
1263 | cmd->rb, cmd->interlace, | |
1264 | cmd->margins); | |
1265 | else | |
1266 | mode = drm_gtf_mode(dev, | |
1267 | cmd->xres, cmd->yres, | |
1268 | cmd->refresh_specified ? cmd->refresh : 60, | |
1269 | cmd->interlace, | |
1270 | cmd->margins); | |
1271 | if (!mode) | |
1272 | return NULL; | |
1273 | ||
1274 | drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); | |
1275 | return mode; | |
1276 | } | |
1277 | EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode); |