Commit | Line | Data |
---|---|---|
1c248b7d ID |
1 | /* |
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
3 | * Authors: | |
4 | * Inki Dae <inki.dae@samsung.com> | |
5 | * Joonyoung Shim <jy0922.shim@samsung.com> | |
6 | * Seung-Woo Kim <sw0312.kim@samsung.com> | |
7 | * | |
d81aecb5 ID |
8 | * This program is free software; you can redistribute it and/or modify it |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
1c248b7d ID |
12 | */ |
13 | ||
af65c804 | 14 | #include <linux/pm_runtime.h> |
760285e7 | 15 | #include <drm/drmP.h> |
a379df19 GP |
16 | #include <drm/drm_atomic.h> |
17 | #include <drm/drm_atomic_helper.h> | |
760285e7 | 18 | #include <drm/drm_crtc_helper.h> |
1c248b7d | 19 | |
f37cd5e8 | 20 | #include <linux/component.h> |
96f54215 | 21 | |
1c248b7d ID |
22 | #include <drm/exynos_drm.h> |
23 | ||
24 | #include "exynos_drm_drv.h" | |
25 | #include "exynos_drm_crtc.h" | |
26 | #include "exynos_drm_fbdev.h" | |
27 | #include "exynos_drm_fb.h" | |
28 | #include "exynos_drm_gem.h" | |
864ee9e6 | 29 | #include "exynos_drm_plane.h" |
b73d1230 | 30 | #include "exynos_drm_vidi.h" |
d7f1642c | 31 | #include "exynos_drm_g2d.h" |
cb471f14 | 32 | #include "exynos_drm_ipp.h" |
0519f9a1 | 33 | #include "exynos_drm_iommu.h" |
1c248b7d | 34 | |
0edf9936 | 35 | #define DRIVER_NAME "exynos" |
1c248b7d ID |
36 | #define DRIVER_DESC "Samsung SoC DRM" |
37 | #define DRIVER_DATE "20110530" | |
38 | #define DRIVER_MAJOR 1 | |
39 | #define DRIVER_MINOR 0 | |
40 | ||
a379df19 GP |
41 | struct exynos_atomic_commit { |
42 | struct work_struct work; | |
43 | struct drm_device *dev; | |
44 | struct drm_atomic_state *state; | |
45 | u32 crtcs; | |
46 | }; | |
47 | ||
c4533665 GP |
48 | static void exynos_atomic_wait_for_commit(struct drm_atomic_state *state) |
49 | { | |
50 | struct drm_crtc_state *crtc_state; | |
51 | struct drm_crtc *crtc; | |
52 | int i, ret; | |
53 | ||
54 | for_each_crtc_in_state(state, crtc, crtc_state, i) { | |
55 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); | |
56 | ||
57 | if (!crtc->state->enable) | |
58 | continue; | |
59 | ||
60 | ret = drm_crtc_vblank_get(crtc); | |
61 | if (ret) | |
62 | continue; | |
63 | ||
64 | exynos_drm_crtc_wait_pending_update(exynos_crtc); | |
65 | drm_crtc_vblank_put(crtc); | |
66 | } | |
67 | } | |
68 | ||
a379df19 GP |
69 | static void exynos_atomic_commit_complete(struct exynos_atomic_commit *commit) |
70 | { | |
71 | struct drm_device *dev = commit->dev; | |
72 | struct exynos_drm_private *priv = dev->dev_private; | |
73 | struct drm_atomic_state *state = commit->state; | |
c4533665 GP |
74 | struct drm_plane *plane; |
75 | struct drm_crtc *crtc; | |
76 | struct drm_plane_state *plane_state; | |
77 | struct drm_crtc_state *crtc_state; | |
78 | int i; | |
a379df19 GP |
79 | |
80 | drm_atomic_helper_commit_modeset_disables(dev, state); | |
81 | ||
82 | drm_atomic_helper_commit_modeset_enables(dev, state); | |
83 | ||
84 | /* | |
85 | * Exynos can't update planes with CRTCs and encoders disabled, | |
86 | * its updates routines, specially for FIMD, requires the clocks | |
87 | * to be enabled. So it is necessary to handle the modeset operations | |
88 | * *before* the commit_planes() step, this way it will always | |
89 | * have the relevant clocks enabled to perform the update. | |
90 | */ | |
91 | ||
c4533665 GP |
92 | for_each_crtc_in_state(state, crtc, crtc_state, i) { |
93 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); | |
94 | ||
95 | atomic_set(&exynos_crtc->pending_update, 0); | |
96 | } | |
97 | ||
98 | for_each_plane_in_state(state, plane, plane_state, i) { | |
99 | struct exynos_drm_crtc *exynos_crtc = | |
100 | to_exynos_crtc(plane->crtc); | |
101 | ||
102 | if (!plane->crtc) | |
103 | continue; | |
104 | ||
105 | atomic_inc(&exynos_crtc->pending_update); | |
106 | } | |
107 | ||
aef9dbb8 | 108 | drm_atomic_helper_commit_planes(dev, state, false); |
a379df19 | 109 | |
c4533665 | 110 | exynos_atomic_wait_for_commit(state); |
a379df19 GP |
111 | |
112 | drm_atomic_helper_cleanup_planes(dev, state); | |
113 | ||
114 | drm_atomic_state_free(state); | |
115 | ||
116 | spin_lock(&priv->lock); | |
117 | priv->pending &= ~commit->crtcs; | |
118 | spin_unlock(&priv->lock); | |
119 | ||
120 | wake_up_all(&priv->wait); | |
121 | ||
122 | kfree(commit); | |
123 | } | |
124 | ||
125 | static void exynos_drm_atomic_work(struct work_struct *work) | |
126 | { | |
127 | struct exynos_atomic_commit *commit = container_of(work, | |
128 | struct exynos_atomic_commit, work); | |
129 | ||
130 | exynos_atomic_commit_complete(commit); | |
131 | } | |
132 | ||
f43c3596 MS |
133 | static struct device *exynos_drm_get_dma_device(void); |
134 | ||
1c248b7d ID |
135 | static int exynos_drm_load(struct drm_device *dev, unsigned long flags) |
136 | { | |
137 | struct exynos_drm_private *private; | |
6cf27275 GP |
138 | struct drm_encoder *encoder; |
139 | unsigned int clone_mask; | |
140 | int cnt, ret; | |
1c248b7d | 141 | |
1c248b7d | 142 | private = kzalloc(sizeof(struct exynos_drm_private), GFP_KERNEL); |
38bb5253 | 143 | if (!private) |
1c248b7d | 144 | return -ENOMEM; |
1c248b7d | 145 | |
a379df19 GP |
146 | init_waitqueue_head(&private->wait); |
147 | spin_lock_init(&private->lock); | |
148 | ||
af65c804 | 149 | dev_set_drvdata(dev->dev, dev); |
1c248b7d ID |
150 | dev->dev_private = (void *)private; |
151 | ||
f43c3596 MS |
152 | /* the first real CRTC device is used for all dma mapping operations */ |
153 | private->dma_dev = exynos_drm_get_dma_device(); | |
154 | if (!private->dma_dev) { | |
155 | DRM_ERROR("no device found for DMA mapping operations.\n"); | |
156 | ret = -ENODEV; | |
157 | goto err_free_private; | |
158 | } | |
159 | DRM_INFO("Exynos DRM: using %s device for DMA mapping operations\n", | |
160 | dev_name(private->dma_dev)); | |
161 | ||
0519f9a1 ID |
162 | /* |
163 | * create mapping to manage iommu table and set a pointer to iommu | |
164 | * mapping structure to iommu_mapping of private data. | |
165 | * also this iommu_mapping can be used to check if iommu is supported | |
166 | * or not. | |
167 | */ | |
168 | ret = drm_create_iommu_mapping(dev); | |
169 | if (ret < 0) { | |
170 | DRM_ERROR("failed to create iommu mapping.\n"); | |
d2ba65f6 | 171 | goto err_free_private; |
0519f9a1 ID |
172 | } |
173 | ||
1c248b7d ID |
174 | drm_mode_config_init(dev); |
175 | ||
176 | exynos_drm_mode_config_init(dev); | |
177 | ||
d081f566 | 178 | /* setup possible_clones. */ |
6cf27275 GP |
179 | cnt = 0; |
180 | clone_mask = 0; | |
181 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) | |
182 | clone_mask |= (1 << (cnt++)); | |
183 | ||
184 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) | |
185 | encoder->possible_clones = clone_mask; | |
d081f566 | 186 | |
a9a346d6 DV |
187 | platform_set_drvdata(dev->platformdev, dev); |
188 | ||
f37cd5e8 ID |
189 | /* Try to bind all sub drivers. */ |
190 | ret = component_bind_all(dev->dev, dev); | |
191 | if (ret) | |
c52142e6 AH |
192 | goto err_mode_config_cleanup; |
193 | ||
194 | ret = drm_vblank_init(dev, dev->mode_config.num_crtc); | |
195 | if (ret) | |
196 | goto err_unbind_all; | |
f37cd5e8 | 197 | |
d1afe7d4 | 198 | /* Probe non kms sub drivers and virtual display driver. */ |
f37cd5e8 ID |
199 | ret = exynos_drm_device_subdrv_probe(dev); |
200 | if (ret) | |
c52142e6 | 201 | goto err_cleanup_vblank; |
f37cd5e8 | 202 | |
4ea9526b GP |
203 | drm_mode_config_reset(dev); |
204 | ||
4a3ffedd JS |
205 | /* |
206 | * enable drm irq mode. | |
207 | * - with irq_enabled = true, we can use the vblank feature. | |
208 | * | |
209 | * P.S. note that we wouldn't use drm irq handler but | |
210 | * just specific driver own one instead because | |
211 | * drm framework supports only one irq handler. | |
212 | */ | |
213 | dev->irq_enabled = true; | |
214 | ||
215 | /* | |
216 | * with vblank_disable_allowed = true, vblank interrupt will be disabled | |
217 | * by drm timer once a current process gives up ownership of | |
218 | * vblank event.(after drm_vblank_put function is called) | |
219 | */ | |
220 | dev->vblank_disable_allowed = true; | |
221 | ||
3cb6830a AH |
222 | /* init kms poll for handling hpd */ |
223 | drm_kms_helper_poll_init(dev); | |
224 | ||
225 | /* force connectors detection */ | |
226 | drm_helper_hpd_irq_event(dev); | |
227 | ||
1c248b7d ID |
228 | return 0; |
229 | ||
f37cd5e8 | 230 | err_cleanup_vblank: |
1c248b7d | 231 | drm_vblank_cleanup(dev); |
c52142e6 AH |
232 | err_unbind_all: |
233 | component_unbind_all(dev->dev, dev); | |
080be03d SP |
234 | err_mode_config_cleanup: |
235 | drm_mode_config_cleanup(dev); | |
0519f9a1 | 236 | drm_release_iommu_mapping(dev); |
d2ba65f6 | 237 | err_free_private: |
1c248b7d ID |
238 | kfree(private); |
239 | ||
240 | return ret; | |
241 | } | |
242 | ||
243 | static int exynos_drm_unload(struct drm_device *dev) | |
244 | { | |
f37cd5e8 ID |
245 | exynos_drm_device_subdrv_remove(dev); |
246 | ||
1c248b7d | 247 | exynos_drm_fbdev_fini(dev); |
7db3eba6 | 248 | drm_kms_helper_poll_fini(dev); |
0519f9a1 | 249 | |
9f3dd7db | 250 | drm_vblank_cleanup(dev); |
c52142e6 | 251 | component_unbind_all(dev->dev, dev); |
9f3dd7db | 252 | drm_mode_config_cleanup(dev); |
0519f9a1 | 253 | drm_release_iommu_mapping(dev); |
1c248b7d | 254 | |
9f3dd7db | 255 | kfree(dev->dev_private); |
1c248b7d ID |
256 | dev->dev_private = NULL; |
257 | ||
258 | return 0; | |
259 | } | |
260 | ||
a379df19 GP |
261 | static int commit_is_pending(struct exynos_drm_private *priv, u32 crtcs) |
262 | { | |
263 | bool pending; | |
264 | ||
265 | spin_lock(&priv->lock); | |
266 | pending = priv->pending & crtcs; | |
267 | spin_unlock(&priv->lock); | |
268 | ||
269 | return pending; | |
270 | } | |
271 | ||
272 | int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state, | |
273 | bool async) | |
274 | { | |
275 | struct exynos_drm_private *priv = dev->dev_private; | |
276 | struct exynos_atomic_commit *commit; | |
277 | int i, ret; | |
278 | ||
279 | commit = kzalloc(sizeof(*commit), GFP_KERNEL); | |
280 | if (!commit) | |
281 | return -ENOMEM; | |
282 | ||
283 | ret = drm_atomic_helper_prepare_planes(dev, state); | |
284 | if (ret) { | |
285 | kfree(commit); | |
286 | return ret; | |
287 | } | |
288 | ||
289 | /* This is the point of no return */ | |
290 | ||
291 | INIT_WORK(&commit->work, exynos_drm_atomic_work); | |
292 | commit->dev = dev; | |
293 | commit->state = state; | |
294 | ||
295 | /* Wait until all affected CRTCs have completed previous commits and | |
296 | * mark them as pending. | |
297 | */ | |
298 | for (i = 0; i < dev->mode_config.num_crtc; ++i) { | |
299 | if (state->crtcs[i]) | |
300 | commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]); | |
301 | } | |
302 | ||
303 | wait_event(priv->wait, !commit_is_pending(priv, commit->crtcs)); | |
304 | ||
305 | spin_lock(&priv->lock); | |
306 | priv->pending |= commit->crtcs; | |
307 | spin_unlock(&priv->lock); | |
308 | ||
309 | drm_atomic_helper_swap_state(dev, state); | |
310 | ||
311 | if (async) | |
312 | schedule_work(&commit->work); | |
313 | else | |
314 | exynos_atomic_commit_complete(commit); | |
315 | ||
316 | return 0; | |
317 | } | |
318 | ||
9084f7b8 JS |
319 | static int exynos_drm_open(struct drm_device *dev, struct drm_file *file) |
320 | { | |
d7f1642c | 321 | struct drm_exynos_file_private *file_priv; |
ba3706c0 | 322 | int ret; |
d7f1642c | 323 | |
d7f1642c JS |
324 | file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL); |
325 | if (!file_priv) | |
326 | return -ENOMEM; | |
327 | ||
d7f1642c | 328 | file->driver_priv = file_priv; |
b2df26c1 | 329 | |
ba3706c0 | 330 | ret = exynos_drm_subdrv_open(dev, file); |
6ca605f7 | 331 | if (ret) |
307ceaff | 332 | goto err_file_priv_free; |
ba3706c0 | 333 | |
6ca605f7 | 334 | return ret; |
307ceaff | 335 | |
307ceaff | 336 | err_file_priv_free: |
6ca605f7 SK |
337 | kfree(file_priv); |
338 | file->driver_priv = NULL; | |
ba3706c0 | 339 | return ret; |
9084f7b8 JS |
340 | } |
341 | ||
ccf4d883 | 342 | static void exynos_drm_preclose(struct drm_device *dev, |
6f811502 | 343 | struct drm_file *file) |
0cbc330e | 344 | { |
c74d8eb5 ID |
345 | struct drm_crtc *crtc; |
346 | ||
0cbc330e | 347 | exynos_drm_subdrv_close(dev, file); |
c74d8eb5 ID |
348 | |
349 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) | |
350 | exynos_drm_crtc_cancel_page_flip(crtc, file); | |
0cbc330e ID |
351 | } |
352 | ||
353 | static void exynos_drm_postclose(struct drm_device *dev, struct drm_file *file) | |
ccf4d883 | 354 | { |
53ef299f ID |
355 | kfree(file->driver_priv); |
356 | file->driver_priv = NULL; | |
357 | } | |
358 | ||
1c248b7d ID |
359 | static void exynos_drm_lastclose(struct drm_device *dev) |
360 | { | |
1c248b7d ID |
361 | exynos_drm_fbdev_restore_mode(dev); |
362 | } | |
363 | ||
78b68556 | 364 | static const struct vm_operations_struct exynos_drm_gem_vm_ops = { |
1c248b7d ID |
365 | .fault = exynos_drm_gem_fault, |
366 | .open = drm_gem_vm_open, | |
367 | .close = drm_gem_vm_close, | |
368 | }; | |
369 | ||
baa70943 | 370 | static const struct drm_ioctl_desc exynos_ioctls[] = { |
1c248b7d | 371 | DRM_IOCTL_DEF_DRV(EXYNOS_GEM_CREATE, exynos_drm_gem_create_ioctl, |
f8c47144 | 372 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 373 | DRM_IOCTL_DEF_DRV(EXYNOS_GEM_GET, exynos_drm_gem_get_ioctl, |
f8c47144 | 374 | DRM_RENDER_ALLOW), |
74f230d2 | 375 | DRM_IOCTL_DEF_DRV(EXYNOS_VIDI_CONNECTION, vidi_connection_ioctl, |
f8c47144 | 376 | DRM_AUTH), |
74f230d2 | 377 | DRM_IOCTL_DEF_DRV(EXYNOS_G2D_GET_VER, exynos_g2d_get_ver_ioctl, |
f8c47144 | 378 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 379 | DRM_IOCTL_DEF_DRV(EXYNOS_G2D_SET_CMDLIST, exynos_g2d_set_cmdlist_ioctl, |
f8c47144 | 380 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 381 | DRM_IOCTL_DEF_DRV(EXYNOS_G2D_EXEC, exynos_g2d_exec_ioctl, |
f8c47144 | 382 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 383 | DRM_IOCTL_DEF_DRV(EXYNOS_IPP_GET_PROPERTY, exynos_drm_ipp_get_property, |
f8c47144 | 384 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 385 | DRM_IOCTL_DEF_DRV(EXYNOS_IPP_SET_PROPERTY, exynos_drm_ipp_set_property, |
f8c47144 | 386 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 387 | DRM_IOCTL_DEF_DRV(EXYNOS_IPP_QUEUE_BUF, exynos_drm_ipp_queue_buf, |
f8c47144 | 388 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 389 | DRM_IOCTL_DEF_DRV(EXYNOS_IPP_CMD_CTRL, exynos_drm_ipp_cmd_ctrl, |
f8c47144 | 390 | DRM_AUTH | DRM_RENDER_ALLOW), |
1c248b7d ID |
391 | }; |
392 | ||
ac2bdf73 JS |
393 | static const struct file_operations exynos_drm_driver_fops = { |
394 | .owner = THIS_MODULE, | |
395 | .open = drm_open, | |
396 | .mmap = exynos_drm_gem_mmap, | |
397 | .poll = drm_poll, | |
398 | .read = drm_read, | |
399 | .unlocked_ioctl = drm_ioctl, | |
804d74ab KP |
400 | #ifdef CONFIG_COMPAT |
401 | .compat_ioctl = drm_compat_ioctl, | |
402 | #endif | |
ac2bdf73 JS |
403 | .release = drm_release, |
404 | }; | |
405 | ||
1c248b7d | 406 | static struct drm_driver exynos_drm_driver = { |
c8c38ccf | 407 | .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
74f230d2 | 408 | | DRIVER_ATOMIC | DRIVER_RENDER, |
1c248b7d ID |
409 | .load = exynos_drm_load, |
410 | .unload = exynos_drm_unload, | |
9084f7b8 | 411 | .open = exynos_drm_open, |
ccf4d883 | 412 | .preclose = exynos_drm_preclose, |
1c248b7d | 413 | .lastclose = exynos_drm_lastclose, |
53ef299f | 414 | .postclose = exynos_drm_postclose, |
915b4d11 | 415 | .set_busid = drm_platform_set_busid, |
b44f8408 | 416 | .get_vblank_counter = drm_vblank_no_hw_counter, |
1c248b7d ID |
417 | .enable_vblank = exynos_drm_crtc_enable_vblank, |
418 | .disable_vblank = exynos_drm_crtc_disable_vblank, | |
1c248b7d ID |
419 | .gem_free_object = exynos_drm_gem_free_object, |
420 | .gem_vm_ops = &exynos_drm_gem_vm_ops, | |
421 | .dumb_create = exynos_drm_gem_dumb_create, | |
422 | .dumb_map_offset = exynos_drm_gem_dumb_map_offset, | |
43387b37 | 423 | .dumb_destroy = drm_gem_dumb_destroy, |
b2df26c1 ID |
424 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, |
425 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
01ed50dd JS |
426 | .gem_prime_export = drm_gem_prime_export, |
427 | .gem_prime_import = drm_gem_prime_import, | |
428 | .gem_prime_get_sg_table = exynos_drm_gem_prime_get_sg_table, | |
429 | .gem_prime_import_sg_table = exynos_drm_gem_prime_import_sg_table, | |
430 | .gem_prime_vmap = exynos_drm_gem_prime_vmap, | |
431 | .gem_prime_vunmap = exynos_drm_gem_prime_vunmap, | |
1c248b7d | 432 | .ioctls = exynos_ioctls, |
baa70943 | 433 | .num_ioctls = ARRAY_SIZE(exynos_ioctls), |
ac2bdf73 | 434 | .fops = &exynos_drm_driver_fops, |
1c248b7d ID |
435 | .name = DRIVER_NAME, |
436 | .desc = DRIVER_DESC, | |
437 | .date = DRIVER_DATE, | |
438 | .major = DRIVER_MAJOR, | |
439 | .minor = DRIVER_MINOR, | |
440 | }; | |
441 | ||
af65c804 | 442 | #ifdef CONFIG_PM_SLEEP |
082ca313 | 443 | static int exynos_drm_suspend(struct device *dev) |
af65c804 SP |
444 | { |
445 | struct drm_device *drm_dev = dev_get_drvdata(dev); | |
082ca313 | 446 | struct drm_connector *connector; |
af65c804 | 447 | |
d50a1907 | 448 | if (pm_runtime_suspended(dev) || !drm_dev) |
af65c804 SP |
449 | return 0; |
450 | ||
082ca313 AH |
451 | drm_modeset_lock_all(drm_dev); |
452 | drm_for_each_connector(connector, drm_dev) { | |
453 | int old_dpms = connector->dpms; | |
454 | ||
455 | if (connector->funcs->dpms) | |
456 | connector->funcs->dpms(connector, DRM_MODE_DPMS_OFF); | |
457 | ||
458 | /* Set the old mode back to the connector for resume */ | |
459 | connector->dpms = old_dpms; | |
460 | } | |
461 | drm_modeset_unlock_all(drm_dev); | |
462 | ||
463 | return 0; | |
af65c804 SP |
464 | } |
465 | ||
082ca313 | 466 | static int exynos_drm_resume(struct device *dev) |
af65c804 SP |
467 | { |
468 | struct drm_device *drm_dev = dev_get_drvdata(dev); | |
082ca313 | 469 | struct drm_connector *connector; |
af65c804 | 470 | |
d50a1907 | 471 | if (pm_runtime_suspended(dev) || !drm_dev) |
af65c804 SP |
472 | return 0; |
473 | ||
082ca313 AH |
474 | drm_modeset_lock_all(drm_dev); |
475 | drm_for_each_connector(connector, drm_dev) { | |
476 | if (connector->funcs->dpms) { | |
477 | int dpms = connector->dpms; | |
478 | ||
479 | connector->dpms = DRM_MODE_DPMS_OFF; | |
480 | connector->funcs->dpms(connector, dpms); | |
481 | } | |
482 | } | |
483 | drm_modeset_unlock_all(drm_dev); | |
484 | ||
485 | return 0; | |
af65c804 SP |
486 | } |
487 | #endif | |
488 | ||
af65c804 | 489 | static const struct dev_pm_ops exynos_drm_pm_ops = { |
082ca313 | 490 | SET_SYSTEM_SLEEP_PM_OPS(exynos_drm_suspend, exynos_drm_resume) |
af65c804 SP |
491 | }; |
492 | ||
86650408 AH |
493 | /* forward declaration */ |
494 | static struct platform_driver exynos_drm_platform_driver; | |
f37cd5e8 | 495 | |
a5fb26cd MS |
496 | struct exynos_drm_driver_info { |
497 | struct platform_driver *driver; | |
498 | unsigned int flags; | |
499 | }; | |
500 | ||
501 | #define DRM_COMPONENT_DRIVER BIT(0) /* supports component framework */ | |
502 | #define DRM_VIRTUAL_DEVICE BIT(1) /* create virtual platform device */ | |
f43c3596 | 503 | #define DRM_DMA_DEVICE BIT(2) /* can be used for dma allocations */ |
a5fb26cd MS |
504 | |
505 | #define DRV_PTR(drv, cond) (IS_ENABLED(cond) ? &drv : NULL) | |
506 | ||
86650408 AH |
507 | /* |
508 | * Connector drivers should not be placed before associated crtc drivers, | |
509 | * because connector requires pipe number of its crtc during initialization. | |
510 | */ | |
a5fb26cd MS |
511 | static struct exynos_drm_driver_info exynos_drm_drivers[] = { |
512 | { | |
513 | DRV_PTR(fimd_driver, CONFIG_DRM_EXYNOS_FIMD), | |
f43c3596 | 514 | DRM_COMPONENT_DRIVER | DRM_DMA_DEVICE |
a5fb26cd MS |
515 | }, { |
516 | DRV_PTR(exynos5433_decon_driver, CONFIG_DRM_EXYNOS5433_DECON), | |
f43c3596 | 517 | DRM_COMPONENT_DRIVER | DRM_DMA_DEVICE |
a5fb26cd MS |
518 | }, { |
519 | DRV_PTR(decon_driver, CONFIG_DRM_EXYNOS7_DECON), | |
f43c3596 | 520 | DRM_COMPONENT_DRIVER | DRM_DMA_DEVICE |
a5fb26cd MS |
521 | }, { |
522 | DRV_PTR(mixer_driver, CONFIG_DRM_EXYNOS_MIXER), | |
f43c3596 | 523 | DRM_COMPONENT_DRIVER | DRM_DMA_DEVICE |
a5fb26cd MS |
524 | }, { |
525 | DRV_PTR(mic_driver, CONFIG_DRM_EXYNOS_MIC), | |
526 | DRM_COMPONENT_DRIVER | |
527 | }, { | |
528 | DRV_PTR(dp_driver, CONFIG_DRM_EXYNOS_DP), | |
529 | DRM_COMPONENT_DRIVER | |
530 | }, { | |
531 | DRV_PTR(dsi_driver, CONFIG_DRM_EXYNOS_DSI), | |
532 | DRM_COMPONENT_DRIVER | |
533 | }, { | |
534 | DRV_PTR(hdmi_driver, CONFIG_DRM_EXYNOS_HDMI), | |
535 | DRM_COMPONENT_DRIVER | |
536 | }, { | |
537 | DRV_PTR(vidi_driver, CONFIG_DRM_EXYNOS_VIDI), | |
538 | DRM_COMPONENT_DRIVER | DRM_VIRTUAL_DEVICE | |
539 | }, { | |
540 | DRV_PTR(g2d_driver, CONFIG_DRM_EXYNOS_G2D), | |
541 | }, { | |
542 | DRV_PTR(fimc_driver, CONFIG_DRM_EXYNOS_FIMC), | |
543 | }, { | |
544 | DRV_PTR(rotator_driver, CONFIG_DRM_EXYNOS_ROTATOR), | |
545 | }, { | |
546 | DRV_PTR(gsc_driver, CONFIG_DRM_EXYNOS_GSC), | |
547 | }, { | |
548 | DRV_PTR(ipp_driver, CONFIG_DRM_EXYNOS_IPP), | |
549 | DRM_VIRTUAL_DEVICE | |
550 | }, { | |
551 | &exynos_drm_platform_driver, | |
552 | DRM_VIRTUAL_DEVICE | |
553 | } | |
86650408 | 554 | }; |
f37cd5e8 | 555 | |
53c5558d | 556 | static int compare_dev(struct device *dev, void *data) |
f37cd5e8 ID |
557 | { |
558 | return dev == (struct device *)data; | |
559 | } | |
560 | ||
53c5558d | 561 | static struct component_match *exynos_drm_match_add(struct device *dev) |
f37cd5e8 | 562 | { |
53c5558d | 563 | struct component_match *match = NULL; |
86650408 | 564 | int i; |
f37cd5e8 | 565 | |
a5fb26cd MS |
566 | for (i = 0; i < ARRAY_SIZE(exynos_drm_drivers); ++i) { |
567 | struct exynos_drm_driver_info *info = &exynos_drm_drivers[i]; | |
86650408 | 568 | struct device *p = NULL, *d; |
f7c2f36f | 569 | |
a5fb26cd MS |
570 | if (!info->driver || !(info->flags & DRM_COMPONENT_DRIVER)) |
571 | continue; | |
572 | ||
573 | while ((d = bus_find_device(&platform_bus_type, p, | |
574 | &info->driver->driver, | |
86650408 AH |
575 | (void *)platform_bus_type.match))) { |
576 | put_device(p); | |
577 | component_match_add(dev, &match, compare_dev, d); | |
578 | p = d; | |
df5225bc | 579 | } |
86650408 | 580 | put_device(p); |
f37cd5e8 ID |
581 | } |
582 | ||
86650408 | 583 | return match ?: ERR_PTR(-ENODEV); |
f37cd5e8 ID |
584 | } |
585 | ||
586 | static int exynos_drm_bind(struct device *dev) | |
587 | { | |
f37cd5e8 ID |
588 | return drm_platform_init(&exynos_drm_driver, to_platform_device(dev)); |
589 | } | |
590 | ||
591 | static void exynos_drm_unbind(struct device *dev) | |
592 | { | |
593 | drm_put_dev(dev_get_drvdata(dev)); | |
594 | } | |
595 | ||
596 | static const struct component_master_ops exynos_drm_ops = { | |
f37cd5e8 ID |
597 | .bind = exynos_drm_bind, |
598 | .unbind = exynos_drm_unbind, | |
1c248b7d ID |
599 | }; |
600 | ||
417133e4 AH |
601 | static int exynos_drm_platform_probe(struct platform_device *pdev) |
602 | { | |
603 | struct component_match *match; | |
604 | ||
605 | pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); | |
606 | exynos_drm_driver.num_ioctls = ARRAY_SIZE(exynos_ioctls); | |
607 | ||
608 | match = exynos_drm_match_add(&pdev->dev); | |
609 | if (IS_ERR(match)) | |
610 | return PTR_ERR(match); | |
611 | ||
612 | return component_master_add_with_match(&pdev->dev, &exynos_drm_ops, | |
613 | match); | |
614 | } | |
615 | ||
616 | static int exynos_drm_platform_remove(struct platform_device *pdev) | |
617 | { | |
618 | component_master_del(&pdev->dev, &exynos_drm_ops); | |
619 | return 0; | |
620 | } | |
621 | ||
622 | static struct platform_driver exynos_drm_platform_driver = { | |
623 | .probe = exynos_drm_platform_probe, | |
624 | .remove = exynos_drm_platform_remove, | |
625 | .driver = { | |
626 | .name = "exynos-drm", | |
627 | .pm = &exynos_drm_pm_ops, | |
628 | }, | |
629 | }; | |
630 | ||
f43c3596 MS |
631 | static struct device *exynos_drm_get_dma_device(void) |
632 | { | |
633 | int i; | |
634 | ||
635 | for (i = 0; i < ARRAY_SIZE(exynos_drm_drivers); ++i) { | |
636 | struct exynos_drm_driver_info *info = &exynos_drm_drivers[i]; | |
637 | struct device *dev; | |
638 | ||
639 | if (!info->driver || !(info->flags & DRM_DMA_DEVICE)) | |
640 | continue; | |
641 | ||
642 | while ((dev = bus_find_device(&platform_bus_type, NULL, | |
643 | &info->driver->driver, | |
644 | (void *)platform_bus_type.match))) { | |
645 | put_device(dev); | |
646 | return dev; | |
647 | } | |
648 | } | |
649 | return NULL; | |
650 | } | |
651 | ||
417133e4 | 652 | static void exynos_drm_unregister_devices(void) |
72390677 | 653 | { |
a5fb26cd MS |
654 | int i; |
655 | ||
656 | for (i = ARRAY_SIZE(exynos_drm_drivers) - 1; i >= 0; --i) { | |
657 | struct exynos_drm_driver_info *info = &exynos_drm_drivers[i]; | |
658 | struct device *dev; | |
25928a39 | 659 | |
a5fb26cd MS |
660 | if (!info->driver || !(info->flags & DRM_VIRTUAL_DEVICE)) |
661 | continue; | |
662 | ||
663 | while ((dev = bus_find_device(&platform_bus_type, NULL, | |
664 | &info->driver->driver, | |
665 | (void *)platform_bus_type.match))) { | |
666 | put_device(dev); | |
667 | platform_device_unregister(to_platform_device(dev)); | |
668 | } | |
417133e4 AH |
669 | } |
670 | } | |
7eb8f069 | 671 | |
417133e4 AH |
672 | static int exynos_drm_register_devices(void) |
673 | { | |
a5fb26cd | 674 | struct platform_device *pdev; |
417133e4 AH |
675 | int i; |
676 | ||
a5fb26cd MS |
677 | for (i = 0; i < ARRAY_SIZE(exynos_drm_drivers); ++i) { |
678 | struct exynos_drm_driver_info *info = &exynos_drm_drivers[i]; | |
417133e4 | 679 | |
a5fb26cd | 680 | if (!info->driver || !(info->flags & DRM_VIRTUAL_DEVICE)) |
417133e4 | 681 | continue; |
417133e4 | 682 | |
a5fb26cd MS |
683 | pdev = platform_device_register_simple( |
684 | info->driver->driver.name, -1, NULL, 0); | |
685 | if (IS_ERR(pdev)) | |
686 | goto fail; | |
72390677 | 687 | } |
f37cd5e8 | 688 | |
417133e4 | 689 | return 0; |
a5fb26cd MS |
690 | fail: |
691 | exynos_drm_unregister_devices(); | |
692 | return PTR_ERR(pdev); | |
1c248b7d ID |
693 | } |
694 | ||
a5fb26cd | 695 | static void exynos_drm_unregister_drivers(void) |
1c248b7d | 696 | { |
a5fb26cd | 697 | int i; |
417133e4 | 698 | |
a5fb26cd MS |
699 | for (i = ARRAY_SIZE(exynos_drm_drivers) - 1; i >= 0; --i) { |
700 | struct exynos_drm_driver_info *info = &exynos_drm_drivers[i]; | |
417133e4 | 701 | |
a5fb26cd | 702 | if (!info->driver) |
417133e4 AH |
703 | continue; |
704 | ||
a5fb26cd | 705 | platform_driver_unregister(info->driver); |
417133e4 | 706 | } |
f37cd5e8 ID |
707 | } |
708 | ||
a5fb26cd | 709 | static int exynos_drm_register_drivers(void) |
417133e4 | 710 | { |
a5fb26cd | 711 | int i, ret; |
417133e4 | 712 | |
a5fb26cd MS |
713 | for (i = 0; i < ARRAY_SIZE(exynos_drm_drivers); ++i) { |
714 | struct exynos_drm_driver_info *info = &exynos_drm_drivers[i]; | |
417133e4 | 715 | |
a5fb26cd MS |
716 | if (!info->driver) |
717 | continue; | |
417133e4 | 718 | |
a5fb26cd MS |
719 | ret = platform_driver_register(info->driver); |
720 | if (ret) | |
721 | goto fail; | |
722 | } | |
723 | return 0; | |
724 | fail: | |
725 | exynos_drm_unregister_drivers(); | |
726 | return ret; | |
417133e4 AH |
727 | } |
728 | ||
f37cd5e8 ID |
729 | static int exynos_drm_init(void) |
730 | { | |
e3b9e460 | 731 | int ret; |
f37cd5e8 | 732 | |
417133e4 AH |
733 | ret = exynos_drm_register_devices(); |
734 | if (ret) | |
735 | return ret; | |
820687be | 736 | |
a5fb26cd | 737 | ret = exynos_drm_register_drivers(); |
417133e4 AH |
738 | if (ret) |
739 | goto err_unregister_pdevs; | |
f37cd5e8 | 740 | |
f37cd5e8 ID |
741 | return 0; |
742 | ||
417133e4 AH |
743 | err_unregister_pdevs: |
744 | exynos_drm_unregister_devices(); | |
f37cd5e8 ID |
745 | |
746 | return ret; | |
747 | } | |
748 | ||
749 | static void exynos_drm_exit(void) | |
750 | { | |
a5fb26cd | 751 | exynos_drm_unregister_drivers(); |
417133e4 | 752 | exynos_drm_unregister_devices(); |
1c248b7d ID |
753 | } |
754 | ||
755 | module_init(exynos_drm_init); | |
756 | module_exit(exynos_drm_exit); | |
757 | ||
758 | MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>"); | |
759 | MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>"); | |
760 | MODULE_AUTHOR("Seung-Woo Kim <sw0312.kim@samsung.com>"); | |
761 | MODULE_DESCRIPTION("Samsung SoC DRM Driver"); | |
762 | MODULE_LICENSE("GPL"); |