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drm/exynos: Clean up some G2D codes for readability
[deliverable/linux.git] / drivers / gpu / drm / exynos / exynos_drm_g2d.c
CommitLineData
d7f1642c
JS		 1/*
2 * Copyright (C) 2012 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundationr
8 */
9
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/clk.h>
13#include <linux/err.h>
14#include <linux/interrupt.h>
15#include <linux/io.h>
16#include <linux/platform_device.h>
17#include <linux/pm_runtime.h>
18#include <linux/slab.h>
19#include <linux/workqueue.h>
d87342c1
ID		 20#include <linux/dma-mapping.h>
21#include <linux/dma-attrs.h>
95fc6337 22#include <linux/of.h>
d7f1642c 23
760285e7
DH		 24#include <drm/drmP.h>
25#include <drm/exynos_drm.h>
d7f1642c
JS		 26#include "exynos_drm_drv.h"
27#include "exynos_drm_gem.h"
d87342c1 28#include "exynos_drm_iommu.h"
d7f1642c
JS		 29
30#define G2D_HW_MAJOR_VER 4
31#define G2D_HW_MINOR_VER 1
32
33/* vaild register range set from user: 0x0104 ~ 0x0880 */
34#define G2D_VALID_START 0x0104
35#define G2D_VALID_END 0x0880
36
37/* general registers */
38#define G2D_SOFT_RESET 0x0000
39#define G2D_INTEN 0x0004
40#define G2D_INTC_PEND 0x000C
41#define G2D_DMA_SFR_BASE_ADDR 0x0080
42#define G2D_DMA_COMMAND 0x0084
43#define G2D_DMA_STATUS 0x008C
44#define G2D_DMA_HOLD_CMD 0x0090
45
46/* command registers */
47#define G2D_BITBLT_START 0x0100
48
49/* registers for base address */
50#define G2D_SRC_BASE_ADDR 0x0304
51#define G2D_SRC_PLANE2_BASE_ADDR 0x0318
52#define G2D_DST_BASE_ADDR 0x0404
53#define G2D_DST_PLANE2_BASE_ADDR 0x0418
54#define G2D_PAT_BASE_ADDR 0x0500
55#define G2D_MSK_BASE_ADDR 0x0520
56
57/* G2D_SOFT_RESET */
58#define G2D_SFRCLEAR (1 << 1)
59#define G2D_R (1 << 0)
60
61/* G2D_INTEN */
62#define G2D_INTEN_ACF (1 << 3)
63#define G2D_INTEN_UCF (1 << 2)
64#define G2D_INTEN_GCF (1 << 1)
65#define G2D_INTEN_SCF (1 << 0)
66
67/* G2D_INTC_PEND */
68#define G2D_INTP_ACMD_FIN (1 << 3)
69#define G2D_INTP_UCMD_FIN (1 << 2)
70#define G2D_INTP_GCMD_FIN (1 << 1)
71#define G2D_INTP_SCMD_FIN (1 << 0)
72
73/* G2D_DMA_COMMAND */
74#define G2D_DMA_HALT (1 << 2)
75#define G2D_DMA_CONTINUE (1 << 1)
76#define G2D_DMA_START (1 << 0)
77
78/* G2D_DMA_STATUS */
79#define G2D_DMA_LIST_DONE_COUNT (0xFF << 17)
80#define G2D_DMA_BITBLT_DONE_COUNT (0xFFFF << 1)
81#define G2D_DMA_DONE (1 << 0)
82#define G2D_DMA_LIST_DONE_COUNT_OFFSET 17
83
84/* G2D_DMA_HOLD_CMD */
7ad01814 85#define G2D_USER_HOLD (1 << 2)
d7f1642c
JS		 86#define G2D_LIST_HOLD (1 << 1)
87#define G2D_BITBLT_HOLD (1 << 0)
88
89/* G2D_BITBLT_START */
90#define G2D_START_CASESEL (1 << 2)
91#define G2D_START_NHOLT (1 << 1)
92#define G2D_START_BITBLT (1 << 0)
93
94#define G2D_CMDLIST_SIZE (PAGE_SIZE / 4)
95#define G2D_CMDLIST_NUM 64
96#define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
97#define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2)
98
d87342c1
ID		 99#define MAX_BUF_ADDR_NR 6
100
2a3098ff
ID		 101/* maximum buffer pool size of userptr is 64MB as default */
102#define MAX_POOL (64 * 1024 * 1024)
103
104enum {
105 BUF_TYPE_GEM = 1,
106 BUF_TYPE_USERPTR,
107};
108
d7f1642c
JS		 109/* cmdlist data structure */
110struct g2d_cmdlist {
2a3098ff
ID		 111 u32 head;
112 unsigned long data[G2D_CMDLIST_DATA_NUM];
113 u32 last; /* last data offset */
d7f1642c
JS		 114};
115
116struct drm_exynos_pending_g2d_event {
117 struct drm_pending_event base;
118 struct drm_exynos_g2d_event event;
119};
120
2a3098ff
ID		 121struct g2d_cmdlist_userptr {
122 struct list_head list;
123 dma_addr_t dma_addr;
124 unsigned long userptr;
125 unsigned long size;
126 struct page **pages;
127 unsigned int npages;
128 struct sg_table *sgt;
129 struct vm_area_struct *vma;
130 atomic_t refcount;
131 bool in_pool;
132 bool out_of_list;
133};
d7f1642c
JS		 134struct g2d_cmdlist_node {
135 struct list_head list;
136 struct g2d_cmdlist *cmdlist;
d87342c1 137 unsigned int map_nr;
2a3098ff 138 unsigned long handles[MAX_BUF_ADDR_NR];
f3d2fc4a 139 unsigned int buf_type[MAX_BUF_ADDR_NR];
d7f1642c
JS		 140 dma_addr_t dma_addr;
141
142 struct drm_exynos_pending_g2d_event *event;
143};
144
145struct g2d_runqueue_node {
146 struct list_head list;
147 struct list_head run_cmdlist;
148 struct list_head event_list;
d87342c1 149 struct drm_file *filp;
6b6bae24 150 pid_t pid;
d7f1642c
JS		 151 struct completion complete;
152 int async;
153};
154
155struct g2d_data {
156 struct device *dev;
157 struct clk *gate_clk;
d7f1642c
JS		 158 void __iomem *regs;
159 int irq;
160 struct workqueue_struct *g2d_workq;
161 struct work_struct runqueue_work;
162 struct exynos_drm_subdrv subdrv;
163 bool suspended;
164
165 /* cmdlist */
166 struct g2d_cmdlist_node *cmdlist_node;
167 struct list_head free_cmdlist;
168 struct mutex cmdlist_mutex;
169 dma_addr_t cmdlist_pool;
170 void *cmdlist_pool_virt;
d87342c1 171 struct dma_attrs cmdlist_dma_attrs;
d7f1642c
JS		 172
173 /* runqueue*/
174 struct g2d_runqueue_node *runqueue_node;
175 struct list_head runqueue;
176 struct mutex runqueue_mutex;
177 struct kmem_cache *runqueue_slab;
2a3098ff
ID		 178
179 unsigned long current_pool;
180 unsigned long max_pool;
d7f1642c
JS		 181};
182
183static int g2d_init_cmdlist(struct g2d_data *g2d)
184{
185 struct device *dev = g2d->dev;
186 struct g2d_cmdlist_node *node = g2d->cmdlist_node;
d87342c1 187 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
d7f1642c
JS		 188 int nr;
189 int ret;
190
d87342c1
ID		 191 init_dma_attrs(&g2d->cmdlist_dma_attrs);
192 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
193
194 g2d->cmdlist_pool_virt = dma_alloc_attrs(subdrv->drm_dev->dev,
195 G2D_CMDLIST_POOL_SIZE,
196 &g2d->cmdlist_pool, GFP_KERNEL,
197 &g2d->cmdlist_dma_attrs);
d7f1642c
JS		 198 if (!g2d->cmdlist_pool_virt) {
199 dev_err(dev, "failed to allocate dma memory\n");
200 return -ENOMEM;
201 }
202
fab9f8d0 203 node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL);
d7f1642c
JS		 204 if (!node) {
205 dev_err(dev, "failed to allocate memory\n");
206 ret = -ENOMEM;
207 goto err;
208 }
209
210 for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) {
211 node[nr].cmdlist =
212 g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;
213 node[nr].dma_addr =
214 g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
215
216 list_add_tail(&node[nr].list, &g2d->free_cmdlist);
217 }
218
219 return 0;
220
221err:
d87342c1
ID		 222 dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
223 g2d->cmdlist_pool_virt,
224 g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
d7f1642c
JS		 225 return ret;
226}
227
228static void g2d_fini_cmdlist(struct g2d_data *g2d)
229{
d87342c1 230 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
d7f1642c
JS		 231
232 kfree(g2d->cmdlist_node);
d87342c1
ID		 233 dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
234 g2d->cmdlist_pool_virt,
235 g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
d7f1642c
JS		 236}
237
238static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d)
239{
240 struct device *dev = g2d->dev;
241 struct g2d_cmdlist_node *node;
242
243 mutex_lock(&g2d->cmdlist_mutex);
244 if (list_empty(&g2d->free_cmdlist)) {
245 dev_err(dev, "there is no free cmdlist\n");
246 mutex_unlock(&g2d->cmdlist_mutex);
247 return NULL;
248 }
249
250 node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node,
251 list);
252 list_del_init(&node->list);
253 mutex_unlock(&g2d->cmdlist_mutex);
254
255 return node;
256}
257
258static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node)
259{
260 mutex_lock(&g2d->cmdlist_mutex);
261 list_move_tail(&node->list, &g2d->free_cmdlist);
262 mutex_unlock(&g2d->cmdlist_mutex);
263}
264
265static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv,
266 struct g2d_cmdlist_node *node)
267{
268 struct g2d_cmdlist_node *lnode;
269
270 if (list_empty(&g2d_priv->inuse_cmdlist))
271 goto add_to_list;
272
273 /* this links to base address of new cmdlist */
274 lnode = list_entry(g2d_priv->inuse_cmdlist.prev,
275 struct g2d_cmdlist_node, list);
276 lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr;
277
278add_to_list:
279 list_add_tail(&node->list, &g2d_priv->inuse_cmdlist);
280
281 if (node->event)
282 list_add_tail(&node->event->base.link, &g2d_priv->event_list);
283}
284
2a3098ff
ID		 285static void g2d_userptr_put_dma_addr(struct drm_device *drm_dev,
286 unsigned long obj,
287 bool force)
288{
289 struct g2d_cmdlist_userptr *g2d_userptr =
290 (struct g2d_cmdlist_userptr *)obj;
291
292 if (!obj)
293 return;
294
295 if (force)
296 goto out;
297
298 atomic_dec(&g2d_userptr->refcount);
299
300 if (atomic_read(&g2d_userptr->refcount) > 0)
301 return;
302
303 if (g2d_userptr->in_pool)
304 return;
305
306out:
307 exynos_gem_unmap_sgt_from_dma(drm_dev, g2d_userptr->sgt,
308 DMA_BIDIRECTIONAL);
309
310 exynos_gem_put_pages_to_userptr(g2d_userptr->pages,
311 g2d_userptr->npages,
312 g2d_userptr->vma);
313
314 if (!g2d_userptr->out_of_list)
315 list_del_init(&g2d_userptr->list);
316
317 sg_free_table(g2d_userptr->sgt);
318 kfree(g2d_userptr->sgt);
319 g2d_userptr->sgt = NULL;
320
321 kfree(g2d_userptr->pages);
2a3098ff 322 g2d_userptr->pages = NULL;
df3d90e5 323 kfree(g2d_userptr);
2a3098ff
ID		 324 g2d_userptr = NULL;
325}
326
b7848c7a 327static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev,
2a3098ff
ID		 328 unsigned long userptr,
329 unsigned long size,
330 struct drm_file *filp,
331 unsigned long *obj)
332{
333 struct drm_exynos_file_private *file_priv = filp->driver_priv;
334 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
335 struct g2d_cmdlist_userptr *g2d_userptr;
336 struct g2d_data *g2d;
337 struct page **pages;
338 struct sg_table *sgt;
339 struct vm_area_struct *vma;
340 unsigned long start, end;
341 unsigned int npages, offset;
342 int ret;
343
344 if (!size) {
345 DRM_ERROR("invalid userptr size.\n");
346 return ERR_PTR(-EINVAL);
347 }
348
349 g2d = dev_get_drvdata(g2d_priv->dev);
350
351 /* check if userptr already exists in userptr_list. */
352 list_for_each_entry(g2d_userptr, &g2d_priv->userptr_list, list) {
353 if (g2d_userptr->userptr == userptr) {
354 /*
355 * also check size because there could be same address
356 * and different size.
357 */
358 if (g2d_userptr->size == size) {
359 atomic_inc(&g2d_userptr->refcount);
360 *obj = (unsigned long)g2d_userptr;
361
362 return &g2d_userptr->dma_addr;
363 }
364
365 /*
366 * at this moment, maybe g2d dma is accessing this
367 * g2d_userptr memory region so just remove this
368 * g2d_userptr object from userptr_list not to be
369 * referred again and also except it the userptr
370 * pool to be released after the dma access completion.
371 */
372 g2d_userptr->out_of_list = true;
373 g2d_userptr->in_pool = false;
374 list_del_init(&g2d_userptr->list);
375
376 break;
377 }
378 }
379
380 g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL);
381 if (!g2d_userptr) {
382 DRM_ERROR("failed to allocate g2d_userptr.\n");
383 return ERR_PTR(-ENOMEM);
384 }
385
386 atomic_set(&g2d_userptr->refcount, 1);
387
388 start = userptr & PAGE_MASK;
389 offset = userptr & ~PAGE_MASK;
390 end = PAGE_ALIGN(userptr + size);
391 npages = (end - start) >> PAGE_SHIFT;
392 g2d_userptr->npages = npages;
393
394 pages = kzalloc(npages * sizeof(struct page *), GFP_KERNEL);
395 if (!pages) {
396 DRM_ERROR("failed to allocate pages.\n");
397 kfree(g2d_userptr);
398 return ERR_PTR(-ENOMEM);
399 }
400
401 vma = find_vma(current->mm, userptr);
402 if (!vma) {
403 DRM_ERROR("failed to get vm region.\n");
404 ret = -EFAULT;
405 goto err_free_pages;
406 }
407
408 if (vma->vm_end < userptr + size) {
409 DRM_ERROR("vma is too small.\n");
410 ret = -EFAULT;
411 goto err_free_pages;
412 }
413
414 g2d_userptr->vma = exynos_gem_get_vma(vma);
415 if (!g2d_userptr->vma) {
416 DRM_ERROR("failed to copy vma.\n");
417 ret = -ENOMEM;
418 goto err_free_pages;
419 }
420
421 g2d_userptr->size = size;
422
423 ret = exynos_gem_get_pages_from_userptr(start & PAGE_MASK,
424 npages, pages, vma);
425 if (ret < 0) {
426 DRM_ERROR("failed to get user pages from userptr.\n");
427 goto err_put_vma;
428 }
429
430 g2d_userptr->pages = pages;
431
e44a5c00 432 sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
2a3098ff
ID		 433 if (!sgt) {
434 DRM_ERROR("failed to allocate sg table.\n");
435 ret = -ENOMEM;
436 goto err_free_userptr;
437 }
438
439 ret = sg_alloc_table_from_pages(sgt, pages, npages, offset,
440 size, GFP_KERNEL);
441 if (ret < 0) {
442 DRM_ERROR("failed to get sgt from pages.\n");
443 goto err_free_sgt;
444 }
445
446 g2d_userptr->sgt = sgt;
447
448 ret = exynos_gem_map_sgt_with_dma(drm_dev, g2d_userptr->sgt,
449 DMA_BIDIRECTIONAL);
450 if (ret < 0) {
451 DRM_ERROR("failed to map sgt with dma region.\n");
067ed331 452 goto err_sg_free_table;
2a3098ff
ID		 453 }
454
455 g2d_userptr->dma_addr = sgt->sgl[0].dma_address;
456 g2d_userptr->userptr = userptr;
457
458 list_add_tail(&g2d_userptr->list, &g2d_priv->userptr_list);
459
460 if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) {
461 g2d->current_pool += npages << PAGE_SHIFT;
462 g2d_userptr->in_pool = true;
463 }
464
465 *obj = (unsigned long)g2d_userptr;
466
467 return &g2d_userptr->dma_addr;
468
067ed331 469err_sg_free_table:
2a3098ff 470 sg_free_table(sgt);
067ed331
YC		 471
472err_free_sgt:
2a3098ff
ID		 473 kfree(sgt);
474 sgt = NULL;
475
476err_free_userptr:
477 exynos_gem_put_pages_to_userptr(g2d_userptr->pages,
478 g2d_userptr->npages,
479 g2d_userptr->vma);
480
481err_put_vma:
482 exynos_gem_put_vma(g2d_userptr->vma);
483
484err_free_pages:
485 kfree(pages);
486 kfree(g2d_userptr);
487 pages = NULL;
488 g2d_userptr = NULL;
489
490 return ERR_PTR(ret);
491}
492
493static void g2d_userptr_free_all(struct drm_device *drm_dev,
494 struct g2d_data *g2d,
495 struct drm_file *filp)
496{
497 struct drm_exynos_file_private *file_priv = filp->driver_priv;
498 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
499 struct g2d_cmdlist_userptr *g2d_userptr, *n;
500
501 list_for_each_entry_safe(g2d_userptr, n, &g2d_priv->userptr_list, list)
502 if (g2d_userptr->in_pool)
503 g2d_userptr_put_dma_addr(drm_dev,
504 (unsigned long)g2d_userptr,
505 true);
506
507 g2d->current_pool = 0;
508}
509
d87342c1
ID		 510static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
511 struct g2d_cmdlist_node *node,
512 struct drm_device *drm_dev,
513 struct drm_file *file)
d7f1642c 514{
d7f1642c 515 struct g2d_cmdlist *cmdlist = node->cmdlist;
d7f1642c
JS		 516 int offset;
517 int i;
518
d87342c1
ID		 519 for (i = 0; i < node->map_nr; i++) {
520 unsigned long handle;
521 dma_addr_t *addr;
d7f1642c
JS		 522
523 offset = cmdlist->last - (i * 2 + 1);
d87342c1 524 handle = cmdlist->data[offset];
d7f1642c 525
f3d2fc4a 526 if (node->buf_type[i] == BUF_TYPE_GEM) {
2a3098ff
ID		 527 addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
528 file);
529 if (IS_ERR(addr)) {
530 node->map_nr = i;
531 return -EFAULT;
532 }
533 } else {
534 struct drm_exynos_g2d_userptr g2d_userptr;
535
536 if (copy_from_user(&g2d_userptr, (void __user *)handle,
537 sizeof(struct drm_exynos_g2d_userptr))) {
538 node->map_nr = i;
539 return -EFAULT;
540 }
541
542 addr = g2d_userptr_get_dma_addr(drm_dev,
543 g2d_userptr.userptr,
544 g2d_userptr.size,
545 file,
546 &handle);
547 if (IS_ERR(addr)) {
548 node->map_nr = i;
549 return -EFAULT;
550 }
d7f1642c
JS		 551 }
552
553 cmdlist->data[offset] = *addr;
d87342c1 554 node->handles[i] = handle;
d7f1642c
JS		 555 }
556
557 return 0;
558}
559
d87342c1
ID		 560static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
561 struct g2d_cmdlist_node *node,
562 struct drm_file *filp)
d7f1642c 563{
d87342c1
ID		 564 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
565 int i;
d7f1642c 566
d87342c1 567 for (i = 0; i < node->map_nr; i++) {
2a3098ff 568 unsigned long handle = node->handles[i];
d87342c1 569
f3d2fc4a 570 if (node->buf_type[i] == BUF_TYPE_GEM)
2a3098ff
ID		 571 exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
572 filp);
573 else
574 g2d_userptr_put_dma_addr(subdrv->drm_dev, handle,
575 false);
d7f1642c 576
d87342c1 577 node->handles[i] = 0;
f3d2fc4a 578 node->buf_type[i] = 0;
d7f1642c 579 }
d87342c1
ID		 580
581 node->map_nr = 0;
d7f1642c
JS		 582}
583
584static void g2d_dma_start(struct g2d_data *g2d,
585 struct g2d_runqueue_node *runqueue_node)
586{
587 struct g2d_cmdlist_node *node =
588 list_first_entry(&runqueue_node->run_cmdlist,
589 struct g2d_cmdlist_node, list);
590
591 pm_runtime_get_sync(g2d->dev);
592 clk_enable(g2d->gate_clk);
593
d7f1642c
JS		 594 writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR);
595 writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND);
596}
597
598static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d)
599{
600 struct g2d_runqueue_node *runqueue_node;
601
602 if (list_empty(&g2d->runqueue))
603 return NULL;
604
605 runqueue_node = list_first_entry(&g2d->runqueue,
606 struct g2d_runqueue_node, list);
607 list_del_init(&runqueue_node->list);
608 return runqueue_node;
609}
610
611static void g2d_free_runqueue_node(struct g2d_data *g2d,
612 struct g2d_runqueue_node *runqueue_node)
613{
d87342c1
ID		 614 struct g2d_cmdlist_node *node;
615
d7f1642c
JS		 616 if (!runqueue_node)
617 return;
618
619 mutex_lock(&g2d->cmdlist_mutex);
d87342c1
ID		 620 /*
621 * commands in run_cmdlist have been completed so unmap all gem
622 * objects in each command node so that they are unreferenced.
623 */
624 list_for_each_entry(node, &runqueue_node->run_cmdlist, list)
625 g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp);
d7f1642c
JS		 626 list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist);
627 mutex_unlock(&g2d->cmdlist_mutex);
628
629 kmem_cache_free(g2d->runqueue_slab, runqueue_node);
630}
631
632static void g2d_exec_runqueue(struct g2d_data *g2d)
633{
634 g2d->runqueue_node = g2d_get_runqueue_node(g2d);
635 if (g2d->runqueue_node)
636 g2d_dma_start(g2d, g2d->runqueue_node);
637}
638
639static void g2d_runqueue_worker(struct work_struct *work)
640{
641 struct g2d_data *g2d = container_of(work, struct g2d_data,
642 runqueue_work);
643
d7f1642c
JS		 644 mutex_lock(&g2d->runqueue_mutex);
645 clk_disable(g2d->gate_clk);
646 pm_runtime_put_sync(g2d->dev);
647
648 complete(&g2d->runqueue_node->complete);
649 if (g2d->runqueue_node->async)
650 g2d_free_runqueue_node(g2d, g2d->runqueue_node);
651
652 if (g2d->suspended)
653 g2d->runqueue_node = NULL;
654 else
655 g2d_exec_runqueue(g2d);
656 mutex_unlock(&g2d->runqueue_mutex);
657}
658
659static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no)
660{
661 struct drm_device *drm_dev = g2d->subdrv.drm_dev;
662 struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node;
663 struct drm_exynos_pending_g2d_event *e;
664 struct timeval now;
665 unsigned long flags;
666
667 if (list_empty(&runqueue_node->event_list))
668 return;
669
670 e = list_first_entry(&runqueue_node->event_list,
671 struct drm_exynos_pending_g2d_event, base.link);
672
673 do_gettimeofday(&now);
674 e->event.tv_sec = now.tv_sec;
675 e->event.tv_usec = now.tv_usec;
676 e->event.cmdlist_no = cmdlist_no;
677
678 spin_lock_irqsave(&drm_dev->event_lock, flags);
679 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
680 wake_up_interruptible(&e->base.file_priv->event_wait);
681 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
682}
683
684static irqreturn_t g2d_irq_handler(int irq, void *dev_id)
685{
686 struct g2d_data *g2d = dev_id;
687 u32 pending;
688
689 pending = readl_relaxed(g2d->regs + G2D_INTC_PEND);
690 if (pending)
691 writel_relaxed(pending, g2d->regs + G2D_INTC_PEND);
692
693 if (pending & G2D_INTP_GCMD_FIN) {
694 u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS);
695
696 cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >>
697 G2D_DMA_LIST_DONE_COUNT_OFFSET;
698
699 g2d_finish_event(g2d, cmdlist_no);
700
701 writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD);
702 if (!(pending & G2D_INTP_ACMD_FIN)) {
703 writel_relaxed(G2D_DMA_CONTINUE,
704 g2d->regs + G2D_DMA_COMMAND);
705 }
706 }
707
708 if (pending & G2D_INTP_ACMD_FIN)
709 queue_work(g2d->g2d_workq, &g2d->runqueue_work);
710
711 return IRQ_HANDLED;
712}
713
2a3098ff
ID		 714static int g2d_check_reg_offset(struct device *dev,
715 struct g2d_cmdlist_node *node,
d7f1642c
JS		 716 int nr, bool for_addr)
717{
2a3098ff 718 struct g2d_cmdlist *cmdlist = node->cmdlist;
d7f1642c
JS		 719 int reg_offset;
720 int index;
721 int i;
722
723 for (i = 0; i < nr; i++) {
724 index = cmdlist->last - 2 * (i + 1);
2a3098ff
ID		 725
726 if (for_addr) {
727 /* check userptr buffer type. */
728 reg_offset = (cmdlist->data[index] &
729 ~0x7fffffff) >> 31;
730 if (reg_offset) {
f3d2fc4a 731 node->buf_type[i] = BUF_TYPE_USERPTR;
2a3098ff
ID		 732 cmdlist->data[index] &= ~G2D_BUF_USERPTR;
733 }
734 }
735
d7f1642c
JS		 736 reg_offset = cmdlist->data[index] & ~0xfffff000;
737
738 if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END)
739 goto err;
740 if (reg_offset % 4)
741 goto err;
742
743 switch (reg_offset) {
744 case G2D_SRC_BASE_ADDR:
745 case G2D_SRC_PLANE2_BASE_ADDR:
746 case G2D_DST_BASE_ADDR:
747 case G2D_DST_PLANE2_BASE_ADDR:
748 case G2D_PAT_BASE_ADDR:
749 case G2D_MSK_BASE_ADDR:
750 if (!for_addr)
751 goto err;
2a3098ff 752
f3d2fc4a
YC		 753 if (node->buf_type[i] != BUF_TYPE_USERPTR)
754 node->buf_type[i] = BUF_TYPE_GEM;
d7f1642c
JS		 755 break;
756 default:
757 if (for_addr)
758 goto err;
759 break;
760 }
761 }
762
763 return 0;
764
765err:
2a3098ff 766 dev_err(dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]);
d7f1642c
JS		 767 return -EINVAL;
768}
769
770/* ioctl functions */
771int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data,
772 struct drm_file *file)
773{
774 struct drm_exynos_g2d_get_ver *ver = data;
775
776 ver->major = G2D_HW_MAJOR_VER;
777 ver->minor = G2D_HW_MINOR_VER;
778
779 return 0;
780}
781EXPORT_SYMBOL_GPL(exynos_g2d_get_ver_ioctl);
782
783int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
784 struct drm_file *file)
785{
786 struct drm_exynos_file_private *file_priv = file->driver_priv;
787 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
788 struct device *dev = g2d_priv->dev;
789 struct g2d_data *g2d;
790 struct drm_exynos_g2d_set_cmdlist *req = data;
791 struct drm_exynos_g2d_cmd *cmd;
792 struct drm_exynos_pending_g2d_event *e;
793 struct g2d_cmdlist_node *node;
794 struct g2d_cmdlist *cmdlist;
795 unsigned long flags;
796 int size;
797 int ret;
798
799 if (!dev)
800 return -ENODEV;
801
802 g2d = dev_get_drvdata(dev);
803 if (!g2d)
804 return -EFAULT;
805
806 node = g2d_get_cmdlist(g2d);
807 if (!node)
808 return -ENOMEM;
809
810 node->event = NULL;
811
812 if (req->event_type != G2D_EVENT_NOT) {
813 spin_lock_irqsave(&drm_dev->event_lock, flags);
814 if (file->event_space < sizeof(e->event)) {
815 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
816 ret = -ENOMEM;
817 goto err;
818 }
819 file->event_space -= sizeof(e->event);
820 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
821
822 e = kzalloc(sizeof(*node->event), GFP_KERNEL);
823 if (!e) {
824 dev_err(dev, "failed to allocate event\n");
825
826 spin_lock_irqsave(&drm_dev->event_lock, flags);
827 file->event_space += sizeof(e->event);
828 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
829
830 ret = -ENOMEM;
831 goto err;
832 }
833
834 e->event.base.type = DRM_EXYNOS_G2D_EVENT;
835 e->event.base.length = sizeof(e->event);
836 e->event.user_data = req->user_data;
837 e->base.event = &e->event.base;
838 e->base.file_priv = file;
839 e->base.destroy = (void (*) (struct drm_pending_event *)) kfree;
840
841 node->event = e;
842 }
843
844 cmdlist = node->cmdlist;
845
846 cmdlist->last = 0;
847
848 /*
849 * If don't clear SFR registers, the cmdlist is affected by register
850 * values of previous cmdlist. G2D hw executes SFR clear command and
851 * a next command at the same time then the next command is ignored and
852 * is executed rightly from next next command, so needs a dummy command
853 * to next command of SFR clear command.
854 */
855 cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET;
856 cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR;
857 cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
858 cmdlist->data[cmdlist->last++] = 0;
859
7ad01814
YC		 860 /*
861 * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
862 * and GCF bit should be set to INTEN register if user wants
863 * G2D interrupt event once current command list execution is
864 * finished.
865 * Otherwise only ACF bit should be set to INTEN register so
866 * that one interrupt is occured after all command lists
867 * have been completed.
868 */
d7f1642c 869 if (node->event) {
7ad01814
YC		 870 cmdlist->data[cmdlist->last++] = G2D_INTEN;
871 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF;
d7f1642c
JS		 872 cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
873 cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
7ad01814
YC		 874 } else {
875 cmdlist->data[cmdlist->last++] = G2D_INTEN;
876 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF;
d7f1642c
JS		 877 }
878
879 /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
2a3098ff 880 size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
d7f1642c
JS		 881 if (size > G2D_CMDLIST_DATA_NUM) {
882 dev_err(dev, "cmdlist size is too big\n");
883 ret = -EINVAL;
884 goto err_free_event;
885 }
886
887 cmd = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd;
888
889 if (copy_from_user(cmdlist->data + cmdlist->last,
890 (void __user *)cmd,
891 sizeof(*cmd) * req->cmd_nr)) {
892 ret = -EFAULT;
893 goto err_free_event;
894 }
895 cmdlist->last += req->cmd_nr * 2;
896
2a3098ff 897 ret = g2d_check_reg_offset(dev, node, req->cmd_nr, false);
d7f1642c
JS		 898 if (ret < 0)
899 goto err_free_event;
900
2a3098ff
ID		 901 node->map_nr = req->cmd_buf_nr;
902 if (req->cmd_buf_nr) {
903 struct drm_exynos_g2d_cmd *cmd_buf;
d7f1642c 904
2a3098ff 905 cmd_buf = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd_buf;
d7f1642c
JS		 906
907 if (copy_from_user(cmdlist->data + cmdlist->last,
2a3098ff
ID		 908 (void __user *)cmd_buf,
909 sizeof(*cmd_buf) * req->cmd_buf_nr)) {
d7f1642c
JS		 910 ret = -EFAULT;
911 goto err_free_event;
912 }
2a3098ff 913 cmdlist->last += req->cmd_buf_nr * 2;
d7f1642c 914
2a3098ff 915 ret = g2d_check_reg_offset(dev, node, req->cmd_buf_nr, true);
d7f1642c
JS		 916 if (ret < 0)
917 goto err_free_event;
918
d87342c1 919 ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file);
d7f1642c
JS		 920 if (ret < 0)
921 goto err_unmap;
922 }
923
924 cmdlist->data[cmdlist->last++] = G2D_BITBLT_START;
925 cmdlist->data[cmdlist->last++] = G2D_START_BITBLT;
926
927 /* head */
928 cmdlist->head = cmdlist->last / 2;
929
930 /* tail */
931 cmdlist->data[cmdlist->last] = 0;
932
933 g2d_add_cmdlist_to_inuse(g2d_priv, node);
934
935 return 0;
936
937err_unmap:
d87342c1 938 g2d_unmap_cmdlist_gem(g2d, node, file);
d7f1642c
JS		 939err_free_event:
940 if (node->event) {
941 spin_lock_irqsave(&drm_dev->event_lock, flags);
942 file->event_space += sizeof(e->event);
943 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
944 kfree(node->event);
945 }
946err:
947 g2d_put_cmdlist(g2d, node);
948 return ret;
949}
950EXPORT_SYMBOL_GPL(exynos_g2d_set_cmdlist_ioctl);
951
952int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,
953 struct drm_file *file)
954{
955 struct drm_exynos_file_private *file_priv = file->driver_priv;
956 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
957 struct device *dev = g2d_priv->dev;
958 struct g2d_data *g2d;
959 struct drm_exynos_g2d_exec *req = data;
960 struct g2d_runqueue_node *runqueue_node;
961 struct list_head *run_cmdlist;
962 struct list_head *event_list;
963
964 if (!dev)
965 return -ENODEV;
966
967 g2d = dev_get_drvdata(dev);
968 if (!g2d)
969 return -EFAULT;
970
971 runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL);
972 if (!runqueue_node) {
973 dev_err(dev, "failed to allocate memory\n");
974 return -ENOMEM;
975 }
976 run_cmdlist = &runqueue_node->run_cmdlist;
977 event_list = &runqueue_node->event_list;
978 INIT_LIST_HEAD(run_cmdlist);
979 INIT_LIST_HEAD(event_list);
980 init_completion(&runqueue_node->complete);
981 runqueue_node->async = req->async;
982
983 list_splice_init(&g2d_priv->inuse_cmdlist, run_cmdlist);
984 list_splice_init(&g2d_priv->event_list, event_list);
985
986 if (list_empty(run_cmdlist)) {
987 dev_err(dev, "there is no inuse cmdlist\n");
988 kmem_cache_free(g2d->runqueue_slab, runqueue_node);
989 return -EPERM;
990 }
991
992 mutex_lock(&g2d->runqueue_mutex);
6b6bae24 993 runqueue_node->pid = current->pid;
d87342c1 994 runqueue_node->filp = file;
d7f1642c
JS		 995 list_add_tail(&runqueue_node->list, &g2d->runqueue);
996 if (!g2d->runqueue_node)
997 g2d_exec_runqueue(g2d);
998 mutex_unlock(&g2d->runqueue_mutex);
999
1000 if (runqueue_node->async)
1001 goto out;
1002
1003 wait_for_completion(&runqueue_node->complete);
1004 g2d_free_runqueue_node(g2d, runqueue_node);
1005
1006out:
1007 return 0;
1008}
1009EXPORT_SYMBOL_GPL(exynos_g2d_exec_ioctl);
1010
d87342c1
ID		 1011static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
1012{
1013 struct g2d_data *g2d;
1014 int ret;
1015
1016 g2d = dev_get_drvdata(dev);
1017 if (!g2d)
1018 return -EFAULT;
1019
1020 /* allocate dma-aware cmdlist buffer. */
1021 ret = g2d_init_cmdlist(g2d);
1022 if (ret < 0) {
1023 dev_err(dev, "cmdlist init failed\n");
1024 return ret;
1025 }
1026
1027 if (!is_drm_iommu_supported(drm_dev))
1028 return 0;
1029
1030 ret = drm_iommu_attach_device(drm_dev, dev);
1031 if (ret < 0) {
1032 dev_err(dev, "failed to enable iommu.\n");
1033 g2d_fini_cmdlist(g2d);
1034 }
1035
1036 return ret;
1037
1038}
1039
1040static void g2d_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
1041{
1042 if (!is_drm_iommu_supported(drm_dev))
1043 return;
1044
1045 drm_iommu_detach_device(drm_dev, dev);
1046}
1047
d7f1642c
JS		 1048static int g2d_open(struct drm_device *drm_dev, struct device *dev,
1049 struct drm_file *file)
1050{
1051 struct drm_exynos_file_private *file_priv = file->driver_priv;
1052 struct exynos_drm_g2d_private *g2d_priv;
1053
1054 g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL);
1055 if (!g2d_priv) {
1056 dev_err(dev, "failed to allocate g2d private data\n");
1057 return -ENOMEM;
1058 }
1059
1060 g2d_priv->dev = dev;
1061 file_priv->g2d_priv = g2d_priv;
1062
1063 INIT_LIST_HEAD(&g2d_priv->inuse_cmdlist);
1064 INIT_LIST_HEAD(&g2d_priv->event_list);
2a3098ff 1065 INIT_LIST_HEAD(&g2d_priv->userptr_list);
d7f1642c
JS		 1066
1067 return 0;
1068}
1069
1070static void g2d_close(struct drm_device *drm_dev, struct device *dev,
1071 struct drm_file *file)
1072{
1073 struct drm_exynos_file_private *file_priv = file->driver_priv;
1074 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1075 struct g2d_data *g2d;
1076 struct g2d_cmdlist_node *node, *n;
1077
1078 if (!dev)
1079 return;
1080
1081 g2d = dev_get_drvdata(dev);
1082 if (!g2d)
1083 return;
1084
1085 mutex_lock(&g2d->cmdlist_mutex);
d87342c1
ID		 1086 list_for_each_entry_safe(node, n, &g2d_priv->inuse_cmdlist, list) {
1087 /*
1088 * unmap all gem objects not completed.
1089 *
1090 * P.S. if current process was terminated forcely then
1091 * there may be some commands in inuse_cmdlist so unmap
1092 * them.
1093 */
1094 g2d_unmap_cmdlist_gem(g2d, node, file);
d7f1642c 1095 list_move_tail(&node->list, &g2d->free_cmdlist);
d87342c1 1096 }
d7f1642c
JS		 1097 mutex_unlock(&g2d->cmdlist_mutex);
1098
2a3098ff
ID		 1099 /* release all g2d_userptr in pool. */
1100 g2d_userptr_free_all(drm_dev, g2d, file);
1101
d7f1642c
JS		 1102 kfree(file_priv->g2d_priv);
1103}
1104
56550d94 1105static int g2d_probe(struct platform_device *pdev)
d7f1642c
JS		 1106{
1107 struct device *dev = &pdev->dev;
1108 struct resource *res;
1109 struct g2d_data *g2d;
1110 struct exynos_drm_subdrv *subdrv;
1111 int ret;
1112
b7675933 1113 g2d = devm_kzalloc(&pdev->dev, sizeof(*g2d), GFP_KERNEL);
d7f1642c
JS		 1114 if (!g2d) {
1115 dev_err(dev, "failed to allocate driver data\n");
1116 return -ENOMEM;
1117 }
1118
1119 g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab",
1120 sizeof(struct g2d_runqueue_node), 0, 0, NULL);
b7675933
SK		 1121 if (!g2d->runqueue_slab)
1122 return -ENOMEM;
d7f1642c
JS		 1123
1124 g2d->dev = dev;
1125
1126 g2d->g2d_workq = create_singlethread_workqueue("g2d");
1127 if (!g2d->g2d_workq) {
1128 dev_err(dev, "failed to create workqueue\n");
1129 ret = -EINVAL;
1130 goto err_destroy_slab;
1131 }
1132
1133 INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker);
1134 INIT_LIST_HEAD(&g2d->free_cmdlist);
1135 INIT_LIST_HEAD(&g2d->runqueue);
1136
1137 mutex_init(&g2d->cmdlist_mutex);
1138 mutex_init(&g2d->runqueue_mutex);
1139
dc625537 1140 g2d->gate_clk = devm_clk_get(dev, "fimg2d");
d7f1642c
JS		 1141 if (IS_ERR(g2d->gate_clk)) {
1142 dev_err(dev, "failed to get gate clock\n");
1143 ret = PTR_ERR(g2d->gate_clk);
d87342c1 1144 goto err_destroy_workqueue;
d7f1642c
JS		 1145 }
1146
1147 pm_runtime_enable(dev);
1148
1149 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
d7f1642c 1150
d4ed6025
TR		 1151 g2d->regs = devm_ioremap_resource(&pdev->dev, res);
1152 if (IS_ERR(g2d->regs)) {
1153 ret = PTR_ERR(g2d->regs);
b7675933 1154 goto err_put_clk;
d7f1642c
JS		 1155 }
1156
1157 g2d->irq = platform_get_irq(pdev, 0);
1158 if (g2d->irq < 0) {
1159 dev_err(dev, "failed to get irq\n");
1160 ret = g2d->irq;
b7675933 1161 goto err_put_clk;
d7f1642c
JS		 1162 }
1163
b7675933
SK		 1164 ret = devm_request_irq(&pdev->dev, g2d->irq, g2d_irq_handler, 0,
1165 "drm_g2d", g2d);
d7f1642c
JS		 1166 if (ret < 0) {
1167 dev_err(dev, "irq request failed\n");
b7675933 1168 goto err_put_clk;
d7f1642c
JS		 1169 }
1170
2a3098ff
ID		 1171 g2d->max_pool = MAX_POOL;
1172
d7f1642c
JS		 1173 platform_set_drvdata(pdev, g2d);
1174
1175 subdrv = &g2d->subdrv;
1176 subdrv->dev = dev;
d87342c1
ID		 1177 subdrv->probe = g2d_subdrv_probe;
1178 subdrv->remove = g2d_subdrv_remove;
d7f1642c
JS		 1179 subdrv->open = g2d_open;
1180 subdrv->close = g2d_close;
1181
1182 ret = exynos_drm_subdrv_register(subdrv);
1183 if (ret < 0) {
1184 dev_err(dev, "failed to register drm g2d device\n");
b7675933 1185 goto err_put_clk;
d7f1642c
JS		 1186 }
1187
1188 dev_info(dev, "The exynos g2d(ver %d.%d) successfully probed\n",
1189 G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER);
1190
1191 return 0;
1192
d7f1642c
JS		 1193err_put_clk:
1194 pm_runtime_disable(dev);
d7f1642c
JS		 1195err_destroy_workqueue:
1196 destroy_workqueue(g2d->g2d_workq);
1197err_destroy_slab:
1198 kmem_cache_destroy(g2d->runqueue_slab);
d7f1642c
JS		 1199 return ret;
1200}
1201
56550d94 1202static int g2d_remove(struct platform_device *pdev)
d7f1642c
JS		 1203{
1204 struct g2d_data *g2d = platform_get_drvdata(pdev);
1205
1206 cancel_work_sync(&g2d->runqueue_work);
1207 exynos_drm_subdrv_unregister(&g2d->subdrv);
d7f1642c
JS		 1208
1209 while (g2d->runqueue_node) {
1210 g2d_free_runqueue_node(g2d, g2d->runqueue_node);
1211 g2d->runqueue_node = g2d_get_runqueue_node(g2d);
1212 }
1213
d7f1642c 1214 pm_runtime_disable(&pdev->dev);
d7f1642c
JS		 1215
1216 g2d_fini_cmdlist(g2d);
1217 destroy_workqueue(g2d->g2d_workq);
1218 kmem_cache_destroy(g2d->runqueue_slab);
d7f1642c
JS		 1219
1220 return 0;
1221}
1222
1223#ifdef CONFIG_PM_SLEEP
1224static int g2d_suspend(struct device *dev)
1225{
1226 struct g2d_data *g2d = dev_get_drvdata(dev);
1227
1228 mutex_lock(&g2d->runqueue_mutex);
1229 g2d->suspended = true;
1230 mutex_unlock(&g2d->runqueue_mutex);
1231
1232 while (g2d->runqueue_node)
1233 /* FIXME: good range? */
1234 usleep_range(500, 1000);
1235
43829731 1236 flush_work(&g2d->runqueue_work);
d7f1642c
JS		 1237
1238 return 0;
1239}
1240
1241static int g2d_resume(struct device *dev)
1242{
1243 struct g2d_data *g2d = dev_get_drvdata(dev);
1244
1245 g2d->suspended = false;
1246 g2d_exec_runqueue(g2d);
1247
1248 return 0;
1249}
1250#endif
1251
9e1355e7 1252static SIMPLE_DEV_PM_OPS(g2d_pm_ops, g2d_suspend, g2d_resume);
d7f1642c 1253
95fc6337
AK		 1254#ifdef CONFIG_OF
1255static const struct of_device_id exynos_g2d_match[] = {
1256 { .compatible = "samsung,exynos5250-g2d" },
1257 {},
1258};
1259MODULE_DEVICE_TABLE(of, exynos_g2d_match);
1260#endif
1261
d7f1642c
JS		 1262struct platform_driver g2d_driver = {
1263 .probe = g2d_probe,
56550d94 1264 .remove = g2d_remove,
d7f1642c
JS		 1265 .driver = {
1266 .name = "s5p-g2d",
1267 .owner = THIS_MODULE,
1268 .pm = &g2d_pm_ops,
95fc6337 1269 .of_match_table = of_match_ptr(exynos_g2d_match),
d7f1642c
JS		 1270 },
1271};
Linux kernel - Deliverables
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