[deliverable/linux.git] / drivers / gpu / drm / exynos / exynos_drm_plane.c

/*
 * Copyright (C) 2011 Samsung Electronics Co.Ltd
 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 */

#include <drm/drmP.h>

#include <drm/exynos_drm.h>
#include <drm/drm_plane_helper.h>
#include <drm/drm_atomic_helper.h>
#include "exynos_drm_drv.h"
#include "exynos_drm_crtc.h"
#include "exynos_drm_fb.h"
#include "exynos_drm_gem.h"
#include "exynos_drm_plane.h"

/*
 * This function is to get X or Y size shown via screen. This needs length and
 * start position of CRTC.
 *
 *      <--- length --->
 * CRTC ----------------
 *      ^ start        ^ end
 *
 * There are six cases from a to f.
 *
 *             <----- SCREEN ----->
 *             0                 last
 *   ----------|------------------|----------
 * CRTCs
 * a -------
 *        b -------
 *        c --------------------------
 *                 d --------
 *                           e -------
 *                                  f -------
 */
static int exynos_plane_get_size(int start, unsigned length, unsigned last)
{
	int end = start + length;
	int size = 0;

	if (start <= 0) {
		if (end > 0)
			size = min_t(unsigned, end, last);
	} else if (start <= last) {
		size = min_t(unsigned, last - start, length);
	}

	return size;
}

static void exynos_plane_mode_set(struct exynos_drm_plane_state *exynos_state)

{
	struct drm_plane_state *state = &exynos_state->base;
	struct drm_crtc *crtc = exynos_state->base.crtc;
	struct drm_display_mode *mode = &crtc->state->adjusted_mode;
	int crtc_x, crtc_y;
	unsigned int crtc_w, crtc_h;
	unsigned int src_x, src_y;
	unsigned int src_w, src_h;
	unsigned int actual_w;
	unsigned int actual_h;

	/*
	 * The original src/dest coordinates are stored in exynos_state->base,
	 * but we want to keep another copy internal to our driver that we can
	 * clip/modify ourselves.
	 */

	crtc_x = state->crtc_x;
	crtc_y = state->crtc_y;
	crtc_w = state->crtc_w;
	crtc_h = state->crtc_h;

	src_x = state->src_x >> 16;
	src_y = state->src_y >> 16;
	src_w = state->src_w >> 16;
	src_h = state->src_h >> 16;

	/* set ratio */
	exynos_state->h_ratio = (src_w << 16) / crtc_w;
	exynos_state->v_ratio = (src_h << 16) / crtc_h;

	/* clip to visible area */
	actual_w = exynos_plane_get_size(crtc_x, crtc_w, mode->hdisplay);
	actual_h = exynos_plane_get_size(crtc_y, crtc_h, mode->vdisplay);

	if (crtc_x < 0) {
		if (actual_w)
			src_x += ((-crtc_x) * exynos_state->h_ratio) >> 16;
		crtc_x = 0;
	}

	if (crtc_y < 0) {
		if (actual_h)
			src_y += ((-crtc_y) * exynos_state->v_ratio) >> 16;
		crtc_y = 0;
	}

	/* set drm framebuffer data. */
	exynos_state->src.x = src_x;
	exynos_state->src.y = src_y;
	exynos_state->src.w = (actual_w * exynos_state->h_ratio) >> 16;
	exynos_state->src.h = (actual_h * exynos_state->v_ratio) >> 16;

	/* set plane range to be displayed. */
	exynos_state->crtc.x = crtc_x;
	exynos_state->crtc.y = crtc_y;
	exynos_state->crtc.w = actual_w;
	exynos_state->crtc.h = actual_h;

	DRM_DEBUG_KMS("plane : offset_x/y(%d,%d), width/height(%d,%d)",
			exynos_state->crtc.x, exynos_state->crtc.y,
			exynos_state->crtc.w, exynos_state->crtc.h);
}

static void exynos_drm_plane_reset(struct drm_plane *plane)
{
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	struct exynos_drm_plane_state *exynos_state;

	if (plane->state) {
		exynos_state = to_exynos_plane_state(plane->state);
		if (exynos_state->base.fb)
			drm_framebuffer_unreference(exynos_state->base.fb);
		kfree(exynos_state);
		plane->state = NULL;
	}

	exynos_state = kzalloc(sizeof(*exynos_state), GFP_KERNEL);
	if (exynos_state) {
		exynos_state->zpos = exynos_plane->config->zpos;
		plane->state = &exynos_state->base;
		plane->state->plane = plane;
	}
}

static struct drm_plane_state *
exynos_drm_plane_duplicate_state(struct drm_plane *plane)
{
	struct exynos_drm_plane_state *exynos_state;
	struct exynos_drm_plane_state *copy;

	exynos_state = to_exynos_plane_state(plane->state);
	copy = kzalloc(sizeof(*exynos_state), GFP_KERNEL);
	if (!copy)
		return NULL;

	__drm_atomic_helper_plane_duplicate_state(plane, &copy->base);
	copy->zpos = exynos_state->zpos;
	return &copy->base;
}

static void exynos_drm_plane_destroy_state(struct drm_plane *plane,
					   struct drm_plane_state *old_state)
{
	struct exynos_drm_plane_state *old_exynos_state =
					to_exynos_plane_state(old_state);
	__drm_atomic_helper_plane_destroy_state(plane, old_state);
	kfree(old_exynos_state);
}

static int exynos_drm_plane_atomic_set_property(struct drm_plane *plane,
						struct drm_plane_state *state,
						struct drm_property *property,
						uint64_t val)
{
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	struct exynos_drm_plane_state *exynos_state =
					to_exynos_plane_state(state);
	struct exynos_drm_private *dev_priv = plane->dev->dev_private;
	const struct exynos_drm_plane_config *config = exynos_plane->config;

	if (property == dev_priv->plane_zpos_property &&
	    (config->capabilities & EXYNOS_DRM_PLANE_CAP_ZPOS))
		exynos_state->zpos = val;
	else
		return -EINVAL;

	return 0;
}

static int exynos_drm_plane_atomic_get_property(struct drm_plane *plane,
					  const struct drm_plane_state *state,
					  struct drm_property *property,
					  uint64_t *val)
{
	const struct exynos_drm_plane_state *exynos_state =
		container_of(state, const struct exynos_drm_plane_state, base);
	struct exynos_drm_private *dev_priv = plane->dev->dev_private;

	if (property == dev_priv->plane_zpos_property)
		*val = exynos_state->zpos;
	else
		return -EINVAL;

	return 0;
}

static struct drm_plane_funcs exynos_plane_funcs = {
	.update_plane	= drm_atomic_helper_update_plane,
	.disable_plane	= drm_atomic_helper_disable_plane,
	.destroy	= drm_plane_cleanup,
	.set_property	= drm_atomic_helper_plane_set_property,
	.reset		= exynos_drm_plane_reset,
	.atomic_duplicate_state = exynos_drm_plane_duplicate_state,
	.atomic_destroy_state = exynos_drm_plane_destroy_state,
	.atomic_set_property = exynos_drm_plane_atomic_set_property,
	.atomic_get_property = exynos_drm_plane_atomic_get_property,
};

static int
exynos_drm_plane_check_size(const struct exynos_drm_plane_config *config,
			    struct exynos_drm_plane_state *state)
{
	bool width_ok = false, height_ok = false;

	if (config->capabilities & EXYNOS_DRM_PLANE_CAP_SCALE)
		return 0;

	if (state->src.w == state->crtc.w)
		width_ok = true;

	if (state->src.h == state->crtc.h)
		height_ok = true;

	if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE) &&
	    state->h_ratio == (1 << 15))
		width_ok = true;

	if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE) &&
	    state->v_ratio == (1 << 15))
		height_ok = true;

	if (width_ok & height_ok)
		return 0;

	DRM_DEBUG_KMS("scaling mode is not supported");
	return -ENOTSUPP;
}

static int exynos_plane_atomic_check(struct drm_plane *plane,
				     struct drm_plane_state *state)
{
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	struct exynos_drm_plane_state *exynos_state =
						to_exynos_plane_state(state);
	int ret = 0;

	if (!state->crtc || !state->fb)
		return 0;

	/* translate state into exynos_state */
	exynos_plane_mode_set(exynos_state);

	ret = exynos_drm_plane_check_size(exynos_plane->config, exynos_state);
	return ret;
}

static void exynos_plane_atomic_update(struct drm_plane *plane,
				       struct drm_plane_state *old_state)
{
	struct drm_plane_state *state = plane->state;
	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(state->crtc);
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);

	if (!state->crtc)
		return;

	plane->crtc = state->crtc;
	exynos_plane->pending_fb = state->fb;

	if (exynos_crtc->ops->update_plane)
		exynos_crtc->ops->update_plane(exynos_crtc, exynos_plane);
}

static void exynos_plane_atomic_disable(struct drm_plane *plane,
					struct drm_plane_state *old_state)
{
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(old_state->crtc);

	if (!old_state->crtc)
		return;

	if (exynos_crtc->ops->disable_plane)
		exynos_crtc->ops->disable_plane(exynos_crtc, exynos_plane);
}

static const struct drm_plane_helper_funcs plane_helper_funcs = {
	.atomic_check = exynos_plane_atomic_check,
	.atomic_update = exynos_plane_atomic_update,
	.atomic_disable = exynos_plane_atomic_disable,
};

static void exynos_plane_attach_zpos_property(struct drm_plane *plane,
					      unsigned int zpos)
{
	struct drm_device *dev = plane->dev;
	struct exynos_drm_private *dev_priv = dev->dev_private;
	struct drm_property *prop;

	prop = dev_priv->plane_zpos_property;
	if (!prop) {
		prop = drm_property_create_range(dev, 0, "zpos",
						 0, MAX_PLANE - 1);
		if (!prop)
			return;

		dev_priv->plane_zpos_property = prop;
	}

	drm_object_attach_property(&plane->base, prop, zpos);
}

int exynos_plane_init(struct drm_device *dev,
		      struct exynos_drm_plane *exynos_plane,
		      unsigned int index, unsigned long possible_crtcs,
		      const struct exynos_drm_plane_config *config)
{
	int err;

	err = drm_universal_plane_init(dev, &exynos_plane->base,
				       possible_crtcs,
				       &exynos_plane_funcs,
				       config->pixel_formats,
				       config->num_pixel_formats,
				       config->type, NULL);
	if (err) {
		DRM_ERROR("failed to initialize plane\n");
		return err;
	}

	drm_plane_helper_add(&exynos_plane->base, &plane_helper_funcs);

	exynos_plane->index = index;
	exynos_plane->config = config;

	exynos_plane_attach_zpos_property(&exynos_plane->base, config->zpos);

	return 0;
}
Commit	Line	Data
864ee9e6 JS	1	/*
	2	* Copyright (C) 2011 Samsung Electronics Co.Ltd
	3	* Authors: Joonyoung Shim <jy0922.shim@samsung.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms of the GNU General Public License as published by the
	7	* Free Software Foundation; either version 2 of the License, or (at your
	8	* option) any later version.
	9	*
	10	*/
	11
760285e7	12	#include <drm/drmP.h>
864ee9e6	13
760285e7	14	#include <drm/exynos_drm.h>
adf5691c	15	#include <drm/drm_plane_helper.h>
4ea9526b	16	#include <drm/drm_atomic_helper.h>
864ee9e6	17	#include "exynos_drm_drv.h"
080be03d	18	#include "exynos_drm_crtc.h"
4070d212 JS	19	#include "exynos_drm_fb.h"
4070d212 JS	20	#include "exynos_drm_gem.h"
e30655d0	21	#include "exynos_drm_plane.h"
864ee9e6	22
2ab97921 JS	23	/*
	24	* This function is to get X or Y size shown via screen. This needs length and
	25	* start position of CRTC.
	26	*
	27	* <--- length --->
	28	* CRTC ----------------
	29	* ^ start ^ end
	30	*
60a705a9	31	* There are six cases from a to f.
2ab97921 JS	32	*
	33	* <----- SCREEN ----->
	34	* 0 last
	35	* ----------\|------------------\|----------
	36	* CRTCs
	37	* a -------
	38	* b -------
	39	* c --------------------------
	40	* d --------
	41	* e -------
	42	* f -------
	43	*/
	44	static int exynos_plane_get_size(int start, unsigned length, unsigned last)
	45	{
	46	int end = start + length;
	47	int size = 0;
	48
	49	if (start <= 0) {
	50	if (end > 0)
	51	size = min_t(unsigned, end, last);
	52	} else if (start <= last) {
	53	size = min_t(unsigned, last - start, length);
	54	}
	55
	56	return size;
	57	}
	58
0114f404 MS	59	static void exynos_plane_mode_set(struct exynos_drm_plane_state *exynos_state)
0114f404 MS	60
adf5691c	61	{
0114f404 MS	62	struct drm_plane_state *state = &exynos_state->base;
0114f404 MS	63	struct drm_crtc *crtc = exynos_state->base.crtc;
020e79de	64	struct drm_display_mode *mode = &crtc->state->adjusted_mode;
0114f404 MS	65	int crtc_x, crtc_y;
	66	unsigned int crtc_w, crtc_h;
	67	unsigned int src_x, src_y;
	68	unsigned int src_w, src_h;
adf5691c GP	69	unsigned int actual_w;
	70	unsigned int actual_h;
	71
0114f404 MS	72	/*
	73	* The original src/dest coordinates are stored in exynos_state->base,
	74	* but we want to keep another copy internal to our driver that we can
	75	* clip/modify ourselves.
	76	*/
	77
	78	crtc_x = state->crtc_x;
	79	crtc_y = state->crtc_y;
	80	crtc_w = state->crtc_w;
	81	crtc_h = state->crtc_h;
	82
	83	src_x = state->src_x >> 16;
	84	src_y = state->src_y >> 16;
	85	src_w = state->src_w >> 16;
	86	src_h = state->src_h >> 16;
	87
d16a11a0 MS	88	/* set ratio */
	89	exynos_state->h_ratio = (src_w << 16) / crtc_w;
	90	exynos_state->v_ratio = (src_h << 16) / crtc_h;
	91
	92	/* clip to visible area */
020e79de JS	93	actual_w = exynos_plane_get_size(crtc_x, crtc_w, mode->hdisplay);
020e79de JS	94	actual_h = exynos_plane_get_size(crtc_y, crtc_h, mode->vdisplay);
2ab97921 JS	95
	96	if (crtc_x < 0) {
	97	if (actual_w)
d16a11a0	98	src_x += ((-crtc_x) * exynos_state->h_ratio) >> 16;
2ab97921 JS	99	crtc_x = 0;
	100	}
	101
	102	if (crtc_y < 0) {
	103	if (actual_h)
d16a11a0	104	src_y += ((-crtc_y) * exynos_state->v_ratio) >> 16;
2ab97921 JS	105	crtc_y = 0;
2ab97921 JS	106	}
4070d212 JS	107
4070d212 JS	108	/* set drm framebuffer data. */
0114f404 MS	109	exynos_state->src.x = src_x;
	110	exynos_state->src.y = src_y;
	111	exynos_state->src.w = (actual_w * exynos_state->h_ratio) >> 16;
	112	exynos_state->src.h = (actual_h * exynos_state->v_ratio) >> 16;
8837deea GP	113
8837deea GP	114	/* set plane range to be displayed. */
0114f404 MS	115	exynos_state->crtc.x = crtc_x;
	116	exynos_state->crtc.y = crtc_y;
	117	exynos_state->crtc.w = actual_w;
	118	exynos_state->crtc.h = actual_h;
d88d2463	119
8837deea	120	DRM_DEBUG_KMS("plane : offset_x/y(%d,%d), width/height(%d,%d)",
0114f404 MS	121	exynos_state->crtc.x, exynos_state->crtc.y,
	122	exynos_state->crtc.w, exynos_state->crtc.h);
	123	}
	124
	125	static void exynos_drm_plane_reset(struct drm_plane *plane)
	126	{
0ea72405	127	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
0114f404 MS	128	struct exynos_drm_plane_state *exynos_state;
	129
	130	if (plane->state) {
	131	exynos_state = to_exynos_plane_state(plane->state);
	132	if (exynos_state->base.fb)
	133	drm_framebuffer_unreference(exynos_state->base.fb);
	134	kfree(exynos_state);
	135	plane->state = NULL;
	136	}
	137
	138	exynos_state = kzalloc(sizeof(*exynos_state), GFP_KERNEL);
	139	if (exynos_state) {
0ea72405	140	exynos_state->zpos = exynos_plane->config->zpos;
0114f404 MS	141	plane->state = &exynos_state->base;
	142	plane->state->plane = plane;
	143	}
	144	}
	145
	146	static struct drm_plane_state *
	147	exynos_drm_plane_duplicate_state(struct drm_plane *plane)
	148	{
	149	struct exynos_drm_plane_state *exynos_state;
	150	struct exynos_drm_plane_state *copy;
	151
	152	exynos_state = to_exynos_plane_state(plane->state);
	153	copy = kzalloc(sizeof(*exynos_state), GFP_KERNEL);
	154	if (!copy)
	155	return NULL;
4070d212	156
0114f404	157	__drm_atomic_helper_plane_duplicate_state(plane, &copy->base);
0ea72405	158	copy->zpos = exynos_state->zpos;
0114f404 MS	159	return &copy->base;
0114f404 MS	160	}
4070d212	161
0114f404 MS	162	static void exynos_drm_plane_destroy_state(struct drm_plane *plane,
	163	struct drm_plane_state *old_state)
	164	{
	165	struct exynos_drm_plane_state *old_exynos_state =
	166	to_exynos_plane_state(old_state);
	167	__drm_atomic_helper_plane_destroy_state(plane, old_state);
	168	kfree(old_exynos_state);
4070d212 JS	169	}
4070d212 JS	170
0ea72405 MS	171	static int exynos_drm_plane_atomic_set_property(struct drm_plane *plane,
	172	struct drm_plane_state *state,
	173	struct drm_property *property,
	174	uint64_t val)
	175	{
	176	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	177	struct exynos_drm_plane_state *exynos_state =
	178	to_exynos_plane_state(state);
	179	struct exynos_drm_private *dev_priv = plane->dev->dev_private;
	180	const struct exynos_drm_plane_config *config = exynos_plane->config;
	181
	182	if (property == dev_priv->plane_zpos_property &&
	183	(config->capabilities & EXYNOS_DRM_PLANE_CAP_ZPOS))
	184	exynos_state->zpos = val;
	185	else
	186	return -EINVAL;
	187
	188	return 0;
	189	}
	190
	191	static int exynos_drm_plane_atomic_get_property(struct drm_plane *plane,
	192	const struct drm_plane_state *state,
	193	struct drm_property *property,
	194	uint64_t *val)
	195	{
	196	const struct exynos_drm_plane_state *exynos_state =
	197	container_of(state, const struct exynos_drm_plane_state, base);
	198	struct exynos_drm_private *dev_priv = plane->dev->dev_private;
	199
	200	if (property == dev_priv->plane_zpos_property)
	201	*val = exynos_state->zpos;
	202	else
	203	return -EINVAL;
	204
	205	return 0;
	206	}
	207
864ee9e6	208	static struct drm_plane_funcs exynos_plane_funcs = {
910874a8 GP	209	.update_plane = drm_atomic_helper_update_plane,
910874a8 GP	210	.disable_plane = drm_atomic_helper_disable_plane,
97464d7d	211	.destroy = drm_plane_cleanup,
0ea72405	212	.set_property = drm_atomic_helper_plane_set_property,
0114f404 MS	213	.reset = exynos_drm_plane_reset,
	214	.atomic_duplicate_state = exynos_drm_plane_duplicate_state,
	215	.atomic_destroy_state = exynos_drm_plane_destroy_state,
0ea72405 MS	216	.atomic_set_property = exynos_drm_plane_atomic_set_property,
0ea72405 MS	217	.atomic_get_property = exynos_drm_plane_atomic_get_property,
864ee9e6 JS	218	};
864ee9e6 JS	219
6178d3d1 MS	220	static int
	221	exynos_drm_plane_check_size(const struct exynos_drm_plane_config *config,
	222	struct exynos_drm_plane_state *state)
	223	{
	224	bool width_ok = false, height_ok = false;
	225
	226	if (config->capabilities & EXYNOS_DRM_PLANE_CAP_SCALE)
	227	return 0;
	228
	229	if (state->src.w == state->crtc.w)
	230	width_ok = true;
	231
	232	if (state->src.h == state->crtc.h)
	233	height_ok = true;
	234
	235	if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE) &&
	236	state->h_ratio == (1 << 15))
	237	width_ok = true;
	238
	239	if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE) &&
	240	state->v_ratio == (1 << 15))
	241	height_ok = true;
	242
	243	if (width_ok & height_ok)
	244	return 0;
	245
	246	DRM_DEBUG_KMS("scaling mode is not supported");
	247	return -ENOTSUPP;
	248	}
	249
43dbdad2 GP	250	static int exynos_plane_atomic_check(struct drm_plane *plane,
	251	struct drm_plane_state *state)
	252	{
d5f5223c	253	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
0114f404 MS	254	struct exynos_drm_plane_state *exynos_state =
	255	to_exynos_plane_state(state);
	256	int ret = 0;
d5f5223c	257
0114f404	258	if (!state->crtc \|\| !state->fb)
d5f5223c GP	259	return 0;
d5f5223c GP	260
0114f404 MS	261	/* translate state into exynos_state */
0114f404 MS	262	exynos_plane_mode_set(exynos_state);
d5f5223c	263
6178d3d1	264	ret = exynos_drm_plane_check_size(exynos_plane->config, exynos_state);
0114f404	265	return ret;
43dbdad2 GP	266	}
	267
	268	static void exynos_plane_atomic_update(struct drm_plane *plane,
	269	struct drm_plane_state *old_state)
	270	{
	271	struct drm_plane_state *state = plane->state;
d5f5223c GP	272	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(state->crtc);
d5f5223c GP	273	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
43dbdad2 GP	274
	275	if (!state->crtc)
	276	return;
	277
0114f404	278	plane->crtc = state->crtc;
822f6dfd GP	279	exynos_plane->pending_fb = state->fb;
822f6dfd GP	280
9cc7610a	281	if (exynos_crtc->ops->update_plane)
1e1d1393	282	exynos_crtc->ops->update_plane(exynos_crtc, exynos_plane);
43dbdad2 GP	283	}
43dbdad2 GP	284
b744868c GP	285	static void exynos_plane_atomic_disable(struct drm_plane *plane,
	286	struct drm_plane_state *old_state)
	287	{
	288	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	289	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(old_state->crtc);
	290
	291	if (!old_state->crtc)
	292	return;
	293
9cc7610a	294	if (exynos_crtc->ops->disable_plane)
0114f404	295	exynos_crtc->ops->disable_plane(exynos_crtc, exynos_plane);
b744868c GP	296	}
b744868c GP	297
43dbdad2 GP	298	static const struct drm_plane_helper_funcs plane_helper_funcs = {
	299	.atomic_check = exynos_plane_atomic_check,
	300	.atomic_update = exynos_plane_atomic_update,
b744868c	301	.atomic_disable = exynos_plane_atomic_disable,
43dbdad2 GP	302	};
43dbdad2 GP	303
6e2a3b66 GP	304	static void exynos_plane_attach_zpos_property(struct drm_plane *plane,
6e2a3b66 GP	305	unsigned int zpos)
00ae67cf JS	306	{
	307	struct drm_device *dev = plane->dev;
	308	struct exynos_drm_private *dev_priv = dev->dev_private;
	309	struct drm_property *prop;
	310
00ae67cf JS	311	prop = dev_priv->plane_zpos_property;
00ae67cf JS	312	if (!prop) {
0ea72405 MS	313	prop = drm_property_create_range(dev, 0, "zpos",
0ea72405 MS	314	0, MAX_PLANE - 1);
00ae67cf JS	315	if (!prop)
	316	return;
	317
	318	dev_priv->plane_zpos_property = prop;
	319	}
	320
6e2a3b66	321	drm_object_attach_property(&plane->base, prop, zpos);
00ae67cf JS	322	}
00ae67cf JS	323
7ee14cdc GP	324	int exynos_plane_init(struct drm_device *dev,
7ee14cdc GP	325	struct exynos_drm_plane *exynos_plane,
40bdfb0a	326	unsigned int index, unsigned long possible_crtcs,
fd2d2fc2	327	const struct exynos_drm_plane_config *config)
864ee9e6	328	{
b5d2eb3b	329	int err;
864ee9e6	330
fd2d2fc2 MS	331	err = drm_universal_plane_init(dev, &exynos_plane->base,
	332	possible_crtcs,
	333	&exynos_plane_funcs,
	334	config->pixel_formats,
	335	config->num_pixel_formats,
870a1718	336	config->type, NULL);
b5d2eb3b JS	337	if (err) {
b5d2eb3b JS	338	DRM_ERROR("failed to initialize plane\n");
7ee14cdc	339	return err;
b5d2eb3b JS	340	}
b5d2eb3b JS	341
43dbdad2 GP	342	drm_plane_helper_add(&exynos_plane->base, &plane_helper_funcs);
43dbdad2 GP	343
40bdfb0a	344	exynos_plane->index = index;
fd2d2fc2	345	exynos_plane->config = config;
6e2a3b66	346
0ea72405	347	exynos_plane_attach_zpos_property(&exynos_plane->base, config->zpos);
864ee9e6	348
7ee14cdc	349	return 0;
864ee9e6	350	}