drm/exynos: create exynos_check_plane()
[deliverable/linux.git] / drivers / gpu / drm / exynos / exynos_drm_plane.c
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1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 */
11
760285e7 12#include <drm/drmP.h>
864ee9e6 13
760285e7 14#include <drm/exynos_drm.h>
adf5691c 15#include <drm/drm_plane_helper.h>
864ee9e6 16#include "exynos_drm_drv.h"
080be03d 17#include "exynos_drm_crtc.h"
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18#include "exynos_drm_fb.h"
19#include "exynos_drm_gem.h"
e30655d0 20#include "exynos_drm_plane.h"
864ee9e6 21
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22static const uint32_t formats[] = {
23 DRM_FORMAT_XRGB8888,
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24 DRM_FORMAT_ARGB8888,
25 DRM_FORMAT_NV12,
6b1c762d 26 DRM_FORMAT_NV12MT,
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27};
28
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29/*
30 * This function is to get X or Y size shown via screen. This needs length and
31 * start position of CRTC.
32 *
33 * <--- length --->
34 * CRTC ----------------
35 * ^ start ^ end
36 *
60a705a9 37 * There are six cases from a to f.
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38 *
39 * <----- SCREEN ----->
40 * 0 last
41 * ----------|------------------|----------
42 * CRTCs
43 * a -------
44 * b -------
45 * c --------------------------
46 * d --------
47 * e -------
48 * f -------
49 */
50static int exynos_plane_get_size(int start, unsigned length, unsigned last)
51{
52 int end = start + length;
53 int size = 0;
54
55 if (start <= 0) {
56 if (end > 0)
57 size = min_t(unsigned, end, last);
58 } else if (start <= last) {
59 size = min_t(unsigned, last - start, length);
60 }
61
62 return size;
63}
64
adf5691c 65int exynos_check_plane(struct drm_plane *plane, struct drm_framebuffer *fb)
4070d212 66{
8837deea 67 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
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68 int nr;
69 int i;
70
01ed8126 71 nr = exynos_drm_fb_get_buf_cnt(fb);
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72 for (i = 0; i < nr; i++) {
73 struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i);
74
75 if (!buffer) {
133dcdeb 76 DRM_DEBUG_KMS("buffer is null\n");
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77 return -EFAULT;
78 }
79
8837deea 80 exynos_plane->dma_addr[i] = buffer->dma_addr;
4070d212 81
ddd8e959 82 DRM_DEBUG_KMS("buffer: %d, dma_addr = 0x%lx\n",
8837deea 83 i, (unsigned long)exynos_plane->dma_addr[i]);
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84 }
85
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86 return 0;
87}
88
89void exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
90 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
91 unsigned int crtc_w, unsigned int crtc_h,
92 uint32_t src_x, uint32_t src_y,
93 uint32_t src_w, uint32_t src_h)
94{
95 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
96 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
97 unsigned int actual_w;
98 unsigned int actual_h;
99
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100 actual_w = exynos_plane_get_size(crtc_x, crtc_w, crtc->mode.hdisplay);
101 actual_h = exynos_plane_get_size(crtc_y, crtc_h, crtc->mode.vdisplay);
102
103 if (crtc_x < 0) {
104 if (actual_w)
105 src_x -= crtc_x;
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106 crtc_x = 0;
107 }
108
109 if (crtc_y < 0) {
110 if (actual_h)
111 src_y -= crtc_y;
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112 crtc_y = 0;
113 }
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114
115 /* set drm framebuffer data. */
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116 exynos_plane->fb_x = src_x;
117 exynos_plane->fb_y = src_y;
118 exynos_plane->fb_width = fb->width;
119 exynos_plane->fb_height = fb->height;
120 exynos_plane->src_width = src_w;
121 exynos_plane->src_height = src_h;
122 exynos_plane->bpp = fb->bits_per_pixel;
123 exynos_plane->pitch = fb->pitches[0];
124 exynos_plane->pixel_format = fb->pixel_format;
125
126 /* set plane range to be displayed. */
127 exynos_plane->crtc_x = crtc_x;
128 exynos_plane->crtc_y = crtc_y;
129 exynos_plane->crtc_width = actual_w;
130 exynos_plane->crtc_height = actual_h;
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131
132 /* set drm mode data. */
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133 exynos_plane->mode_width = crtc->mode.hdisplay;
134 exynos_plane->mode_height = crtc->mode.vdisplay;
135 exynos_plane->refresh = crtc->mode.vrefresh;
136 exynos_plane->scan_flag = crtc->mode.flags;
4070d212 137
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138 DRM_DEBUG_KMS("plane : offset_x/y(%d,%d), width/height(%d,%d)",
139 exynos_plane->crtc_x, exynos_plane->crtc_y,
140 exynos_plane->crtc_width, exynos_plane->crtc_height);
4070d212 141
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142 plane->crtc = crtc;
143
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144 if (exynos_crtc->ops->win_mode_set)
145 exynos_crtc->ops->win_mode_set(exynos_crtc, exynos_plane);
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146}
147
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148void exynos_plane_dpms(struct drm_plane *plane, int mode)
149{
8837deea 150 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
93bca243 151 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(plane->crtc);
cf5188ac 152
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153 if (mode == DRM_MODE_DPMS_ON) {
154 if (exynos_plane->enabled)
155 return;
156
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157 if (exynos_crtc->ops->win_enable)
158 exynos_crtc->ops->win_enable(exynos_crtc,
159 exynos_plane->zpos);
1e3b423d 160
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161 exynos_plane->enabled = true;
162 } else {
163 if (!exynos_plane->enabled)
164 return;
165
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166 if (exynos_crtc->ops->win_disable)
167 exynos_crtc->ops->win_disable(exynos_crtc,
168 exynos_plane->zpos);
1e3b423d 169
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170 exynos_plane->enabled = false;
171 }
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172}
173
0e0a649f 174int
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175exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
176 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
177 unsigned int crtc_w, unsigned int crtc_h,
178 uint32_t src_x, uint32_t src_y,
179 uint32_t src_w, uint32_t src_h)
180{
9d5310c0 181
93bca243 182 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
9d5310c0 183 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
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184 int ret;
185
adf5691c 186 ret = exynos_check_plane(plane, fb);
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187 if (ret < 0)
188 return ret;
189
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190 exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
191 crtc_w, crtc_h, src_x >> 16, src_y >> 16,
192 src_w >> 16, src_h >> 16);
193
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194 if (exynos_crtc->ops->win_commit)
195 exynos_crtc->ops->win_commit(exynos_crtc, exynos_plane->zpos);
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196
197 return 0;
198}
199
200static int exynos_disable_plane(struct drm_plane *plane)
201{
cf5188ac 202 exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF);
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203
204 return 0;
205}
206
207static void exynos_plane_destroy(struct drm_plane *plane)
208{
8837deea 209 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
864ee9e6 210
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211 exynos_disable_plane(plane);
212 drm_plane_cleanup(plane);
213 kfree(exynos_plane);
214}
215
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216static int exynos_plane_set_property(struct drm_plane *plane,
217 struct drm_property *property,
218 uint64_t val)
219{
220 struct drm_device *dev = plane->dev;
8837deea 221 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
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222 struct exynos_drm_private *dev_priv = dev->dev_private;
223
00ae67cf 224 if (property == dev_priv->plane_zpos_property) {
8837deea 225 exynos_plane->zpos = val;
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226 return 0;
227 }
228
229 return -EINVAL;
230}
231
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232static struct drm_plane_funcs exynos_plane_funcs = {
233 .update_plane = exynos_update_plane,
234 .disable_plane = exynos_disable_plane,
235 .destroy = exynos_plane_destroy,
00ae67cf 236 .set_property = exynos_plane_set_property,
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237};
238
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239static void exynos_plane_attach_zpos_property(struct drm_plane *plane)
240{
241 struct drm_device *dev = plane->dev;
242 struct exynos_drm_private *dev_priv = dev->dev_private;
243 struct drm_property *prop;
244
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245 prop = dev_priv->plane_zpos_property;
246 if (!prop) {
247 prop = drm_property_create_range(dev, 0, "zpos", 0,
248 MAX_PLANE - 1);
249 if (!prop)
250 return;
251
252 dev_priv->plane_zpos_property = prop;
253 }
254
255 drm_object_attach_property(&plane->base, prop, 0);
256}
257
b5d2eb3b 258struct drm_plane *exynos_plane_init(struct drm_device *dev,
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259 unsigned long possible_crtcs,
260 enum drm_plane_type type)
864ee9e6 261{
8837deea 262 struct exynos_drm_plane *exynos_plane;
b5d2eb3b 263 int err;
864ee9e6 264
8837deea 265 exynos_plane = kzalloc(sizeof(struct exynos_drm_plane), GFP_KERNEL);
38bb5253 266 if (!exynos_plane)
72ed6ccd 267 return ERR_PTR(-ENOMEM);
864ee9e6 268
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269 err = drm_universal_plane_init(dev, &exynos_plane->base, possible_crtcs,
270 &exynos_plane_funcs, formats,
271 ARRAY_SIZE(formats), type);
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272 if (err) {
273 DRM_ERROR("failed to initialize plane\n");
274 kfree(exynos_plane);
72ed6ccd 275 return ERR_PTR(err);
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276 }
277
72ed6ccd 278 if (type == DRM_PLANE_TYPE_PRIMARY)
8837deea 279 exynos_plane->zpos = DEFAULT_ZPOS;
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280 else
281 exynos_plane_attach_zpos_property(&exynos_plane->base);
864ee9e6 282
00ae67cf 283 return &exynos_plane->base;
864ee9e6 284}
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