Commit | Line | Data |
---|---|---|
2017263e BG |
1 | /* |
2 | * Copyright © 2008 Intel Corporation | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | |
21 | * IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: | |
24 | * Eric Anholt <eric@anholt.net> | |
25 | * Keith Packard <keithp@keithp.com> | |
26 | * | |
27 | */ | |
28 | ||
29 | #include <linux/seq_file.h> | |
f3cd474b | 30 | #include <linux/debugfs.h> |
5a0e3ad6 | 31 | #include <linux/slab.h> |
2017263e BG |
32 | #include "drmP.h" |
33 | #include "drm.h" | |
4e5359cd | 34 | #include "intel_drv.h" |
2017263e BG |
35 | #include "i915_drm.h" |
36 | #include "i915_drv.h" | |
37 | ||
38 | #define DRM_I915_RING_DEBUG 1 | |
39 | ||
40 | ||
41 | #if defined(CONFIG_DEBUG_FS) | |
42 | ||
433e12f7 BG |
43 | #define ACTIVE_LIST 1 |
44 | #define FLUSHING_LIST 2 | |
45 | #define INACTIVE_LIST 3 | |
2017263e | 46 | |
70d39fe4 CW |
47 | static const char *yesno(int v) |
48 | { | |
49 | return v ? "yes" : "no"; | |
50 | } | |
51 | ||
52 | static int i915_capabilities(struct seq_file *m, void *data) | |
53 | { | |
54 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
55 | struct drm_device *dev = node->minor->dev; | |
56 | const struct intel_device_info *info = INTEL_INFO(dev); | |
57 | ||
58 | seq_printf(m, "gen: %d\n", info->gen); | |
59 | #define B(x) seq_printf(m, #x ": %s\n", yesno(info->x)) | |
60 | B(is_mobile); | |
61 | B(is_i8xx); | |
62 | B(is_i85x); | |
63 | B(is_i915g); | |
64 | B(is_i9xx); | |
65 | B(is_i945gm); | |
66 | B(is_i965g); | |
67 | B(is_i965gm); | |
68 | B(is_g33); | |
69 | B(need_gfx_hws); | |
70 | B(is_g4x); | |
71 | B(is_pineview); | |
72 | B(is_broadwater); | |
73 | B(is_crestline); | |
74 | B(is_ironlake); | |
75 | B(has_fbc); | |
76 | B(has_rc6); | |
77 | B(has_pipe_cxsr); | |
78 | B(has_hotplug); | |
79 | B(cursor_needs_physical); | |
80 | B(has_overlay); | |
81 | B(overlay_needs_physical); | |
82 | #undef B | |
83 | ||
84 | return 0; | |
85 | } | |
86 | ||
a6172a80 CW |
87 | static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv) |
88 | { | |
89 | if (obj_priv->user_pin_count > 0) | |
90 | return "P"; | |
91 | else if (obj_priv->pin_count > 0) | |
92 | return "p"; | |
93 | else | |
94 | return " "; | |
95 | } | |
96 | ||
97 | static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv) | |
98 | { | |
99 | switch (obj_priv->tiling_mode) { | |
100 | default: | |
101 | case I915_TILING_NONE: return " "; | |
102 | case I915_TILING_X: return "X"; | |
103 | case I915_TILING_Y: return "Y"; | |
104 | } | |
105 | } | |
106 | ||
37811fcc CW |
107 | static void |
108 | describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj) | |
109 | { | |
110 | seq_printf(m, "%p: %s%s %8zd %08x %08x %d%s%s", | |
111 | &obj->base, | |
112 | get_pin_flag(obj), | |
113 | get_tiling_flag(obj), | |
114 | obj->base.size, | |
115 | obj->base.read_domains, | |
116 | obj->base.write_domain, | |
117 | obj->last_rendering_seqno, | |
118 | obj->dirty ? " dirty" : "", | |
119 | obj->madv == I915_MADV_DONTNEED ? " purgeable" : ""); | |
120 | if (obj->base.name) | |
121 | seq_printf(m, " (name: %d)", obj->base.name); | |
122 | if (obj->fence_reg != I915_FENCE_REG_NONE) | |
123 | seq_printf(m, " (fence: %d)", obj->fence_reg); | |
124 | if (obj->gtt_space != NULL) | |
125 | seq_printf(m, " (gtt_offset: %08x)", obj->gtt_offset); | |
126 | } | |
127 | ||
433e12f7 | 128 | static int i915_gem_object_list_info(struct seq_file *m, void *data) |
2017263e BG |
129 | { |
130 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
433e12f7 BG |
131 | uintptr_t list = (uintptr_t) node->info_ent->data; |
132 | struct list_head *head; | |
2017263e BG |
133 | struct drm_device *dev = node->minor->dev; |
134 | drm_i915_private_t *dev_priv = dev->dev_private; | |
135 | struct drm_i915_gem_object *obj_priv; | |
de227ef0 CW |
136 | int ret; |
137 | ||
138 | ret = mutex_lock_interruptible(&dev->struct_mutex); | |
139 | if (ret) | |
140 | return ret; | |
2017263e | 141 | |
433e12f7 BG |
142 | switch (list) { |
143 | case ACTIVE_LIST: | |
144 | seq_printf(m, "Active:\n"); | |
852835f3 | 145 | head = &dev_priv->render_ring.active_list; |
433e12f7 BG |
146 | break; |
147 | case INACTIVE_LIST: | |
a17458fc | 148 | seq_printf(m, "Inactive:\n"); |
433e12f7 BG |
149 | head = &dev_priv->mm.inactive_list; |
150 | break; | |
151 | case FLUSHING_LIST: | |
152 | seq_printf(m, "Flushing:\n"); | |
153 | head = &dev_priv->mm.flushing_list; | |
154 | break; | |
155 | default: | |
de227ef0 CW |
156 | mutex_unlock(&dev->struct_mutex); |
157 | return -EINVAL; | |
2017263e | 158 | } |
2017263e | 159 | |
de227ef0 | 160 | list_for_each_entry(obj_priv, head, list) { |
37811fcc CW |
161 | seq_printf(m, " "); |
162 | describe_obj(m, obj_priv); | |
f4ceda89 | 163 | seq_printf(m, "\n"); |
2017263e | 164 | } |
5e118f41 | 165 | |
de227ef0 | 166 | mutex_unlock(&dev->struct_mutex); |
2017263e BG |
167 | return 0; |
168 | } | |
169 | ||
4e5359cd SF |
170 | static int i915_gem_pageflip_info(struct seq_file *m, void *data) |
171 | { | |
172 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
173 | struct drm_device *dev = node->minor->dev; | |
174 | unsigned long flags; | |
175 | struct intel_crtc *crtc; | |
176 | ||
177 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) { | |
178 | const char *pipe = crtc->pipe ? "B" : "A"; | |
179 | const char *plane = crtc->plane ? "B" : "A"; | |
180 | struct intel_unpin_work *work; | |
181 | ||
182 | spin_lock_irqsave(&dev->event_lock, flags); | |
183 | work = crtc->unpin_work; | |
184 | if (work == NULL) { | |
185 | seq_printf(m, "No flip due on pipe %s (plane %s)\n", | |
186 | pipe, plane); | |
187 | } else { | |
188 | if (!work->pending) { | |
189 | seq_printf(m, "Flip queued on pipe %s (plane %s)\n", | |
190 | pipe, plane); | |
191 | } else { | |
192 | seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n", | |
193 | pipe, plane); | |
194 | } | |
195 | if (work->enable_stall_check) | |
196 | seq_printf(m, "Stall check enabled, "); | |
197 | else | |
198 | seq_printf(m, "Stall check waiting for page flip ioctl, "); | |
199 | seq_printf(m, "%d prepares\n", work->pending); | |
200 | ||
201 | if (work->old_fb_obj) { | |
202 | struct drm_i915_gem_object *obj_priv = to_intel_bo(work->old_fb_obj); | |
203 | if(obj_priv) | |
204 | seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset ); | |
205 | } | |
206 | if (work->pending_flip_obj) { | |
207 | struct drm_i915_gem_object *obj_priv = to_intel_bo(work->pending_flip_obj); | |
208 | if(obj_priv) | |
209 | seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset ); | |
210 | } | |
211 | } | |
212 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
213 | } | |
214 | ||
215 | return 0; | |
216 | } | |
217 | ||
2017263e BG |
218 | static int i915_gem_request_info(struct seq_file *m, void *data) |
219 | { | |
220 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
221 | struct drm_device *dev = node->minor->dev; | |
222 | drm_i915_private_t *dev_priv = dev->dev_private; | |
223 | struct drm_i915_gem_request *gem_request; | |
de227ef0 CW |
224 | int ret; |
225 | ||
226 | ret = mutex_lock_interruptible(&dev->struct_mutex); | |
227 | if (ret) | |
228 | return ret; | |
2017263e BG |
229 | |
230 | seq_printf(m, "Request:\n"); | |
852835f3 ZN |
231 | list_for_each_entry(gem_request, &dev_priv->render_ring.request_list, |
232 | list) { | |
2017263e BG |
233 | seq_printf(m, " %d @ %d\n", |
234 | gem_request->seqno, | |
235 | (int) (jiffies - gem_request->emitted_jiffies)); | |
236 | } | |
de227ef0 CW |
237 | mutex_unlock(&dev->struct_mutex); |
238 | ||
2017263e BG |
239 | return 0; |
240 | } | |
241 | ||
242 | static int i915_gem_seqno_info(struct seq_file *m, void *data) | |
243 | { | |
244 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
245 | struct drm_device *dev = node->minor->dev; | |
246 | drm_i915_private_t *dev_priv = dev->dev_private; | |
de227ef0 CW |
247 | int ret; |
248 | ||
249 | ret = mutex_lock_interruptible(&dev->struct_mutex); | |
250 | if (ret) | |
251 | return ret; | |
2017263e | 252 | |
e20f9c64 | 253 | if (dev_priv->render_ring.status_page.page_addr != NULL) { |
2017263e | 254 | seq_printf(m, "Current sequence: %d\n", |
852835f3 | 255 | i915_get_gem_seqno(dev, &dev_priv->render_ring)); |
2017263e BG |
256 | } else { |
257 | seq_printf(m, "Current sequence: hws uninitialized\n"); | |
258 | } | |
259 | seq_printf(m, "Waiter sequence: %d\n", | |
260 | dev_priv->mm.waiting_gem_seqno); | |
261 | seq_printf(m, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno); | |
de227ef0 CW |
262 | |
263 | mutex_unlock(&dev->struct_mutex); | |
264 | ||
2017263e BG |
265 | return 0; |
266 | } | |
267 | ||
268 | ||
269 | static int i915_interrupt_info(struct seq_file *m, void *data) | |
270 | { | |
271 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
272 | struct drm_device *dev = node->minor->dev; | |
273 | drm_i915_private_t *dev_priv = dev->dev_private; | |
de227ef0 CW |
274 | int ret; |
275 | ||
276 | ret = mutex_lock_interruptible(&dev->struct_mutex); | |
277 | if (ret) | |
278 | return ret; | |
2017263e | 279 | |
bad720ff | 280 | if (!HAS_PCH_SPLIT(dev)) { |
5f6a1695 ZW |
281 | seq_printf(m, "Interrupt enable: %08x\n", |
282 | I915_READ(IER)); | |
283 | seq_printf(m, "Interrupt identity: %08x\n", | |
284 | I915_READ(IIR)); | |
285 | seq_printf(m, "Interrupt mask: %08x\n", | |
286 | I915_READ(IMR)); | |
287 | seq_printf(m, "Pipe A stat: %08x\n", | |
288 | I915_READ(PIPEASTAT)); | |
289 | seq_printf(m, "Pipe B stat: %08x\n", | |
290 | I915_READ(PIPEBSTAT)); | |
291 | } else { | |
292 | seq_printf(m, "North Display Interrupt enable: %08x\n", | |
293 | I915_READ(DEIER)); | |
294 | seq_printf(m, "North Display Interrupt identity: %08x\n", | |
295 | I915_READ(DEIIR)); | |
296 | seq_printf(m, "North Display Interrupt mask: %08x\n", | |
297 | I915_READ(DEIMR)); | |
298 | seq_printf(m, "South Display Interrupt enable: %08x\n", | |
299 | I915_READ(SDEIER)); | |
300 | seq_printf(m, "South Display Interrupt identity: %08x\n", | |
301 | I915_READ(SDEIIR)); | |
302 | seq_printf(m, "South Display Interrupt mask: %08x\n", | |
303 | I915_READ(SDEIMR)); | |
304 | seq_printf(m, "Graphics Interrupt enable: %08x\n", | |
305 | I915_READ(GTIER)); | |
306 | seq_printf(m, "Graphics Interrupt identity: %08x\n", | |
307 | I915_READ(GTIIR)); | |
308 | seq_printf(m, "Graphics Interrupt mask: %08x\n", | |
309 | I915_READ(GTIMR)); | |
310 | } | |
2017263e BG |
311 | seq_printf(m, "Interrupts received: %d\n", |
312 | atomic_read(&dev_priv->irq_received)); | |
e20f9c64 | 313 | if (dev_priv->render_ring.status_page.page_addr != NULL) { |
2017263e | 314 | seq_printf(m, "Current sequence: %d\n", |
852835f3 | 315 | i915_get_gem_seqno(dev, &dev_priv->render_ring)); |
2017263e BG |
316 | } else { |
317 | seq_printf(m, "Current sequence: hws uninitialized\n"); | |
318 | } | |
319 | seq_printf(m, "Waiter sequence: %d\n", | |
320 | dev_priv->mm.waiting_gem_seqno); | |
321 | seq_printf(m, "IRQ sequence: %d\n", | |
322 | dev_priv->mm.irq_gem_seqno); | |
de227ef0 CW |
323 | mutex_unlock(&dev->struct_mutex); |
324 | ||
2017263e BG |
325 | return 0; |
326 | } | |
327 | ||
a6172a80 CW |
328 | static int i915_gem_fence_regs_info(struct seq_file *m, void *data) |
329 | { | |
330 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
331 | struct drm_device *dev = node->minor->dev; | |
332 | drm_i915_private_t *dev_priv = dev->dev_private; | |
de227ef0 CW |
333 | int i, ret; |
334 | ||
335 | ret = mutex_lock_interruptible(&dev->struct_mutex); | |
336 | if (ret) | |
337 | return ret; | |
a6172a80 CW |
338 | |
339 | seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start); | |
340 | seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs); | |
341 | for (i = 0; i < dev_priv->num_fence_regs; i++) { | |
342 | struct drm_gem_object *obj = dev_priv->fence_regs[i].obj; | |
343 | ||
344 | if (obj == NULL) { | |
345 | seq_printf(m, "Fenced object[%2d] = unused\n", i); | |
346 | } else { | |
347 | struct drm_i915_gem_object *obj_priv; | |
348 | ||
23010e43 | 349 | obj_priv = to_intel_bo(obj); |
a6172a80 | 350 | seq_printf(m, "Fenced object[%2d] = %p: %s " |
0b4d569d | 351 | "%08x %08zx %08x %s %08x %08x %d", |
a6172a80 CW |
352 | i, obj, get_pin_flag(obj_priv), |
353 | obj_priv->gtt_offset, | |
354 | obj->size, obj_priv->stride, | |
355 | get_tiling_flag(obj_priv), | |
356 | obj->read_domains, obj->write_domain, | |
357 | obj_priv->last_rendering_seqno); | |
358 | if (obj->name) | |
359 | seq_printf(m, " (name: %d)", obj->name); | |
360 | seq_printf(m, "\n"); | |
361 | } | |
362 | } | |
de227ef0 | 363 | mutex_unlock(&dev->struct_mutex); |
a6172a80 CW |
364 | |
365 | return 0; | |
366 | } | |
367 | ||
2017263e BG |
368 | static int i915_hws_info(struct seq_file *m, void *data) |
369 | { | |
370 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
371 | struct drm_device *dev = node->minor->dev; | |
372 | drm_i915_private_t *dev_priv = dev->dev_private; | |
373 | int i; | |
374 | volatile u32 *hws; | |
375 | ||
e20f9c64 | 376 | hws = (volatile u32 *)dev_priv->render_ring.status_page.page_addr; |
2017263e BG |
377 | if (hws == NULL) |
378 | return 0; | |
379 | ||
380 | for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) { | |
381 | seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", | |
382 | i * 4, | |
383 | hws[i], hws[i + 1], hws[i + 2], hws[i + 3]); | |
384 | } | |
385 | return 0; | |
386 | } | |
387 | ||
6911a9b8 BG |
388 | static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_count) |
389 | { | |
390 | int page, i; | |
391 | uint32_t *mem; | |
392 | ||
393 | for (page = 0; page < page_count; page++) { | |
de227ef0 | 394 | mem = kmap(pages[page]); |
6911a9b8 BG |
395 | for (i = 0; i < PAGE_SIZE; i += 4) |
396 | seq_printf(m, "%08x : %08x\n", i, mem[i / 4]); | |
de227ef0 | 397 | kunmap(pages[page]); |
6911a9b8 BG |
398 | } |
399 | } | |
400 | ||
401 | static int i915_batchbuffer_info(struct seq_file *m, void *data) | |
402 | { | |
403 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
404 | struct drm_device *dev = node->minor->dev; | |
405 | drm_i915_private_t *dev_priv = dev->dev_private; | |
406 | struct drm_gem_object *obj; | |
407 | struct drm_i915_gem_object *obj_priv; | |
408 | int ret; | |
409 | ||
de227ef0 CW |
410 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
411 | if (ret) | |
412 | return ret; | |
6911a9b8 | 413 | |
852835f3 ZN |
414 | list_for_each_entry(obj_priv, &dev_priv->render_ring.active_list, |
415 | list) { | |
a8089e84 | 416 | obj = &obj_priv->base; |
6911a9b8 | 417 | if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) { |
4bdadb97 | 418 | ret = i915_gem_object_get_pages(obj, 0); |
6911a9b8 | 419 | if (ret) { |
de227ef0 | 420 | mutex_unlock(&dev->struct_mutex); |
6911a9b8 BG |
421 | return ret; |
422 | } | |
423 | ||
424 | seq_printf(m, "--- gtt_offset = 0x%08x\n", obj_priv->gtt_offset); | |
425 | i915_dump_pages(m, obj_priv->pages, obj->size / PAGE_SIZE); | |
426 | ||
427 | i915_gem_object_put_pages(obj); | |
428 | } | |
429 | } | |
430 | ||
de227ef0 | 431 | mutex_unlock(&dev->struct_mutex); |
6911a9b8 BG |
432 | |
433 | return 0; | |
434 | } | |
435 | ||
436 | static int i915_ringbuffer_data(struct seq_file *m, void *data) | |
437 | { | |
438 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
439 | struct drm_device *dev = node->minor->dev; | |
440 | drm_i915_private_t *dev_priv = dev->dev_private; | |
de227ef0 CW |
441 | int ret; |
442 | ||
443 | ret = mutex_lock_interruptible(&dev->struct_mutex); | |
444 | if (ret) | |
445 | return ret; | |
6911a9b8 | 446 | |
8187a2b7 | 447 | if (!dev_priv->render_ring.gem_object) { |
6911a9b8 | 448 | seq_printf(m, "No ringbuffer setup\n"); |
de227ef0 CW |
449 | } else { |
450 | u8 *virt = dev_priv->render_ring.virtual_start; | |
451 | uint32_t off; | |
6911a9b8 | 452 | |
de227ef0 CW |
453 | for (off = 0; off < dev_priv->render_ring.size; off += 4) { |
454 | uint32_t *ptr = (uint32_t *)(virt + off); | |
455 | seq_printf(m, "%08x : %08x\n", off, *ptr); | |
456 | } | |
6911a9b8 | 457 | } |
de227ef0 | 458 | mutex_unlock(&dev->struct_mutex); |
6911a9b8 BG |
459 | |
460 | return 0; | |
461 | } | |
462 | ||
463 | static int i915_ringbuffer_info(struct seq_file *m, void *data) | |
464 | { | |
465 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
466 | struct drm_device *dev = node->minor->dev; | |
467 | drm_i915_private_t *dev_priv = dev->dev_private; | |
0ef82af7 | 468 | unsigned int head, tail; |
6911a9b8 BG |
469 | |
470 | head = I915_READ(PRB0_HEAD) & HEAD_ADDR; | |
471 | tail = I915_READ(PRB0_TAIL) & TAIL_ADDR; | |
6911a9b8 BG |
472 | |
473 | seq_printf(m, "RingHead : %08x\n", head); | |
474 | seq_printf(m, "RingTail : %08x\n", tail); | |
8187a2b7 | 475 | seq_printf(m, "RingSize : %08lx\n", dev_priv->render_ring.size); |
76cff81a | 476 | seq_printf(m, "Acthd : %08x\n", I915_READ(IS_I965G(dev) ? ACTHD_I965 : ACTHD)); |
6911a9b8 BG |
477 | |
478 | return 0; | |
479 | } | |
480 | ||
9df30794 CW |
481 | static const char *pin_flag(int pinned) |
482 | { | |
483 | if (pinned > 0) | |
484 | return " P"; | |
485 | else if (pinned < 0) | |
486 | return " p"; | |
487 | else | |
488 | return ""; | |
489 | } | |
490 | ||
491 | static const char *tiling_flag(int tiling) | |
492 | { | |
493 | switch (tiling) { | |
494 | default: | |
495 | case I915_TILING_NONE: return ""; | |
496 | case I915_TILING_X: return " X"; | |
497 | case I915_TILING_Y: return " Y"; | |
498 | } | |
499 | } | |
500 | ||
501 | static const char *dirty_flag(int dirty) | |
502 | { | |
503 | return dirty ? " dirty" : ""; | |
504 | } | |
505 | ||
506 | static const char *purgeable_flag(int purgeable) | |
507 | { | |
508 | return purgeable ? " purgeable" : ""; | |
509 | } | |
510 | ||
63eeaf38 JB |
511 | static int i915_error_state(struct seq_file *m, void *unused) |
512 | { | |
513 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
514 | struct drm_device *dev = node->minor->dev; | |
515 | drm_i915_private_t *dev_priv = dev->dev_private; | |
516 | struct drm_i915_error_state *error; | |
517 | unsigned long flags; | |
9df30794 | 518 | int i, page, offset, elt; |
63eeaf38 JB |
519 | |
520 | spin_lock_irqsave(&dev_priv->error_lock, flags); | |
521 | if (!dev_priv->first_error) { | |
522 | seq_printf(m, "no error state collected\n"); | |
523 | goto out; | |
524 | } | |
525 | ||
526 | error = dev_priv->first_error; | |
527 | ||
8a905236 JB |
528 | seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, |
529 | error->time.tv_usec); | |
9df30794 | 530 | seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device); |
63eeaf38 JB |
531 | seq_printf(m, "EIR: 0x%08x\n", error->eir); |
532 | seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er); | |
533 | seq_printf(m, " INSTPM: 0x%08x\n", error->instpm); | |
534 | seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir); | |
535 | seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr); | |
536 | seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone); | |
537 | seq_printf(m, " ACTHD: 0x%08x\n", error->acthd); | |
538 | if (IS_I965G(dev)) { | |
539 | seq_printf(m, " INSTPS: 0x%08x\n", error->instps); | |
540 | seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1); | |
541 | } | |
9df30794 CW |
542 | seq_printf(m, "seqno: 0x%08x\n", error->seqno); |
543 | ||
544 | if (error->active_bo_count) { | |
545 | seq_printf(m, "Buffers [%d]:\n", error->active_bo_count); | |
546 | ||
547 | for (i = 0; i < error->active_bo_count; i++) { | |
548 | seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s", | |
549 | error->active_bo[i].gtt_offset, | |
550 | error->active_bo[i].size, | |
551 | error->active_bo[i].read_domains, | |
552 | error->active_bo[i].write_domain, | |
553 | error->active_bo[i].seqno, | |
554 | pin_flag(error->active_bo[i].pinned), | |
555 | tiling_flag(error->active_bo[i].tiling), | |
556 | dirty_flag(error->active_bo[i].dirty), | |
557 | purgeable_flag(error->active_bo[i].purgeable)); | |
558 | ||
559 | if (error->active_bo[i].name) | |
560 | seq_printf(m, " (name: %d)", error->active_bo[i].name); | |
561 | if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE) | |
562 | seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg); | |
563 | ||
564 | seq_printf(m, "\n"); | |
565 | } | |
566 | } | |
567 | ||
568 | for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) { | |
569 | if (error->batchbuffer[i]) { | |
570 | struct drm_i915_error_object *obj = error->batchbuffer[i]; | |
571 | ||
572 | seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset); | |
573 | offset = 0; | |
574 | for (page = 0; page < obj->page_count; page++) { | |
575 | for (elt = 0; elt < PAGE_SIZE/4; elt++) { | |
576 | seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]); | |
577 | offset += 4; | |
578 | } | |
579 | } | |
580 | } | |
581 | } | |
582 | ||
583 | if (error->ringbuffer) { | |
584 | struct drm_i915_error_object *obj = error->ringbuffer; | |
585 | ||
586 | seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset); | |
587 | offset = 0; | |
588 | for (page = 0; page < obj->page_count; page++) { | |
589 | for (elt = 0; elt < PAGE_SIZE/4; elt++) { | |
590 | seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]); | |
591 | offset += 4; | |
592 | } | |
593 | } | |
594 | } | |
63eeaf38 | 595 | |
6ef3d427 CW |
596 | if (error->overlay) |
597 | intel_overlay_print_error_state(m, error->overlay); | |
598 | ||
63eeaf38 JB |
599 | out: |
600 | spin_unlock_irqrestore(&dev_priv->error_lock, flags); | |
601 | ||
602 | return 0; | |
603 | } | |
6911a9b8 | 604 | |
f97108d1 JB |
605 | static int i915_rstdby_delays(struct seq_file *m, void *unused) |
606 | { | |
607 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
608 | struct drm_device *dev = node->minor->dev; | |
609 | drm_i915_private_t *dev_priv = dev->dev_private; | |
610 | u16 crstanddelay = I915_READ16(CRSTANDVID); | |
611 | ||
612 | seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f)); | |
613 | ||
614 | return 0; | |
615 | } | |
616 | ||
617 | static int i915_cur_delayinfo(struct seq_file *m, void *unused) | |
618 | { | |
619 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
620 | struct drm_device *dev = node->minor->dev; | |
621 | drm_i915_private_t *dev_priv = dev->dev_private; | |
622 | u16 rgvswctl = I915_READ16(MEMSWCTL); | |
7648fa99 | 623 | u16 rgvstat = I915_READ16(MEMSTAT_ILK); |
f97108d1 | 624 | |
7648fa99 JB |
625 | seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf); |
626 | seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f); | |
627 | seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >> | |
628 | MEMSTAT_VID_SHIFT); | |
629 | seq_printf(m, "Current P-state: %d\n", | |
630 | (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT); | |
f97108d1 JB |
631 | |
632 | return 0; | |
633 | } | |
634 | ||
635 | static int i915_delayfreq_table(struct seq_file *m, void *unused) | |
636 | { | |
637 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
638 | struct drm_device *dev = node->minor->dev; | |
639 | drm_i915_private_t *dev_priv = dev->dev_private; | |
640 | u32 delayfreq; | |
641 | int i; | |
642 | ||
643 | for (i = 0; i < 16; i++) { | |
644 | delayfreq = I915_READ(PXVFREQ_BASE + i * 4); | |
7648fa99 JB |
645 | seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq, |
646 | (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT); | |
f97108d1 JB |
647 | } |
648 | ||
649 | return 0; | |
650 | } | |
651 | ||
652 | static inline int MAP_TO_MV(int map) | |
653 | { | |
654 | return 1250 - (map * 25); | |
655 | } | |
656 | ||
657 | static int i915_inttoext_table(struct seq_file *m, void *unused) | |
658 | { | |
659 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
660 | struct drm_device *dev = node->minor->dev; | |
661 | drm_i915_private_t *dev_priv = dev->dev_private; | |
662 | u32 inttoext; | |
663 | int i; | |
664 | ||
665 | for (i = 1; i <= 32; i++) { | |
666 | inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4); | |
667 | seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext); | |
668 | } | |
669 | ||
670 | return 0; | |
671 | } | |
672 | ||
673 | static int i915_drpc_info(struct seq_file *m, void *unused) | |
674 | { | |
675 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
676 | struct drm_device *dev = node->minor->dev; | |
677 | drm_i915_private_t *dev_priv = dev->dev_private; | |
678 | u32 rgvmodectl = I915_READ(MEMMODECTL); | |
7648fa99 JB |
679 | u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY); |
680 | u16 crstandvid = I915_READ16(CRSTANDVID); | |
f97108d1 JB |
681 | |
682 | seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ? | |
683 | "yes" : "no"); | |
684 | seq_printf(m, "Boost freq: %d\n", | |
685 | (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >> | |
686 | MEMMODE_BOOST_FREQ_SHIFT); | |
687 | seq_printf(m, "HW control enabled: %s\n", | |
688 | rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no"); | |
689 | seq_printf(m, "SW control enabled: %s\n", | |
690 | rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no"); | |
691 | seq_printf(m, "Gated voltage change: %s\n", | |
692 | rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no"); | |
693 | seq_printf(m, "Starting frequency: P%d\n", | |
694 | (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT); | |
7648fa99 | 695 | seq_printf(m, "Max P-state: P%d\n", |
f97108d1 | 696 | (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT); |
7648fa99 JB |
697 | seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK)); |
698 | seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f)); | |
699 | seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f)); | |
700 | seq_printf(m, "Render standby enabled: %s\n", | |
701 | (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes"); | |
f97108d1 JB |
702 | |
703 | return 0; | |
704 | } | |
705 | ||
b5e50c3f JB |
706 | static int i915_fbc_status(struct seq_file *m, void *unused) |
707 | { | |
708 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
709 | struct drm_device *dev = node->minor->dev; | |
b5e50c3f | 710 | drm_i915_private_t *dev_priv = dev->dev_private; |
b5e50c3f | 711 | |
ee5382ae | 712 | if (!I915_HAS_FBC(dev)) { |
b5e50c3f JB |
713 | seq_printf(m, "FBC unsupported on this chipset\n"); |
714 | return 0; | |
715 | } | |
716 | ||
ee5382ae | 717 | if (intel_fbc_enabled(dev)) { |
b5e50c3f JB |
718 | seq_printf(m, "FBC enabled\n"); |
719 | } else { | |
720 | seq_printf(m, "FBC disabled: "); | |
721 | switch (dev_priv->no_fbc_reason) { | |
bed4a673 CW |
722 | case FBC_NO_OUTPUT: |
723 | seq_printf(m, "no outputs"); | |
724 | break; | |
b5e50c3f JB |
725 | case FBC_STOLEN_TOO_SMALL: |
726 | seq_printf(m, "not enough stolen memory"); | |
727 | break; | |
728 | case FBC_UNSUPPORTED_MODE: | |
729 | seq_printf(m, "mode not supported"); | |
730 | break; | |
731 | case FBC_MODE_TOO_LARGE: | |
732 | seq_printf(m, "mode too large"); | |
733 | break; | |
734 | case FBC_BAD_PLANE: | |
735 | seq_printf(m, "FBC unsupported on plane"); | |
736 | break; | |
737 | case FBC_NOT_TILED: | |
738 | seq_printf(m, "scanout buffer not tiled"); | |
739 | break; | |
9c928d16 JB |
740 | case FBC_MULTIPLE_PIPES: |
741 | seq_printf(m, "multiple pipes are enabled"); | |
742 | break; | |
b5e50c3f JB |
743 | default: |
744 | seq_printf(m, "unknown reason"); | |
745 | } | |
746 | seq_printf(m, "\n"); | |
747 | } | |
748 | return 0; | |
749 | } | |
750 | ||
4a9bef37 JB |
751 | static int i915_sr_status(struct seq_file *m, void *unused) |
752 | { | |
753 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
754 | struct drm_device *dev = node->minor->dev; | |
755 | drm_i915_private_t *dev_priv = dev->dev_private; | |
756 | bool sr_enabled = false; | |
757 | ||
5ba2aaaa CW |
758 | if (IS_IRONLAKE(dev)) |
759 | sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN; | |
760 | else if (IS_I965GM(dev) || IS_I945G(dev) || IS_I945GM(dev)) | |
4a9bef37 JB |
761 | sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; |
762 | else if (IS_I915GM(dev)) | |
763 | sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN; | |
764 | else if (IS_PINEVIEW(dev)) | |
765 | sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN; | |
766 | ||
5ba2aaaa CW |
767 | seq_printf(m, "self-refresh: %s\n", |
768 | sr_enabled ? "enabled" : "disabled"); | |
4a9bef37 JB |
769 | |
770 | return 0; | |
771 | } | |
772 | ||
7648fa99 JB |
773 | static int i915_emon_status(struct seq_file *m, void *unused) |
774 | { | |
775 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
776 | struct drm_device *dev = node->minor->dev; | |
777 | drm_i915_private_t *dev_priv = dev->dev_private; | |
778 | unsigned long temp, chipset, gfx; | |
de227ef0 CW |
779 | int ret; |
780 | ||
781 | ret = mutex_lock_interruptible(&dev->struct_mutex); | |
782 | if (ret) | |
783 | return ret; | |
7648fa99 JB |
784 | |
785 | temp = i915_mch_val(dev_priv); | |
786 | chipset = i915_chipset_val(dev_priv); | |
787 | gfx = i915_gfx_val(dev_priv); | |
de227ef0 | 788 | mutex_unlock(&dev->struct_mutex); |
7648fa99 JB |
789 | |
790 | seq_printf(m, "GMCH temp: %ld\n", temp); | |
791 | seq_printf(m, "Chipset power: %ld\n", chipset); | |
792 | seq_printf(m, "GFX power: %ld\n", gfx); | |
793 | seq_printf(m, "Total power: %ld\n", chipset + gfx); | |
794 | ||
795 | return 0; | |
796 | } | |
797 | ||
798 | static int i915_gfxec(struct seq_file *m, void *unused) | |
799 | { | |
800 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
801 | struct drm_device *dev = node->minor->dev; | |
802 | drm_i915_private_t *dev_priv = dev->dev_private; | |
803 | ||
804 | seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4)); | |
805 | ||
806 | return 0; | |
807 | } | |
808 | ||
44834a67 CW |
809 | static int i915_opregion(struct seq_file *m, void *unused) |
810 | { | |
811 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
812 | struct drm_device *dev = node->minor->dev; | |
813 | drm_i915_private_t *dev_priv = dev->dev_private; | |
814 | struct intel_opregion *opregion = &dev_priv->opregion; | |
815 | int ret; | |
816 | ||
817 | ret = mutex_lock_interruptible(&dev->struct_mutex); | |
818 | if (ret) | |
819 | return ret; | |
820 | ||
821 | if (opregion->header) | |
822 | seq_write(m, opregion->header, OPREGION_SIZE); | |
823 | ||
824 | mutex_unlock(&dev->struct_mutex); | |
825 | ||
826 | return 0; | |
827 | } | |
828 | ||
37811fcc CW |
829 | static int i915_gem_framebuffer_info(struct seq_file *m, void *data) |
830 | { | |
831 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
832 | struct drm_device *dev = node->minor->dev; | |
833 | drm_i915_private_t *dev_priv = dev->dev_private; | |
834 | struct intel_fbdev *ifbdev; | |
835 | struct intel_framebuffer *fb; | |
836 | int ret; | |
837 | ||
838 | ret = mutex_lock_interruptible(&dev->mode_config.mutex); | |
839 | if (ret) | |
840 | return ret; | |
841 | ||
842 | ifbdev = dev_priv->fbdev; | |
843 | fb = to_intel_framebuffer(ifbdev->helper.fb); | |
844 | ||
845 | seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ", | |
846 | fb->base.width, | |
847 | fb->base.height, | |
848 | fb->base.depth, | |
849 | fb->base.bits_per_pixel); | |
850 | describe_obj(m, to_intel_bo(fb->obj)); | |
851 | seq_printf(m, "\n"); | |
852 | ||
853 | list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) { | |
854 | if (&fb->base == ifbdev->helper.fb) | |
855 | continue; | |
856 | ||
857 | seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ", | |
858 | fb->base.width, | |
859 | fb->base.height, | |
860 | fb->base.depth, | |
861 | fb->base.bits_per_pixel); | |
862 | describe_obj(m, to_intel_bo(fb->obj)); | |
863 | seq_printf(m, "\n"); | |
864 | } | |
865 | ||
866 | mutex_unlock(&dev->mode_config.mutex); | |
867 | ||
868 | return 0; | |
869 | } | |
870 | ||
f3cd474b CW |
871 | static int |
872 | i915_wedged_open(struct inode *inode, | |
873 | struct file *filp) | |
874 | { | |
875 | filp->private_data = inode->i_private; | |
876 | return 0; | |
877 | } | |
878 | ||
879 | static ssize_t | |
880 | i915_wedged_read(struct file *filp, | |
881 | char __user *ubuf, | |
882 | size_t max, | |
883 | loff_t *ppos) | |
884 | { | |
885 | struct drm_device *dev = filp->private_data; | |
886 | drm_i915_private_t *dev_priv = dev->dev_private; | |
887 | char buf[80]; | |
888 | int len; | |
889 | ||
890 | len = snprintf(buf, sizeof (buf), | |
891 | "wedged : %d\n", | |
892 | atomic_read(&dev_priv->mm.wedged)); | |
893 | ||
f4433a8d DC |
894 | if (len > sizeof (buf)) |
895 | len = sizeof (buf); | |
896 | ||
f3cd474b CW |
897 | return simple_read_from_buffer(ubuf, max, ppos, buf, len); |
898 | } | |
899 | ||
900 | static ssize_t | |
901 | i915_wedged_write(struct file *filp, | |
902 | const char __user *ubuf, | |
903 | size_t cnt, | |
904 | loff_t *ppos) | |
905 | { | |
906 | struct drm_device *dev = filp->private_data; | |
907 | drm_i915_private_t *dev_priv = dev->dev_private; | |
908 | char buf[20]; | |
909 | int val = 1; | |
910 | ||
911 | if (cnt > 0) { | |
912 | if (cnt > sizeof (buf) - 1) | |
913 | return -EINVAL; | |
914 | ||
915 | if (copy_from_user(buf, ubuf, cnt)) | |
916 | return -EFAULT; | |
917 | buf[cnt] = 0; | |
918 | ||
919 | val = simple_strtoul(buf, NULL, 0); | |
920 | } | |
921 | ||
922 | DRM_INFO("Manually setting wedged to %d\n", val); | |
923 | ||
924 | atomic_set(&dev_priv->mm.wedged, val); | |
925 | if (val) { | |
926 | DRM_WAKEUP(&dev_priv->irq_queue); | |
927 | queue_work(dev_priv->wq, &dev_priv->error_work); | |
928 | } | |
929 | ||
930 | return cnt; | |
931 | } | |
932 | ||
933 | static const struct file_operations i915_wedged_fops = { | |
934 | .owner = THIS_MODULE, | |
935 | .open = i915_wedged_open, | |
936 | .read = i915_wedged_read, | |
937 | .write = i915_wedged_write, | |
938 | }; | |
939 | ||
940 | /* As the drm_debugfs_init() routines are called before dev->dev_private is | |
941 | * allocated we need to hook into the minor for release. */ | |
942 | static int | |
943 | drm_add_fake_info_node(struct drm_minor *minor, | |
944 | struct dentry *ent, | |
945 | const void *key) | |
946 | { | |
947 | struct drm_info_node *node; | |
948 | ||
949 | node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL); | |
950 | if (node == NULL) { | |
951 | debugfs_remove(ent); | |
952 | return -ENOMEM; | |
953 | } | |
954 | ||
955 | node->minor = minor; | |
956 | node->dent = ent; | |
957 | node->info_ent = (void *) key; | |
958 | list_add(&node->list, &minor->debugfs_nodes.list); | |
959 | ||
960 | return 0; | |
961 | } | |
962 | ||
963 | static int i915_wedged_create(struct dentry *root, struct drm_minor *minor) | |
964 | { | |
965 | struct drm_device *dev = minor->dev; | |
966 | struct dentry *ent; | |
967 | ||
968 | ent = debugfs_create_file("i915_wedged", | |
969 | S_IRUGO | S_IWUSR, | |
970 | root, dev, | |
971 | &i915_wedged_fops); | |
972 | if (IS_ERR(ent)) | |
973 | return PTR_ERR(ent); | |
974 | ||
975 | return drm_add_fake_info_node(minor, ent, &i915_wedged_fops); | |
976 | } | |
9e3a6d15 | 977 | |
27c202ad | 978 | static struct drm_info_list i915_debugfs_list[] = { |
70d39fe4 | 979 | {"i915_capabilities", i915_capabilities, 0, 0}, |
433e12f7 BG |
980 | {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST}, |
981 | {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST}, | |
982 | {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST}, | |
4e5359cd | 983 | {"i915_gem_pageflip", i915_gem_pageflip_info, 0}, |
2017263e BG |
984 | {"i915_gem_request", i915_gem_request_info, 0}, |
985 | {"i915_gem_seqno", i915_gem_seqno_info, 0}, | |
a6172a80 | 986 | {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0}, |
2017263e BG |
987 | {"i915_gem_interrupt", i915_interrupt_info, 0}, |
988 | {"i915_gem_hws", i915_hws_info, 0}, | |
6911a9b8 BG |
989 | {"i915_ringbuffer_data", i915_ringbuffer_data, 0}, |
990 | {"i915_ringbuffer_info", i915_ringbuffer_info, 0}, | |
991 | {"i915_batchbuffers", i915_batchbuffer_info, 0}, | |
63eeaf38 | 992 | {"i915_error_state", i915_error_state, 0}, |
f97108d1 JB |
993 | {"i915_rstdby_delays", i915_rstdby_delays, 0}, |
994 | {"i915_cur_delayinfo", i915_cur_delayinfo, 0}, | |
995 | {"i915_delayfreq_table", i915_delayfreq_table, 0}, | |
996 | {"i915_inttoext_table", i915_inttoext_table, 0}, | |
997 | {"i915_drpc_info", i915_drpc_info, 0}, | |
7648fa99 JB |
998 | {"i915_emon_status", i915_emon_status, 0}, |
999 | {"i915_gfxec", i915_gfxec, 0}, | |
b5e50c3f | 1000 | {"i915_fbc_status", i915_fbc_status, 0}, |
4a9bef37 | 1001 | {"i915_sr_status", i915_sr_status, 0}, |
44834a67 | 1002 | {"i915_opregion", i915_opregion, 0}, |
37811fcc | 1003 | {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, |
2017263e | 1004 | }; |
27c202ad | 1005 | #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list) |
2017263e | 1006 | |
27c202ad | 1007 | int i915_debugfs_init(struct drm_minor *minor) |
2017263e | 1008 | { |
f3cd474b CW |
1009 | int ret; |
1010 | ||
1011 | ret = i915_wedged_create(minor->debugfs_root, minor); | |
1012 | if (ret) | |
1013 | return ret; | |
1014 | ||
27c202ad BG |
1015 | return drm_debugfs_create_files(i915_debugfs_list, |
1016 | I915_DEBUGFS_ENTRIES, | |
2017263e BG |
1017 | minor->debugfs_root, minor); |
1018 | } | |
1019 | ||
27c202ad | 1020 | void i915_debugfs_cleanup(struct drm_minor *minor) |
2017263e | 1021 | { |
27c202ad BG |
1022 | drm_debugfs_remove_files(i915_debugfs_list, |
1023 | I915_DEBUGFS_ENTRIES, minor); | |
33db679b KH |
1024 | drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops, |
1025 | 1, minor); | |
2017263e BG |
1026 | } |
1027 | ||
1028 | #endif /* CONFIG_DEBUG_FS */ |