drm/i915: Extend DSL readout fix to BDW and SKL.
[deliverable/linux.git] / drivers / gpu / drm / i915 / i915_params.c
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1/*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25#include "i915_drv.h"
26
27struct i915_params i915 __read_mostly = {
28 .modeset = -1,
29 .panel_ignore_lid = 1,
d330a953 30 .semaphores = -1,
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31 .lvds_channel_mode = 0,
32 .panel_use_ssc = -1,
33 .vbt_sdvo_panel_type = -1,
34 .enable_rc6 = -1,
35 .enable_fbc = -1,
27401d12 36 .enable_execlists = -1,
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37 .enable_hangcheck = true,
38 .enable_ppgtt = -1,
27d438c5 39 .enable_psr = 0,
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40 .preliminary_hw_support = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT),
41 .disable_power_well = 1,
42 .enable_ips = 1,
d330a953 43 .prefault_disable = 0,
5bedeb2d 44 .load_detect_test = 0,
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45 .reset = true,
46 .invert_brightness = 0,
a0bae57f 47 .disable_display = 0,
5c411bb1 48 .enable_cmd_parser = 1,
7a10dfa6 49 .disable_vtd_wa = 0,
84c33a64 50 .use_mmio_flip = 0,
5978118c 51 .mmio_debug = 0,
e2c719b7 52 .verbose_state_checks = 1,
c5b852f3 53 .nuclear_pageflip = 0,
9e458034 54 .edp_vswing = 0,
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55 .enable_guc_submission = false,
56 .guc_log_level = -1,
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57};
58
59module_param_named(modeset, i915.modeset, int, 0400);
60MODULE_PARM_DESC(modeset,
bf13af56 61 "Use kernel modesetting [KMS] (0=disable, "
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62 "1=on, -1=force vga console preference [default])");
63
25e1793f 64module_param_named_unsafe(panel_ignore_lid, i915.panel_ignore_lid, int, 0600);
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65MODULE_PARM_DESC(panel_ignore_lid,
66 "Override lid status (0=autodetect, 1=autodetect disabled [default], "
67 "-1=force lid closed, -2=force lid open)");
68
fc9740ce 69module_param_named_unsafe(semaphores, i915.semaphores, int, 0400);
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70MODULE_PARM_DESC(semaphores,
71 "Use semaphores for inter-ring sync "
72 "(default: -1 (use per-chip defaults))");
73
fc9740ce 74module_param_named_unsafe(enable_rc6, i915.enable_rc6, int, 0400);
3adee7a7 75MODULE_PARM_DESC(enable_rc6,
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76 "Enable power-saving render C-state 6. "
77 "Different stages can be selected via bitmask values "
78 "(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). "
79 "For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. "
80 "default: -1 (use per-chip default)");
81
fc9740ce 82module_param_named_unsafe(enable_fbc, i915.enable_fbc, int, 0600);
3adee7a7 83MODULE_PARM_DESC(enable_fbc,
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84 "Enable frame buffer compression for power savings "
85 "(default: -1 (use per-chip default))");
86
25e1793f 87module_param_named_unsafe(lvds_channel_mode, i915.lvds_channel_mode, int, 0600);
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88MODULE_PARM_DESC(lvds_channel_mode,
89 "Specify LVDS channel mode "
90 "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
91
25e1793f 92module_param_named_unsafe(lvds_use_ssc, i915.panel_use_ssc, int, 0600);
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93MODULE_PARM_DESC(lvds_use_ssc,
94 "Use Spread Spectrum Clock with panels [LVDS/eDP] "
95 "(default: auto from VBT)");
96
25e1793f 97module_param_named_unsafe(vbt_sdvo_panel_type, i915.vbt_sdvo_panel_type, int, 0600);
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98MODULE_PARM_DESC(vbt_sdvo_panel_type,
99 "Override/Ignore selection of SDVO panel mode in the VBT "
100 "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
101
b1330fbb 102module_param_named_unsafe(reset, i915.reset, bool, 0600);
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103MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)");
104
25e1793f 105module_param_named_unsafe(enable_hangcheck, i915.enable_hangcheck, bool, 0644);
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106MODULE_PARM_DESC(enable_hangcheck,
107 "Periodically check GPU activity for detecting hangs. "
108 "WARNING: Disabling this can cause system wide hangs. "
109 "(default: true)");
110
fc9740ce 111module_param_named_unsafe(enable_ppgtt, i915.enable_ppgtt, int, 0400);
3adee7a7 112MODULE_PARM_DESC(enable_ppgtt,
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113 "Override PPGTT usage. "
114 "(-1=auto [default], 0=disabled, 1=aliasing, 2=full)");
115
25e1793f 116module_param_named_unsafe(enable_execlists, i915.enable_execlists, int, 0400);
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117MODULE_PARM_DESC(enable_execlists,
118 "Override execlists usage. "
27401d12 119 "(-1=auto [default], 0=disabled, 1=enabled)");
127f1003 120
25e1793f 121module_param_named_unsafe(enable_psr, i915.enable_psr, int, 0600);
27d438c5 122MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)");
d330a953 123
25e1793f 124module_param_named_unsafe(preliminary_hw_support, i915.preliminary_hw_support, int, 0600);
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125MODULE_PARM_DESC(preliminary_hw_support,
126 "Enable preliminary hardware support.");
127
25e1793f 128module_param_named_unsafe(disable_power_well, i915.disable_power_well, int, 0600);
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129MODULE_PARM_DESC(disable_power_well,
130 "Disable the power well when possible (default: true)");
131
25e1793f 132module_param_named_unsafe(enable_ips, i915.enable_ips, int, 0600);
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133MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)");
134
5bedeb2d 135module_param_named_unsafe(prefault_disable, i915.prefault_disable, bool, 0600);
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136MODULE_PARM_DESC(prefault_disable,
137 "Disable page prefaulting for pread/pwrite/reloc (default:false). "
138 "For developers only.");
139
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140module_param_named_unsafe(load_detect_test, i915.load_detect_test, bool, 0600);
141MODULE_PARM_DESC(load_detect_test,
142 "Force-enable the VGA load detect code for testing (default:false). "
143 "For developers only.");
144
25e1793f 145module_param_named_unsafe(invert_brightness, i915.invert_brightness, int, 0600);
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146MODULE_PARM_DESC(invert_brightness,
147 "Invert backlight brightness "
148 "(-1 force normal, 0 machine defaults, 1 force inversion), please "
149 "report PCI device ID, subsystem vendor and subsystem device ID "
150 "to dri-devel@lists.freedesktop.org, if your machine needs it. "
151 "It will then be included in an upcoming module version.");
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152
153module_param_named(disable_display, i915.disable_display, bool, 0600);
154MODULE_PARM_DESC(disable_display, "Disable display (default: false)");
351e3db2 155
25e1793f 156module_param_named_unsafe(disable_vtd_wa, i915.disable_vtd_wa, bool, 0600);
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157MODULE_PARM_DESC(disable_vtd_wa, "Disable all VT-d workarounds (default: false)");
158
25e1793f 159module_param_named_unsafe(enable_cmd_parser, i915.enable_cmd_parser, int, 0600);
351e3db2 160MODULE_PARM_DESC(enable_cmd_parser,
5c411bb1 161 "Enable command parsing (1=enabled [default], 0=disabled)");
84c33a64 162
25e1793f 163module_param_named_unsafe(use_mmio_flip, i915.use_mmio_flip, int, 0600);
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164MODULE_PARM_DESC(use_mmio_flip,
165 "use MMIO flips (-1=never, 0=driver discretion [default], 1=always)");
5978118c 166
48572edd 167module_param_named(mmio_debug, i915.mmio_debug, int, 0600);
5978118c 168MODULE_PARM_DESC(mmio_debug,
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169 "Enable the MMIO debug code for the first N failures (default: off). "
170 "This may negatively affect performance.");
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171
172module_param_named(verbose_state_checks, i915.verbose_state_checks, bool, 0600);
173MODULE_PARM_DESC(verbose_state_checks,
174 "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
b2e7723b 175
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176module_param_named_unsafe(nuclear_pageflip, i915.nuclear_pageflip, bool, 0600);
177MODULE_PARM_DESC(nuclear_pageflip,
178 "Force atomic modeset functionality; asynchronous mode is not yet supported. (default: false).");
179
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180/* WA to get away with the default setting in VBT for early platforms.Will be removed */
181module_param_named_unsafe(edp_vswing, i915.edp_vswing, int, 0400);
182MODULE_PARM_DESC(edp_vswing,
183 "Ignore/Override vswing pre-emph table selection from VBT "
184 "(0=use value from vbt [default], 1=low power swing(200mV),"
185 "2=default swing(400mV))");
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186
187module_param_named_unsafe(enable_guc_submission, i915.enable_guc_submission, bool, 0400);
188MODULE_PARM_DESC(enable_guc_submission, "Enable GuC submission (default:false)");
189
190module_param_named(guc_log_level, i915.guc_log_level, int, 0400);
191MODULE_PARM_DESC(guc_log_level,
192 "GuC firmware logging level (-1:disabled (default), 0-3:enabled)");
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