Commit | Line | Data |
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79e53945 | 1 | /* |
39507259 | 2 | * Copyright © 2006 Intel Corporation |
79e53945 JB |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
21 | * SOFTWARE. | |
22 | * | |
23 | * Authors: | |
24 | * Eric Anholt <eric@anholt.net> | |
25 | * | |
26 | */ | |
25e341cf | 27 | #include <linux/dmi.h> |
9f0e7ff4 | 28 | #include <drm/drm_dp_helper.h> |
760285e7 DH |
29 | #include <drm/drmP.h> |
30 | #include <drm/i915_drm.h> | |
79e53945 JB |
31 | #include "i915_drv.h" |
32 | #include "intel_bios.h" | |
33 | ||
9b9d172d | 34 | #define SLAVE_ADDR1 0x70 |
35 | #define SLAVE_ADDR2 0x72 | |
79e53945 | 36 | |
500a8cc4 ZW |
37 | static int panel_type; |
38 | ||
79e53945 JB |
39 | static void * |
40 | find_section(struct bdb_header *bdb, int section_id) | |
41 | { | |
42 | u8 *base = (u8 *)bdb; | |
43 | int index = 0; | |
44 | u16 total, current_size; | |
45 | u8 current_id; | |
46 | ||
47 | /* skip to first section */ | |
48 | index += bdb->header_size; | |
49 | total = bdb->bdb_size; | |
50 | ||
51 | /* walk the sections looking for section_id */ | |
52 | while (index < total) { | |
53 | current_id = *(base + index); | |
54 | index++; | |
55 | current_size = *((u16 *)(base + index)); | |
56 | index += 2; | |
57 | if (current_id == section_id) | |
58 | return base + index; | |
59 | index += current_size; | |
60 | } | |
61 | ||
62 | return NULL; | |
63 | } | |
64 | ||
db545019 DMEA |
65 | static u16 |
66 | get_blocksize(void *p) | |
67 | { | |
68 | u16 *block_ptr, block_size; | |
69 | ||
70 | block_ptr = (u16 *)((char *)p - 2); | |
71 | block_size = *block_ptr; | |
72 | return block_size; | |
73 | } | |
74 | ||
79e53945 | 75 | static void |
88631706 | 76 | fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, |
99834ea4 | 77 | const struct lvds_dvo_timing *dvo_timing) |
88631706 ML |
78 | { |
79 | panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | | |
80 | dvo_timing->hactive_lo; | |
81 | panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + | |
82 | ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); | |
83 | panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + | |
84 | dvo_timing->hsync_pulse_width; | |
85 | panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + | |
86 | ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); | |
87 | ||
88 | panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | | |
89 | dvo_timing->vactive_lo; | |
90 | panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + | |
91 | dvo_timing->vsync_off; | |
92 | panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + | |
93 | dvo_timing->vsync_pulse_width; | |
94 | panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + | |
95 | ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); | |
96 | panel_fixed_mode->clock = dvo_timing->clock * 10; | |
97 | panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; | |
98 | ||
9bc35499 AJ |
99 | if (dvo_timing->hsync_positive) |
100 | panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; | |
101 | else | |
102 | panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; | |
103 | ||
104 | if (dvo_timing->vsync_positive) | |
105 | panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; | |
106 | else | |
107 | panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; | |
108 | ||
88631706 ML |
109 | /* Some VBTs have bogus h/vtotal values */ |
110 | if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) | |
111 | panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; | |
112 | if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) | |
113 | panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; | |
114 | ||
115 | drm_mode_set_name(panel_fixed_mode); | |
116 | } | |
117 | ||
99834ea4 CW |
118 | static bool |
119 | lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a, | |
120 | const struct lvds_dvo_timing *b) | |
121 | { | |
122 | if (a->hactive_hi != b->hactive_hi || | |
123 | a->hactive_lo != b->hactive_lo) | |
124 | return false; | |
125 | ||
126 | if (a->hsync_off_hi != b->hsync_off_hi || | |
127 | a->hsync_off_lo != b->hsync_off_lo) | |
128 | return false; | |
129 | ||
130 | if (a->hsync_pulse_width != b->hsync_pulse_width) | |
131 | return false; | |
132 | ||
133 | if (a->hblank_hi != b->hblank_hi || | |
134 | a->hblank_lo != b->hblank_lo) | |
135 | return false; | |
136 | ||
137 | if (a->vactive_hi != b->vactive_hi || | |
138 | a->vactive_lo != b->vactive_lo) | |
139 | return false; | |
140 | ||
141 | if (a->vsync_off != b->vsync_off) | |
142 | return false; | |
143 | ||
144 | if (a->vsync_pulse_width != b->vsync_pulse_width) | |
145 | return false; | |
146 | ||
147 | if (a->vblank_hi != b->vblank_hi || | |
148 | a->vblank_lo != b->vblank_lo) | |
149 | return false; | |
150 | ||
151 | return true; | |
152 | } | |
153 | ||
154 | static const struct lvds_dvo_timing * | |
155 | get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, | |
156 | const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, | |
157 | int index) | |
158 | { | |
159 | /* | |
160 | * the size of fp_timing varies on the different platform. | |
161 | * So calculate the DVO timing relative offset in LVDS data | |
162 | * entry to get the DVO timing entry | |
163 | */ | |
164 | ||
165 | int lfp_data_size = | |
166 | lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - | |
167 | lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; | |
168 | int dvo_timing_offset = | |
169 | lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - | |
170 | lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; | |
171 | char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; | |
172 | ||
173 | return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); | |
174 | } | |
175 | ||
b0354385 TI |
176 | /* get lvds_fp_timing entry |
177 | * this function may return NULL if the corresponding entry is invalid | |
178 | */ | |
179 | static const struct lvds_fp_timing * | |
180 | get_lvds_fp_timing(const struct bdb_header *bdb, | |
181 | const struct bdb_lvds_lfp_data *data, | |
182 | const struct bdb_lvds_lfp_data_ptrs *ptrs, | |
183 | int index) | |
184 | { | |
185 | size_t data_ofs = (const u8 *)data - (const u8 *)bdb; | |
186 | u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ | |
187 | size_t ofs; | |
188 | ||
189 | if (index >= ARRAY_SIZE(ptrs->ptr)) | |
190 | return NULL; | |
191 | ofs = ptrs->ptr[index].fp_timing_offset; | |
192 | if (ofs < data_ofs || | |
193 | ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) | |
194 | return NULL; | |
195 | return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); | |
196 | } | |
197 | ||
88631706 ML |
198 | /* Try to find integrated panel data */ |
199 | static void | |
200 | parse_lfp_panel_data(struct drm_i915_private *dev_priv, | |
201 | struct bdb_header *bdb) | |
79e53945 | 202 | { |
99834ea4 CW |
203 | const struct bdb_lvds_options *lvds_options; |
204 | const struct bdb_lvds_lfp_data *lvds_lfp_data; | |
205 | const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; | |
206 | const struct lvds_dvo_timing *panel_dvo_timing; | |
b0354385 | 207 | const struct lvds_fp_timing *fp_timing; |
79e53945 | 208 | struct drm_display_mode *panel_fixed_mode; |
83a7280e | 209 | int i, downclock, drrs_mode; |
79e53945 | 210 | |
79e53945 JB |
211 | lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); |
212 | if (!lvds_options) | |
213 | return; | |
214 | ||
41aa3448 | 215 | dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; |
79e53945 JB |
216 | if (lvds_options->panel_type == 0xff) |
217 | return; | |
6a04002b | 218 | |
500a8cc4 | 219 | panel_type = lvds_options->panel_type; |
79e53945 | 220 | |
83a7280e PB |
221 | drrs_mode = (lvds_options->dps_panel_type_bits |
222 | >> (panel_type * 2)) & MODE_MASK; | |
223 | /* | |
224 | * VBT has static DRRS = 0 and seamless DRRS = 2. | |
225 | * The below piece of code is required to adjust vbt.drrs_type | |
226 | * to match the enum drrs_support_type. | |
227 | */ | |
228 | switch (drrs_mode) { | |
229 | case 0: | |
230 | dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT; | |
231 | DRM_DEBUG_KMS("DRRS supported mode is static\n"); | |
232 | break; | |
233 | case 2: | |
234 | dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; | |
235 | DRM_DEBUG_KMS("DRRS supported mode is seamless\n"); | |
236 | break; | |
237 | default: | |
238 | dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; | |
239 | DRM_DEBUG_KMS("DRRS not supported (VBT input)\n"); | |
240 | break; | |
241 | } | |
242 | ||
79e53945 JB |
243 | lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); |
244 | if (!lvds_lfp_data) | |
245 | return; | |
246 | ||
1b16de0b JB |
247 | lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); |
248 | if (!lvds_lfp_data_ptrs) | |
249 | return; | |
250 | ||
41aa3448 | 251 | dev_priv->vbt.lvds_vbt = 1; |
79e53945 | 252 | |
99834ea4 CW |
253 | panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, |
254 | lvds_lfp_data_ptrs, | |
255 | lvds_options->panel_type); | |
79e53945 | 256 | |
9a298b2a | 257 | panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); |
6edc3242 CW |
258 | if (!panel_fixed_mode) |
259 | return; | |
79e53945 | 260 | |
99834ea4 | 261 | fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); |
79e53945 | 262 | |
41aa3448 | 263 | dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; |
79e53945 | 264 | |
28c97730 | 265 | DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n"); |
88631706 | 266 | drm_mode_debug_printmodeline(panel_fixed_mode); |
37df9673 | 267 | |
d1fcea6a | 268 | /* |
99834ea4 CW |
269 | * Iterate over the LVDS panel timing info to find the lowest clock |
270 | * for the native resolution. | |
d1fcea6a | 271 | */ |
99834ea4 | 272 | downclock = panel_dvo_timing->clock; |
d1fcea6a | 273 | for (i = 0; i < 16; i++) { |
99834ea4 CW |
274 | const struct lvds_dvo_timing *dvo_timing; |
275 | ||
276 | dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, | |
277 | lvds_lfp_data_ptrs, | |
278 | i); | |
279 | if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) && | |
280 | dvo_timing->clock < downclock) | |
281 | downclock = dvo_timing->clock; | |
d1fcea6a | 282 | } |
99834ea4 | 283 | |
d330a953 | 284 | if (downclock < panel_dvo_timing->clock && i915.lvds_downclock) { |
d1fcea6a | 285 | dev_priv->lvds_downclock_avail = 1; |
99834ea4 | 286 | dev_priv->lvds_downclock = downclock * 10; |
bbb0aef5 JP |
287 | DRM_DEBUG_KMS("LVDS downclock is found in VBT. " |
288 | "Normal Clock %dKHz, downclock %dKHz\n", | |
99834ea4 | 289 | panel_fixed_mode->clock, 10*downclock); |
d1fcea6a | 290 | } |
b0354385 TI |
291 | |
292 | fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, | |
293 | lvds_lfp_data_ptrs, | |
294 | lvds_options->panel_type); | |
295 | if (fp_timing) { | |
296 | /* check the resolution, just to be sure */ | |
297 | if (fp_timing->x_res == panel_fixed_mode->hdisplay && | |
298 | fp_timing->y_res == panel_fixed_mode->vdisplay) { | |
41aa3448 | 299 | dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; |
b0354385 | 300 | DRM_DEBUG_KMS("VBT initial LVDS value %x\n", |
41aa3448 | 301 | dev_priv->vbt.bios_lvds_val); |
b0354385 TI |
302 | } |
303 | } | |
88631706 ML |
304 | } |
305 | ||
f00076d2 JN |
306 | static void |
307 | parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb) | |
308 | { | |
309 | const struct bdb_lfp_backlight_data *backlight_data; | |
310 | const struct bdb_lfp_backlight_data_entry *entry; | |
311 | ||
312 | backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); | |
313 | if (!backlight_data) | |
314 | return; | |
315 | ||
316 | if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { | |
317 | DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n", | |
318 | backlight_data->entry_size); | |
319 | return; | |
320 | } | |
321 | ||
322 | entry = &backlight_data->data[panel_type]; | |
323 | ||
324 | dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; | |
325 | dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; | |
326 | DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, " | |
327 | "active %s, min brightness %u, level %u\n", | |
328 | dev_priv->vbt.backlight.pwm_freq_hz, | |
329 | dev_priv->vbt.backlight.active_low_pwm ? "low" : "high", | |
330 | entry->min_brightness, | |
331 | backlight_data->level[panel_type]); | |
332 | } | |
333 | ||
88631706 ML |
334 | /* Try to find sdvo panel data */ |
335 | static void | |
336 | parse_sdvo_panel_data(struct drm_i915_private *dev_priv, | |
337 | struct bdb_header *bdb) | |
338 | { | |
88631706 ML |
339 | struct lvds_dvo_timing *dvo_timing; |
340 | struct drm_display_mode *panel_fixed_mode; | |
5a1e5b6c | 341 | int index; |
79e53945 | 342 | |
d330a953 | 343 | index = i915.vbt_sdvo_panel_type; |
c10e408a MF |
344 | if (index == -2) { |
345 | DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n"); | |
346 | return; | |
347 | } | |
348 | ||
5a1e5b6c CW |
349 | if (index == -1) { |
350 | struct bdb_sdvo_lvds_options *sdvo_lvds_options; | |
351 | ||
352 | sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); | |
353 | if (!sdvo_lvds_options) | |
354 | return; | |
355 | ||
356 | index = sdvo_lvds_options->panel_type; | |
357 | } | |
88631706 ML |
358 | |
359 | dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS); | |
360 | if (!dvo_timing) | |
361 | return; | |
362 | ||
9a298b2a | 363 | panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); |
88631706 ML |
364 | if (!panel_fixed_mode) |
365 | return; | |
366 | ||
5a1e5b6c | 367 | fill_detail_timing_data(panel_fixed_mode, dvo_timing + index); |
88631706 | 368 | |
41aa3448 | 369 | dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; |
79e53945 | 370 | |
5a1e5b6c CW |
371 | DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n"); |
372 | drm_mode_debug_printmodeline(panel_fixed_mode); | |
79e53945 JB |
373 | } |
374 | ||
9a4114ff BF |
375 | static int intel_bios_ssc_frequency(struct drm_device *dev, |
376 | bool alternate) | |
377 | { | |
378 | switch (INTEL_INFO(dev)->gen) { | |
379 | case 2: | |
e91e941b | 380 | return alternate ? 66667 : 48000; |
9a4114ff BF |
381 | case 3: |
382 | case 4: | |
e91e941b | 383 | return alternate ? 100000 : 96000; |
9a4114ff | 384 | default: |
e91e941b | 385 | return alternate ? 100000 : 120000; |
9a4114ff BF |
386 | } |
387 | } | |
388 | ||
79e53945 JB |
389 | static void |
390 | parse_general_features(struct drm_i915_private *dev_priv, | |
391 | struct bdb_header *bdb) | |
392 | { | |
bad720ff | 393 | struct drm_device *dev = dev_priv->dev; |
79e53945 JB |
394 | struct bdb_general_features *general; |
395 | ||
79e53945 JB |
396 | general = find_section(bdb, BDB_GENERAL_FEATURES); |
397 | if (general) { | |
41aa3448 RV |
398 | dev_priv->vbt.int_tv_support = general->int_tv_support; |
399 | dev_priv->vbt.int_crt_support = general->int_crt_support; | |
400 | dev_priv->vbt.lvds_use_ssc = general->enable_ssc; | |
401 | dev_priv->vbt.lvds_ssc_freq = | |
9a4114ff | 402 | intel_bios_ssc_frequency(dev, general->ssc_freq); |
41aa3448 RV |
403 | dev_priv->vbt.display_clock_mode = general->display_clock_mode; |
404 | dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; | |
3f704fa2 | 405 | DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", |
41aa3448 RV |
406 | dev_priv->vbt.int_tv_support, |
407 | dev_priv->vbt.int_crt_support, | |
408 | dev_priv->vbt.lvds_use_ssc, | |
409 | dev_priv->vbt.lvds_ssc_freq, | |
410 | dev_priv->vbt.display_clock_mode, | |
411 | dev_priv->vbt.fdi_rx_polarity_inverted); | |
79e53945 JB |
412 | } |
413 | } | |
414 | ||
db545019 DMEA |
415 | static void |
416 | parse_general_definitions(struct drm_i915_private *dev_priv, | |
417 | struct bdb_header *bdb) | |
418 | { | |
419 | struct bdb_general_definitions *general; | |
db545019 | 420 | |
db545019 DMEA |
421 | general = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
422 | if (general) { | |
423 | u16 block_size = get_blocksize(general); | |
424 | if (block_size >= sizeof(*general)) { | |
425 | int bus_pin = general->crt_ddc_gmbus_pin; | |
28c97730 | 426 | DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin); |
3bd7d909 | 427 | if (intel_gmbus_is_port_valid(bus_pin)) |
41aa3448 | 428 | dev_priv->vbt.crt_ddc_pin = bus_pin; |
db545019 | 429 | } else { |
28c97730 | 430 | DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n", |
3bd7d909 | 431 | block_size); |
db545019 DMEA |
432 | } |
433 | } | |
434 | } | |
435 | ||
9b9d172d | 436 | static void |
437 | parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, | |
44834a67 | 438 | struct bdb_header *bdb) |
9b9d172d | 439 | { |
440 | struct sdvo_device_mapping *p_mapping; | |
441 | struct bdb_general_definitions *p_defs; | |
768f69c9 | 442 | union child_device_config *p_child; |
9b9d172d | 443 | int i, child_device_num, count; |
db545019 | 444 | u16 block_size; |
9b9d172d | 445 | |
446 | p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); | |
447 | if (!p_defs) { | |
44834a67 | 448 | DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n"); |
9b9d172d | 449 | return; |
450 | } | |
451 | /* judge whether the size of child device meets the requirements. | |
452 | * If the child device size obtained from general definition block | |
453 | * is different with sizeof(struct child_device_config), skip the | |
454 | * parsing of sdvo device info | |
455 | */ | |
456 | if (p_defs->child_dev_size != sizeof(*p_child)) { | |
457 | /* different child dev size . Ignore it */ | |
28c97730 | 458 | DRM_DEBUG_KMS("different child size is found. Invalid.\n"); |
9b9d172d | 459 | return; |
460 | } | |
461 | /* get the block size of general definitions */ | |
db545019 | 462 | block_size = get_blocksize(p_defs); |
9b9d172d | 463 | /* get the number of child device */ |
464 | child_device_num = (block_size - sizeof(*p_defs)) / | |
465 | sizeof(*p_child); | |
466 | count = 0; | |
467 | for (i = 0; i < child_device_num; i++) { | |
468 | p_child = &(p_defs->devices[i]); | |
768f69c9 | 469 | if (!p_child->old.device_type) { |
9b9d172d | 470 | /* skip the device block if device type is invalid */ |
471 | continue; | |
472 | } | |
768f69c9 PZ |
473 | if (p_child->old.slave_addr != SLAVE_ADDR1 && |
474 | p_child->old.slave_addr != SLAVE_ADDR2) { | |
9b9d172d | 475 | /* |
476 | * If the slave address is neither 0x70 nor 0x72, | |
477 | * it is not a SDVO device. Skip it. | |
478 | */ | |
479 | continue; | |
480 | } | |
768f69c9 PZ |
481 | if (p_child->old.dvo_port != DEVICE_PORT_DVOB && |
482 | p_child->old.dvo_port != DEVICE_PORT_DVOC) { | |
9b9d172d | 483 | /* skip the incorrect SDVO port */ |
0206e353 | 484 | DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); |
9b9d172d | 485 | continue; |
486 | } | |
28c97730 ZY |
487 | DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" |
488 | " %s port\n", | |
768f69c9 PZ |
489 | p_child->old.slave_addr, |
490 | (p_child->old.dvo_port == DEVICE_PORT_DVOB) ? | |
9b9d172d | 491 | "SDVOB" : "SDVOC"); |
768f69c9 | 492 | p_mapping = &(dev_priv->sdvo_mappings[p_child->old.dvo_port - 1]); |
9b9d172d | 493 | if (!p_mapping->initialized) { |
768f69c9 PZ |
494 | p_mapping->dvo_port = p_child->old.dvo_port; |
495 | p_mapping->slave_addr = p_child->old.slave_addr; | |
496 | p_mapping->dvo_wiring = p_child->old.dvo_wiring; | |
497 | p_mapping->ddc_pin = p_child->old.ddc_pin; | |
498 | p_mapping->i2c_pin = p_child->old.i2c_pin; | |
9b9d172d | 499 | p_mapping->initialized = 1; |
46eb3036 | 500 | DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", |
e957d772 CW |
501 | p_mapping->dvo_port, |
502 | p_mapping->slave_addr, | |
503 | p_mapping->dvo_wiring, | |
504 | p_mapping->ddc_pin, | |
46eb3036 | 505 | p_mapping->i2c_pin); |
9b9d172d | 506 | } else { |
28c97730 | 507 | DRM_DEBUG_KMS("Maybe one SDVO port is shared by " |
9b9d172d | 508 | "two SDVO device.\n"); |
509 | } | |
768f69c9 | 510 | if (p_child->old.slave2_addr) { |
9b9d172d | 511 | /* Maybe this is a SDVO device with multiple inputs */ |
512 | /* And the mapping info is not added */ | |
28c97730 ZY |
513 | DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" |
514 | " is a SDVO device with multiple inputs.\n"); | |
9b9d172d | 515 | } |
516 | count++; | |
517 | } | |
518 | ||
519 | if (!count) { | |
520 | /* No SDVO device info is found */ | |
28c97730 | 521 | DRM_DEBUG_KMS("No SDVO device info is found in VBT\n"); |
9b9d172d | 522 | } |
523 | return; | |
524 | } | |
32f9d658 ZW |
525 | |
526 | static void | |
527 | parse_driver_features(struct drm_i915_private *dev_priv, | |
528 | struct bdb_header *bdb) | |
529 | { | |
32f9d658 ZW |
530 | struct bdb_driver_features *driver; |
531 | ||
32f9d658 | 532 | driver = find_section(bdb, BDB_DRIVER_FEATURES); |
652c393a JB |
533 | if (!driver) |
534 | return; | |
535 | ||
6fca55b1 | 536 | if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP) |
41aa3448 | 537 | dev_priv->vbt.edp_support = 1; |
652c393a | 538 | |
5ceb0f9b | 539 | if (driver->dual_frequency) |
652c393a | 540 | dev_priv->render_reclock_avail = true; |
83a7280e PB |
541 | |
542 | DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); | |
543 | /* | |
544 | * If DRRS is not supported, drrs_type has to be set to 0. | |
545 | * This is because, VBT is configured in such a way that | |
546 | * static DRRS is 0 and DRRS not supported is represented by | |
547 | * driver->drrs_enabled=false | |
548 | */ | |
549 | if (!driver->drrs_enabled) | |
550 | dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; | |
32f9d658 ZW |
551 | } |
552 | ||
500a8cc4 ZW |
553 | static void |
554 | parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb) | |
555 | { | |
556 | struct bdb_edp *edp; | |
9f0e7ff4 JB |
557 | struct edp_power_seq *edp_pps; |
558 | struct edp_link_params *edp_link_params; | |
500a8cc4 ZW |
559 | |
560 | edp = find_section(bdb, BDB_EDP); | |
561 | if (!edp) { | |
6fca55b1 | 562 | if (dev_priv->vbt.edp_support) |
9a30a61f | 563 | DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n"); |
500a8cc4 ZW |
564 | return; |
565 | } | |
566 | ||
567 | switch ((edp->color_depth >> (panel_type * 2)) & 3) { | |
568 | case EDP_18BPP: | |
41aa3448 | 569 | dev_priv->vbt.edp_bpp = 18; |
500a8cc4 ZW |
570 | break; |
571 | case EDP_24BPP: | |
41aa3448 | 572 | dev_priv->vbt.edp_bpp = 24; |
500a8cc4 ZW |
573 | break; |
574 | case EDP_30BPP: | |
41aa3448 | 575 | dev_priv->vbt.edp_bpp = 30; |
500a8cc4 ZW |
576 | break; |
577 | } | |
5ceb0f9b | 578 | |
9f0e7ff4 JB |
579 | /* Get the eDP sequencing and link info */ |
580 | edp_pps = &edp->power_seqs[panel_type]; | |
581 | edp_link_params = &edp->link_params[panel_type]; | |
5ceb0f9b | 582 | |
41aa3448 | 583 | dev_priv->vbt.edp_pps = *edp_pps; |
5ceb0f9b | 584 | |
41aa3448 | 585 | dev_priv->vbt.edp_rate = edp_link_params->rate ? DP_LINK_BW_2_7 : |
9f0e7ff4 JB |
586 | DP_LINK_BW_1_62; |
587 | switch (edp_link_params->lanes) { | |
588 | case 0: | |
41aa3448 | 589 | dev_priv->vbt.edp_lanes = 1; |
9f0e7ff4 JB |
590 | break; |
591 | case 1: | |
41aa3448 | 592 | dev_priv->vbt.edp_lanes = 2; |
9f0e7ff4 JB |
593 | break; |
594 | case 3: | |
595 | default: | |
41aa3448 | 596 | dev_priv->vbt.edp_lanes = 4; |
9f0e7ff4 JB |
597 | break; |
598 | } | |
599 | switch (edp_link_params->preemphasis) { | |
600 | case 0: | |
41aa3448 | 601 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_0; |
9f0e7ff4 JB |
602 | break; |
603 | case 1: | |
41aa3448 | 604 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5; |
9f0e7ff4 JB |
605 | break; |
606 | case 2: | |
41aa3448 | 607 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_6; |
9f0e7ff4 JB |
608 | break; |
609 | case 3: | |
41aa3448 | 610 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5; |
9f0e7ff4 JB |
611 | break; |
612 | } | |
613 | switch (edp_link_params->vswing) { | |
614 | case 0: | |
41aa3448 | 615 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_400; |
9f0e7ff4 JB |
616 | break; |
617 | case 1: | |
41aa3448 | 618 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_600; |
9f0e7ff4 JB |
619 | break; |
620 | case 2: | |
41aa3448 | 621 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_800; |
9f0e7ff4 JB |
622 | break; |
623 | case 3: | |
41aa3448 | 624 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_1200; |
9f0e7ff4 JB |
625 | break; |
626 | } | |
500a8cc4 ZW |
627 | } |
628 | ||
d3b542fc SK |
629 | static u8 *goto_next_sequence(u8 *data, int *size) |
630 | { | |
631 | u16 len; | |
632 | int tmp = *size; | |
633 | ||
634 | if (--tmp < 0) | |
635 | return NULL; | |
636 | ||
637 | /* goto first element */ | |
638 | data++; | |
639 | while (1) { | |
640 | switch (*data) { | |
641 | case MIPI_SEQ_ELEM_SEND_PKT: | |
642 | /* | |
643 | * skip by this element payload size | |
644 | * skip elem id, command flag and data type | |
645 | */ | |
646 | if ((tmp = tmp - 5) < 0) | |
647 | return NULL; | |
648 | ||
649 | data += 3; | |
650 | len = *((u16 *)data); | |
651 | ||
652 | if ((tmp = tmp - len) < 0) | |
653 | return NULL; | |
654 | ||
655 | /* skip by len */ | |
656 | data = data + 2 + len; | |
657 | break; | |
658 | case MIPI_SEQ_ELEM_DELAY: | |
659 | /* skip by elem id, and delay is 4 bytes */ | |
660 | if ((tmp = tmp - 5) < 0) | |
661 | return NULL; | |
662 | ||
663 | data += 5; | |
664 | break; | |
665 | case MIPI_SEQ_ELEM_GPIO: | |
666 | if ((tmp = tmp - 3) < 0) | |
667 | return NULL; | |
668 | ||
669 | data += 3; | |
670 | break; | |
671 | default: | |
672 | DRM_ERROR("Unknown element\n"); | |
673 | return NULL; | |
674 | } | |
675 | ||
676 | /* end of sequence ? */ | |
677 | if (*data == 0) | |
678 | break; | |
679 | } | |
680 | ||
681 | /* goto next sequence or end of block byte */ | |
682 | if (--tmp < 0) | |
683 | return NULL; | |
684 | ||
685 | data++; | |
686 | ||
687 | /* update amount of data left for the sequence block to be parsed */ | |
688 | *size = tmp; | |
689 | return data; | |
690 | } | |
691 | ||
d17c5443 SK |
692 | static void |
693 | parse_mipi(struct drm_i915_private *dev_priv, struct bdb_header *bdb) | |
694 | { | |
d3b542fc SK |
695 | struct bdb_mipi_config *start; |
696 | struct bdb_mipi_sequence *sequence; | |
697 | struct mipi_config *config; | |
698 | struct mipi_pps_data *pps; | |
699 | u8 *data, *seq_data; | |
700 | int i, panel_id, seq_size; | |
701 | u16 block_size; | |
702 | ||
703 | /* Initialize this to undefined indicating no generic MIPI support */ | |
704 | dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; | |
705 | ||
706 | /* Block #40 is already parsed and panel_fixed_mode is | |
707 | * stored in dev_priv->lfp_lvds_vbt_mode | |
708 | * resuse this when needed | |
709 | */ | |
d17c5443 | 710 | |
d3b542fc SK |
711 | /* Parse #52 for panel index used from panel_type already |
712 | * parsed | |
713 | */ | |
714 | start = find_section(bdb, BDB_MIPI_CONFIG); | |
715 | if (!start) { | |
716 | DRM_DEBUG_KMS("No MIPI config BDB found"); | |
d17c5443 SK |
717 | return; |
718 | } | |
719 | ||
d3b542fc SK |
720 | DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n", |
721 | panel_type); | |
722 | ||
723 | /* | |
724 | * get hold of the correct configuration block and pps data as per | |
725 | * the panel_type as index | |
726 | */ | |
727 | config = &start->config[panel_type]; | |
728 | pps = &start->pps[panel_type]; | |
729 | ||
730 | /* store as of now full data. Trim when we realise all is not needed */ | |
731 | dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); | |
732 | if (!dev_priv->vbt.dsi.config) | |
733 | return; | |
734 | ||
735 | dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); | |
736 | if (!dev_priv->vbt.dsi.pps) { | |
737 | kfree(dev_priv->vbt.dsi.config); | |
738 | return; | |
739 | } | |
740 | ||
741 | /* We have mandatory mipi config blocks. Initialize as generic panel */ | |
ea9a6baf | 742 | dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; |
d3b542fc SK |
743 | |
744 | /* Check if we have sequence block as well */ | |
745 | sequence = find_section(bdb, BDB_MIPI_SEQUENCE); | |
746 | if (!sequence) { | |
747 | DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n"); | |
748 | return; | |
749 | } | |
750 | ||
751 | DRM_DEBUG_DRIVER("Found MIPI sequence block\n"); | |
752 | ||
753 | block_size = get_blocksize(sequence); | |
754 | ||
755 | /* | |
756 | * parse the sequence block for individual sequences | |
757 | */ | |
758 | dev_priv->vbt.dsi.seq_version = sequence->version; | |
759 | ||
760 | seq_data = &sequence->data[0]; | |
761 | ||
762 | /* | |
763 | * sequence block is variable length and hence we need to parse and | |
764 | * get the sequence data for specific panel id | |
765 | */ | |
766 | for (i = 0; i < MAX_MIPI_CONFIGURATIONS; i++) { | |
767 | panel_id = *seq_data; | |
768 | seq_size = *((u16 *) (seq_data + 1)); | |
769 | if (panel_id == panel_type) | |
770 | break; | |
771 | ||
772 | /* skip the sequence including seq header of 3 bytes */ | |
773 | seq_data = seq_data + 3 + seq_size; | |
774 | if ((seq_data - &sequence->data[0]) > block_size) { | |
775 | DRM_ERROR("Sequence start is beyond sequence block size, corrupted sequence block\n"); | |
776 | return; | |
777 | } | |
778 | } | |
779 | ||
780 | if (i == MAX_MIPI_CONFIGURATIONS) { | |
781 | DRM_ERROR("Sequence block detected but no valid configuration\n"); | |
782 | return; | |
783 | } | |
784 | ||
785 | /* check if found sequence is completely within the sequence block | |
786 | * just being paranoid */ | |
787 | if (seq_size > block_size) { | |
788 | DRM_ERROR("Corrupted sequence/size, bailing out\n"); | |
789 | return; | |
790 | } | |
791 | ||
792 | /* skip the panel id(1 byte) and seq size(2 bytes) */ | |
793 | dev_priv->vbt.dsi.data = kmemdup(seq_data + 3, seq_size, GFP_KERNEL); | |
794 | if (!dev_priv->vbt.dsi.data) | |
795 | return; | |
796 | ||
797 | /* | |
798 | * loop into the sequence data and split into multiple sequneces | |
799 | * There are only 5 types of sequences as of now | |
800 | */ | |
801 | data = dev_priv->vbt.dsi.data; | |
802 | dev_priv->vbt.dsi.size = seq_size; | |
803 | ||
804 | /* two consecutive 0x00 indicate end of all sequences */ | |
805 | while (1) { | |
806 | int seq_id = *data; | |
807 | if (MIPI_SEQ_MAX > seq_id && seq_id > MIPI_SEQ_UNDEFINED) { | |
808 | dev_priv->vbt.dsi.sequence[seq_id] = data; | |
809 | DRM_DEBUG_DRIVER("Found mipi sequence - %d\n", seq_id); | |
810 | } else { | |
811 | DRM_ERROR("undefined sequence\n"); | |
812 | goto err; | |
813 | } | |
814 | ||
815 | /* partial parsing to skip elements */ | |
816 | data = goto_next_sequence(data, &seq_size); | |
817 | ||
818 | if (data == NULL) { | |
819 | DRM_ERROR("Sequence elements going beyond block itself. Sequence block parsing failed\n"); | |
820 | goto err; | |
821 | } | |
822 | ||
823 | if (*data == 0) | |
824 | break; /* end of sequence reached */ | |
825 | } | |
826 | ||
827 | DRM_DEBUG_DRIVER("MIPI related vbt parsing complete\n"); | |
828 | return; | |
829 | err: | |
830 | kfree(dev_priv->vbt.dsi.data); | |
831 | dev_priv->vbt.dsi.data = NULL; | |
832 | ||
833 | /* error during parsing so set all pointers to null | |
834 | * because of partial parsing */ | |
835 | memset(dev_priv->vbt.dsi.sequence, 0, MIPI_SEQ_MAX); | |
d17c5443 SK |
836 | } |
837 | ||
6acab15a PZ |
838 | static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, |
839 | struct bdb_header *bdb) | |
840 | { | |
841 | union child_device_config *it, *child = NULL; | |
842 | struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; | |
843 | uint8_t hdmi_level_shift; | |
844 | int i, j; | |
554d6af5 | 845 | bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; |
6bf19e7c | 846 | uint8_t aux_channel; |
6acab15a PZ |
847 | /* Each DDI port can have more than one value on the "DVO Port" field, |
848 | * so look for all the possible values for each port and abort if more | |
849 | * than one is found. */ | |
850 | int dvo_ports[][2] = { | |
851 | {DVO_PORT_HDMIA, DVO_PORT_DPA}, | |
852 | {DVO_PORT_HDMIB, DVO_PORT_DPB}, | |
853 | {DVO_PORT_HDMIC, DVO_PORT_DPC}, | |
854 | {DVO_PORT_HDMID, DVO_PORT_DPD}, | |
855 | {DVO_PORT_CRT, -1 /* Port E can only be DVO_PORT_CRT */ }, | |
856 | }; | |
857 | ||
858 | /* Find the child device to use, abort if more than one found. */ | |
859 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { | |
860 | it = dev_priv->vbt.child_dev + i; | |
861 | ||
862 | for (j = 0; j < 2; j++) { | |
863 | if (dvo_ports[port][j] == -1) | |
864 | break; | |
865 | ||
866 | if (it->common.dvo_port == dvo_ports[port][j]) { | |
867 | if (child) { | |
868 | DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n", | |
869 | port_name(port)); | |
870 | return; | |
871 | } | |
872 | child = it; | |
873 | } | |
874 | } | |
875 | } | |
876 | if (!child) | |
877 | return; | |
878 | ||
6bf19e7c PZ |
879 | aux_channel = child->raw[25]; |
880 | ||
78eb06c3 VS |
881 | is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; |
882 | is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; | |
883 | is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT; | |
884 | is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; | |
885 | is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR); | |
554d6af5 | 886 | |
311a2094 PZ |
887 | info->supports_dvi = is_dvi; |
888 | info->supports_hdmi = is_hdmi; | |
889 | info->supports_dp = is_dp; | |
890 | ||
554d6af5 PZ |
891 | DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n", |
892 | port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt); | |
893 | ||
894 | if (is_edp && is_dvi) | |
895 | DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n", | |
896 | port_name(port)); | |
897 | if (is_crt && port != PORT_E) | |
898 | DRM_DEBUG_KMS("Port %c is analog\n", port_name(port)); | |
899 | if (is_crt && (is_dvi || is_dp)) | |
900 | DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n", | |
901 | port_name(port)); | |
902 | if (is_dvi && (port == PORT_A || port == PORT_E)) | |
903 | DRM_DEBUG_KMS("Port %c is TMDS compabile\n", port_name(port)); | |
904 | if (!is_dvi && !is_dp && !is_crt) | |
905 | DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n", | |
906 | port_name(port)); | |
907 | if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E)) | |
908 | DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port)); | |
6bf19e7c PZ |
909 | |
910 | if (is_dvi) { | |
911 | if (child->common.ddc_pin == 0x05 && port != PORT_B) | |
912 | DRM_DEBUG_KMS("Unexpected DDC pin for port B\n"); | |
913 | if (child->common.ddc_pin == 0x04 && port != PORT_C) | |
914 | DRM_DEBUG_KMS("Unexpected DDC pin for port C\n"); | |
915 | if (child->common.ddc_pin == 0x06 && port != PORT_D) | |
916 | DRM_DEBUG_KMS("Unexpected DDC pin for port D\n"); | |
917 | } | |
918 | ||
919 | if (is_dp) { | |
920 | if (aux_channel == 0x40 && port != PORT_A) | |
921 | DRM_DEBUG_KMS("Unexpected AUX channel for port A\n"); | |
922 | if (aux_channel == 0x10 && port != PORT_B) | |
923 | DRM_DEBUG_KMS("Unexpected AUX channel for port B\n"); | |
924 | if (aux_channel == 0x20 && port != PORT_C) | |
925 | DRM_DEBUG_KMS("Unexpected AUX channel for port C\n"); | |
926 | if (aux_channel == 0x30 && port != PORT_D) | |
927 | DRM_DEBUG_KMS("Unexpected AUX channel for port D\n"); | |
928 | } | |
929 | ||
6acab15a PZ |
930 | if (bdb->version >= 158) { |
931 | /* The VBT HDMI level shift values match the table we have. */ | |
932 | hdmi_level_shift = child->raw[7] & 0xF; | |
933 | if (hdmi_level_shift < 0xC) { | |
934 | DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n", | |
935 | port_name(port), | |
936 | hdmi_level_shift); | |
937 | info->hdmi_level_shift = hdmi_level_shift; | |
938 | } | |
939 | } | |
940 | } | |
941 | ||
942 | static void parse_ddi_ports(struct drm_i915_private *dev_priv, | |
943 | struct bdb_header *bdb) | |
944 | { | |
945 | struct drm_device *dev = dev_priv->dev; | |
946 | enum port port; | |
947 | ||
948 | if (!HAS_DDI(dev)) | |
949 | return; | |
950 | ||
951 | if (!dev_priv->vbt.child_dev_num) | |
952 | return; | |
953 | ||
954 | if (bdb->version < 155) | |
955 | return; | |
956 | ||
957 | for (port = PORT_A; port < I915_MAX_PORTS; port++) | |
958 | parse_ddi_port(dev_priv, port, bdb); | |
959 | } | |
960 | ||
6363ee6f ZY |
961 | static void |
962 | parse_device_mapping(struct drm_i915_private *dev_priv, | |
963 | struct bdb_header *bdb) | |
964 | { | |
965 | struct bdb_general_definitions *p_defs; | |
768f69c9 | 966 | union child_device_config *p_child, *child_dev_ptr; |
6363ee6f ZY |
967 | int i, child_device_num, count; |
968 | u16 block_size; | |
969 | ||
970 | p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); | |
971 | if (!p_defs) { | |
44834a67 | 972 | DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n"); |
6363ee6f ZY |
973 | return; |
974 | } | |
975 | /* judge whether the size of child device meets the requirements. | |
976 | * If the child device size obtained from general definition block | |
977 | * is different with sizeof(struct child_device_config), skip the | |
978 | * parsing of sdvo device info | |
979 | */ | |
980 | if (p_defs->child_dev_size != sizeof(*p_child)) { | |
981 | /* different child dev size . Ignore it */ | |
982 | DRM_DEBUG_KMS("different child size is found. Invalid.\n"); | |
983 | return; | |
984 | } | |
985 | /* get the block size of general definitions */ | |
986 | block_size = get_blocksize(p_defs); | |
987 | /* get the number of child device */ | |
988 | child_device_num = (block_size - sizeof(*p_defs)) / | |
989 | sizeof(*p_child); | |
990 | count = 0; | |
991 | /* get the number of child device that is present */ | |
992 | for (i = 0; i < child_device_num; i++) { | |
993 | p_child = &(p_defs->devices[i]); | |
768f69c9 | 994 | if (!p_child->common.device_type) { |
6363ee6f ZY |
995 | /* skip the device block if device type is invalid */ |
996 | continue; | |
997 | } | |
998 | count++; | |
999 | } | |
1000 | if (!count) { | |
0206e353 | 1001 | DRM_DEBUG_KMS("no child dev is parsed from VBT\n"); |
6363ee6f ZY |
1002 | return; |
1003 | } | |
41aa3448 RV |
1004 | dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL); |
1005 | if (!dev_priv->vbt.child_dev) { | |
6363ee6f ZY |
1006 | DRM_DEBUG_KMS("No memory space for child device\n"); |
1007 | return; | |
1008 | } | |
1009 | ||
41aa3448 | 1010 | dev_priv->vbt.child_dev_num = count; |
6363ee6f ZY |
1011 | count = 0; |
1012 | for (i = 0; i < child_device_num; i++) { | |
1013 | p_child = &(p_defs->devices[i]); | |
768f69c9 | 1014 | if (!p_child->common.device_type) { |
6363ee6f ZY |
1015 | /* skip the device block if device type is invalid */ |
1016 | continue; | |
1017 | } | |
41aa3448 | 1018 | child_dev_ptr = dev_priv->vbt.child_dev + count; |
6363ee6f ZY |
1019 | count++; |
1020 | memcpy((void *)child_dev_ptr, (void *)p_child, | |
1021 | sizeof(*p_child)); | |
1022 | } | |
1023 | return; | |
1024 | } | |
44834a67 | 1025 | |
6a04002b SQ |
1026 | static void |
1027 | init_vbt_defaults(struct drm_i915_private *dev_priv) | |
1028 | { | |
9a4114ff | 1029 | struct drm_device *dev = dev_priv->dev; |
6acab15a | 1030 | enum port port; |
9a4114ff | 1031 | |
41aa3448 | 1032 | dev_priv->vbt.crt_ddc_pin = GMBUS_PORT_VGADDC; |
6a04002b SQ |
1033 | |
1034 | /* LFP panel data */ | |
41aa3448 RV |
1035 | dev_priv->vbt.lvds_dither = 1; |
1036 | dev_priv->vbt.lvds_vbt = 0; | |
6a04002b SQ |
1037 | |
1038 | /* SDVO panel data */ | |
41aa3448 | 1039 | dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; |
6a04002b SQ |
1040 | |
1041 | /* general features */ | |
41aa3448 RV |
1042 | dev_priv->vbt.int_tv_support = 1; |
1043 | dev_priv->vbt.int_crt_support = 1; | |
9a4114ff BF |
1044 | |
1045 | /* Default to using SSC */ | |
41aa3448 | 1046 | dev_priv->vbt.lvds_use_ssc = 1; |
f69e5156 DL |
1047 | /* |
1048 | * Core/SandyBridge/IvyBridge use alternative (120MHz) reference | |
1049 | * clock for LVDS. | |
1050 | */ | |
1051 | dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev, | |
1052 | !HAS_PCH_SPLIT(dev)); | |
e91e941b | 1053 | DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq); |
6acab15a PZ |
1054 | |
1055 | for (port = PORT_A; port < I915_MAX_PORTS; port++) { | |
311a2094 PZ |
1056 | struct ddi_vbt_port_info *info = |
1057 | &dev_priv->vbt.ddi_port_info[port]; | |
1058 | ||
6acab15a | 1059 | /* Recommended BSpec default: 800mV 0dB. */ |
311a2094 PZ |
1060 | info->hdmi_level_shift = 6; |
1061 | ||
1062 | info->supports_dvi = (port != PORT_A && port != PORT_E); | |
1063 | info->supports_hdmi = info->supports_dvi; | |
1064 | info->supports_dp = (port != PORT_E); | |
6acab15a | 1065 | } |
6a04002b SQ |
1066 | } |
1067 | ||
25e341cf DV |
1068 | static int __init intel_no_opregion_vbt_callback(const struct dmi_system_id *id) |
1069 | { | |
1070 | DRM_DEBUG_KMS("Falling back to manually reading VBT from " | |
1071 | "VBIOS ROM for %s\n", | |
1072 | id->ident); | |
1073 | return 1; | |
1074 | } | |
1075 | ||
1076 | static const struct dmi_system_id intel_no_opregion_vbt[] = { | |
1077 | { | |
1078 | .callback = intel_no_opregion_vbt_callback, | |
1079 | .ident = "ThinkCentre A57", | |
1080 | .matches = { | |
1081 | DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
1082 | DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"), | |
1083 | }, | |
1084 | }, | |
1085 | { } | |
1086 | }; | |
1087 | ||
79e53945 | 1088 | /** |
6d139a87 | 1089 | * intel_parse_bios - find VBT and initialize settings from the BIOS |
79e53945 JB |
1090 | * @dev: DRM device |
1091 | * | |
1092 | * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers | |
1093 | * to appropriate values. | |
1094 | * | |
79e53945 JB |
1095 | * Returns 0 on success, nonzero on failure. |
1096 | */ | |
0317c6ce | 1097 | int |
6d139a87 | 1098 | intel_parse_bios(struct drm_device *dev) |
79e53945 JB |
1099 | { |
1100 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1101 | struct pci_dev *pdev = dev->pdev; | |
44834a67 CW |
1102 | struct bdb_header *bdb = NULL; |
1103 | u8 __iomem *bios = NULL; | |
1104 | ||
ab5c608b BW |
1105 | if (HAS_PCH_NOP(dev)) |
1106 | return -ENODEV; | |
1107 | ||
6a04002b | 1108 | init_vbt_defaults(dev_priv); |
f899fc64 | 1109 | |
44834a67 | 1110 | /* XXX Should this validation be moved to intel_opregion.c? */ |
25e341cf | 1111 | if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt) { |
44834a67 CW |
1112 | struct vbt_header *vbt = dev_priv->opregion.vbt; |
1113 | if (memcmp(vbt->signature, "$VBT", 4) == 0) { | |
562396b9 | 1114 | DRM_DEBUG_KMS("Using VBT from OpRegion: %20s\n", |
44834a67 CW |
1115 | vbt->signature); |
1116 | bdb = (struct bdb_header *)((char *)vbt + vbt->bdb_offset); | |
1117 | } else | |
1118 | dev_priv->opregion.vbt = NULL; | |
79e53945 JB |
1119 | } |
1120 | ||
44834a67 CW |
1121 | if (bdb == NULL) { |
1122 | struct vbt_header *vbt = NULL; | |
1123 | size_t size; | |
1124 | int i; | |
79e53945 | 1125 | |
44834a67 CW |
1126 | bios = pci_map_rom(pdev, &size); |
1127 | if (!bios) | |
1128 | return -1; | |
1129 | ||
1130 | /* Scour memory looking for the VBT signature */ | |
1131 | for (i = 0; i + 4 < size; i++) { | |
1132 | if (!memcmp(bios + i, "$VBT", 4)) { | |
1133 | vbt = (struct vbt_header *)(bios + i); | |
1134 | break; | |
1135 | } | |
1136 | } | |
1137 | ||
1138 | if (!vbt) { | |
bd45545f | 1139 | DRM_DEBUG_DRIVER("VBT signature missing\n"); |
44834a67 CW |
1140 | pci_unmap_rom(pdev, bios); |
1141 | return -1; | |
1142 | } | |
1143 | ||
1144 | bdb = (struct bdb_header *)(bios + i + vbt->bdb_offset); | |
1145 | } | |
79e53945 JB |
1146 | |
1147 | /* Grab useful general definitions */ | |
1148 | parse_general_features(dev_priv, bdb); | |
db545019 | 1149 | parse_general_definitions(dev_priv, bdb); |
88631706 | 1150 | parse_lfp_panel_data(dev_priv, bdb); |
f00076d2 | 1151 | parse_lfp_backlight(dev_priv, bdb); |
88631706 | 1152 | parse_sdvo_panel_data(dev_priv, bdb); |
9b9d172d | 1153 | parse_sdvo_device_mapping(dev_priv, bdb); |
6363ee6f | 1154 | parse_device_mapping(dev_priv, bdb); |
32f9d658 | 1155 | parse_driver_features(dev_priv, bdb); |
500a8cc4 | 1156 | parse_edp(dev_priv, bdb); |
d17c5443 | 1157 | parse_mipi(dev_priv, bdb); |
6acab15a | 1158 | parse_ddi_ports(dev_priv, bdb); |
32f9d658 | 1159 | |
44834a67 CW |
1160 | if (bios) |
1161 | pci_unmap_rom(pdev, bios); | |
79e53945 JB |
1162 | |
1163 | return 0; | |
1164 | } | |
6d139a87 BF |
1165 | |
1166 | /* Ensure that vital registers have been initialised, even if the BIOS | |
1167 | * is absent or just failing to do its job. | |
1168 | */ | |
1169 | void intel_setup_bios(struct drm_device *dev) | |
1170 | { | |
1171 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1172 | ||
1173 | /* Set the Panel Power On/Off timings if uninitialized. */ | |
42d42e7e DL |
1174 | if (!HAS_PCH_SPLIT(dev) && |
1175 | I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) { | |
6d139a87 BF |
1176 | /* Set T2 to 40ms and T5 to 200ms */ |
1177 | I915_WRITE(PP_ON_DELAYS, 0x019007d0); | |
1178 | ||
1179 | /* Set T3 to 35ms and Tx to 200ms */ | |
1180 | I915_WRITE(PP_OFF_DELAYS, 0x015e07d0); | |
1181 | } | |
1182 | } |