Commit | Line | Data |
---|---|---|
0e32b39c DA |
1 | /* |
2 | * Copyright © 2008 Intel Corporation | |
3 | * 2014 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | |
22 | * IN THE SOFTWARE. | |
23 | * | |
24 | */ | |
25 | ||
26 | #include <drm/drmP.h> | |
27 | #include "i915_drv.h" | |
28 | #include "intel_drv.h" | |
c6f95f27 | 29 | #include <drm/drm_atomic_helper.h> |
0e32b39c DA |
30 | #include <drm/drm_crtc_helper.h> |
31 | #include <drm/drm_edid.h> | |
32 | ||
33 | static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, | |
5cec258b | 34 | struct intel_crtc_state *pipe_config) |
0e32b39c DA |
35 | { |
36 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
37 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
38 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
e75f4771 ACO |
39 | struct drm_atomic_state *state; |
40 | int bpp, i; | |
04a60f9f | 41 | int lane_count, slots; |
7c5f93b0 | 42 | const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
da3ced29 ACO |
43 | struct drm_connector *drm_connector; |
44 | struct intel_connector *connector, *found = NULL; | |
45 | struct drm_connector_state *connector_state; | |
0e32b39c DA |
46 | int mst_pbn; |
47 | ||
48 | pipe_config->dp_encoder_is_mst = true; | |
49 | pipe_config->has_pch_encoder = false; | |
50 | pipe_config->has_dp_encoder = true; | |
51 | bpp = 24; | |
52 | /* | |
53 | * for MST we always configure max link bw - the spec doesn't | |
54 | * seem to suggest we should do otherwise. | |
55 | */ | |
56 | lane_count = drm_dp_max_lane_count(intel_dp->dpcd); | |
ed4e9c1d | 57 | |
ed4e9c1d | 58 | |
90a6b7b0 | 59 | pipe_config->lane_count = lane_count; |
0e32b39c DA |
60 | |
61 | pipe_config->pipe_bpp = 24; | |
04a60f9f | 62 | pipe_config->port_clock = intel_dp_max_link_rate(intel_dp); |
0e32b39c | 63 | |
e75f4771 ACO |
64 | state = pipe_config->base.state; |
65 | ||
da3ced29 ACO |
66 | for_each_connector_in_state(state, drm_connector, connector_state, i) { |
67 | connector = to_intel_connector(drm_connector); | |
e75f4771 | 68 | |
da3ced29 ACO |
69 | if (connector_state->best_encoder == &encoder->base) { |
70 | found = connector; | |
0e32b39c DA |
71 | break; |
72 | } | |
73 | } | |
74 | ||
75 | if (!found) { | |
76 | DRM_ERROR("can't find connector\n"); | |
77 | return false; | |
78 | } | |
79 | ||
aad941d5 | 80 | mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp); |
0e32b39c DA |
81 | |
82 | pipe_config->pbn = mst_pbn; | |
83 | slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); | |
84 | ||
85 | intel_link_compute_m_n(bpp, lane_count, | |
86 | adjusted_mode->crtc_clock, | |
87 | pipe_config->port_clock, | |
88 | &pipe_config->dp_m_n); | |
89 | ||
90 | pipe_config->dp_m_n.tu = slots; | |
6fa2d197 | 91 | |
0e32b39c DA |
92 | return true; |
93 | ||
94 | } | |
95 | ||
96 | static void intel_mst_disable_dp(struct intel_encoder *encoder) | |
97 | { | |
98 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
99 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
100 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
101 | int ret; | |
102 | ||
103 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
104 | ||
0552f765 | 105 | drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->connector->port); |
0e32b39c DA |
106 | |
107 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); | |
108 | if (ret) { | |
109 | DRM_ERROR("failed to update payload %d\n", ret); | |
110 | } | |
111 | } | |
112 | ||
113 | static void intel_mst_post_disable_dp(struct intel_encoder *encoder) | |
114 | { | |
115 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
116 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
117 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
118 | ||
119 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
120 | ||
121 | /* this can fail */ | |
122 | drm_dp_check_act_status(&intel_dp->mst_mgr); | |
123 | /* and this can also fail */ | |
124 | drm_dp_update_payload_part2(&intel_dp->mst_mgr); | |
125 | ||
0552f765 | 126 | drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->connector->port); |
0e32b39c DA |
127 | |
128 | intel_dp->active_mst_links--; | |
0552f765 DA |
129 | |
130 | intel_mst->connector = NULL; | |
0e32b39c DA |
131 | if (intel_dp->active_mst_links == 0) { |
132 | intel_dig_port->base.post_disable(&intel_dig_port->base); | |
133 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); | |
134 | } | |
135 | } | |
136 | ||
137 | static void intel_mst_pre_enable_dp(struct intel_encoder *encoder) | |
138 | { | |
139 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
140 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
141 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
142 | struct drm_device *dev = encoder->base.dev; | |
fac5e23e | 143 | struct drm_i915_private *dev_priv = to_i915(dev); |
0e32b39c DA |
144 | enum port port = intel_dig_port->port; |
145 | int ret; | |
146 | uint32_t temp; | |
9b4fd8f2 | 147 | struct intel_connector *found = NULL, *connector; |
0e32b39c DA |
148 | int slots; |
149 | struct drm_crtc *crtc = encoder->base.crtc; | |
150 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | |
151 | ||
9b4fd8f2 ACO |
152 | for_each_intel_connector(dev, connector) { |
153 | if (connector->base.state->best_encoder == &encoder->base) { | |
154 | found = connector; | |
0e32b39c DA |
155 | break; |
156 | } | |
157 | } | |
158 | ||
159 | if (!found) { | |
160 | DRM_ERROR("can't find connector\n"); | |
161 | return; | |
162 | } | |
163 | ||
e85376cb ML |
164 | /* MST encoders are bound to a crtc, not to a connector, |
165 | * force the mapping here for get_hw_state. | |
166 | */ | |
167 | found->encoder = encoder; | |
168 | ||
0e32b39c | 169 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
0552f765 DA |
170 | |
171 | intel_mst->connector = found; | |
0e32b39c DA |
172 | |
173 | if (intel_dp->active_mst_links == 0) { | |
6a7e4f99 VS |
174 | intel_prepare_ddi_buffer(&intel_dig_port->base); |
175 | ||
d919161b | 176 | intel_ddi_clk_select(&intel_dig_port->base, intel_crtc->config); |
0e32b39c | 177 | |
901c2daf VS |
178 | intel_dp_set_link_params(intel_dp, intel_crtc->config); |
179 | ||
0e32b39c DA |
180 | intel_ddi_init_dp_buf_reg(&intel_dig_port->base); |
181 | ||
182 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); | |
183 | ||
0e32b39c | 184 | intel_dp_start_link_train(intel_dp); |
0e32b39c DA |
185 | intel_dp_stop_link_train(intel_dp); |
186 | } | |
187 | ||
188 | ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, | |
0552f765 | 189 | intel_mst->connector->port, |
6e3c9717 | 190 | intel_crtc->config->pbn, &slots); |
0e32b39c DA |
191 | if (ret == false) { |
192 | DRM_ERROR("failed to allocate vcpi\n"); | |
193 | return; | |
194 | } | |
195 | ||
196 | ||
197 | intel_dp->active_mst_links++; | |
198 | temp = I915_READ(DP_TP_STATUS(port)); | |
199 | I915_WRITE(DP_TP_STATUS(port), temp); | |
200 | ||
201 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); | |
202 | } | |
203 | ||
204 | static void intel_mst_enable_dp(struct intel_encoder *encoder) | |
205 | { | |
206 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
207 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
208 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
209 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
fac5e23e | 210 | struct drm_i915_private *dev_priv = to_i915(dev); |
0e32b39c DA |
211 | enum port port = intel_dig_port->port; |
212 | int ret; | |
213 | ||
214 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
215 | ||
3016a31f CW |
216 | if (intel_wait_for_register(dev_priv, |
217 | DP_TP_STATUS(port), | |
218 | DP_TP_STATUS_ACT_SENT, | |
219 | DP_TP_STATUS_ACT_SENT, | |
220 | 1)) | |
0e32b39c DA |
221 | DRM_ERROR("Timed out waiting for ACT sent\n"); |
222 | ||
223 | ret = drm_dp_check_act_status(&intel_dp->mst_mgr); | |
224 | ||
225 | ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr); | |
226 | } | |
227 | ||
228 | static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, | |
229 | enum pipe *pipe) | |
230 | { | |
231 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
232 | *pipe = intel_mst->pipe; | |
0552f765 | 233 | if (intel_mst->connector) |
0e32b39c DA |
234 | return true; |
235 | return false; | |
236 | } | |
237 | ||
238 | static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, | |
5cec258b | 239 | struct intel_crtc_state *pipe_config) |
0e32b39c DA |
240 | { |
241 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
242 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
243 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); | |
244 | struct drm_device *dev = encoder->base.dev; | |
fac5e23e | 245 | struct drm_i915_private *dev_priv = to_i915(dev); |
0cb09a97 | 246 | enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; |
0e32b39c DA |
247 | u32 temp, flags = 0; |
248 | ||
249 | pipe_config->has_dp_encoder = true; | |
250 | ||
251 | temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); | |
252 | if (temp & TRANS_DDI_PHSYNC) | |
253 | flags |= DRM_MODE_FLAG_PHSYNC; | |
254 | else | |
255 | flags |= DRM_MODE_FLAG_NHSYNC; | |
256 | if (temp & TRANS_DDI_PVSYNC) | |
257 | flags |= DRM_MODE_FLAG_PVSYNC; | |
258 | else | |
259 | flags |= DRM_MODE_FLAG_NVSYNC; | |
260 | ||
261 | switch (temp & TRANS_DDI_BPC_MASK) { | |
262 | case TRANS_DDI_BPC_6: | |
263 | pipe_config->pipe_bpp = 18; | |
264 | break; | |
265 | case TRANS_DDI_BPC_8: | |
266 | pipe_config->pipe_bpp = 24; | |
267 | break; | |
268 | case TRANS_DDI_BPC_10: | |
269 | pipe_config->pipe_bpp = 30; | |
270 | break; | |
271 | case TRANS_DDI_BPC_12: | |
272 | pipe_config->pipe_bpp = 36; | |
273 | break; | |
274 | default: | |
275 | break; | |
276 | } | |
2d112de7 | 277 | pipe_config->base.adjusted_mode.flags |= flags; |
90a6b7b0 VS |
278 | |
279 | pipe_config->lane_count = | |
280 | ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1; | |
281 | ||
0e32b39c DA |
282 | intel_dp_get_m_n(crtc, pipe_config); |
283 | ||
284 | intel_ddi_clock_get(&intel_dig_port->base, pipe_config); | |
285 | } | |
286 | ||
287 | static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) | |
288 | { | |
289 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
290 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
291 | struct edid *edid; | |
292 | int ret; | |
293 | ||
0552f765 DA |
294 | if (!intel_dp) { |
295 | return intel_connector_update_modes(connector, NULL); | |
296 | } | |
0e32b39c | 297 | |
0552f765 | 298 | edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); |
0e32b39c DA |
299 | ret = intel_connector_update_modes(connector, edid); |
300 | kfree(edid); | |
301 | ||
302 | return ret; | |
303 | } | |
304 | ||
305 | static enum drm_connector_status | |
f7f3d48a | 306 | intel_dp_mst_detect(struct drm_connector *connector, bool force) |
0e32b39c DA |
307 | { |
308 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
309 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
310 | ||
0552f765 DA |
311 | if (!intel_dp) |
312 | return connector_status_disconnected; | |
c6a0aed4 | 313 | return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port); |
0e32b39c DA |
314 | } |
315 | ||
0e32b39c DA |
316 | static int |
317 | intel_dp_mst_set_property(struct drm_connector *connector, | |
318 | struct drm_property *property, | |
319 | uint64_t val) | |
320 | { | |
321 | return 0; | |
322 | } | |
323 | ||
324 | static void | |
325 | intel_dp_mst_connector_destroy(struct drm_connector *connector) | |
326 | { | |
327 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
328 | ||
329 | if (!IS_ERR_OR_NULL(intel_connector->edid)) | |
330 | kfree(intel_connector->edid); | |
331 | ||
332 | drm_connector_cleanup(connector); | |
333 | kfree(connector); | |
334 | } | |
335 | ||
336 | static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { | |
4d688a2a | 337 | .dpms = drm_atomic_helper_connector_dpms, |
0e32b39c DA |
338 | .detect = intel_dp_mst_detect, |
339 | .fill_modes = drm_helper_probe_single_connector_modes, | |
340 | .set_property = intel_dp_mst_set_property, | |
2545e4a6 | 341 | .atomic_get_property = intel_connector_atomic_get_property, |
1ebaa0b9 | 342 | .late_register = intel_connector_register, |
c191eca1 | 343 | .early_unregister = intel_connector_unregister, |
0e32b39c | 344 | .destroy = intel_dp_mst_connector_destroy, |
c6f95f27 | 345 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, |
98969725 | 346 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, |
0e32b39c DA |
347 | }; |
348 | ||
349 | static int intel_dp_mst_get_modes(struct drm_connector *connector) | |
350 | { | |
351 | return intel_dp_mst_get_ddc_modes(connector); | |
352 | } | |
353 | ||
354 | static enum drm_mode_status | |
355 | intel_dp_mst_mode_valid(struct drm_connector *connector, | |
356 | struct drm_display_mode *mode) | |
357 | { | |
832d5bfd MK |
358 | int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; |
359 | ||
0e32b39c DA |
360 | /* TODO - validate mode against available PBN for link */ |
361 | if (mode->clock < 10000) | |
362 | return MODE_CLOCK_LOW; | |
363 | ||
364 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) | |
365 | return MODE_H_ILLEGAL; | |
366 | ||
832d5bfd MK |
367 | if (mode->clock > max_dotclk) |
368 | return MODE_CLOCK_HIGH; | |
369 | ||
0e32b39c DA |
370 | return MODE_OK; |
371 | } | |
372 | ||
459485ad DV |
373 | static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector, |
374 | struct drm_connector_state *state) | |
375 | { | |
376 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
377 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
378 | struct intel_crtc *crtc = to_intel_crtc(state->crtc); | |
379 | ||
0552f765 DA |
380 | if (!intel_dp) |
381 | return NULL; | |
459485ad DV |
382 | return &intel_dp->mst_encoders[crtc->pipe]->base.base; |
383 | } | |
384 | ||
0e32b39c DA |
385 | static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector) |
386 | { | |
387 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
388 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
0552f765 DA |
389 | if (!intel_dp) |
390 | return NULL; | |
0e32b39c DA |
391 | return &intel_dp->mst_encoders[0]->base.base; |
392 | } | |
393 | ||
394 | static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { | |
395 | .get_modes = intel_dp_mst_get_modes, | |
396 | .mode_valid = intel_dp_mst_mode_valid, | |
459485ad | 397 | .atomic_best_encoder = intel_mst_atomic_best_encoder, |
0e32b39c DA |
398 | .best_encoder = intel_mst_best_encoder, |
399 | }; | |
400 | ||
401 | static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) | |
402 | { | |
403 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); | |
404 | ||
405 | drm_encoder_cleanup(encoder); | |
406 | kfree(intel_mst); | |
407 | } | |
408 | ||
409 | static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { | |
410 | .destroy = intel_dp_mst_encoder_destroy, | |
411 | }; | |
412 | ||
413 | static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) | |
414 | { | |
e85376cb | 415 | if (connector->encoder && connector->base.state->crtc) { |
0e32b39c DA |
416 | enum pipe pipe; |
417 | if (!connector->encoder->get_hw_state(connector->encoder, &pipe)) | |
418 | return false; | |
419 | return true; | |
420 | } | |
421 | return false; | |
422 | } | |
423 | ||
7296c849 CW |
424 | static void intel_connector_add_to_fbdev(struct intel_connector *connector) |
425 | { | |
0695726e | 426 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
7296c849 | 427 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
54632abe LW |
428 | |
429 | if (dev_priv->fbdev) | |
430 | drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, | |
431 | &connector->base); | |
7296c849 CW |
432 | #endif |
433 | } | |
434 | ||
435 | static void intel_connector_remove_from_fbdev(struct intel_connector *connector) | |
436 | { | |
0695726e | 437 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
7296c849 | 438 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
54632abe LW |
439 | |
440 | if (dev_priv->fbdev) | |
441 | drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, | |
442 | &connector->base); | |
7296c849 CW |
443 | #endif |
444 | } | |
445 | ||
12e6cecd | 446 | static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) |
0e32b39c DA |
447 | { |
448 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); | |
449 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
450 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
0e32b39c DA |
451 | struct intel_connector *intel_connector; |
452 | struct drm_connector *connector; | |
453 | int i; | |
454 | ||
9bdbd0b9 | 455 | intel_connector = intel_connector_alloc(); |
0e32b39c DA |
456 | if (!intel_connector) |
457 | return NULL; | |
458 | ||
459 | connector = &intel_connector->base; | |
460 | drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); | |
461 | drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); | |
462 | ||
0e32b39c DA |
463 | intel_connector->get_hw_state = intel_dp_mst_get_hw_state; |
464 | intel_connector->mst_port = intel_dp; | |
465 | intel_connector->port = port; | |
466 | ||
467 | for (i = PIPE_A; i <= PIPE_C; i++) { | |
468 | drm_mode_connector_attach_encoder(&intel_connector->base, | |
469 | &intel_dp->mst_encoders[i]->base.base); | |
470 | } | |
471 | intel_dp_add_properties(intel_dp, connector); | |
472 | ||
473 | drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); | |
6f134d7b DA |
474 | drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); |
475 | ||
0e32b39c | 476 | drm_mode_connector_set_path_property(connector, pathprop); |
d9515c5e DA |
477 | return connector; |
478 | } | |
479 | ||
480 | static void intel_dp_register_mst_connector(struct drm_connector *connector) | |
481 | { | |
482 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
483 | struct drm_device *dev = connector->dev; | |
7a418e34 | 484 | |
8bb4da1d | 485 | drm_modeset_lock_all(dev); |
7296c849 | 486 | intel_connector_add_to_fbdev(intel_connector); |
8bb4da1d | 487 | drm_modeset_unlock_all(dev); |
7a418e34 | 488 | |
0e32b39c | 489 | drm_connector_register(&intel_connector->base); |
0e32b39c DA |
490 | } |
491 | ||
492 | static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, | |
493 | struct drm_connector *connector) | |
494 | { | |
495 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
496 | struct drm_device *dev = connector->dev; | |
20fae983 | 497 | |
c191eca1 | 498 | drm_connector_unregister(connector); |
1f771755 | 499 | |
0e32b39c | 500 | /* need to nuke the connector */ |
8bb4da1d | 501 | drm_modeset_lock_all(dev); |
7296c849 | 502 | intel_connector_remove_from_fbdev(intel_connector); |
0552f765 | 503 | intel_connector->mst_port = NULL; |
8bb4da1d | 504 | drm_modeset_unlock_all(dev); |
0e32b39c | 505 | |
0552f765 | 506 | drm_connector_unreference(&intel_connector->base); |
0e32b39c DA |
507 | DRM_DEBUG_KMS("\n"); |
508 | } | |
509 | ||
510 | static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) | |
511 | { | |
512 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); | |
513 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
514 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
515 | ||
516 | drm_kms_helper_hotplug_event(dev); | |
517 | } | |
518 | ||
69a0f89c | 519 | static const struct drm_dp_mst_topology_cbs mst_cbs = { |
0e32b39c | 520 | .add_connector = intel_dp_add_mst_connector, |
d9515c5e | 521 | .register_connector = intel_dp_register_mst_connector, |
0e32b39c DA |
522 | .destroy_connector = intel_dp_destroy_mst_connector, |
523 | .hotplug = intel_dp_mst_hotplug, | |
524 | }; | |
525 | ||
526 | static struct intel_dp_mst_encoder * | |
527 | intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe) | |
528 | { | |
529 | struct intel_dp_mst_encoder *intel_mst; | |
530 | struct intel_encoder *intel_encoder; | |
531 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
532 | ||
533 | intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); | |
534 | ||
535 | if (!intel_mst) | |
536 | return NULL; | |
537 | ||
538 | intel_mst->pipe = pipe; | |
539 | intel_encoder = &intel_mst->base; | |
540 | intel_mst->primary = intel_dig_port; | |
541 | ||
542 | drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, | |
580d8ed5 | 543 | DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe)); |
0e32b39c DA |
544 | |
545 | intel_encoder->type = INTEL_OUTPUT_DP_MST; | |
546 | intel_encoder->crtc_mask = 0x7; | |
547 | intel_encoder->cloneable = 0; | |
548 | ||
549 | intel_encoder->compute_config = intel_dp_mst_compute_config; | |
550 | intel_encoder->disable = intel_mst_disable_dp; | |
551 | intel_encoder->post_disable = intel_mst_post_disable_dp; | |
552 | intel_encoder->pre_enable = intel_mst_pre_enable_dp; | |
553 | intel_encoder->enable = intel_mst_enable_dp; | |
554 | intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; | |
555 | intel_encoder->get_config = intel_dp_mst_enc_get_config; | |
556 | ||
557 | return intel_mst; | |
558 | ||
559 | } | |
560 | ||
561 | static bool | |
562 | intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) | |
563 | { | |
564 | int i; | |
565 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
566 | ||
567 | for (i = PIPE_A; i <= PIPE_C; i++) | |
568 | intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i); | |
569 | return true; | |
570 | } | |
571 | ||
572 | int | |
573 | intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) | |
574 | { | |
575 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
576 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
577 | int ret; | |
578 | ||
579 | intel_dp->can_mst = true; | |
580 | intel_dp->mst_mgr.cbs = &mst_cbs; | |
581 | ||
582 | /* create encoders */ | |
583 | intel_dp_create_fake_mst_encoders(intel_dig_port); | |
584 | ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id); | |
585 | if (ret) { | |
586 | intel_dp->can_mst = false; | |
587 | return ret; | |
588 | } | |
589 | return 0; | |
590 | } | |
591 | ||
592 | void | |
593 | intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port) | |
594 | { | |
595 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
596 | ||
597 | if (!intel_dp->can_mst) | |
598 | return; | |
599 | ||
600 | drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); | |
601 | /* encoders will get killed by normal cleanup */ | |
602 | } |