[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_hdmi.c

/*
 * Copyright 2006 Dave Airlie <airlied@linux.ie>
 * Copyright © 2006-2009 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt <eric@anholt.net>
 *	Jesse Barnes <jesse.barnes@intel.com>
 */

#include <linux/i2c.h>
#include <linux/delay.h>
#include "drmP.h"
#include "drm.h"
#include "drm_crtc.h"
#include "drm_edid.h"
#include "intel_drv.h"
#include "i915_drm.h"
#include "i915_drv.h"

struct intel_hdmi_priv {
	u32 sdvox_reg;
	bool has_hdmi_sink;
};

static void intel_hdmi_mode_set(struct drm_encoder *encoder,
				struct drm_display_mode *mode,
				struct drm_display_mode *adjusted_mode)
{
	struct drm_device *dev = encoder->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_crtc *crtc = encoder->crtc;
	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
	struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
	u32 sdvox;

	sdvox = SDVO_ENCODING_HDMI |
		SDVO_BORDER_ENABLE |
		SDVO_VSYNC_ACTIVE_HIGH |
		SDVO_HSYNC_ACTIVE_HIGH;

	if (hdmi_priv->has_hdmi_sink)
		sdvox |= SDVO_AUDIO_ENABLE;

	if (intel_crtc->pipe == 1)
		sdvox |= SDVO_PIPE_B_SELECT;

	I915_WRITE(hdmi_priv->sdvox_reg, sdvox);
	POSTING_READ(hdmi_priv->sdvox_reg);
}

static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
{
	struct drm_device *dev = encoder->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
	struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
	u32 temp;

	temp = I915_READ(hdmi_priv->sdvox_reg);

	/* HW workaround, need to toggle enable bit off and on for 12bpc, but
	 * we do this anyway which shows more stable in testing.
	 */
	if (HAS_PCH_SPLIT(dev)) {
		I915_WRITE(hdmi_priv->sdvox_reg, temp & ~SDVO_ENABLE);
		POSTING_READ(hdmi_priv->sdvox_reg);
	}

	if (mode != DRM_MODE_DPMS_ON) {
		temp &= ~SDVO_ENABLE;
	} else {
		temp |= SDVO_ENABLE;
	}

	I915_WRITE(hdmi_priv->sdvox_reg, temp);
	POSTING_READ(hdmi_priv->sdvox_reg);

	/* HW workaround, need to write this twice for issue that may result
	 * in first write getting masked.
	 */
	if (HAS_PCH_SPLIT(dev)) {
		I915_WRITE(hdmi_priv->sdvox_reg, temp);
		POSTING_READ(hdmi_priv->sdvox_reg);
	}
}

static int intel_hdmi_mode_valid(struct drm_connector *connector,
				 struct drm_display_mode *mode)
{
	if (mode->clock > 165000)
		return MODE_CLOCK_HIGH;
	if (mode->clock < 20000)
		return MODE_CLOCK_HIGH;

	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
		return MODE_NO_DBLESCAN;

	return MODE_OK;
}

static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
				  struct drm_display_mode *mode,
				  struct drm_display_mode *adjusted_mode)
{
	return true;
}

static enum drm_connector_status
intel_hdmi_detect(struct drm_connector *connector)
{
	struct intel_encoder *intel_encoder = to_intel_encoder(connector);
	struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
	struct edid *edid = NULL;
	enum drm_connector_status status = connector_status_disconnected;

	hdmi_priv->has_hdmi_sink = false;
	edid = drm_get_edid(&intel_encoder->base,
			    intel_encoder->ddc_bus);

	if (edid) {
		if (edid->input & DRM_EDID_INPUT_DIGITAL) {
			status = connector_status_connected;
			hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
		}
		intel_encoder->base.display_info.raw_edid = NULL;
		kfree(edid);
	}

	return status;
}

static int intel_hdmi_get_modes(struct drm_connector *connector)
{
	struct intel_encoder *intel_encoder = to_intel_encoder(connector);

	/* We should parse the EDID data and find out if it's an HDMI sink so
	 * we can send audio to it.
	 */

	return intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
}

static void intel_hdmi_destroy(struct drm_connector *connector)
{
	struct intel_encoder *intel_encoder = to_intel_encoder(connector);

	if (intel_encoder->i2c_bus)
		intel_i2c_destroy(intel_encoder->i2c_bus);
	drm_sysfs_connector_remove(connector);
	drm_connector_cleanup(connector);
	kfree(intel_encoder);
}

static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
	.dpms = intel_hdmi_dpms,
	.mode_fixup = intel_hdmi_mode_fixup,
	.prepare = intel_encoder_prepare,
	.mode_set = intel_hdmi_mode_set,
	.commit = intel_encoder_commit,
};

static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
	.dpms = drm_helper_connector_dpms,
	.detect = intel_hdmi_detect,
	.fill_modes = drm_helper_probe_single_connector_modes,
	.destroy = intel_hdmi_destroy,
};

static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
	.get_modes = intel_hdmi_get_modes,
	.mode_valid = intel_hdmi_mode_valid,
	.best_encoder = intel_best_encoder,
};

static void intel_hdmi_enc_destroy(struct drm_encoder *encoder)
{
	drm_encoder_cleanup(encoder);
}

static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
	.destroy = intel_hdmi_enc_destroy,
};

void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_connector *connector;
	struct intel_encoder *intel_encoder;
	struct intel_hdmi_priv *hdmi_priv;

	intel_encoder = kcalloc(sizeof(struct intel_encoder) +
			       sizeof(struct intel_hdmi_priv), 1, GFP_KERNEL);
	if (!intel_encoder)
		return;
	hdmi_priv = (struct intel_hdmi_priv *)(intel_encoder + 1);

	connector = &intel_encoder->base;
	drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
			   DRM_MODE_CONNECTOR_HDMIA);
	drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);

	intel_encoder->type = INTEL_OUTPUT_HDMI;

	connector->interlace_allowed = 0;
	connector->doublescan_allowed = 0;
	intel_encoder->crtc_mask = (1 << 0) | (1 << 1);

	/* Set up the DDC bus. */
	if (sdvox_reg == SDVOB) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
		intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB");
		dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == SDVOC) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
		intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC");
		dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == HDMIB) {
		intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
		intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOE,
								"HDMIB");
		dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == HDMIC) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
		intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOD,
								"HDMIC");
		dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == HDMID) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
		intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOF,
								"HDMID");
		dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
	}
	if (!intel_encoder->ddc_bus)
		goto err_connector;

	hdmi_priv->sdvox_reg = sdvox_reg;
	intel_encoder->dev_priv = hdmi_priv;

	drm_encoder_init(dev, &intel_encoder->enc, &intel_hdmi_enc_funcs,
			 DRM_MODE_ENCODER_TMDS);
	drm_encoder_helper_add(&intel_encoder->enc, &intel_hdmi_helper_funcs);

	drm_mode_connector_attach_encoder(&intel_encoder->base,
					  &intel_encoder->enc);
	drm_sysfs_connector_add(connector);

	/* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
	 * 0xd.  Failure to do so will result in spurious interrupts being
	 * generated on the port when a cable is not attached.
	 */
	if (IS_G4X(dev) && !IS_GM45(dev)) {
		u32 temp = I915_READ(PEG_BAND_GAP_DATA);
		I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
	}

	return;

err_connector:
	drm_connector_cleanup(connector);
	kfree(intel_encoder);

	return;
}
Commit	Line	Data
7d57382e EA	1	/*
	2	* Copyright 2006 Dave Airlie <airlied@linux.ie>
	3	* Copyright © 2006-2009 Intel Corporation
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	21	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	22	* DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors:
	25	* Eric Anholt <eric@anholt.net>
	26	* Jesse Barnes <jesse.barnes@intel.com>
	27	*/
	28
	29	#include <linux/i2c.h>
	30	#include <linux/delay.h>
	31	#include "drmP.h"
	32	#include "drm.h"
	33	#include "drm_crtc.h"
aa93d632	34	#include "drm_edid.h"
7d57382e EA	35	#include "intel_drv.h"
	36	#include "i915_drm.h"
	37	#include "i915_drv.h"
	38
	39	struct intel_hdmi_priv {
	40	u32 sdvox_reg;
9dff6af8	41	bool has_hdmi_sink;
7d57382e EA	42	};
	43
	44	static void intel_hdmi_mode_set(struct drm_encoder *encoder,
	45	struct drm_display_mode *mode,
	46	struct drm_display_mode *adjusted_mode)
	47	{
	48	struct drm_device *dev = encoder->dev;
	49	struct drm_i915_private *dev_priv = dev->dev_private;
	50	struct drm_crtc *crtc = encoder->crtc;
	51	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
21d40d37 EA	52	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
21d40d37 EA	53	struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
7d57382e EA	54	u32 sdvox;
	55
	56	sdvox = SDVO_ENCODING_HDMI \|
	57	SDVO_BORDER_ENABLE \|
	58	SDVO_VSYNC_ACTIVE_HIGH \|
56d21b07	59	SDVO_HSYNC_ACTIVE_HIGH;
7d57382e EA	60
	61	if (hdmi_priv->has_hdmi_sink)
	62	sdvox \|= SDVO_AUDIO_ENABLE;
	63
	64	if (intel_crtc->pipe == 1)
	65	sdvox \|= SDVO_PIPE_B_SELECT;
	66
	67	I915_WRITE(hdmi_priv->sdvox_reg, sdvox);
	68	POSTING_READ(hdmi_priv->sdvox_reg);
	69	}
	70
	71	static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
	72	{
	73	struct drm_device *dev = encoder->dev;
	74	struct drm_i915_private *dev_priv = dev->dev_private;
21d40d37 EA	75	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
21d40d37 EA	76	struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
7d57382e EA	77	u32 temp;
7d57382e EA	78
d8a2d0e0 ZW	79	temp = I915_READ(hdmi_priv->sdvox_reg);
	80
	81	/* HW workaround, need to toggle enable bit off and on for 12bpc, but
	82	* we do this anyway which shows more stable in testing.
	83	*/
c619eed4	84	if (HAS_PCH_SPLIT(dev)) {
7d57382e	85	I915_WRITE(hdmi_priv->sdvox_reg, temp & ~SDVO_ENABLE);
d8a2d0e0 ZW	86	POSTING_READ(hdmi_priv->sdvox_reg);
	87	}
	88
	89	if (mode != DRM_MODE_DPMS_ON) {
	90	temp &= ~SDVO_ENABLE;
7d57382e	91	} else {
d8a2d0e0	92	temp \|= SDVO_ENABLE;
7d57382e	93	}
d8a2d0e0 ZW	94
d8a2d0e0 ZW	95	I915_WRITE(hdmi_priv->sdvox_reg, temp);
7d57382e	96	POSTING_READ(hdmi_priv->sdvox_reg);
d8a2d0e0 ZW	97
	98	/* HW workaround, need to write this twice for issue that may result
	99	* in first write getting masked.
	100	*/
c619eed4	101	if (HAS_PCH_SPLIT(dev)) {
d8a2d0e0 ZW	102	I915_WRITE(hdmi_priv->sdvox_reg, temp);
	103	POSTING_READ(hdmi_priv->sdvox_reg);
	104	}
7d57382e EA	105	}
7d57382e EA	106
7d57382e EA	107	static int intel_hdmi_mode_valid(struct drm_connector *connector,
	108	struct drm_display_mode *mode)
	109	{
	110	if (mode->clock > 165000)
	111	return MODE_CLOCK_HIGH;
	112	if (mode->clock < 20000)
	113	return MODE_CLOCK_HIGH;
	114
	115	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	116	return MODE_NO_DBLESCAN;
	117
	118	return MODE_OK;
	119	}
	120
	121	static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
	122	struct drm_display_mode *mode,
	123	struct drm_display_mode *adjusted_mode)
	124	{
	125	return true;
	126	}
	127
aa93d632	128	static enum drm_connector_status
2ded9e27	129	intel_hdmi_detect(struct drm_connector *connector)
9dff6af8	130	{
21d40d37 EA	131	struct intel_encoder *intel_encoder = to_intel_encoder(connector);
21d40d37 EA	132	struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
9dff6af8	133	struct edid *edid = NULL;
aa93d632	134	enum drm_connector_status status = connector_status_disconnected;
9dff6af8	135
2ded9e27	136	hdmi_priv->has_hdmi_sink = false;
21d40d37 EA	137	edid = drm_get_edid(&intel_encoder->base,
21d40d37 EA	138	intel_encoder->ddc_bus);
2ded9e27	139
aa93d632	140	if (edid) {
be9f1c4f	141	if (edid->input & DRM_EDID_INPUT_DIGITAL) {
aa93d632 KP	142	status = connector_status_connected;
	143	hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
	144	}
21d40d37	145	intel_encoder->base.display_info.raw_edid = NULL;
aa93d632	146	kfree(edid);
9dff6af8	147	}
30ad48b7	148
2ded9e27	149	return status;
7d57382e EA	150	}
	151
	152	static int intel_hdmi_get_modes(struct drm_connector *connector)
	153	{
21d40d37	154	struct intel_encoder *intel_encoder = to_intel_encoder(connector);
7d57382e EA	155
	156	/* We should parse the EDID data and find out if it's an HDMI sink so
	157	* we can send audio to it.
	158	*/
	159
335af9a2	160	return intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
7d57382e EA	161	}
	162
	163	static void intel_hdmi_destroy(struct drm_connector *connector)
	164	{
21d40d37	165	struct intel_encoder *intel_encoder = to_intel_encoder(connector);
7d57382e	166
21d40d37 EA	167	if (intel_encoder->i2c_bus)
21d40d37 EA	168	intel_i2c_destroy(intel_encoder->i2c_bus);
7d57382e EA	169	drm_sysfs_connector_remove(connector);
7d57382e EA	170	drm_connector_cleanup(connector);
21d40d37	171	kfree(intel_encoder);
7d57382e EA	172	}
	173
	174	static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
	175	.dpms = intel_hdmi_dpms,
	176	.mode_fixup = intel_hdmi_mode_fixup,
	177	.prepare = intel_encoder_prepare,
	178	.mode_set = intel_hdmi_mode_set,
	179	.commit = intel_encoder_commit,
	180	};
	181
	182	static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
c9fb15f6	183	.dpms = drm_helper_connector_dpms,
7d57382e EA	184	.detect = intel_hdmi_detect,
	185	.fill_modes = drm_helper_probe_single_connector_modes,
	186	.destroy = intel_hdmi_destroy,
	187	};
	188
	189	static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
	190	.get_modes = intel_hdmi_get_modes,
	191	.mode_valid = intel_hdmi_mode_valid,
	192	.best_encoder = intel_best_encoder,
	193	};
	194
	195	static void intel_hdmi_enc_destroy(struct drm_encoder *encoder)
	196	{
	197	drm_encoder_cleanup(encoder);
	198	}
	199
	200	static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
	201	.destroy = intel_hdmi_enc_destroy,
	202	};
	203
7d57382e EA	204	void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
	205	{
	206	struct drm_i915_private *dev_priv = dev->dev_private;
	207	struct drm_connector *connector;
21d40d37	208	struct intel_encoder *intel_encoder;
7d57382e EA	209	struct intel_hdmi_priv *hdmi_priv;
7d57382e EA	210
21d40d37	211	intel_encoder = kcalloc(sizeof(struct intel_encoder) +
7d57382e	212	sizeof(struct intel_hdmi_priv), 1, GFP_KERNEL);
21d40d37	213	if (!intel_encoder)
7d57382e	214	return;
21d40d37	215	hdmi_priv = (struct intel_hdmi_priv *)(intel_encoder + 1);
7d57382e	216
21d40d37	217	connector = &intel_encoder->base;
7d57382e	218	drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
8d91104a	219	DRM_MODE_CONNECTOR_HDMIA);
7d57382e EA	220	drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
7d57382e EA	221
21d40d37	222	intel_encoder->type = INTEL_OUTPUT_HDMI;
7d57382e EA	223
	224	connector->interlace_allowed = 0;
	225	connector->doublescan_allowed = 0;
21d40d37	226	intel_encoder->crtc_mask = (1 << 0) \| (1 << 1);
7d57382e EA	227
7d57382e EA	228	/* Set up the DDC bus. */
f8aed700	229	if (sdvox_reg == SDVOB) {
21d40d37 EA	230	intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
21d40d37 EA	231	intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB");
b01f2c3a	232	dev_priv->hotplug_supported_mask \|= HDMIB_HOTPLUG_INT_STATUS;
f8aed700	233	} else if (sdvox_reg == SDVOC) {
21d40d37 EA	234	intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
21d40d37 EA	235	intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC");
b01f2c3a	236	dev_priv->hotplug_supported_mask \|= HDMIC_HOTPLUG_INT_STATUS;
f8aed700	237	} else if (sdvox_reg == HDMIB) {
21d40d37 EA	238	intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
21d40d37 EA	239	intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOE,
30ad48b7	240	"HDMIB");
b01f2c3a	241	dev_priv->hotplug_supported_mask \|= HDMIB_HOTPLUG_INT_STATUS;
f8aed700	242	} else if (sdvox_reg == HDMIC) {
21d40d37 EA	243	intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
21d40d37 EA	244	intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOD,
30ad48b7	245	"HDMIC");
b01f2c3a	246	dev_priv->hotplug_supported_mask \|= HDMIC_HOTPLUG_INT_STATUS;
f8aed700	247	} else if (sdvox_reg == HDMID) {
21d40d37 EA	248	intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
21d40d37 EA	249	intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOF,
30ad48b7	250	"HDMID");
b01f2c3a	251	dev_priv->hotplug_supported_mask \|= HDMID_HOTPLUG_INT_STATUS;
f8aed700	252	}
21d40d37	253	if (!intel_encoder->ddc_bus)
7d57382e EA	254	goto err_connector;
	255
	256	hdmi_priv->sdvox_reg = sdvox_reg;
21d40d37	257	intel_encoder->dev_priv = hdmi_priv;
7d57382e	258
21d40d37	259	drm_encoder_init(dev, &intel_encoder->enc, &intel_hdmi_enc_funcs,
7d57382e	260	DRM_MODE_ENCODER_TMDS);
21d40d37	261	drm_encoder_helper_add(&intel_encoder->enc, &intel_hdmi_helper_funcs);
7d57382e	262
21d40d37 EA	263	drm_mode_connector_attach_encoder(&intel_encoder->base,
21d40d37 EA	264	&intel_encoder->enc);
7d57382e EA	265	drm_sysfs_connector_add(connector);
	266
	267	/* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
	268	* 0xd. Failure to do so will result in spurious interrupts being
	269	* generated on the port when a cable is not attached.
	270	*/
	271	if (IS_G4X(dev) && !IS_GM45(dev)) {
	272	u32 temp = I915_READ(PEG_BAND_GAP_DATA);
	273	I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) \| 0xd);
	274	}
	275
	276	return;
	277
	278	err_connector:
	279	drm_connector_cleanup(connector);
21d40d37	280	kfree(intel_encoder);
7d57382e EA	281
	282	return;
	283	}