Commit | Line | Data |
---|---|---|
8ee1c3db MG |
1 | /* |
2 | * Copyright 2008 Intel Corporation <hong.liu@intel.com> | |
3 | * Copyright 2008 Red Hat <mjg@redhat.com> | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining | |
6 | * a copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sub license, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial | |
15 | * portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
20 | * NON-INFRINGEMENT. IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE | |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
22 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
23 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
24 | * SOFTWARE. | |
25 | * | |
26 | */ | |
27 | ||
28 | #include <linux/acpi.h> | |
74a365b3 | 29 | #include <acpi/video.h> |
8ee1c3db | 30 | |
760285e7 DH |
31 | #include <drm/drmP.h> |
32 | #include <drm/i915_drm.h> | |
8ee1c3db | 33 | #include "i915_drv.h" |
a9573556 | 34 | #include "intel_drv.h" |
8ee1c3db | 35 | |
ebde53c7 JN |
36 | #define PCI_ASLE 0xe4 |
37 | #define PCI_ASLS 0xfc | |
38 | #define PCI_SWSCI 0xe8 | |
39 | #define PCI_SWSCI_SCISEL (1 << 15) | |
40 | #define PCI_SWSCI_GSSCIE (1 << 0) | |
8ee1c3db | 41 | |
8ee1c3db MG |
42 | #define OPREGION_HEADER_OFFSET 0 |
43 | #define OPREGION_ACPI_OFFSET 0x100 | |
82d3c90c CW |
44 | #define ACPI_CLID 0x01ac /* current lid state indicator */ |
45 | #define ACPI_CDCK 0x01b0 /* current docking state indicator */ | |
8ee1c3db MG |
46 | #define OPREGION_SWSCI_OFFSET 0x200 |
47 | #define OPREGION_ASLE_OFFSET 0x300 | |
44834a67 | 48 | #define OPREGION_VBT_OFFSET 0x400 |
8ee1c3db MG |
49 | |
50 | #define OPREGION_SIGNATURE "IntelGraphicsMem" | |
51 | #define MBOX_ACPI (1<<0) | |
52 | #define MBOX_SWSCI (1<<1) | |
53 | #define MBOX_ASLE (1<<2) | |
f6a430d8 | 54 | #define MBOX_ASLE_EXT (1<<4) |
8ee1c3db MG |
55 | |
56 | struct opregion_header { | |
0206e353 AJ |
57 | u8 signature[16]; |
58 | u32 size; | |
59 | u32 opregion_ver; | |
60 | u8 bios_ver[32]; | |
61 | u8 vbios_ver[16]; | |
62 | u8 driver_ver[16]; | |
63 | u32 mboxes; | |
f6a430d8 JN |
64 | u32 driver_model; |
65 | u32 pcon; | |
66 | u8 dver[32]; | |
67 | u8 rsvd[124]; | |
e4451239 | 68 | } __packed; |
8ee1c3db MG |
69 | |
70 | /* OpRegion mailbox #1: public ACPI methods */ | |
71 | struct opregion_acpi { | |
0206e353 AJ |
72 | u32 drdy; /* driver readiness */ |
73 | u32 csts; /* notification status */ | |
74 | u32 cevt; /* current event */ | |
75 | u8 rsvd1[20]; | |
76 | u32 didl[8]; /* supported display devices ID list */ | |
77 | u32 cpdl[8]; /* currently presented display list */ | |
78 | u32 cadl[8]; /* currently active display list */ | |
79 | u32 nadl[8]; /* next active devices list */ | |
80 | u32 aslp; /* ASL sleep time-out */ | |
81 | u32 tidx; /* toggle table index */ | |
82 | u32 chpd; /* current hotplug enable indicator */ | |
83 | u32 clid; /* current lid state*/ | |
84 | u32 cdck; /* current docking state */ | |
85 | u32 sxsw; /* Sx state resume */ | |
86 | u32 evts; /* ASL supported events */ | |
87 | u32 cnot; /* current OS notification */ | |
88 | u32 nrdy; /* driver status */ | |
f6a430d8 JN |
89 | u32 did2[7]; /* extended supported display devices ID list */ |
90 | u32 cpd2[7]; /* extended attached display devices list */ | |
91 | u8 rsvd2[4]; | |
e4451239 | 92 | } __packed; |
8ee1c3db MG |
93 | |
94 | /* OpRegion mailbox #2: SWSCI */ | |
95 | struct opregion_swsci { | |
0206e353 AJ |
96 | u32 scic; /* SWSCI command|status|data */ |
97 | u32 parm; /* command parameters */ | |
98 | u32 dslp; /* driver sleep time-out */ | |
99 | u8 rsvd[244]; | |
e4451239 | 100 | } __packed; |
8ee1c3db MG |
101 | |
102 | /* OpRegion mailbox #3: ASLE */ | |
103 | struct opregion_asle { | |
0206e353 AJ |
104 | u32 ardy; /* driver readiness */ |
105 | u32 aslc; /* ASLE interrupt command */ | |
106 | u32 tche; /* technology enabled indicator */ | |
107 | u32 alsi; /* current ALS illuminance reading */ | |
108 | u32 bclp; /* backlight brightness to set */ | |
109 | u32 pfit; /* panel fitting state */ | |
110 | u32 cblv; /* current brightness level */ | |
111 | u16 bclm[20]; /* backlight level duty cycle mapping table */ | |
112 | u32 cpfm; /* current panel fitting mode */ | |
113 | u32 epfm; /* enabled panel fitting modes */ | |
114 | u8 plut[74]; /* panel LUT and identifier */ | |
115 | u32 pfmb; /* PWM freq and min brightness */ | |
507c1a45 PZ |
116 | u32 cddv; /* color correction default values */ |
117 | u32 pcft; /* power conservation features */ | |
118 | u32 srot; /* supported rotation angles */ | |
119 | u32 iuer; /* IUER events */ | |
f6a430d8 JN |
120 | u64 fdss; |
121 | u32 fdsp; | |
122 | u32 stat; | |
123 | u8 rsvd[70]; | |
e4451239 | 124 | } __packed; |
8ee1c3db | 125 | |
68bca4b0 JN |
126 | /* Driver readiness indicator */ |
127 | #define ASLE_ARDY_READY (1 << 0) | |
128 | #define ASLE_ARDY_NOT_READY (0 << 0) | |
129 | ||
507c1a45 PZ |
130 | /* ASLE Interrupt Command (ASLC) bits */ |
131 | #define ASLC_SET_ALS_ILLUM (1 << 0) | |
132 | #define ASLC_SET_BACKLIGHT (1 << 1) | |
133 | #define ASLC_SET_PFIT (1 << 2) | |
134 | #define ASLC_SET_PWM_FREQ (1 << 3) | |
135 | #define ASLC_SUPPORTED_ROTATION_ANGLES (1 << 4) | |
136 | #define ASLC_BUTTON_ARRAY (1 << 5) | |
137 | #define ASLC_CONVERTIBLE_INDICATOR (1 << 6) | |
138 | #define ASLC_DOCKING_INDICATOR (1 << 7) | |
139 | #define ASLC_ISCT_STATE_CHANGE (1 << 8) | |
140 | #define ASLC_REQ_MSK 0x1ff | |
141 | /* response bits */ | |
142 | #define ASLC_ALS_ILLUM_FAILED (1 << 10) | |
143 | #define ASLC_BACKLIGHT_FAILED (1 << 12) | |
144 | #define ASLC_PFIT_FAILED (1 << 14) | |
145 | #define ASLC_PWM_FREQ_FAILED (1 << 16) | |
146 | #define ASLC_ROTATION_ANGLES_FAILED (1 << 18) | |
147 | #define ASLC_BUTTON_ARRAY_FAILED (1 << 20) | |
148 | #define ASLC_CONVERTIBLE_FAILED (1 << 22) | |
149 | #define ASLC_DOCKING_FAILED (1 << 24) | |
150 | #define ASLC_ISCT_STATE_FAILED (1 << 26) | |
8ee1c3db | 151 | |
f599cc29 JN |
152 | /* Technology enabled indicator */ |
153 | #define ASLE_TCHE_ALS_EN (1 << 0) | |
154 | #define ASLE_TCHE_BLC_EN (1 << 1) | |
155 | #define ASLE_TCHE_PFIT_EN (1 << 2) | |
156 | #define ASLE_TCHE_PFMB_EN (1 << 3) | |
157 | ||
8ee1c3db MG |
158 | /* ASLE backlight brightness to set */ |
159 | #define ASLE_BCLP_VALID (1<<31) | |
160 | #define ASLE_BCLP_MSK (~(1<<31)) | |
161 | ||
162 | /* ASLE panel fitting request */ | |
163 | #define ASLE_PFIT_VALID (1<<31) | |
164 | #define ASLE_PFIT_CENTER (1<<0) | |
165 | #define ASLE_PFIT_STRETCH_TEXT (1<<1) | |
166 | #define ASLE_PFIT_STRETCH_GFX (1<<2) | |
167 | ||
168 | /* PWM frequency and minimum brightness */ | |
169 | #define ASLE_PFMB_BRIGHTNESS_MASK (0xff) | |
170 | #define ASLE_PFMB_BRIGHTNESS_VALID (1<<8) | |
171 | #define ASLE_PFMB_PWM_MASK (0x7ffffe00) | |
172 | #define ASLE_PFMB_PWM_VALID (1<<31) | |
173 | ||
174 | #define ASLE_CBLV_VALID (1<<31) | |
175 | ||
507c1a45 PZ |
176 | /* IUER */ |
177 | #define ASLE_IUER_DOCKING (1 << 7) | |
178 | #define ASLE_IUER_CONVERTIBLE (1 << 6) | |
179 | #define ASLE_IUER_ROTATION_LOCK_BTN (1 << 4) | |
180 | #define ASLE_IUER_VOLUME_DOWN_BTN (1 << 3) | |
181 | #define ASLE_IUER_VOLUME_UP_BTN (1 << 2) | |
182 | #define ASLE_IUER_WINDOWS_BTN (1 << 1) | |
183 | #define ASLE_IUER_POWER_BTN (1 << 0) | |
184 | ||
ebde53c7 JN |
185 | /* Software System Control Interrupt (SWSCI) */ |
186 | #define SWSCI_SCIC_INDICATOR (1 << 0) | |
187 | #define SWSCI_SCIC_MAIN_FUNCTION_SHIFT 1 | |
188 | #define SWSCI_SCIC_MAIN_FUNCTION_MASK (0xf << 1) | |
189 | #define SWSCI_SCIC_SUB_FUNCTION_SHIFT 8 | |
190 | #define SWSCI_SCIC_SUB_FUNCTION_MASK (0xff << 8) | |
191 | #define SWSCI_SCIC_EXIT_PARAMETER_SHIFT 8 | |
192 | #define SWSCI_SCIC_EXIT_PARAMETER_MASK (0xff << 8) | |
193 | #define SWSCI_SCIC_EXIT_STATUS_SHIFT 5 | |
194 | #define SWSCI_SCIC_EXIT_STATUS_MASK (7 << 5) | |
195 | #define SWSCI_SCIC_EXIT_STATUS_SUCCESS 1 | |
196 | ||
197 | #define SWSCI_FUNCTION_CODE(main, sub) \ | |
198 | ((main) << SWSCI_SCIC_MAIN_FUNCTION_SHIFT | \ | |
199 | (sub) << SWSCI_SCIC_SUB_FUNCTION_SHIFT) | |
200 | ||
201 | /* SWSCI: Get BIOS Data (GBDA) */ | |
202 | #define SWSCI_GBDA 4 | |
203 | #define SWSCI_GBDA_SUPPORTED_CALLS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 0) | |
204 | #define SWSCI_GBDA_REQUESTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 1) | |
205 | #define SWSCI_GBDA_BOOT_DISPLAY_PREF SWSCI_FUNCTION_CODE(SWSCI_GBDA, 4) | |
206 | #define SWSCI_GBDA_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 5) | |
207 | #define SWSCI_GBDA_TV_STANDARD SWSCI_FUNCTION_CODE(SWSCI_GBDA, 6) | |
208 | #define SWSCI_GBDA_INTERNAL_GRAPHICS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 7) | |
209 | #define SWSCI_GBDA_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_GBDA, 10) | |
210 | ||
211 | /* SWSCI: System BIOS Callbacks (SBCB) */ | |
212 | #define SWSCI_SBCB 6 | |
213 | #define SWSCI_SBCB_SUPPORTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 0) | |
214 | #define SWSCI_SBCB_INIT_COMPLETION SWSCI_FUNCTION_CODE(SWSCI_SBCB, 1) | |
215 | #define SWSCI_SBCB_PRE_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 3) | |
216 | #define SWSCI_SBCB_POST_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 4) | |
217 | #define SWSCI_SBCB_DISPLAY_SWITCH SWSCI_FUNCTION_CODE(SWSCI_SBCB, 5) | |
218 | #define SWSCI_SBCB_SET_TV_FORMAT SWSCI_FUNCTION_CODE(SWSCI_SBCB, 6) | |
219 | #define SWSCI_SBCB_ADAPTER_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 7) | |
220 | #define SWSCI_SBCB_DISPLAY_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 8) | |
221 | #define SWSCI_SBCB_SET_BOOT_DISPLAY SWSCI_FUNCTION_CODE(SWSCI_SBCB, 9) | |
222 | #define SWSCI_SBCB_SET_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 10) | |
223 | #define SWSCI_SBCB_SET_INTERNAL_GFX SWSCI_FUNCTION_CODE(SWSCI_SBCB, 11) | |
224 | #define SWSCI_SBCB_POST_HIRES_TO_DOS_FS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 16) | |
225 | #define SWSCI_SBCB_SUSPEND_RESUME SWSCI_FUNCTION_CODE(SWSCI_SBCB, 17) | |
226 | #define SWSCI_SBCB_SET_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 18) | |
227 | #define SWSCI_SBCB_POST_VBE_PM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 19) | |
228 | #define SWSCI_SBCB_ENABLE_DISABLE_AUDIO SWSCI_FUNCTION_CODE(SWSCI_SBCB, 21) | |
229 | ||
74a365b3 MG |
230 | #define ACPI_OTHER_OUTPUT (0<<8) |
231 | #define ACPI_VGA_OUTPUT (1<<8) | |
232 | #define ACPI_TV_OUTPUT (2<<8) | |
233 | #define ACPI_DIGITAL_OUTPUT (3<<8) | |
234 | #define ACPI_LVDS_OUTPUT (4<<8) | |
235 | ||
bdde5c6a JN |
236 | #define MAX_DSLP 1500 |
237 | ||
44834a67 | 238 | #ifdef CONFIG_ACPI |
ebde53c7 JN |
239 | static int swsci(struct drm_device *dev, u32 function, u32 parm, u32 *parm_out) |
240 | { | |
241 | struct drm_i915_private *dev_priv = dev->dev_private; | |
242 | struct opregion_swsci __iomem *swsci = dev_priv->opregion.swsci; | |
243 | u32 main_function, sub_function, scic; | |
244 | u16 pci_swsci; | |
245 | u32 dslp; | |
246 | ||
247 | if (!swsci) | |
248 | return -ENODEV; | |
249 | ||
250 | main_function = (function & SWSCI_SCIC_MAIN_FUNCTION_MASK) >> | |
251 | SWSCI_SCIC_MAIN_FUNCTION_SHIFT; | |
252 | sub_function = (function & SWSCI_SCIC_SUB_FUNCTION_MASK) >> | |
253 | SWSCI_SCIC_SUB_FUNCTION_SHIFT; | |
254 | ||
255 | /* Check if we can call the function. See swsci_setup for details. */ | |
256 | if (main_function == SWSCI_SBCB) { | |
257 | if ((dev_priv->opregion.swsci_sbcb_sub_functions & | |
258 | (1 << sub_function)) == 0) | |
259 | return -EINVAL; | |
260 | } else if (main_function == SWSCI_GBDA) { | |
261 | if ((dev_priv->opregion.swsci_gbda_sub_functions & | |
262 | (1 << sub_function)) == 0) | |
263 | return -EINVAL; | |
264 | } | |
265 | ||
266 | /* Driver sleep timeout in ms. */ | |
267 | dslp = ioread32(&swsci->dslp); | |
268 | if (!dslp) { | |
4994aa8c PZ |
269 | /* The spec says 2ms should be the default, but it's too small |
270 | * for some machines. */ | |
271 | dslp = 50; | |
bdde5c6a | 272 | } else if (dslp > MAX_DSLP) { |
ebde53c7 | 273 | /* Hey bios, trust must be earned. */ |
bdde5c6a JN |
274 | DRM_INFO_ONCE("ACPI BIOS requests an excessive sleep of %u ms, " |
275 | "using %u ms instead\n", dslp, MAX_DSLP); | |
276 | dslp = MAX_DSLP; | |
ebde53c7 JN |
277 | } |
278 | ||
279 | /* The spec tells us to do this, but we are the only user... */ | |
280 | scic = ioread32(&swsci->scic); | |
281 | if (scic & SWSCI_SCIC_INDICATOR) { | |
282 | DRM_DEBUG_DRIVER("SWSCI request already in progress\n"); | |
283 | return -EBUSY; | |
284 | } | |
285 | ||
286 | scic = function | SWSCI_SCIC_INDICATOR; | |
287 | ||
288 | iowrite32(parm, &swsci->parm); | |
289 | iowrite32(scic, &swsci->scic); | |
290 | ||
291 | /* Ensure SCI event is selected and event trigger is cleared. */ | |
292 | pci_read_config_word(dev->pdev, PCI_SWSCI, &pci_swsci); | |
293 | if (!(pci_swsci & PCI_SWSCI_SCISEL) || (pci_swsci & PCI_SWSCI_GSSCIE)) { | |
294 | pci_swsci |= PCI_SWSCI_SCISEL; | |
295 | pci_swsci &= ~PCI_SWSCI_GSSCIE; | |
296 | pci_write_config_word(dev->pdev, PCI_SWSCI, pci_swsci); | |
297 | } | |
298 | ||
299 | /* Use event trigger to tell bios to check the mail. */ | |
300 | pci_swsci |= PCI_SWSCI_GSSCIE; | |
301 | pci_write_config_word(dev->pdev, PCI_SWSCI, pci_swsci); | |
302 | ||
303 | /* Poll for the result. */ | |
304 | #define C (((scic = ioread32(&swsci->scic)) & SWSCI_SCIC_INDICATOR) == 0) | |
305 | if (wait_for(C, dslp)) { | |
306 | DRM_DEBUG_DRIVER("SWSCI request timed out\n"); | |
307 | return -ETIMEDOUT; | |
308 | } | |
309 | ||
310 | scic = (scic & SWSCI_SCIC_EXIT_STATUS_MASK) >> | |
311 | SWSCI_SCIC_EXIT_STATUS_SHIFT; | |
312 | ||
313 | /* Note: scic == 0 is an error! */ | |
314 | if (scic != SWSCI_SCIC_EXIT_STATUS_SUCCESS) { | |
315 | DRM_DEBUG_DRIVER("SWSCI request error %u\n", scic); | |
316 | return -EIO; | |
317 | } | |
318 | ||
319 | if (parm_out) | |
320 | *parm_out = ioread32(&swsci->parm); | |
321 | ||
322 | return 0; | |
323 | ||
324 | #undef C | |
325 | } | |
326 | ||
9c4b0a68 JN |
327 | #define DISPLAY_TYPE_CRT 0 |
328 | #define DISPLAY_TYPE_TV 1 | |
329 | #define DISPLAY_TYPE_EXTERNAL_FLAT_PANEL 2 | |
330 | #define DISPLAY_TYPE_INTERNAL_FLAT_PANEL 3 | |
331 | ||
332 | int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder, | |
333 | bool enable) | |
334 | { | |
335 | struct drm_device *dev = intel_encoder->base.dev; | |
336 | u32 parm = 0; | |
337 | u32 type = 0; | |
338 | u32 port; | |
339 | ||
340 | /* don't care about old stuff for now */ | |
341 | if (!HAS_DDI(dev)) | |
342 | return 0; | |
343 | ||
344 | port = intel_ddi_get_encoder_port(intel_encoder); | |
345 | if (port == PORT_E) { | |
346 | port = 0; | |
347 | } else { | |
348 | parm |= 1 << port; | |
349 | port++; | |
350 | } | |
351 | ||
352 | if (!enable) | |
353 | parm |= 4 << 8; | |
354 | ||
355 | switch (intel_encoder->type) { | |
356 | case INTEL_OUTPUT_ANALOG: | |
357 | type = DISPLAY_TYPE_CRT; | |
358 | break; | |
359 | case INTEL_OUTPUT_UNKNOWN: | |
360 | case INTEL_OUTPUT_DISPLAYPORT: | |
361 | case INTEL_OUTPUT_HDMI: | |
0e32b39c | 362 | case INTEL_OUTPUT_DP_MST: |
9c4b0a68 JN |
363 | type = DISPLAY_TYPE_EXTERNAL_FLAT_PANEL; |
364 | break; | |
365 | case INTEL_OUTPUT_EDP: | |
366 | type = DISPLAY_TYPE_INTERNAL_FLAT_PANEL; | |
367 | break; | |
368 | default: | |
369 | WARN_ONCE(1, "unsupported intel_encoder type %d\n", | |
370 | intel_encoder->type); | |
371 | return -EINVAL; | |
372 | } | |
373 | ||
374 | parm |= type << (16 + port * 3); | |
375 | ||
376 | return swsci(dev, SWSCI_SBCB_DISPLAY_POWER_STATE, parm, NULL); | |
377 | } | |
378 | ||
ecbc5cf3 JN |
379 | static const struct { |
380 | pci_power_t pci_power_state; | |
381 | u32 parm; | |
382 | } power_state_map[] = { | |
383 | { PCI_D0, 0x00 }, | |
384 | { PCI_D1, 0x01 }, | |
385 | { PCI_D2, 0x02 }, | |
386 | { PCI_D3hot, 0x04 }, | |
387 | { PCI_D3cold, 0x04 }, | |
388 | }; | |
389 | ||
390 | int intel_opregion_notify_adapter(struct drm_device *dev, pci_power_t state) | |
391 | { | |
392 | int i; | |
393 | ||
394 | if (!HAS_DDI(dev)) | |
395 | return 0; | |
396 | ||
397 | for (i = 0; i < ARRAY_SIZE(power_state_map); i++) { | |
398 | if (state == power_state_map[i].pci_power_state) | |
399 | return swsci(dev, SWSCI_SBCB_ADAPTER_POWER_STATE, | |
400 | power_state_map[i].parm, NULL); | |
401 | } | |
402 | ||
403 | return -EINVAL; | |
404 | } | |
405 | ||
8ee1c3db MG |
406 | static u32 asle_set_backlight(struct drm_device *dev, u32 bclp) |
407 | { | |
408 | struct drm_i915_private *dev_priv = dev->dev_private; | |
c91c9f32 | 409 | struct intel_connector *intel_connector; |
5bc4418b | 410 | struct opregion_asle __iomem *asle = dev_priv->opregion.asle; |
8ee1c3db | 411 | |
749052fb JN |
412 | DRM_DEBUG_DRIVER("bclp = 0x%08x\n", bclp); |
413 | ||
da882e5a | 414 | if (acpi_video_get_backlight_type() == acpi_backlight_native) { |
0b9f7d93 AL |
415 | DRM_DEBUG_KMS("opregion backlight request ignored\n"); |
416 | return 0; | |
417 | } | |
418 | ||
8ee1c3db | 419 | if (!(bclp & ASLE_BCLP_VALID)) |
507c1a45 | 420 | return ASLC_BACKLIGHT_FAILED; |
8ee1c3db MG |
421 | |
422 | bclp &= ASLE_BCLP_MSK; | |
a9573556 | 423 | if (bclp > 255) |
507c1a45 | 424 | return ASLC_BACKLIGHT_FAILED; |
8ee1c3db | 425 | |
51fd371b | 426 | drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); |
c91c9f32 | 427 | |
752aa88a | 428 | /* |
c91c9f32 JN |
429 | * Update backlight on all connectors that support backlight (usually |
430 | * only one). | |
752aa88a | 431 | */ |
540b5d02 | 432 | DRM_DEBUG_KMS("updating opregion backlight %d/255\n", bclp); |
dc5a4363 | 433 | list_for_each_entry(intel_connector, &dev->mode_config.connector_list, base.head) |
6dda730e | 434 | intel_panel_set_backlight_acpi(intel_connector, bclp, 255); |
cac6a5ae | 435 | iowrite32(DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID, &asle->cblv); |
8ee1c3db | 436 | |
51fd371b | 437 | drm_modeset_unlock(&dev->mode_config.connection_mutex); |
752aa88a | 438 | |
c91c9f32 JN |
439 | |
440 | return 0; | |
8ee1c3db MG |
441 | } |
442 | ||
443 | static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi) | |
444 | { | |
445 | /* alsi is the current ALS reading in lux. 0 indicates below sensor | |
446 | range, 0xffff indicates above sensor range. 1-0xfffe are valid */ | |
e93d440b | 447 | DRM_DEBUG_DRIVER("Illum is not supported\n"); |
507c1a45 | 448 | return ASLC_ALS_ILLUM_FAILED; |
8ee1c3db MG |
449 | } |
450 | ||
451 | static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb) | |
452 | { | |
e93d440b | 453 | DRM_DEBUG_DRIVER("PWM freq is not supported\n"); |
507c1a45 | 454 | return ASLC_PWM_FREQ_FAILED; |
8ee1c3db MG |
455 | } |
456 | ||
457 | static u32 asle_set_pfit(struct drm_device *dev, u32 pfit) | |
458 | { | |
459 | /* Panel fitting is currently controlled by the X code, so this is a | |
460 | noop until modesetting support works fully */ | |
e93d440b | 461 | DRM_DEBUG_DRIVER("Pfit is not supported\n"); |
507c1a45 PZ |
462 | return ASLC_PFIT_FAILED; |
463 | } | |
464 | ||
465 | static u32 asle_set_supported_rotation_angles(struct drm_device *dev, u32 srot) | |
466 | { | |
467 | DRM_DEBUG_DRIVER("SROT is not supported\n"); | |
468 | return ASLC_ROTATION_ANGLES_FAILED; | |
469 | } | |
470 | ||
471 | static u32 asle_set_button_array(struct drm_device *dev, u32 iuer) | |
472 | { | |
473 | if (!iuer) | |
474 | DRM_DEBUG_DRIVER("Button array event is not supported (nothing)\n"); | |
475 | if (iuer & ASLE_IUER_ROTATION_LOCK_BTN) | |
476 | DRM_DEBUG_DRIVER("Button array event is not supported (rotation lock)\n"); | |
477 | if (iuer & ASLE_IUER_VOLUME_DOWN_BTN) | |
478 | DRM_DEBUG_DRIVER("Button array event is not supported (volume down)\n"); | |
479 | if (iuer & ASLE_IUER_VOLUME_UP_BTN) | |
480 | DRM_DEBUG_DRIVER("Button array event is not supported (volume up)\n"); | |
481 | if (iuer & ASLE_IUER_WINDOWS_BTN) | |
482 | DRM_DEBUG_DRIVER("Button array event is not supported (windows)\n"); | |
483 | if (iuer & ASLE_IUER_POWER_BTN) | |
484 | DRM_DEBUG_DRIVER("Button array event is not supported (power)\n"); | |
485 | ||
486 | return ASLC_BUTTON_ARRAY_FAILED; | |
487 | } | |
488 | ||
489 | static u32 asle_set_convertible(struct drm_device *dev, u32 iuer) | |
490 | { | |
491 | if (iuer & ASLE_IUER_CONVERTIBLE) | |
492 | DRM_DEBUG_DRIVER("Convertible is not supported (clamshell)\n"); | |
493 | else | |
494 | DRM_DEBUG_DRIVER("Convertible is not supported (slate)\n"); | |
495 | ||
496 | return ASLC_CONVERTIBLE_FAILED; | |
497 | } | |
498 | ||
499 | static u32 asle_set_docking(struct drm_device *dev, u32 iuer) | |
500 | { | |
501 | if (iuer & ASLE_IUER_DOCKING) | |
502 | DRM_DEBUG_DRIVER("Docking is not supported (docked)\n"); | |
503 | else | |
504 | DRM_DEBUG_DRIVER("Docking is not supported (undocked)\n"); | |
505 | ||
506 | return ASLC_DOCKING_FAILED; | |
507 | } | |
508 | ||
509 | static u32 asle_isct_state(struct drm_device *dev) | |
510 | { | |
511 | DRM_DEBUG_DRIVER("ISCT is not supported\n"); | |
512 | return ASLC_ISCT_STATE_FAILED; | |
8ee1c3db MG |
513 | } |
514 | ||
91a60f20 | 515 | static void asle_work(struct work_struct *work) |
8ee1c3db | 516 | { |
91a60f20 JN |
517 | struct intel_opregion *opregion = |
518 | container_of(work, struct intel_opregion, asle_work); | |
519 | struct drm_i915_private *dev_priv = | |
520 | container_of(opregion, struct drm_i915_private, opregion); | |
521 | struct drm_device *dev = dev_priv->dev; | |
5bc4418b | 522 | struct opregion_asle __iomem *asle = dev_priv->opregion.asle; |
507c1a45 PZ |
523 | u32 aslc_stat = 0; |
524 | u32 aslc_req; | |
8ee1c3db MG |
525 | |
526 | if (!asle) | |
527 | return; | |
528 | ||
507c1a45 | 529 | aslc_req = ioread32(&asle->aslc); |
8ee1c3db | 530 | |
507c1a45 PZ |
531 | if (!(aslc_req & ASLC_REQ_MSK)) { |
532 | DRM_DEBUG_DRIVER("No request on ASLC interrupt 0x%08x\n", | |
533 | aslc_req); | |
8ee1c3db MG |
534 | return; |
535 | } | |
536 | ||
507c1a45 PZ |
537 | if (aslc_req & ASLC_SET_ALS_ILLUM) |
538 | aslc_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi)); | |
539 | ||
540 | if (aslc_req & ASLC_SET_BACKLIGHT) | |
541 | aslc_stat |= asle_set_backlight(dev, ioread32(&asle->bclp)); | |
542 | ||
543 | if (aslc_req & ASLC_SET_PFIT) | |
544 | aslc_stat |= asle_set_pfit(dev, ioread32(&asle->pfit)); | |
545 | ||
546 | if (aslc_req & ASLC_SET_PWM_FREQ) | |
547 | aslc_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb)); | |
548 | ||
549 | if (aslc_req & ASLC_SUPPORTED_ROTATION_ANGLES) | |
550 | aslc_stat |= asle_set_supported_rotation_angles(dev, | |
551 | ioread32(&asle->srot)); | |
552 | ||
553 | if (aslc_req & ASLC_BUTTON_ARRAY) | |
554 | aslc_stat |= asle_set_button_array(dev, ioread32(&asle->iuer)); | |
8ee1c3db | 555 | |
507c1a45 PZ |
556 | if (aslc_req & ASLC_CONVERTIBLE_INDICATOR) |
557 | aslc_stat |= asle_set_convertible(dev, ioread32(&asle->iuer)); | |
8ee1c3db | 558 | |
507c1a45 PZ |
559 | if (aslc_req & ASLC_DOCKING_INDICATOR) |
560 | aslc_stat |= asle_set_docking(dev, ioread32(&asle->iuer)); | |
8ee1c3db | 561 | |
507c1a45 PZ |
562 | if (aslc_req & ASLC_ISCT_STATE_CHANGE) |
563 | aslc_stat |= asle_isct_state(dev); | |
8ee1c3db | 564 | |
507c1a45 | 565 | iowrite32(aslc_stat, &asle->aslc); |
8ee1c3db MG |
566 | } |
567 | ||
91a60f20 JN |
568 | void intel_opregion_asle_intr(struct drm_device *dev) |
569 | { | |
570 | struct drm_i915_private *dev_priv = dev->dev_private; | |
571 | ||
572 | if (dev_priv->opregion.asle) | |
573 | schedule_work(&dev_priv->opregion.asle_work); | |
574 | } | |
575 | ||
8ee1c3db MG |
576 | #define ACPI_EV_DISPLAY_SWITCH (1<<0) |
577 | #define ACPI_EV_LID (1<<1) | |
578 | #define ACPI_EV_DOCK (1<<2) | |
579 | ||
580 | static struct intel_opregion *system_opregion; | |
581 | ||
b358d0a6 HE |
582 | static int intel_opregion_video_event(struct notifier_block *nb, |
583 | unsigned long val, void *data) | |
8ee1c3db MG |
584 | { |
585 | /* The only video events relevant to opregion are 0x80. These indicate | |
586 | either a docking event, lid switch or display switch request. In | |
587 | Linux, these are handled by the dock, button and video drivers. | |
f5a3d0c4 | 588 | */ |
8ee1c3db | 589 | |
5bc4418b | 590 | struct opregion_acpi __iomem *acpi; |
f5a3d0c4 MG |
591 | struct acpi_bus_event *event = data; |
592 | int ret = NOTIFY_OK; | |
593 | ||
594 | if (strcmp(event->device_class, ACPI_VIDEO_CLASS) != 0) | |
595 | return NOTIFY_DONE; | |
8ee1c3db MG |
596 | |
597 | if (!system_opregion) | |
598 | return NOTIFY_DONE; | |
599 | ||
600 | acpi = system_opregion->acpi; | |
f5a3d0c4 | 601 | |
5bc4418b BW |
602 | if (event->type == 0x80 && |
603 | (ioread32(&acpi->cevt) & 1) == 0) | |
f5a3d0c4 MG |
604 | ret = NOTIFY_BAD; |
605 | ||
5bc4418b | 606 | iowrite32(0, &acpi->csts); |
8ee1c3db | 607 | |
f5a3d0c4 | 608 | return ret; |
8ee1c3db MG |
609 | } |
610 | ||
611 | static struct notifier_block intel_opregion_notifier = { | |
612 | .notifier_call = intel_opregion_video_event, | |
613 | }; | |
614 | ||
74a365b3 MG |
615 | /* |
616 | * Initialise the DIDL field in opregion. This passes a list of devices to | |
617 | * the firmware. Values are defined by section B.4.2 of the ACPI specification | |
618 | * (version 3) | |
619 | */ | |
620 | ||
d5cbb22f JN |
621 | static u32 get_did(struct intel_opregion *opregion, int i) |
622 | { | |
623 | u32 did; | |
624 | ||
625 | if (i < ARRAY_SIZE(opregion->acpi->didl)) { | |
626 | did = ioread32(&opregion->acpi->didl[i]); | |
627 | } else { | |
628 | i -= ARRAY_SIZE(opregion->acpi->didl); | |
629 | ||
630 | if (WARN_ON(i >= ARRAY_SIZE(opregion->acpi->did2))) | |
631 | return 0; | |
632 | ||
633 | did = ioread32(&opregion->acpi->did2[i]); | |
634 | } | |
635 | ||
636 | return did; | |
637 | } | |
638 | ||
639 | static void set_did(struct intel_opregion *opregion, int i, u32 val) | |
640 | { | |
641 | if (i < ARRAY_SIZE(opregion->acpi->didl)) { | |
642 | iowrite32(val, &opregion->acpi->didl[i]); | |
643 | } else { | |
644 | i -= ARRAY_SIZE(opregion->acpi->didl); | |
645 | ||
646 | if (WARN_ON(i >= ARRAY_SIZE(opregion->acpi->did2))) | |
647 | return; | |
648 | ||
649 | iowrite32(val, &opregion->acpi->did2[i]); | |
650 | } | |
651 | } | |
652 | ||
74a365b3 MG |
653 | static void intel_didl_outputs(struct drm_device *dev) |
654 | { | |
655 | struct drm_i915_private *dev_priv = dev->dev_private; | |
656 | struct intel_opregion *opregion = &dev_priv->opregion; | |
657 | struct drm_connector *connector; | |
3143751f ZR |
658 | acpi_handle handle; |
659 | struct acpi_device *acpi_dev, *acpi_cdev, *acpi_video_bus = NULL; | |
660 | unsigned long long device_id; | |
661 | acpi_status status; | |
dfc2066d | 662 | u32 temp, max_outputs; |
74a365b3 MG |
663 | int i = 0; |
664 | ||
3a83f992 | 665 | handle = ACPI_HANDLE(&dev->pdev->dev); |
7d37beaa | 666 | if (!handle || acpi_bus_get_device(handle, &acpi_dev)) |
3143751f ZR |
667 | return; |
668 | ||
d4e1a692 | 669 | if (acpi_is_video_device(handle)) |
3143751f ZR |
670 | acpi_video_bus = acpi_dev; |
671 | else { | |
672 | list_for_each_entry(acpi_cdev, &acpi_dev->children, node) { | |
d4e1a692 | 673 | if (acpi_is_video_device(acpi_cdev->handle)) { |
3143751f ZR |
674 | acpi_video_bus = acpi_cdev; |
675 | break; | |
676 | } | |
677 | } | |
678 | } | |
679 | ||
680 | if (!acpi_video_bus) { | |
b4fe8156 | 681 | DRM_ERROR("No ACPI video bus found\n"); |
3143751f ZR |
682 | return; |
683 | } | |
684 | ||
dfc2066d JN |
685 | /* |
686 | * In theory, did2, the extended didl, gets added at opregion version | |
687 | * 3.0. In practice, however, we're supposed to set it for earlier | |
688 | * versions as well, since a BIOS that doesn't understand did2 should | |
689 | * not look at it anyway. Use a variable so we can tweak this if a need | |
690 | * arises later. | |
691 | */ | |
692 | max_outputs = ARRAY_SIZE(opregion->acpi->didl) + | |
693 | ARRAY_SIZE(opregion->acpi->did2); | |
694 | ||
3143751f | 695 | list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) { |
dfc2066d JN |
696 | if (i >= max_outputs) { |
697 | DRM_DEBUG_KMS("More than %u outputs detected via ACPI\n", | |
698 | max_outputs); | |
3143751f ZR |
699 | return; |
700 | } | |
d5cbb22f JN |
701 | status = acpi_evaluate_integer(acpi_cdev->handle, "_ADR", |
702 | NULL, &device_id); | |
3143751f ZR |
703 | if (ACPI_SUCCESS(status)) { |
704 | if (!device_id) | |
705 | goto blind_set; | |
d5cbb22f | 706 | set_did(opregion, i++, (u32)(device_id & 0x0f0f)); |
3143751f ZR |
707 | } |
708 | } | |
709 | ||
710 | end: | |
dfc2066d JN |
711 | DRM_DEBUG_KMS("%d outputs detected\n", i); |
712 | ||
713 | /* If fewer than max outputs, the list must be null terminated */ | |
714 | if (i < max_outputs) | |
d5cbb22f | 715 | set_did(opregion, i, 0); |
3143751f ZR |
716 | return; |
717 | ||
718 | blind_set: | |
719 | i = 0; | |
74a365b3 MG |
720 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
721 | int output_type = ACPI_OTHER_OUTPUT; | |
dfc2066d JN |
722 | if (i >= max_outputs) { |
723 | DRM_DEBUG_KMS("More than %u outputs in connector list\n", | |
724 | max_outputs); | |
74a365b3 MG |
725 | return; |
726 | } | |
727 | switch (connector->connector_type) { | |
728 | case DRM_MODE_CONNECTOR_VGA: | |
729 | case DRM_MODE_CONNECTOR_DVIA: | |
730 | output_type = ACPI_VGA_OUTPUT; | |
731 | break; | |
732 | case DRM_MODE_CONNECTOR_Composite: | |
733 | case DRM_MODE_CONNECTOR_SVIDEO: | |
734 | case DRM_MODE_CONNECTOR_Component: | |
735 | case DRM_MODE_CONNECTOR_9PinDIN: | |
736 | output_type = ACPI_TV_OUTPUT; | |
737 | break; | |
738 | case DRM_MODE_CONNECTOR_DVII: | |
739 | case DRM_MODE_CONNECTOR_DVID: | |
740 | case DRM_MODE_CONNECTOR_DisplayPort: | |
741 | case DRM_MODE_CONNECTOR_HDMIA: | |
742 | case DRM_MODE_CONNECTOR_HDMIB: | |
743 | output_type = ACPI_DIGITAL_OUTPUT; | |
744 | break; | |
745 | case DRM_MODE_CONNECTOR_LVDS: | |
746 | output_type = ACPI_LVDS_OUTPUT; | |
747 | break; | |
748 | } | |
d5cbb22f JN |
749 | temp = get_did(opregion, i); |
750 | set_did(opregion, i, temp | (1 << 31) | output_type | i); | |
74a365b3 MG |
751 | i++; |
752 | } | |
3143751f | 753 | goto end; |
74a365b3 MG |
754 | } |
755 | ||
d627b62f L |
756 | static void intel_setup_cadls(struct drm_device *dev) |
757 | { | |
758 | struct drm_i915_private *dev_priv = dev->dev_private; | |
759 | struct intel_opregion *opregion = &dev_priv->opregion; | |
760 | int i = 0; | |
761 | u32 disp_id; | |
762 | ||
763 | /* Initialize the CADL field by duplicating the DIDL values. | |
764 | * Technically, this is not always correct as display outputs may exist, | |
765 | * but not active. This initialization is necessary for some Clevo | |
766 | * laptops that check this field before processing the brightness and | |
767 | * display switching hotkeys. Just like DIDL, CADL is NULL-terminated if | |
768 | * there are less than eight devices. */ | |
769 | do { | |
d5cbb22f | 770 | disp_id = get_did(opregion, i); |
d627b62f L |
771 | iowrite32(disp_id, &opregion->acpi->cadl[i]); |
772 | } while (++i < 8 && disp_id != 0); | |
773 | } | |
774 | ||
44834a67 CW |
775 | void intel_opregion_init(struct drm_device *dev) |
776 | { | |
777 | struct drm_i915_private *dev_priv = dev->dev_private; | |
778 | struct intel_opregion *opregion = &dev_priv->opregion; | |
779 | ||
780 | if (!opregion->header) | |
781 | return; | |
782 | ||
783 | if (opregion->acpi) { | |
3f52c6ed DV |
784 | intel_didl_outputs(dev); |
785 | intel_setup_cadls(dev); | |
44834a67 CW |
786 | |
787 | /* Notify BIOS we are ready to handle ACPI video ext notifs. | |
788 | * Right now, all the events are handled by the ACPI video module. | |
789 | * We don't actually need to do anything with them. */ | |
5bc4418b BW |
790 | iowrite32(0, &opregion->acpi->csts); |
791 | iowrite32(1, &opregion->acpi->drdy); | |
44834a67 CW |
792 | |
793 | system_opregion = opregion; | |
794 | register_acpi_notifier(&intel_opregion_notifier); | |
795 | } | |
796 | ||
68bca4b0 | 797 | if (opregion->asle) { |
68bca4b0 JN |
798 | iowrite32(ASLE_TCHE_BLC_EN, &opregion->asle->tche); |
799 | iowrite32(ASLE_ARDY_READY, &opregion->asle->ardy); | |
800 | } | |
44834a67 CW |
801 | } |
802 | ||
803 | void intel_opregion_fini(struct drm_device *dev) | |
804 | { | |
805 | struct drm_i915_private *dev_priv = dev->dev_private; | |
806 | struct intel_opregion *opregion = &dev_priv->opregion; | |
807 | ||
808 | if (!opregion->header) | |
809 | return; | |
810 | ||
68bca4b0 JN |
811 | if (opregion->asle) |
812 | iowrite32(ASLE_ARDY_NOT_READY, &opregion->asle->ardy); | |
813 | ||
91a60f20 JN |
814 | cancel_work_sync(&dev_priv->opregion.asle_work); |
815 | ||
44834a67 | 816 | if (opregion->acpi) { |
5bc4418b | 817 | iowrite32(0, &opregion->acpi->drdy); |
44834a67 CW |
818 | |
819 | system_opregion = NULL; | |
820 | unregister_acpi_notifier(&intel_opregion_notifier); | |
821 | } | |
822 | ||
823 | /* just clear all opregion memory pointers now */ | |
824 | iounmap(opregion->header); | |
825 | opregion->header = NULL; | |
826 | opregion->acpi = NULL; | |
827 | opregion->swsci = NULL; | |
828 | opregion->asle = NULL; | |
829 | opregion->vbt = NULL; | |
794a79a6 | 830 | opregion->lid_state = NULL; |
44834a67 | 831 | } |
ebde53c7 JN |
832 | |
833 | static void swsci_setup(struct drm_device *dev) | |
834 | { | |
835 | struct drm_i915_private *dev_priv = dev->dev_private; | |
836 | struct intel_opregion *opregion = &dev_priv->opregion; | |
837 | bool requested_callbacks = false; | |
838 | u32 tmp; | |
839 | ||
840 | /* Sub-function code 0 is okay, let's allow them. */ | |
841 | opregion->swsci_gbda_sub_functions = 1; | |
842 | opregion->swsci_sbcb_sub_functions = 1; | |
843 | ||
844 | /* We use GBDA to ask for supported GBDA calls. */ | |
845 | if (swsci(dev, SWSCI_GBDA_SUPPORTED_CALLS, 0, &tmp) == 0) { | |
846 | /* make the bits match the sub-function codes */ | |
847 | tmp <<= 1; | |
848 | opregion->swsci_gbda_sub_functions |= tmp; | |
849 | } | |
850 | ||
851 | /* | |
852 | * We also use GBDA to ask for _requested_ SBCB callbacks. The driver | |
853 | * must not call interfaces that are not specifically requested by the | |
854 | * bios. | |
855 | */ | |
856 | if (swsci(dev, SWSCI_GBDA_REQUESTED_CALLBACKS, 0, &tmp) == 0) { | |
857 | /* here, the bits already match sub-function codes */ | |
858 | opregion->swsci_sbcb_sub_functions |= tmp; | |
859 | requested_callbacks = true; | |
860 | } | |
861 | ||
862 | /* | |
863 | * But we use SBCB to ask for _supported_ SBCB calls. This does not mean | |
864 | * the callback is _requested_. But we still can't call interfaces that | |
865 | * are not requested. | |
866 | */ | |
867 | if (swsci(dev, SWSCI_SBCB_SUPPORTED_CALLBACKS, 0, &tmp) == 0) { | |
868 | /* make the bits match the sub-function codes */ | |
869 | u32 low = tmp & 0x7ff; | |
870 | u32 high = tmp & ~0xfff; /* bit 11 is reserved */ | |
871 | tmp = (high << 4) | (low << 1) | 1; | |
872 | ||
873 | /* best guess what to do with supported wrt requested */ | |
874 | if (requested_callbacks) { | |
875 | u32 req = opregion->swsci_sbcb_sub_functions; | |
876 | if ((req & tmp) != req) | |
877 | DRM_DEBUG_DRIVER("SWSCI BIOS requested (%08x) SBCB callbacks that are not supported (%08x)\n", req, tmp); | |
878 | /* XXX: for now, trust the requested callbacks */ | |
879 | /* opregion->swsci_sbcb_sub_functions &= tmp; */ | |
880 | } else { | |
881 | opregion->swsci_sbcb_sub_functions |= tmp; | |
882 | } | |
883 | } | |
884 | ||
885 | DRM_DEBUG_DRIVER("SWSCI GBDA callbacks %08x, SBCB callbacks %08x\n", | |
886 | opregion->swsci_gbda_sub_functions, | |
887 | opregion->swsci_sbcb_sub_functions); | |
888 | } | |
889 | #else /* CONFIG_ACPI */ | |
890 | static inline void swsci_setup(struct drm_device *dev) {} | |
891 | #endif /* CONFIG_ACPI */ | |
44834a67 CW |
892 | |
893 | int intel_opregion_setup(struct drm_device *dev) | |
8ee1c3db MG |
894 | { |
895 | struct drm_i915_private *dev_priv = dev->dev_private; | |
896 | struct intel_opregion *opregion = &dev_priv->opregion; | |
5bc4418b | 897 | void __iomem *base; |
8ee1c3db | 898 | u32 asls, mboxes; |
5bc4418b | 899 | char buf[sizeof(OPREGION_SIGNATURE)]; |
8ee1c3db MG |
900 | int err = 0; |
901 | ||
2d80391d JN |
902 | BUILD_BUG_ON(sizeof(struct opregion_header) != 0x100); |
903 | BUILD_BUG_ON(sizeof(struct opregion_acpi) != 0x100); | |
904 | BUILD_BUG_ON(sizeof(struct opregion_swsci) != 0x100); | |
905 | BUILD_BUG_ON(sizeof(struct opregion_asle) != 0x100); | |
906 | ||
8ee1c3db | 907 | pci_read_config_dword(dev->pdev, PCI_ASLS, &asls); |
44d98a61 | 908 | DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls); |
8ee1c3db | 909 | if (asls == 0) { |
44d98a61 | 910 | DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n"); |
8ee1c3db MG |
911 | return -ENOTSUPP; |
912 | } | |
913 | ||
1dca220b | 914 | #ifdef CONFIG_ACPI |
91a60f20 | 915 | INIT_WORK(&opregion->asle_work, asle_work); |
1dca220b | 916 | #endif |
91a60f20 | 917 | |
b705120e | 918 | base = acpi_os_ioremap(asls, OPREGION_SIZE); |
8ee1c3db MG |
919 | if (!base) |
920 | return -ENOMEM; | |
921 | ||
5bc4418b BW |
922 | memcpy_fromio(buf, base, sizeof(buf)); |
923 | ||
924 | if (memcmp(buf, OPREGION_SIGNATURE, 16)) { | |
44d98a61 | 925 | DRM_DEBUG_DRIVER("opregion signature mismatch\n"); |
8ee1c3db MG |
926 | err = -EINVAL; |
927 | goto err_out; | |
928 | } | |
44834a67 CW |
929 | opregion->header = base; |
930 | opregion->vbt = base + OPREGION_VBT_OFFSET; | |
8ee1c3db | 931 | |
82d3c90c | 932 | opregion->lid_state = base + ACPI_CLID; |
01fe9dbd | 933 | |
5bc4418b | 934 | mboxes = ioread32(&opregion->header->mboxes); |
8ee1c3db | 935 | if (mboxes & MBOX_ACPI) { |
44d98a61 | 936 | DRM_DEBUG_DRIVER("Public ACPI methods supported\n"); |
8ee1c3db | 937 | opregion->acpi = base + OPREGION_ACPI_OFFSET; |
8ee1c3db | 938 | } |
8ee1c3db MG |
939 | |
940 | if (mboxes & MBOX_SWSCI) { | |
44d98a61 | 941 | DRM_DEBUG_DRIVER("SWSCI supported\n"); |
8ee1c3db | 942 | opregion->swsci = base + OPREGION_SWSCI_OFFSET; |
ebde53c7 | 943 | swsci_setup(dev); |
8ee1c3db MG |
944 | } |
945 | if (mboxes & MBOX_ASLE) { | |
44d98a61 | 946 | DRM_DEBUG_DRIVER("ASLE supported\n"); |
8ee1c3db | 947 | opregion->asle = base + OPREGION_ASLE_OFFSET; |
68bca4b0 JN |
948 | |
949 | iowrite32(ASLE_ARDY_NOT_READY, &opregion->asle->ardy); | |
8ee1c3db MG |
950 | } |
951 | ||
8ee1c3db MG |
952 | return 0; |
953 | ||
954 | err_out: | |
30c56660 | 955 | iounmap(base); |
8ee1c3db MG |
956 | return err; |
957 | } |