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8ee1c3db MG |
1 | /* |
2 | * Copyright 2008 Intel Corporation <hong.liu@intel.com> | |
3 | * Copyright 2008 Red Hat <mjg@redhat.com> | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining | |
6 | * a copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sub license, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial | |
15 | * portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
20 | * NON-INFRINGEMENT. IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE | |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
22 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
23 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
24 | * SOFTWARE. | |
25 | * | |
26 | */ | |
27 | ||
a70491cc JP |
28 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
29 | ||
8ee1c3db | 30 | #include <linux/acpi.h> |
74a365b3 | 31 | #include <acpi/video.h> |
8ee1c3db | 32 | |
760285e7 DH |
33 | #include <drm/drmP.h> |
34 | #include <drm/i915_drm.h> | |
8ee1c3db | 35 | #include "i915_drv.h" |
a9573556 | 36 | #include "intel_drv.h" |
8ee1c3db | 37 | |
ebde53c7 JN |
38 | #define PCI_ASLE 0xe4 |
39 | #define PCI_ASLS 0xfc | |
40 | #define PCI_SWSCI 0xe8 | |
41 | #define PCI_SWSCI_SCISEL (1 << 15) | |
42 | #define PCI_SWSCI_GSSCIE (1 << 0) | |
8ee1c3db | 43 | |
8ee1c3db MG |
44 | #define OPREGION_HEADER_OFFSET 0 |
45 | #define OPREGION_ACPI_OFFSET 0x100 | |
82d3c90c CW |
46 | #define ACPI_CLID 0x01ac /* current lid state indicator */ |
47 | #define ACPI_CDCK 0x01b0 /* current docking state indicator */ | |
8ee1c3db MG |
48 | #define OPREGION_SWSCI_OFFSET 0x200 |
49 | #define OPREGION_ASLE_OFFSET 0x300 | |
44834a67 | 50 | #define OPREGION_VBT_OFFSET 0x400 |
8ee1c3db MG |
51 | |
52 | #define OPREGION_SIGNATURE "IntelGraphicsMem" | |
53 | #define MBOX_ACPI (1<<0) | |
54 | #define MBOX_SWSCI (1<<1) | |
55 | #define MBOX_ASLE (1<<2) | |
56 | ||
57 | struct opregion_header { | |
0206e353 AJ |
58 | u8 signature[16]; |
59 | u32 size; | |
60 | u32 opregion_ver; | |
61 | u8 bios_ver[32]; | |
62 | u8 vbios_ver[16]; | |
63 | u8 driver_ver[16]; | |
64 | u32 mboxes; | |
65 | u8 reserved[164]; | |
e4451239 | 66 | } __packed; |
8ee1c3db MG |
67 | |
68 | /* OpRegion mailbox #1: public ACPI methods */ | |
69 | struct opregion_acpi { | |
0206e353 AJ |
70 | u32 drdy; /* driver readiness */ |
71 | u32 csts; /* notification status */ | |
72 | u32 cevt; /* current event */ | |
73 | u8 rsvd1[20]; | |
74 | u32 didl[8]; /* supported display devices ID list */ | |
75 | u32 cpdl[8]; /* currently presented display list */ | |
76 | u32 cadl[8]; /* currently active display list */ | |
77 | u32 nadl[8]; /* next active devices list */ | |
78 | u32 aslp; /* ASL sleep time-out */ | |
79 | u32 tidx; /* toggle table index */ | |
80 | u32 chpd; /* current hotplug enable indicator */ | |
81 | u32 clid; /* current lid state*/ | |
82 | u32 cdck; /* current docking state */ | |
83 | u32 sxsw; /* Sx state resume */ | |
84 | u32 evts; /* ASL supported events */ | |
85 | u32 cnot; /* current OS notification */ | |
86 | u32 nrdy; /* driver status */ | |
87 | u8 rsvd2[60]; | |
e4451239 | 88 | } __packed; |
8ee1c3db MG |
89 | |
90 | /* OpRegion mailbox #2: SWSCI */ | |
91 | struct opregion_swsci { | |
0206e353 AJ |
92 | u32 scic; /* SWSCI command|status|data */ |
93 | u32 parm; /* command parameters */ | |
94 | u32 dslp; /* driver sleep time-out */ | |
95 | u8 rsvd[244]; | |
e4451239 | 96 | } __packed; |
8ee1c3db MG |
97 | |
98 | /* OpRegion mailbox #3: ASLE */ | |
99 | struct opregion_asle { | |
0206e353 AJ |
100 | u32 ardy; /* driver readiness */ |
101 | u32 aslc; /* ASLE interrupt command */ | |
102 | u32 tche; /* technology enabled indicator */ | |
103 | u32 alsi; /* current ALS illuminance reading */ | |
104 | u32 bclp; /* backlight brightness to set */ | |
105 | u32 pfit; /* panel fitting state */ | |
106 | u32 cblv; /* current brightness level */ | |
107 | u16 bclm[20]; /* backlight level duty cycle mapping table */ | |
108 | u32 cpfm; /* current panel fitting mode */ | |
109 | u32 epfm; /* enabled panel fitting modes */ | |
110 | u8 plut[74]; /* panel LUT and identifier */ | |
111 | u32 pfmb; /* PWM freq and min brightness */ | |
507c1a45 PZ |
112 | u32 cddv; /* color correction default values */ |
113 | u32 pcft; /* power conservation features */ | |
114 | u32 srot; /* supported rotation angles */ | |
115 | u32 iuer; /* IUER events */ | |
116 | u8 rsvd[86]; | |
e4451239 | 117 | } __packed; |
8ee1c3db | 118 | |
68bca4b0 JN |
119 | /* Driver readiness indicator */ |
120 | #define ASLE_ARDY_READY (1 << 0) | |
121 | #define ASLE_ARDY_NOT_READY (0 << 0) | |
122 | ||
507c1a45 PZ |
123 | /* ASLE Interrupt Command (ASLC) bits */ |
124 | #define ASLC_SET_ALS_ILLUM (1 << 0) | |
125 | #define ASLC_SET_BACKLIGHT (1 << 1) | |
126 | #define ASLC_SET_PFIT (1 << 2) | |
127 | #define ASLC_SET_PWM_FREQ (1 << 3) | |
128 | #define ASLC_SUPPORTED_ROTATION_ANGLES (1 << 4) | |
129 | #define ASLC_BUTTON_ARRAY (1 << 5) | |
130 | #define ASLC_CONVERTIBLE_INDICATOR (1 << 6) | |
131 | #define ASLC_DOCKING_INDICATOR (1 << 7) | |
132 | #define ASLC_ISCT_STATE_CHANGE (1 << 8) | |
133 | #define ASLC_REQ_MSK 0x1ff | |
134 | /* response bits */ | |
135 | #define ASLC_ALS_ILLUM_FAILED (1 << 10) | |
136 | #define ASLC_BACKLIGHT_FAILED (1 << 12) | |
137 | #define ASLC_PFIT_FAILED (1 << 14) | |
138 | #define ASLC_PWM_FREQ_FAILED (1 << 16) | |
139 | #define ASLC_ROTATION_ANGLES_FAILED (1 << 18) | |
140 | #define ASLC_BUTTON_ARRAY_FAILED (1 << 20) | |
141 | #define ASLC_CONVERTIBLE_FAILED (1 << 22) | |
142 | #define ASLC_DOCKING_FAILED (1 << 24) | |
143 | #define ASLC_ISCT_STATE_FAILED (1 << 26) | |
8ee1c3db | 144 | |
f599cc29 JN |
145 | /* Technology enabled indicator */ |
146 | #define ASLE_TCHE_ALS_EN (1 << 0) | |
147 | #define ASLE_TCHE_BLC_EN (1 << 1) | |
148 | #define ASLE_TCHE_PFIT_EN (1 << 2) | |
149 | #define ASLE_TCHE_PFMB_EN (1 << 3) | |
150 | ||
8ee1c3db MG |
151 | /* ASLE backlight brightness to set */ |
152 | #define ASLE_BCLP_VALID (1<<31) | |
153 | #define ASLE_BCLP_MSK (~(1<<31)) | |
154 | ||
155 | /* ASLE panel fitting request */ | |
156 | #define ASLE_PFIT_VALID (1<<31) | |
157 | #define ASLE_PFIT_CENTER (1<<0) | |
158 | #define ASLE_PFIT_STRETCH_TEXT (1<<1) | |
159 | #define ASLE_PFIT_STRETCH_GFX (1<<2) | |
160 | ||
161 | /* PWM frequency and minimum brightness */ | |
162 | #define ASLE_PFMB_BRIGHTNESS_MASK (0xff) | |
163 | #define ASLE_PFMB_BRIGHTNESS_VALID (1<<8) | |
164 | #define ASLE_PFMB_PWM_MASK (0x7ffffe00) | |
165 | #define ASLE_PFMB_PWM_VALID (1<<31) | |
166 | ||
167 | #define ASLE_CBLV_VALID (1<<31) | |
168 | ||
507c1a45 PZ |
169 | /* IUER */ |
170 | #define ASLE_IUER_DOCKING (1 << 7) | |
171 | #define ASLE_IUER_CONVERTIBLE (1 << 6) | |
172 | #define ASLE_IUER_ROTATION_LOCK_BTN (1 << 4) | |
173 | #define ASLE_IUER_VOLUME_DOWN_BTN (1 << 3) | |
174 | #define ASLE_IUER_VOLUME_UP_BTN (1 << 2) | |
175 | #define ASLE_IUER_WINDOWS_BTN (1 << 1) | |
176 | #define ASLE_IUER_POWER_BTN (1 << 0) | |
177 | ||
ebde53c7 JN |
178 | /* Software System Control Interrupt (SWSCI) */ |
179 | #define SWSCI_SCIC_INDICATOR (1 << 0) | |
180 | #define SWSCI_SCIC_MAIN_FUNCTION_SHIFT 1 | |
181 | #define SWSCI_SCIC_MAIN_FUNCTION_MASK (0xf << 1) | |
182 | #define SWSCI_SCIC_SUB_FUNCTION_SHIFT 8 | |
183 | #define SWSCI_SCIC_SUB_FUNCTION_MASK (0xff << 8) | |
184 | #define SWSCI_SCIC_EXIT_PARAMETER_SHIFT 8 | |
185 | #define SWSCI_SCIC_EXIT_PARAMETER_MASK (0xff << 8) | |
186 | #define SWSCI_SCIC_EXIT_STATUS_SHIFT 5 | |
187 | #define SWSCI_SCIC_EXIT_STATUS_MASK (7 << 5) | |
188 | #define SWSCI_SCIC_EXIT_STATUS_SUCCESS 1 | |
189 | ||
190 | #define SWSCI_FUNCTION_CODE(main, sub) \ | |
191 | ((main) << SWSCI_SCIC_MAIN_FUNCTION_SHIFT | \ | |
192 | (sub) << SWSCI_SCIC_SUB_FUNCTION_SHIFT) | |
193 | ||
194 | /* SWSCI: Get BIOS Data (GBDA) */ | |
195 | #define SWSCI_GBDA 4 | |
196 | #define SWSCI_GBDA_SUPPORTED_CALLS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 0) | |
197 | #define SWSCI_GBDA_REQUESTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 1) | |
198 | #define SWSCI_GBDA_BOOT_DISPLAY_PREF SWSCI_FUNCTION_CODE(SWSCI_GBDA, 4) | |
199 | #define SWSCI_GBDA_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 5) | |
200 | #define SWSCI_GBDA_TV_STANDARD SWSCI_FUNCTION_CODE(SWSCI_GBDA, 6) | |
201 | #define SWSCI_GBDA_INTERNAL_GRAPHICS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 7) | |
202 | #define SWSCI_GBDA_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_GBDA, 10) | |
203 | ||
204 | /* SWSCI: System BIOS Callbacks (SBCB) */ | |
205 | #define SWSCI_SBCB 6 | |
206 | #define SWSCI_SBCB_SUPPORTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 0) | |
207 | #define SWSCI_SBCB_INIT_COMPLETION SWSCI_FUNCTION_CODE(SWSCI_SBCB, 1) | |
208 | #define SWSCI_SBCB_PRE_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 3) | |
209 | #define SWSCI_SBCB_POST_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 4) | |
210 | #define SWSCI_SBCB_DISPLAY_SWITCH SWSCI_FUNCTION_CODE(SWSCI_SBCB, 5) | |
211 | #define SWSCI_SBCB_SET_TV_FORMAT SWSCI_FUNCTION_CODE(SWSCI_SBCB, 6) | |
212 | #define SWSCI_SBCB_ADAPTER_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 7) | |
213 | #define SWSCI_SBCB_DISPLAY_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 8) | |
214 | #define SWSCI_SBCB_SET_BOOT_DISPLAY SWSCI_FUNCTION_CODE(SWSCI_SBCB, 9) | |
215 | #define SWSCI_SBCB_SET_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 10) | |
216 | #define SWSCI_SBCB_SET_INTERNAL_GFX SWSCI_FUNCTION_CODE(SWSCI_SBCB, 11) | |
217 | #define SWSCI_SBCB_POST_HIRES_TO_DOS_FS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 16) | |
218 | #define SWSCI_SBCB_SUSPEND_RESUME SWSCI_FUNCTION_CODE(SWSCI_SBCB, 17) | |
219 | #define SWSCI_SBCB_SET_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 18) | |
220 | #define SWSCI_SBCB_POST_VBE_PM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 19) | |
221 | #define SWSCI_SBCB_ENABLE_DISABLE_AUDIO SWSCI_FUNCTION_CODE(SWSCI_SBCB, 21) | |
222 | ||
74a365b3 MG |
223 | #define ACPI_OTHER_OUTPUT (0<<8) |
224 | #define ACPI_VGA_OUTPUT (1<<8) | |
225 | #define ACPI_TV_OUTPUT (2<<8) | |
226 | #define ACPI_DIGITAL_OUTPUT (3<<8) | |
227 | #define ACPI_LVDS_OUTPUT (4<<8) | |
228 | ||
bdde5c6a JN |
229 | #define MAX_DSLP 1500 |
230 | ||
44834a67 | 231 | #ifdef CONFIG_ACPI |
ebde53c7 JN |
232 | static int swsci(struct drm_device *dev, u32 function, u32 parm, u32 *parm_out) |
233 | { | |
234 | struct drm_i915_private *dev_priv = dev->dev_private; | |
235 | struct opregion_swsci __iomem *swsci = dev_priv->opregion.swsci; | |
236 | u32 main_function, sub_function, scic; | |
237 | u16 pci_swsci; | |
238 | u32 dslp; | |
239 | ||
240 | if (!swsci) | |
241 | return -ENODEV; | |
242 | ||
243 | main_function = (function & SWSCI_SCIC_MAIN_FUNCTION_MASK) >> | |
244 | SWSCI_SCIC_MAIN_FUNCTION_SHIFT; | |
245 | sub_function = (function & SWSCI_SCIC_SUB_FUNCTION_MASK) >> | |
246 | SWSCI_SCIC_SUB_FUNCTION_SHIFT; | |
247 | ||
248 | /* Check if we can call the function. See swsci_setup for details. */ | |
249 | if (main_function == SWSCI_SBCB) { | |
250 | if ((dev_priv->opregion.swsci_sbcb_sub_functions & | |
251 | (1 << sub_function)) == 0) | |
252 | return -EINVAL; | |
253 | } else if (main_function == SWSCI_GBDA) { | |
254 | if ((dev_priv->opregion.swsci_gbda_sub_functions & | |
255 | (1 << sub_function)) == 0) | |
256 | return -EINVAL; | |
257 | } | |
258 | ||
259 | /* Driver sleep timeout in ms. */ | |
260 | dslp = ioread32(&swsci->dslp); | |
261 | if (!dslp) { | |
4994aa8c PZ |
262 | /* The spec says 2ms should be the default, but it's too small |
263 | * for some machines. */ | |
264 | dslp = 50; | |
bdde5c6a | 265 | } else if (dslp > MAX_DSLP) { |
ebde53c7 | 266 | /* Hey bios, trust must be earned. */ |
bdde5c6a JN |
267 | DRM_INFO_ONCE("ACPI BIOS requests an excessive sleep of %u ms, " |
268 | "using %u ms instead\n", dslp, MAX_DSLP); | |
269 | dslp = MAX_DSLP; | |
ebde53c7 JN |
270 | } |
271 | ||
272 | /* The spec tells us to do this, but we are the only user... */ | |
273 | scic = ioread32(&swsci->scic); | |
274 | if (scic & SWSCI_SCIC_INDICATOR) { | |
275 | DRM_DEBUG_DRIVER("SWSCI request already in progress\n"); | |
276 | return -EBUSY; | |
277 | } | |
278 | ||
279 | scic = function | SWSCI_SCIC_INDICATOR; | |
280 | ||
281 | iowrite32(parm, &swsci->parm); | |
282 | iowrite32(scic, &swsci->scic); | |
283 | ||
284 | /* Ensure SCI event is selected and event trigger is cleared. */ | |
285 | pci_read_config_word(dev->pdev, PCI_SWSCI, &pci_swsci); | |
286 | if (!(pci_swsci & PCI_SWSCI_SCISEL) || (pci_swsci & PCI_SWSCI_GSSCIE)) { | |
287 | pci_swsci |= PCI_SWSCI_SCISEL; | |
288 | pci_swsci &= ~PCI_SWSCI_GSSCIE; | |
289 | pci_write_config_word(dev->pdev, PCI_SWSCI, pci_swsci); | |
290 | } | |
291 | ||
292 | /* Use event trigger to tell bios to check the mail. */ | |
293 | pci_swsci |= PCI_SWSCI_GSSCIE; | |
294 | pci_write_config_word(dev->pdev, PCI_SWSCI, pci_swsci); | |
295 | ||
296 | /* Poll for the result. */ | |
297 | #define C (((scic = ioread32(&swsci->scic)) & SWSCI_SCIC_INDICATOR) == 0) | |
298 | if (wait_for(C, dslp)) { | |
299 | DRM_DEBUG_DRIVER("SWSCI request timed out\n"); | |
300 | return -ETIMEDOUT; | |
301 | } | |
302 | ||
303 | scic = (scic & SWSCI_SCIC_EXIT_STATUS_MASK) >> | |
304 | SWSCI_SCIC_EXIT_STATUS_SHIFT; | |
305 | ||
306 | /* Note: scic == 0 is an error! */ | |
307 | if (scic != SWSCI_SCIC_EXIT_STATUS_SUCCESS) { | |
308 | DRM_DEBUG_DRIVER("SWSCI request error %u\n", scic); | |
309 | return -EIO; | |
310 | } | |
311 | ||
312 | if (parm_out) | |
313 | *parm_out = ioread32(&swsci->parm); | |
314 | ||
315 | return 0; | |
316 | ||
317 | #undef C | |
318 | } | |
319 | ||
9c4b0a68 JN |
320 | #define DISPLAY_TYPE_CRT 0 |
321 | #define DISPLAY_TYPE_TV 1 | |
322 | #define DISPLAY_TYPE_EXTERNAL_FLAT_PANEL 2 | |
323 | #define DISPLAY_TYPE_INTERNAL_FLAT_PANEL 3 | |
324 | ||
325 | int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder, | |
326 | bool enable) | |
327 | { | |
328 | struct drm_device *dev = intel_encoder->base.dev; | |
329 | u32 parm = 0; | |
330 | u32 type = 0; | |
331 | u32 port; | |
332 | ||
333 | /* don't care about old stuff for now */ | |
334 | if (!HAS_DDI(dev)) | |
335 | return 0; | |
336 | ||
337 | port = intel_ddi_get_encoder_port(intel_encoder); | |
338 | if (port == PORT_E) { | |
339 | port = 0; | |
340 | } else { | |
341 | parm |= 1 << port; | |
342 | port++; | |
343 | } | |
344 | ||
345 | if (!enable) | |
346 | parm |= 4 << 8; | |
347 | ||
348 | switch (intel_encoder->type) { | |
349 | case INTEL_OUTPUT_ANALOG: | |
350 | type = DISPLAY_TYPE_CRT; | |
351 | break; | |
352 | case INTEL_OUTPUT_UNKNOWN: | |
353 | case INTEL_OUTPUT_DISPLAYPORT: | |
354 | case INTEL_OUTPUT_HDMI: | |
0e32b39c | 355 | case INTEL_OUTPUT_DP_MST: |
9c4b0a68 JN |
356 | type = DISPLAY_TYPE_EXTERNAL_FLAT_PANEL; |
357 | break; | |
358 | case INTEL_OUTPUT_EDP: | |
359 | type = DISPLAY_TYPE_INTERNAL_FLAT_PANEL; | |
360 | break; | |
361 | default: | |
362 | WARN_ONCE(1, "unsupported intel_encoder type %d\n", | |
363 | intel_encoder->type); | |
364 | return -EINVAL; | |
365 | } | |
366 | ||
367 | parm |= type << (16 + port * 3); | |
368 | ||
369 | return swsci(dev, SWSCI_SBCB_DISPLAY_POWER_STATE, parm, NULL); | |
370 | } | |
371 | ||
ecbc5cf3 JN |
372 | static const struct { |
373 | pci_power_t pci_power_state; | |
374 | u32 parm; | |
375 | } power_state_map[] = { | |
376 | { PCI_D0, 0x00 }, | |
377 | { PCI_D1, 0x01 }, | |
378 | { PCI_D2, 0x02 }, | |
379 | { PCI_D3hot, 0x04 }, | |
380 | { PCI_D3cold, 0x04 }, | |
381 | }; | |
382 | ||
383 | int intel_opregion_notify_adapter(struct drm_device *dev, pci_power_t state) | |
384 | { | |
385 | int i; | |
386 | ||
387 | if (!HAS_DDI(dev)) | |
388 | return 0; | |
389 | ||
390 | for (i = 0; i < ARRAY_SIZE(power_state_map); i++) { | |
391 | if (state == power_state_map[i].pci_power_state) | |
392 | return swsci(dev, SWSCI_SBCB_ADAPTER_POWER_STATE, | |
393 | power_state_map[i].parm, NULL); | |
394 | } | |
395 | ||
396 | return -EINVAL; | |
397 | } | |
398 | ||
77076c7a AL |
399 | /* |
400 | * If the vendor backlight interface is not in use and ACPI backlight interface | |
401 | * is broken, do not bother processing backlight change requests from firmware. | |
402 | */ | |
403 | static bool should_ignore_backlight_request(void) | |
404 | { | |
405 | return acpi_video_backlight_support() && | |
406 | !acpi_video_verify_backlight_support(); | |
407 | } | |
408 | ||
8ee1c3db MG |
409 | static u32 asle_set_backlight(struct drm_device *dev, u32 bclp) |
410 | { | |
411 | struct drm_i915_private *dev_priv = dev->dev_private; | |
c91c9f32 | 412 | struct intel_connector *intel_connector; |
5bc4418b | 413 | struct opregion_asle __iomem *asle = dev_priv->opregion.asle; |
8ee1c3db | 414 | |
749052fb JN |
415 | DRM_DEBUG_DRIVER("bclp = 0x%08x\n", bclp); |
416 | ||
77076c7a | 417 | if (should_ignore_backlight_request()) { |
0b9f7d93 AL |
418 | DRM_DEBUG_KMS("opregion backlight request ignored\n"); |
419 | return 0; | |
420 | } | |
421 | ||
8ee1c3db | 422 | if (!(bclp & ASLE_BCLP_VALID)) |
507c1a45 | 423 | return ASLC_BACKLIGHT_FAILED; |
8ee1c3db MG |
424 | |
425 | bclp &= ASLE_BCLP_MSK; | |
a9573556 | 426 | if (bclp > 255) |
507c1a45 | 427 | return ASLC_BACKLIGHT_FAILED; |
8ee1c3db | 428 | |
51fd371b | 429 | drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); |
c91c9f32 | 430 | |
752aa88a | 431 | /* |
c91c9f32 JN |
432 | * Update backlight on all connectors that support backlight (usually |
433 | * only one). | |
752aa88a | 434 | */ |
540b5d02 | 435 | DRM_DEBUG_KMS("updating opregion backlight %d/255\n", bclp); |
dc5a4363 | 436 | list_for_each_entry(intel_connector, &dev->mode_config.connector_list, base.head) |
6dda730e | 437 | intel_panel_set_backlight_acpi(intel_connector, bclp, 255); |
cac6a5ae | 438 | iowrite32(DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID, &asle->cblv); |
8ee1c3db | 439 | |
51fd371b | 440 | drm_modeset_unlock(&dev->mode_config.connection_mutex); |
752aa88a | 441 | |
c91c9f32 JN |
442 | |
443 | return 0; | |
8ee1c3db MG |
444 | } |
445 | ||
446 | static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi) | |
447 | { | |
448 | /* alsi is the current ALS reading in lux. 0 indicates below sensor | |
449 | range, 0xffff indicates above sensor range. 1-0xfffe are valid */ | |
e93d440b | 450 | DRM_DEBUG_DRIVER("Illum is not supported\n"); |
507c1a45 | 451 | return ASLC_ALS_ILLUM_FAILED; |
8ee1c3db MG |
452 | } |
453 | ||
454 | static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb) | |
455 | { | |
e93d440b | 456 | DRM_DEBUG_DRIVER("PWM freq is not supported\n"); |
507c1a45 | 457 | return ASLC_PWM_FREQ_FAILED; |
8ee1c3db MG |
458 | } |
459 | ||
460 | static u32 asle_set_pfit(struct drm_device *dev, u32 pfit) | |
461 | { | |
462 | /* Panel fitting is currently controlled by the X code, so this is a | |
463 | noop until modesetting support works fully */ | |
e93d440b | 464 | DRM_DEBUG_DRIVER("Pfit is not supported\n"); |
507c1a45 PZ |
465 | return ASLC_PFIT_FAILED; |
466 | } | |
467 | ||
468 | static u32 asle_set_supported_rotation_angles(struct drm_device *dev, u32 srot) | |
469 | { | |
470 | DRM_DEBUG_DRIVER("SROT is not supported\n"); | |
471 | return ASLC_ROTATION_ANGLES_FAILED; | |
472 | } | |
473 | ||
474 | static u32 asle_set_button_array(struct drm_device *dev, u32 iuer) | |
475 | { | |
476 | if (!iuer) | |
477 | DRM_DEBUG_DRIVER("Button array event is not supported (nothing)\n"); | |
478 | if (iuer & ASLE_IUER_ROTATION_LOCK_BTN) | |
479 | DRM_DEBUG_DRIVER("Button array event is not supported (rotation lock)\n"); | |
480 | if (iuer & ASLE_IUER_VOLUME_DOWN_BTN) | |
481 | DRM_DEBUG_DRIVER("Button array event is not supported (volume down)\n"); | |
482 | if (iuer & ASLE_IUER_VOLUME_UP_BTN) | |
483 | DRM_DEBUG_DRIVER("Button array event is not supported (volume up)\n"); | |
484 | if (iuer & ASLE_IUER_WINDOWS_BTN) | |
485 | DRM_DEBUG_DRIVER("Button array event is not supported (windows)\n"); | |
486 | if (iuer & ASLE_IUER_POWER_BTN) | |
487 | DRM_DEBUG_DRIVER("Button array event is not supported (power)\n"); | |
488 | ||
489 | return ASLC_BUTTON_ARRAY_FAILED; | |
490 | } | |
491 | ||
492 | static u32 asle_set_convertible(struct drm_device *dev, u32 iuer) | |
493 | { | |
494 | if (iuer & ASLE_IUER_CONVERTIBLE) | |
495 | DRM_DEBUG_DRIVER("Convertible is not supported (clamshell)\n"); | |
496 | else | |
497 | DRM_DEBUG_DRIVER("Convertible is not supported (slate)\n"); | |
498 | ||
499 | return ASLC_CONVERTIBLE_FAILED; | |
500 | } | |
501 | ||
502 | static u32 asle_set_docking(struct drm_device *dev, u32 iuer) | |
503 | { | |
504 | if (iuer & ASLE_IUER_DOCKING) | |
505 | DRM_DEBUG_DRIVER("Docking is not supported (docked)\n"); | |
506 | else | |
507 | DRM_DEBUG_DRIVER("Docking is not supported (undocked)\n"); | |
508 | ||
509 | return ASLC_DOCKING_FAILED; | |
510 | } | |
511 | ||
512 | static u32 asle_isct_state(struct drm_device *dev) | |
513 | { | |
514 | DRM_DEBUG_DRIVER("ISCT is not supported\n"); | |
515 | return ASLC_ISCT_STATE_FAILED; | |
8ee1c3db MG |
516 | } |
517 | ||
91a60f20 | 518 | static void asle_work(struct work_struct *work) |
8ee1c3db | 519 | { |
91a60f20 JN |
520 | struct intel_opregion *opregion = |
521 | container_of(work, struct intel_opregion, asle_work); | |
522 | struct drm_i915_private *dev_priv = | |
523 | container_of(opregion, struct drm_i915_private, opregion); | |
524 | struct drm_device *dev = dev_priv->dev; | |
5bc4418b | 525 | struct opregion_asle __iomem *asle = dev_priv->opregion.asle; |
507c1a45 PZ |
526 | u32 aslc_stat = 0; |
527 | u32 aslc_req; | |
8ee1c3db MG |
528 | |
529 | if (!asle) | |
530 | return; | |
531 | ||
507c1a45 | 532 | aslc_req = ioread32(&asle->aslc); |
8ee1c3db | 533 | |
507c1a45 PZ |
534 | if (!(aslc_req & ASLC_REQ_MSK)) { |
535 | DRM_DEBUG_DRIVER("No request on ASLC interrupt 0x%08x\n", | |
536 | aslc_req); | |
8ee1c3db MG |
537 | return; |
538 | } | |
539 | ||
507c1a45 PZ |
540 | if (aslc_req & ASLC_SET_ALS_ILLUM) |
541 | aslc_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi)); | |
542 | ||
543 | if (aslc_req & ASLC_SET_BACKLIGHT) | |
544 | aslc_stat |= asle_set_backlight(dev, ioread32(&asle->bclp)); | |
545 | ||
546 | if (aslc_req & ASLC_SET_PFIT) | |
547 | aslc_stat |= asle_set_pfit(dev, ioread32(&asle->pfit)); | |
548 | ||
549 | if (aslc_req & ASLC_SET_PWM_FREQ) | |
550 | aslc_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb)); | |
551 | ||
552 | if (aslc_req & ASLC_SUPPORTED_ROTATION_ANGLES) | |
553 | aslc_stat |= asle_set_supported_rotation_angles(dev, | |
554 | ioread32(&asle->srot)); | |
555 | ||
556 | if (aslc_req & ASLC_BUTTON_ARRAY) | |
557 | aslc_stat |= asle_set_button_array(dev, ioread32(&asle->iuer)); | |
8ee1c3db | 558 | |
507c1a45 PZ |
559 | if (aslc_req & ASLC_CONVERTIBLE_INDICATOR) |
560 | aslc_stat |= asle_set_convertible(dev, ioread32(&asle->iuer)); | |
8ee1c3db | 561 | |
507c1a45 PZ |
562 | if (aslc_req & ASLC_DOCKING_INDICATOR) |
563 | aslc_stat |= asle_set_docking(dev, ioread32(&asle->iuer)); | |
8ee1c3db | 564 | |
507c1a45 PZ |
565 | if (aslc_req & ASLC_ISCT_STATE_CHANGE) |
566 | aslc_stat |= asle_isct_state(dev); | |
8ee1c3db | 567 | |
507c1a45 | 568 | iowrite32(aslc_stat, &asle->aslc); |
8ee1c3db MG |
569 | } |
570 | ||
91a60f20 JN |
571 | void intel_opregion_asle_intr(struct drm_device *dev) |
572 | { | |
573 | struct drm_i915_private *dev_priv = dev->dev_private; | |
574 | ||
575 | if (dev_priv->opregion.asle) | |
576 | schedule_work(&dev_priv->opregion.asle_work); | |
577 | } | |
578 | ||
8ee1c3db MG |
579 | #define ACPI_EV_DISPLAY_SWITCH (1<<0) |
580 | #define ACPI_EV_LID (1<<1) | |
581 | #define ACPI_EV_DOCK (1<<2) | |
582 | ||
583 | static struct intel_opregion *system_opregion; | |
584 | ||
b358d0a6 HE |
585 | static int intel_opregion_video_event(struct notifier_block *nb, |
586 | unsigned long val, void *data) | |
8ee1c3db MG |
587 | { |
588 | /* The only video events relevant to opregion are 0x80. These indicate | |
589 | either a docking event, lid switch or display switch request. In | |
590 | Linux, these are handled by the dock, button and video drivers. | |
f5a3d0c4 | 591 | */ |
8ee1c3db | 592 | |
5bc4418b | 593 | struct opregion_acpi __iomem *acpi; |
f5a3d0c4 MG |
594 | struct acpi_bus_event *event = data; |
595 | int ret = NOTIFY_OK; | |
596 | ||
597 | if (strcmp(event->device_class, ACPI_VIDEO_CLASS) != 0) | |
598 | return NOTIFY_DONE; | |
8ee1c3db MG |
599 | |
600 | if (!system_opregion) | |
601 | return NOTIFY_DONE; | |
602 | ||
603 | acpi = system_opregion->acpi; | |
f5a3d0c4 | 604 | |
5bc4418b BW |
605 | if (event->type == 0x80 && |
606 | (ioread32(&acpi->cevt) & 1) == 0) | |
f5a3d0c4 MG |
607 | ret = NOTIFY_BAD; |
608 | ||
5bc4418b | 609 | iowrite32(0, &acpi->csts); |
8ee1c3db | 610 | |
f5a3d0c4 | 611 | return ret; |
8ee1c3db MG |
612 | } |
613 | ||
614 | static struct notifier_block intel_opregion_notifier = { | |
615 | .notifier_call = intel_opregion_video_event, | |
616 | }; | |
617 | ||
74a365b3 MG |
618 | /* |
619 | * Initialise the DIDL field in opregion. This passes a list of devices to | |
620 | * the firmware. Values are defined by section B.4.2 of the ACPI specification | |
621 | * (version 3) | |
622 | */ | |
623 | ||
624 | static void intel_didl_outputs(struct drm_device *dev) | |
625 | { | |
626 | struct drm_i915_private *dev_priv = dev->dev_private; | |
627 | struct intel_opregion *opregion = &dev_priv->opregion; | |
628 | struct drm_connector *connector; | |
3143751f ZR |
629 | acpi_handle handle; |
630 | struct acpi_device *acpi_dev, *acpi_cdev, *acpi_video_bus = NULL; | |
631 | unsigned long long device_id; | |
632 | acpi_status status; | |
5bc4418b | 633 | u32 temp; |
74a365b3 MG |
634 | int i = 0; |
635 | ||
3a83f992 | 636 | handle = ACPI_HANDLE(&dev->pdev->dev); |
7d37beaa | 637 | if (!handle || acpi_bus_get_device(handle, &acpi_dev)) |
3143751f ZR |
638 | return; |
639 | ||
d4e1a692 | 640 | if (acpi_is_video_device(handle)) |
3143751f ZR |
641 | acpi_video_bus = acpi_dev; |
642 | else { | |
643 | list_for_each_entry(acpi_cdev, &acpi_dev->children, node) { | |
d4e1a692 | 644 | if (acpi_is_video_device(acpi_cdev->handle)) { |
3143751f ZR |
645 | acpi_video_bus = acpi_cdev; |
646 | break; | |
647 | } | |
648 | } | |
649 | } | |
650 | ||
651 | if (!acpi_video_bus) { | |
a70491cc | 652 | pr_warn("No ACPI video bus found\n"); |
3143751f ZR |
653 | return; |
654 | } | |
655 | ||
656 | list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) { | |
657 | if (i >= 8) { | |
0f4f7b57 DV |
658 | dev_dbg(&dev->pdev->dev, |
659 | "More than 8 outputs detected via ACPI\n"); | |
3143751f ZR |
660 | return; |
661 | } | |
662 | status = | |
663 | acpi_evaluate_integer(acpi_cdev->handle, "_ADR", | |
664 | NULL, &device_id); | |
665 | if (ACPI_SUCCESS(status)) { | |
666 | if (!device_id) | |
667 | goto blind_set; | |
5bc4418b BW |
668 | iowrite32((u32)(device_id & 0x0f0f), |
669 | &opregion->acpi->didl[i]); | |
3143751f ZR |
670 | i++; |
671 | } | |
672 | } | |
673 | ||
674 | end: | |
675 | /* If fewer than 8 outputs, the list must be null terminated */ | |
676 | if (i < 8) | |
5bc4418b | 677 | iowrite32(0, &opregion->acpi->didl[i]); |
3143751f ZR |
678 | return; |
679 | ||
680 | blind_set: | |
681 | i = 0; | |
74a365b3 MG |
682 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
683 | int output_type = ACPI_OTHER_OUTPUT; | |
684 | if (i >= 8) { | |
0f4f7b57 DV |
685 | dev_dbg(&dev->pdev->dev, |
686 | "More than 8 outputs in connector list\n"); | |
74a365b3 MG |
687 | return; |
688 | } | |
689 | switch (connector->connector_type) { | |
690 | case DRM_MODE_CONNECTOR_VGA: | |
691 | case DRM_MODE_CONNECTOR_DVIA: | |
692 | output_type = ACPI_VGA_OUTPUT; | |
693 | break; | |
694 | case DRM_MODE_CONNECTOR_Composite: | |
695 | case DRM_MODE_CONNECTOR_SVIDEO: | |
696 | case DRM_MODE_CONNECTOR_Component: | |
697 | case DRM_MODE_CONNECTOR_9PinDIN: | |
698 | output_type = ACPI_TV_OUTPUT; | |
699 | break; | |
700 | case DRM_MODE_CONNECTOR_DVII: | |
701 | case DRM_MODE_CONNECTOR_DVID: | |
702 | case DRM_MODE_CONNECTOR_DisplayPort: | |
703 | case DRM_MODE_CONNECTOR_HDMIA: | |
704 | case DRM_MODE_CONNECTOR_HDMIB: | |
705 | output_type = ACPI_DIGITAL_OUTPUT; | |
706 | break; | |
707 | case DRM_MODE_CONNECTOR_LVDS: | |
708 | output_type = ACPI_LVDS_OUTPUT; | |
709 | break; | |
710 | } | |
5bc4418b BW |
711 | temp = ioread32(&opregion->acpi->didl[i]); |
712 | iowrite32(temp | (1<<31) | output_type | i, | |
713 | &opregion->acpi->didl[i]); | |
74a365b3 MG |
714 | i++; |
715 | } | |
3143751f | 716 | goto end; |
74a365b3 MG |
717 | } |
718 | ||
d627b62f L |
719 | static void intel_setup_cadls(struct drm_device *dev) |
720 | { | |
721 | struct drm_i915_private *dev_priv = dev->dev_private; | |
722 | struct intel_opregion *opregion = &dev_priv->opregion; | |
723 | int i = 0; | |
724 | u32 disp_id; | |
725 | ||
726 | /* Initialize the CADL field by duplicating the DIDL values. | |
727 | * Technically, this is not always correct as display outputs may exist, | |
728 | * but not active. This initialization is necessary for some Clevo | |
729 | * laptops that check this field before processing the brightness and | |
730 | * display switching hotkeys. Just like DIDL, CADL is NULL-terminated if | |
731 | * there are less than eight devices. */ | |
732 | do { | |
733 | disp_id = ioread32(&opregion->acpi->didl[i]); | |
734 | iowrite32(disp_id, &opregion->acpi->cadl[i]); | |
735 | } while (++i < 8 && disp_id != 0); | |
736 | } | |
737 | ||
44834a67 CW |
738 | void intel_opregion_init(struct drm_device *dev) |
739 | { | |
740 | struct drm_i915_private *dev_priv = dev->dev_private; | |
741 | struct intel_opregion *opregion = &dev_priv->opregion; | |
742 | ||
743 | if (!opregion->header) | |
744 | return; | |
745 | ||
746 | if (opregion->acpi) { | |
3f52c6ed DV |
747 | intel_didl_outputs(dev); |
748 | intel_setup_cadls(dev); | |
44834a67 CW |
749 | |
750 | /* Notify BIOS we are ready to handle ACPI video ext notifs. | |
751 | * Right now, all the events are handled by the ACPI video module. | |
752 | * We don't actually need to do anything with them. */ | |
5bc4418b BW |
753 | iowrite32(0, &opregion->acpi->csts); |
754 | iowrite32(1, &opregion->acpi->drdy); | |
44834a67 CW |
755 | |
756 | system_opregion = opregion; | |
757 | register_acpi_notifier(&intel_opregion_notifier); | |
758 | } | |
759 | ||
68bca4b0 | 760 | if (opregion->asle) { |
68bca4b0 JN |
761 | iowrite32(ASLE_TCHE_BLC_EN, &opregion->asle->tche); |
762 | iowrite32(ASLE_ARDY_READY, &opregion->asle->ardy); | |
763 | } | |
44834a67 CW |
764 | } |
765 | ||
766 | void intel_opregion_fini(struct drm_device *dev) | |
767 | { | |
768 | struct drm_i915_private *dev_priv = dev->dev_private; | |
769 | struct intel_opregion *opregion = &dev_priv->opregion; | |
770 | ||
771 | if (!opregion->header) | |
772 | return; | |
773 | ||
68bca4b0 JN |
774 | if (opregion->asle) |
775 | iowrite32(ASLE_ARDY_NOT_READY, &opregion->asle->ardy); | |
776 | ||
91a60f20 JN |
777 | cancel_work_sync(&dev_priv->opregion.asle_work); |
778 | ||
44834a67 | 779 | if (opregion->acpi) { |
5bc4418b | 780 | iowrite32(0, &opregion->acpi->drdy); |
44834a67 CW |
781 | |
782 | system_opregion = NULL; | |
783 | unregister_acpi_notifier(&intel_opregion_notifier); | |
784 | } | |
785 | ||
786 | /* just clear all opregion memory pointers now */ | |
787 | iounmap(opregion->header); | |
788 | opregion->header = NULL; | |
789 | opregion->acpi = NULL; | |
790 | opregion->swsci = NULL; | |
791 | opregion->asle = NULL; | |
792 | opregion->vbt = NULL; | |
794a79a6 | 793 | opregion->lid_state = NULL; |
44834a67 | 794 | } |
ebde53c7 JN |
795 | |
796 | static void swsci_setup(struct drm_device *dev) | |
797 | { | |
798 | struct drm_i915_private *dev_priv = dev->dev_private; | |
799 | struct intel_opregion *opregion = &dev_priv->opregion; | |
800 | bool requested_callbacks = false; | |
801 | u32 tmp; | |
802 | ||
803 | /* Sub-function code 0 is okay, let's allow them. */ | |
804 | opregion->swsci_gbda_sub_functions = 1; | |
805 | opregion->swsci_sbcb_sub_functions = 1; | |
806 | ||
807 | /* We use GBDA to ask for supported GBDA calls. */ | |
808 | if (swsci(dev, SWSCI_GBDA_SUPPORTED_CALLS, 0, &tmp) == 0) { | |
809 | /* make the bits match the sub-function codes */ | |
810 | tmp <<= 1; | |
811 | opregion->swsci_gbda_sub_functions |= tmp; | |
812 | } | |
813 | ||
814 | /* | |
815 | * We also use GBDA to ask for _requested_ SBCB callbacks. The driver | |
816 | * must not call interfaces that are not specifically requested by the | |
817 | * bios. | |
818 | */ | |
819 | if (swsci(dev, SWSCI_GBDA_REQUESTED_CALLBACKS, 0, &tmp) == 0) { | |
820 | /* here, the bits already match sub-function codes */ | |
821 | opregion->swsci_sbcb_sub_functions |= tmp; | |
822 | requested_callbacks = true; | |
823 | } | |
824 | ||
825 | /* | |
826 | * But we use SBCB to ask for _supported_ SBCB calls. This does not mean | |
827 | * the callback is _requested_. But we still can't call interfaces that | |
828 | * are not requested. | |
829 | */ | |
830 | if (swsci(dev, SWSCI_SBCB_SUPPORTED_CALLBACKS, 0, &tmp) == 0) { | |
831 | /* make the bits match the sub-function codes */ | |
832 | u32 low = tmp & 0x7ff; | |
833 | u32 high = tmp & ~0xfff; /* bit 11 is reserved */ | |
834 | tmp = (high << 4) | (low << 1) | 1; | |
835 | ||
836 | /* best guess what to do with supported wrt requested */ | |
837 | if (requested_callbacks) { | |
838 | u32 req = opregion->swsci_sbcb_sub_functions; | |
839 | if ((req & tmp) != req) | |
840 | DRM_DEBUG_DRIVER("SWSCI BIOS requested (%08x) SBCB callbacks that are not supported (%08x)\n", req, tmp); | |
841 | /* XXX: for now, trust the requested callbacks */ | |
842 | /* opregion->swsci_sbcb_sub_functions &= tmp; */ | |
843 | } else { | |
844 | opregion->swsci_sbcb_sub_functions |= tmp; | |
845 | } | |
846 | } | |
847 | ||
848 | DRM_DEBUG_DRIVER("SWSCI GBDA callbacks %08x, SBCB callbacks %08x\n", | |
849 | opregion->swsci_gbda_sub_functions, | |
850 | opregion->swsci_sbcb_sub_functions); | |
851 | } | |
852 | #else /* CONFIG_ACPI */ | |
853 | static inline void swsci_setup(struct drm_device *dev) {} | |
854 | #endif /* CONFIG_ACPI */ | |
44834a67 CW |
855 | |
856 | int intel_opregion_setup(struct drm_device *dev) | |
8ee1c3db MG |
857 | { |
858 | struct drm_i915_private *dev_priv = dev->dev_private; | |
859 | struct intel_opregion *opregion = &dev_priv->opregion; | |
5bc4418b | 860 | void __iomem *base; |
8ee1c3db | 861 | u32 asls, mboxes; |
5bc4418b | 862 | char buf[sizeof(OPREGION_SIGNATURE)]; |
8ee1c3db MG |
863 | int err = 0; |
864 | ||
865 | pci_read_config_dword(dev->pdev, PCI_ASLS, &asls); | |
44d98a61 | 866 | DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls); |
8ee1c3db | 867 | if (asls == 0) { |
44d98a61 | 868 | DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n"); |
8ee1c3db MG |
869 | return -ENOTSUPP; |
870 | } | |
871 | ||
1dca220b | 872 | #ifdef CONFIG_ACPI |
91a60f20 | 873 | INIT_WORK(&opregion->asle_work, asle_work); |
1dca220b | 874 | #endif |
91a60f20 | 875 | |
b705120e | 876 | base = acpi_os_ioremap(asls, OPREGION_SIZE); |
8ee1c3db MG |
877 | if (!base) |
878 | return -ENOMEM; | |
879 | ||
5bc4418b BW |
880 | memcpy_fromio(buf, base, sizeof(buf)); |
881 | ||
882 | if (memcmp(buf, OPREGION_SIGNATURE, 16)) { | |
44d98a61 | 883 | DRM_DEBUG_DRIVER("opregion signature mismatch\n"); |
8ee1c3db MG |
884 | err = -EINVAL; |
885 | goto err_out; | |
886 | } | |
44834a67 CW |
887 | opregion->header = base; |
888 | opregion->vbt = base + OPREGION_VBT_OFFSET; | |
8ee1c3db | 889 | |
82d3c90c | 890 | opregion->lid_state = base + ACPI_CLID; |
01fe9dbd | 891 | |
5bc4418b | 892 | mboxes = ioread32(&opregion->header->mboxes); |
8ee1c3db | 893 | if (mboxes & MBOX_ACPI) { |
44d98a61 | 894 | DRM_DEBUG_DRIVER("Public ACPI methods supported\n"); |
8ee1c3db | 895 | opregion->acpi = base + OPREGION_ACPI_OFFSET; |
8ee1c3db | 896 | } |
8ee1c3db MG |
897 | |
898 | if (mboxes & MBOX_SWSCI) { | |
44d98a61 | 899 | DRM_DEBUG_DRIVER("SWSCI supported\n"); |
8ee1c3db | 900 | opregion->swsci = base + OPREGION_SWSCI_OFFSET; |
ebde53c7 | 901 | swsci_setup(dev); |
8ee1c3db MG |
902 | } |
903 | if (mboxes & MBOX_ASLE) { | |
44d98a61 | 904 | DRM_DEBUG_DRIVER("ASLE supported\n"); |
8ee1c3db | 905 | opregion->asle = base + OPREGION_ASLE_OFFSET; |
68bca4b0 JN |
906 | |
907 | iowrite32(ASLE_ARDY_NOT_READY, &opregion->asle->ardy); | |
8ee1c3db MG |
908 | } |
909 | ||
8ee1c3db MG |
910 | return 0; |
911 | ||
912 | err_out: | |
30c56660 | 913 | iounmap(base); |
8ee1c3db MG |
914 | return err; |
915 | } |