drm/i915: fixup pd vs pt confusion in gen6 ppgtt code
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_panel.c
CommitLineData
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1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
a70491cc
JP
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
7bd90909 33#include <linux/moduleparam.h>
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34#include "intel_drv.h"
35
ba3820ad
TI
36#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
37
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38void
39intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
40 struct drm_display_mode *adjusted_mode)
41{
42 adjusted_mode->hdisplay = fixed_mode->hdisplay;
43 adjusted_mode->hsync_start = fixed_mode->hsync_start;
44 adjusted_mode->hsync_end = fixed_mode->hsync_end;
45 adjusted_mode->htotal = fixed_mode->htotal;
46
47 adjusted_mode->vdisplay = fixed_mode->vdisplay;
48 adjusted_mode->vsync_start = fixed_mode->vsync_start;
49 adjusted_mode->vsync_end = fixed_mode->vsync_end;
50 adjusted_mode->vtotal = fixed_mode->vtotal;
51
52 adjusted_mode->clock = fixed_mode->clock;
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CW
53}
54
55/* adjusted_mode has been preset to be the panel's fixed mode */
56void
57intel_pch_panel_fitting(struct drm_device *dev,
58 int fitting_mode,
cb1793ce 59 const struct drm_display_mode *mode,
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60 struct drm_display_mode *adjusted_mode)
61{
62 struct drm_i915_private *dev_priv = dev->dev_private;
63 int x, y, width, height;
64
65 x = y = width = height = 0;
66
67 /* Native modes don't need fitting */
68 if (adjusted_mode->hdisplay == mode->hdisplay &&
69 adjusted_mode->vdisplay == mode->vdisplay)
70 goto done;
71
72 switch (fitting_mode) {
73 case DRM_MODE_SCALE_CENTER:
74 width = mode->hdisplay;
75 height = mode->vdisplay;
76 x = (adjusted_mode->hdisplay - width + 1)/2;
77 y = (adjusted_mode->vdisplay - height + 1)/2;
78 break;
79
80 case DRM_MODE_SCALE_ASPECT:
81 /* Scale but preserve the aspect ratio */
82 {
83 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
84 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
85 if (scaled_width > scaled_height) { /* pillar */
86 width = scaled_height / mode->vdisplay;
302983e9 87 if (width & 1)
0206e353 88 width++;
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89 x = (adjusted_mode->hdisplay - width + 1) / 2;
90 y = 0;
91 height = adjusted_mode->vdisplay;
92 } else if (scaled_width < scaled_height) { /* letter */
93 height = scaled_width / mode->hdisplay;
302983e9
AJ
94 if (height & 1)
95 height++;
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96 y = (adjusted_mode->vdisplay - height + 1) / 2;
97 x = 0;
98 width = adjusted_mode->hdisplay;
99 } else {
100 x = y = 0;
101 width = adjusted_mode->hdisplay;
102 height = adjusted_mode->vdisplay;
103 }
104 }
105 break;
106
107 default:
108 case DRM_MODE_SCALE_FULLSCREEN:
109 x = y = 0;
110 width = adjusted_mode->hdisplay;
111 height = adjusted_mode->vdisplay;
112 break;
113 }
114
115done:
116 dev_priv->pch_pf_pos = (x << 16) | y;
117 dev_priv->pch_pf_size = (width << 16) | height;
118}
a9573556 119
ba3820ad
TI
120static int is_backlight_combination_mode(struct drm_device *dev)
121{
122 struct drm_i915_private *dev_priv = dev->dev_private;
123
124 if (INTEL_INFO(dev)->gen >= 4)
125 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
126
127 if (IS_GEN2(dev))
128 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
129
130 return 0;
131}
132
bfd7590d 133static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
0b0b053a 134{
bfd7590d 135 struct drm_i915_private *dev_priv = dev->dev_private;
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136 u32 val;
137
138 /* Restore the CTL value if it lost, e.g. GPU reset */
139
140 if (HAS_PCH_SPLIT(dev_priv->dev)) {
141 val = I915_READ(BLC_PWM_PCH_CTL2);
f4c956ad
DV
142 if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
143 dev_priv->regfile.saveBLC_PWM_CTL2 = val;
0b0b053a 144 } else if (val == 0) {
f4c956ad 145 val = dev_priv->regfile.saveBLC_PWM_CTL2;
bfd7590d 146 I915_WRITE(BLC_PWM_PCH_CTL2, val);
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147 }
148 } else {
149 val = I915_READ(BLC_PWM_CTL);
f4c956ad
DV
150 if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
151 dev_priv->regfile.saveBLC_PWM_CTL = val;
bfd7590d
JN
152 if (INTEL_INFO(dev)->gen >= 4)
153 dev_priv->regfile.saveBLC_PWM_CTL2 =
154 I915_READ(BLC_PWM_CTL2);
0b0b053a 155 } else if (val == 0) {
f4c956ad 156 val = dev_priv->regfile.saveBLC_PWM_CTL;
bfd7590d
JN
157 I915_WRITE(BLC_PWM_CTL, val);
158 if (INTEL_INFO(dev)->gen >= 4)
159 I915_WRITE(BLC_PWM_CTL2,
160 dev_priv->regfile.saveBLC_PWM_CTL2);
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161 }
162 }
163
164 return val;
165}
166
28dcc2d6 167static u32 _intel_panel_get_max_backlight(struct drm_device *dev)
a9573556 168{
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169 u32 max;
170
bfd7590d 171 max = i915_read_blc_pwm_ctl(dev);
0b0b053a 172
a9573556 173 if (HAS_PCH_SPLIT(dev)) {
0b0b053a 174 max >>= 16;
a9573556 175 } else {
ca88479c 176 if (INTEL_INFO(dev)->gen < 4)
a9573556 177 max >>= 17;
ca88479c 178 else
a9573556 179 max >>= 16;
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TI
180
181 if (is_backlight_combination_mode(dev))
182 max *= 0xff;
a9573556
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183 }
184
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185 return max;
186}
187
188u32 intel_panel_get_max_backlight(struct drm_device *dev)
189{
190 u32 max;
191
192 max = _intel_panel_get_max_backlight(dev);
193 if (max == 0) {
194 /* XXX add code here to query mode clock or hardware clock
195 * and program max PWM appropriately.
196 */
197 pr_warn_once("fixme: max PWM is zero\n");
198 return 1;
199 }
200
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201 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
202 return max;
203}
204
4dca20ef
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205static int i915_panel_invert_brightness;
206MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
207 "(-1 force normal, 0 machine defaults, 1 force inversion), please "
7bd90909
CE
208 "report PCI device ID, subsystem vendor and subsystem device ID "
209 "to dri-devel@lists.freedesktop.org, if your machine needs it. "
210 "It will then be included in an upcoming module version.");
4dca20ef 211module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
7bd90909
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212static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
213{
4dca20ef
CE
214 struct drm_i915_private *dev_priv = dev->dev_private;
215
216 if (i915_panel_invert_brightness < 0)
217 return val;
218
219 if (i915_panel_invert_brightness > 0 ||
220 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)
7bd90909
CE
221 return intel_panel_get_max_backlight(dev) - val;
222
223 return val;
224}
225
faea35dd 226static u32 intel_panel_get_backlight(struct drm_device *dev)
a9573556
CW
227{
228 struct drm_i915_private *dev_priv = dev->dev_private;
229 u32 val;
230
231 if (HAS_PCH_SPLIT(dev)) {
232 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
233 } else {
234 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
ca88479c 235 if (INTEL_INFO(dev)->gen < 4)
a9573556 236 val >>= 1;
ba3820ad 237
0206e353 238 if (is_backlight_combination_mode(dev)) {
ba3820ad
TI
239 u8 lbpc;
240
ba3820ad
TI
241 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
242 val *= lbpc;
243 }
a9573556
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244 }
245
7bd90909 246 val = intel_panel_compute_brightness(dev, val);
a9573556
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247 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
248 return val;
249}
250
251static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
252{
253 struct drm_i915_private *dev_priv = dev->dev_private;
254 u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
255 I915_WRITE(BLC_PWM_CPU_CTL, val | level);
256}
257
f52c619a 258static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
a9573556
CW
259{
260 struct drm_i915_private *dev_priv = dev->dev_private;
261 u32 tmp;
262
263 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
7bd90909 264 level = intel_panel_compute_brightness(dev, level);
a9573556
CW
265
266 if (HAS_PCH_SPLIT(dev))
267 return intel_pch_panel_set_backlight(dev, level);
ba3820ad 268
0206e353 269 if (is_backlight_combination_mode(dev)) {
ba3820ad
TI
270 u32 max = intel_panel_get_max_backlight(dev);
271 u8 lbpc;
272
273 lbpc = level * 0xfe / max + 1;
274 level /= lbpc;
275 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
276 }
277
a9573556 278 tmp = I915_READ(BLC_PWM_CTL);
a726915c 279 if (INTEL_INFO(dev)->gen < 4)
a9573556 280 level <<= 1;
ca88479c 281 tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
a9573556
CW
282 I915_WRITE(BLC_PWM_CTL, tmp | level);
283}
47356eb6 284
f52c619a 285void intel_panel_set_backlight(struct drm_device *dev, u32 level)
47356eb6
CW
286{
287 struct drm_i915_private *dev_priv = dev->dev_private;
288
f52c619a
TI
289 dev_priv->backlight_level = level;
290 if (dev_priv->backlight_enabled)
291 intel_panel_actually_set_backlight(dev, level);
292}
293
294void intel_panel_disable_backlight(struct drm_device *dev)
295{
296 struct drm_i915_private *dev_priv = dev->dev_private;
47356eb6 297
f52c619a
TI
298 dev_priv->backlight_enabled = false;
299 intel_panel_actually_set_backlight(dev, 0);
24ded204
DV
300
301 if (INTEL_INFO(dev)->gen >= 4) {
a4f32fc3 302 uint32_t reg, tmp;
24ded204
DV
303
304 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
305
306 I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
a4f32fc3
PZ
307
308 if (HAS_PCH_SPLIT(dev)) {
309 tmp = I915_READ(BLC_PWM_PCH_CTL1);
310 tmp &= ~BLM_PCH_PWM_ENABLE;
311 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
312 }
24ded204 313 }
47356eb6
CW
314}
315
24ded204
DV
316void intel_panel_enable_backlight(struct drm_device *dev,
317 enum pipe pipe)
47356eb6
CW
318{
319 struct drm_i915_private *dev_priv = dev->dev_private;
320
321 if (dev_priv->backlight_level == 0)
322 dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
323
cf0a6584
DV
324 dev_priv->backlight_enabled = true;
325 intel_panel_actually_set_backlight(dev, dev_priv->backlight_level);
326
24ded204
DV
327 if (INTEL_INFO(dev)->gen >= 4) {
328 uint32_t reg, tmp;
329
330 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
331
332
333 tmp = I915_READ(reg);
334
335 /* Note that this can also get called through dpms changes. And
336 * we don't track the backlight dpms state, hence check whether
337 * we have to do anything first. */
338 if (tmp & BLM_PWM_ENABLE)
770c1231 339 goto set_level;
24ded204
DV
340
341 if (dev_priv->num_pipe == 3)
342 tmp &= ~BLM_PIPE_SELECT_IVB;
343 else
344 tmp &= ~BLM_PIPE_SELECT;
345
346 tmp |= BLM_PIPE(pipe);
347 tmp &= ~BLM_PWM_ENABLE;
348
349 I915_WRITE(reg, tmp);
350 POSTING_READ(reg);
351 I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
a4f32fc3
PZ
352
353 if (HAS_PCH_SPLIT(dev)) {
354 tmp = I915_READ(BLC_PWM_PCH_CTL1);
355 tmp |= BLM_PCH_PWM_ENABLE;
356 tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
357 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
358 }
24ded204 359 }
770c1231
TI
360
361set_level:
cf0a6584
DV
362 /* Check the current backlight level and try to set again if it's zero.
363 * On some machines, BLC_PWM_CPU_CTL is cleared to zero automatically
364 * when BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1 are written.
770c1231 365 */
cf0a6584
DV
366 if (!intel_panel_get_backlight(dev))
367 intel_panel_actually_set_backlight(dev, dev_priv->backlight_level);
47356eb6
CW
368}
369
aaa6fd2a 370static void intel_panel_init_backlight(struct drm_device *dev)
47356eb6
CW
371{
372 struct drm_i915_private *dev_priv = dev->dev_private;
373
c8303e7f 374 dev_priv->backlight_level = intel_panel_get_backlight(dev);
47356eb6
CW
375 dev_priv->backlight_enabled = dev_priv->backlight_level != 0;
376}
fe16d949
CW
377
378enum drm_connector_status
379intel_panel_detect(struct drm_device *dev)
380{
381 struct drm_i915_private *dev_priv = dev->dev_private;
382
383 /* Assume that the BIOS does not lie through the OpRegion... */
a726915c 384 if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
fe16d949
CW
385 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
386 connector_status_connected :
387 connector_status_disconnected;
a726915c 388 }
fe16d949 389
a726915c
DV
390 switch (i915_panel_ignore_lid) {
391 case -2:
392 return connector_status_connected;
393 case -1:
394 return connector_status_disconnected;
395 default:
396 return connector_status_unknown;
397 }
fe16d949 398}
aaa6fd2a
MG
399
400#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
401static int intel_panel_update_status(struct backlight_device *bd)
402{
403 struct drm_device *dev = bl_get_data(bd);
404 intel_panel_set_backlight(dev, bd->props.brightness);
405 return 0;
406}
407
408static int intel_panel_get_brightness(struct backlight_device *bd)
409{
410 struct drm_device *dev = bl_get_data(bd);
04b38670
TI
411 struct drm_i915_private *dev_priv = dev->dev_private;
412 return dev_priv->backlight_level;
aaa6fd2a
MG
413}
414
415static const struct backlight_ops intel_panel_bl_ops = {
416 .update_status = intel_panel_update_status,
417 .get_brightness = intel_panel_get_brightness,
418};
419
0657b6b1 420int intel_panel_setup_backlight(struct drm_connector *connector)
aaa6fd2a 421{
0657b6b1 422 struct drm_device *dev = connector->dev;
aaa6fd2a
MG
423 struct drm_i915_private *dev_priv = dev->dev_private;
424 struct backlight_properties props;
aaa6fd2a
MG
425
426 intel_panel_init_backlight(dev);
427
af437cfd 428 memset(&props, 0, sizeof(props));
aaa6fd2a 429 props.type = BACKLIGHT_RAW;
28dcc2d6
JN
430 props.max_brightness = _intel_panel_get_max_backlight(dev);
431 if (props.max_brightness == 0) {
e86b6185 432 DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
28dcc2d6
JN
433 return -ENODEV;
434 }
aaa6fd2a
MG
435 dev_priv->backlight =
436 backlight_device_register("intel_backlight",
437 &connector->kdev, dev,
438 &intel_panel_bl_ops, &props);
439
440 if (IS_ERR(dev_priv->backlight)) {
441 DRM_ERROR("Failed to register backlight: %ld\n",
442 PTR_ERR(dev_priv->backlight));
443 dev_priv->backlight = NULL;
444 return -ENODEV;
445 }
446 dev_priv->backlight->props.brightness = intel_panel_get_backlight(dev);
447 return 0;
448}
449
450void intel_panel_destroy_backlight(struct drm_device *dev)
451{
452 struct drm_i915_private *dev_priv = dev->dev_private;
453 if (dev_priv->backlight)
454 backlight_device_unregister(dev_priv->backlight);
455}
456#else
0657b6b1 457int intel_panel_setup_backlight(struct drm_connector *connector)
aaa6fd2a 458{
0657b6b1 459 intel_panel_init_backlight(connector->dev);
aaa6fd2a
MG
460 return 0;
461}
462
463void intel_panel_destroy_backlight(struct drm_device *dev)
464{
465 return;
466}
467#endif
1d508706 468
dd06f90e
JN
469int intel_panel_init(struct intel_panel *panel,
470 struct drm_display_mode *fixed_mode)
1d508706 471{
dd06f90e
JN
472 panel->fixed_mode = fixed_mode;
473
1d508706
JN
474 return 0;
475}
476
477void intel_panel_fini(struct intel_panel *panel)
478{
dd06f90e
JN
479 struct intel_connector *intel_connector =
480 container_of(panel, struct intel_connector, panel);
481
482 if (panel->fixed_mode)
483 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1d508706 484}
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